The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/ingenic/jz4780_rtc.c

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    1 /*-
    2  * Copyright 2016 Alexander Kabaev <kan@FreeBSD.org>
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 /*
   28  * Ingenic JZ4780 RTC driver
   29  *
   30  */
   31 
   32 #include <sys/cdefs.h>
   33 __FBSDID("$FreeBSD: stable/12/sys/mips/ingenic/jz4780_rtc.c 310493 2016-12-24 02:31:26Z kan $");
   34 
   35 #include <sys/param.h>
   36 #include <sys/systm.h>
   37 #include <sys/conf.h>
   38 #include <sys/clock.h>
   39 #include <sys/bus.h>
   40 #include <sys/kernel.h>
   41 #include <sys/module.h>
   42 #include <sys/resource.h>
   43 
   44 #include <machine/bus.h>
   45 
   46 #include <dev/ofw/ofw_bus.h>
   47 #include <dev/ofw/ofw_bus_subr.h>
   48 
   49 #include "clock_if.h"
   50 
   51 #define JZ_RTC_TIMEOUT  5000
   52 
   53 #define JZ_RTCCR        0x00
   54 # define JZ_RTCCR_WRDY  (1u << 7)
   55 #define JZ_RTSR         0x04
   56 #define JZ_HSPR         0x34
   57 #define JZ_WENR         0x3C
   58 # define JZ_WENR_PAT    0xa55a
   59 # define JZ_WENR_WEN    (1u <<31)
   60 
   61 struct jz4780_rtc_softc {
   62         device_t                dev;
   63         struct resource         *res[2];
   64 };
   65 
   66 static struct resource_spec jz4780_rtc_spec[] = {
   67         { SYS_RES_MEMORY, 0, RF_ACTIVE },
   68         { SYS_RES_IRQ,    0, RF_ACTIVE },
   69         { -1, 0 }
   70 };
   71 
   72 #define CSR_READ(sc, reg)       bus_read_4((sc)->res[0], (reg))
   73 #define CSR_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
   74 
   75 static int jz4780_rtc_probe(device_t dev);
   76 static int jz4780_rtc_attach(device_t dev);
   77 static int jz4780_rtc_detach(device_t dev);
   78 
   79 static int
   80 jz4780_rtc_probe(device_t dev)
   81 {
   82 
   83         if (!ofw_bus_status_okay(dev))
   84                 return (ENXIO);
   85 
   86         if (!ofw_bus_is_compatible(dev, "ingenic,jz4780-rtc"))
   87                 return (ENXIO);
   88 
   89         device_set_desc(dev, "JZ4780 RTC");
   90 
   91         return (BUS_PROBE_DEFAULT);
   92 }
   93 
   94 /* Poll control register until RTC is ready to accept register writes */
   95 static int
   96 jz4780_rtc_wait(struct jz4780_rtc_softc *sc)
   97 {
   98         int timeout;
   99 
  100         timeout = JZ_RTC_TIMEOUT;
  101         while (timeout-- > 0) {
  102                 if (CSR_READ(sc, JZ_RTCCR) & JZ_RTCCR_WRDY)
  103                         return (0);
  104         }
  105         return (EIO);
  106 }
  107 
  108 /*
  109  * Write RTC register. It appears that RTC goes into read-only mode at random,
  110  * which suggests something is up with how it is powered up, so do the pattern
  111  * writing dance every time just in case.
  112  */
  113 static int
  114 jz4780_rtc_write(struct jz4780_rtc_softc *sc, uint32_t reg, uint32_t val)
  115 {
  116         int ret, timeout;
  117 
  118         ret = jz4780_rtc_wait(sc);
  119         if (ret != 0)
  120                 return (ret);
  121 
  122         CSR_WRITE(sc, JZ_WENR, JZ_WENR_PAT);
  123 
  124         ret = jz4780_rtc_wait(sc);
  125         if (ret)
  126                 return ret;
  127 
  128         timeout = JZ_RTC_TIMEOUT;
  129         while (timeout-- > 0) {
  130                 if (CSR_READ(sc, JZ_WENR) & JZ_WENR_WEN)
  131                         break;
  132         }
  133         if (timeout < 0)
  134                 return (EIO);
  135 
  136         CSR_WRITE(sc, reg, val);
  137         return 0;
  138 }
  139 
  140 static int
  141 jz4780_rtc_attach(device_t dev)
  142 {
  143         struct jz4780_rtc_softc *sc = device_get_softc(dev);
  144         uint32_t scratch;
  145         int ret;
  146 
  147         sc->dev = dev;
  148 
  149         if (bus_alloc_resources(dev, jz4780_rtc_spec, sc->res)) {
  150                 device_printf(dev, "could not allocate resources for device\n");
  151                 return (ENXIO);
  152         }
  153 
  154         scratch = CSR_READ(sc, JZ_HSPR);
  155         if (scratch != 0x12345678) {
  156                 ret = jz4780_rtc_write(sc, JZ_HSPR, 0x12345678);
  157                 if (ret == 0)
  158                         ret = jz4780_rtc_write(sc, JZ_RTSR, 0);
  159                 if (ret) {
  160                         device_printf(dev, "Unable to write RTC registers\n");
  161                         jz4780_rtc_detach(dev);
  162                         return (ret);
  163                 }
  164         }
  165         clock_register(dev, 1000000); /* Register 1 HZ clock */
  166         return (0);
  167 }
  168 
  169 static int
  170 jz4780_rtc_detach(device_t dev)
  171 {
  172         struct jz4780_rtc_softc *sc;
  173 
  174         sc = device_get_softc(dev);
  175         bus_release_resources(dev, jz4780_rtc_spec, sc->res);
  176         return (0);
  177 }
  178 
  179 static int
  180 jz4780_rtc_gettime(device_t dev, struct timespec *ts)
  181 {
  182         struct jz4780_rtc_softc *sc;
  183         uint32_t val1, val2;
  184         int timeout;
  185 
  186         sc = device_get_softc(dev);
  187 
  188         timeout = JZ_RTC_TIMEOUT;
  189         val2 = CSR_READ(sc, JZ_RTSR);
  190         do {
  191                 val1 = val2;
  192                 val2 = CSR_READ(sc, JZ_RTSR);
  193         } while (val1 != val2 && timeout-- >= 0);
  194 
  195         if (timeout < 0)
  196                 return (EIO);
  197 
  198         /* Convert secs to timespec directly */
  199         ts->tv_sec = val1;
  200         ts->tv_nsec = 0;
  201         return 0;
  202 }
  203 
  204 static int
  205 jz4780_rtc_settime(device_t dev, struct timespec *ts)
  206 {
  207         struct jz4780_rtc_softc *sc;
  208 
  209         sc = device_get_softc(dev);
  210         return jz4780_rtc_write(sc, JZ_RTSR, ts->tv_sec);
  211 }
  212 
  213 static device_method_t jz4780_rtc_methods[] = {
  214         /* Device interface */
  215         DEVMETHOD(device_probe,         jz4780_rtc_probe),
  216         DEVMETHOD(device_attach,        jz4780_rtc_attach),
  217         DEVMETHOD(device_detach,        jz4780_rtc_detach),
  218 
  219         DEVMETHOD(clock_gettime,        jz4780_rtc_gettime),
  220         DEVMETHOD(clock_settime,        jz4780_rtc_settime),
  221 
  222         DEVMETHOD_END
  223 };
  224 
  225 static driver_t jz4780_rtc_driver = {
  226         "jz4780_rtc",
  227         jz4780_rtc_methods,
  228         sizeof(struct jz4780_rtc_softc),
  229 };
  230 
  231 static devclass_t jz4780_rtc_devclass;
  232 
  233 EARLY_DRIVER_MODULE(jz4780_rtc, simplebus, jz4780_rtc_driver,
  234     jz4780_rtc_devclass, 0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);

Cache object: 88a6435262fa6834d15f7dffa84b4c67


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