1 /*-
2 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include "opt_ddb.h"
32
33 #include <sys/param.h>
34 #include <sys/conf.h>
35 #include <sys/kernel.h>
36 #include <sys/systm.h>
37 #include <sys/imgact.h>
38 #include <sys/bio.h>
39 #include <sys/buf.h>
40 #include <sys/bus.h>
41 #include <sys/cpu.h>
42 #include <sys/cons.h>
43 #include <sys/exec.h>
44 #include <sys/ucontext.h>
45 #include <sys/proc.h>
46 #include <sys/kdb.h>
47 #include <sys/ptrace.h>
48 #include <sys/reboot.h>
49 #include <sys/signalvar.h>
50 #include <sys/sysent.h>
51 #include <sys/sysproto.h>
52 #include <sys/user.h>
53
54 #include <vm/vm.h>
55 #include <vm/vm_object.h>
56 #include <vm/vm_page.h>
57 #include <vm/vm_pager.h>
58
59 #include <machine/clock.h>
60 #include <machine/cpu.h>
61 #include <machine/cpuregs.h>
62 #include <machine/hwfunc.h>
63 #include <machine/md_var.h>
64 #include <machine/pmap.h>
65 #include <machine/trap.h>
66
67 #ifdef TICK_USE_YAMON_FREQ
68 #include <mips/malta/yamon.h>
69 #endif
70
71 #ifdef TICK_USE_MALTA_RTC
72 #include <mips/mips4k/malta/maltareg.h>
73 #include <dev/mc146818/mc146818reg.h>
74 #include <isa/rtc.h>
75 #endif
76
77 #include <mips/malta/maltareg.h>
78
79 extern int *edata;
80 extern int *end;
81
82 void lcd_init(void);
83 void lcd_puts(char *);
84 void malta_reset(void);
85
86 /*
87 * Offsets to MALTA LCD characters.
88 */
89 static int malta_lcd_offs[] = {
90 MALTA_ASCIIPOS0,
91 MALTA_ASCIIPOS1,
92 MALTA_ASCIIPOS2,
93 MALTA_ASCIIPOS3,
94 MALTA_ASCIIPOS4,
95 MALTA_ASCIIPOS5,
96 MALTA_ASCIIPOS6,
97 MALTA_ASCIIPOS7
98 };
99
100 void
101 platform_cpu_init()
102 {
103 /* Nothing special */
104 }
105
106 /*
107 * Put character to Malta LCD at given position.
108 */
109 static void
110 malta_lcd_putc(int pos, char c)
111 {
112 void *addr;
113 char *ch;
114
115 if (pos < 0 || pos > 7)
116 return;
117 addr = (void *)(MALTA_ASCII_BASE + malta_lcd_offs[pos]);
118 ch = (char *)MIPS_PHYS_TO_KSEG0(addr);
119 *ch = c;
120 }
121
122 /*
123 * Print given string on LCD.
124 */
125 static void
126 malta_lcd_print(char *str)
127 {
128 int i;
129
130 if (str == NULL)
131 return;
132
133 for (i = 0; *str != '\0'; i++, str++)
134 malta_lcd_putc(i, *str);
135 }
136
137 void
138 lcd_init(void)
139 {
140 malta_lcd_print("FreeBSD_");
141 }
142
143 void
144 lcd_puts(char *s)
145 {
146 malta_lcd_print(s);
147 }
148
149 #ifdef TICK_USE_MALTA_RTC
150 static __inline uint8_t
151 rtcin(uint8_t addr)
152 {
153
154 *((volatile uint8_t *)
155 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
156 return (*((volatile uint8_t *)
157 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))));
158 }
159
160 static __inline void
161 writertc(uint8_t addr, uint8_t val)
162 {
163
164 *((volatile uint8_t *)
165 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr;
166 *((volatile uint8_t *)
167 MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val;
168 }
169 #endif
170
171 static void
172 mips_init(void)
173 {
174 int i;
175
176 for (i = 0; i < 10; i++) {
177 phys_avail[i] = 0;
178 }
179
180 /* phys_avail regions are in bytes */
181 phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
182 phys_avail[1] = ctob(realmem);
183
184 dump_avail[0] = phys_avail[0];
185 dump_avail[1] = phys_avail[1];
186
187 physmem = realmem;
188
189 init_param1();
190 init_param2(physmem);
191 mips_cpu_init();
192 pmap_bootstrap();
193 mips_proc0_init();
194 mutex_init();
195 kdb_init();
196 #ifdef KDB
197 if (boothowto & RB_KDB)
198 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
199 #endif
200 }
201
202 void
203 platform_halt(void)
204 {
205
206 }
207
208
209 void
210 platform_identify(void)
211 {
212
213 }
214
215 /*
216 * Perform a board-level soft-reset.
217 * Note that this is not emulated by gxemul.
218 */
219 void
220 platform_reset(void)
221 {
222 char *c;
223
224 c = (char *)MIPS_PHYS_TO_KSEG0(MALTA_SOFTRES);
225 *c = MALTA_GORESET;
226 }
227
228 void
229 platform_trap_enter(void)
230 {
231
232 }
233
234 void
235 platform_trap_exit(void)
236 {
237
238 }
239
240 static uint64_t
241 malta_cpu_freq(void)
242 {
243 uint64_t platform_counter_freq = 0;
244
245 #if defined(TICK_USE_YAMON_FREQ)
246 /*
247 * If we are running on a board which uses YAMON firmware,
248 * then query CPU pipeline clock from the syscon object.
249 * If unsuccessful, use hard-coded default.
250 */
251 platform_counter_freq = yamon_getcpufreq();
252
253 #elif defined(TICK_USE_MALTA_RTC)
254 /*
255 * If we are running on a board with the MC146818 RTC,
256 * use it to determine CPU pipeline clock frequency.
257 */
258 u_int64_t counterval[2];
259
260 /* Set RTC to binary mode. */
261 writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD));
262
263 /* Busy-wait for falling edge of RTC update. */
264 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
265 ;
266 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
267 ;
268 counterval[0] = mips_rd_count();
269
270 /* Busy-wait for falling edge of RTC update. */
271 while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
272 ;
273 while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
274 ;
275 counterval[1] = mips_rd_count();
276
277 platform_counter_freq = counterval[1] - counterval[0];
278 #endif
279
280 if (platform_counter_freq == 0)
281 platform_counter_freq = MIPS_DEFAULT_HZ;
282
283 return (platform_counter_freq);
284 }
285
286 void
287 platform_start(__register_t a0, __register_t a1, __register_t a2,
288 __register_t a3)
289 {
290 vm_offset_t kernend;
291 uint64_t platform_counter_freq;
292 int argc = a0;
293 char **argv = (char **)a1;
294 char **envp = (char **)a2;
295 unsigned int memsize = a3;
296 int i;
297
298 /* clear the BSS and SBSS segments */
299 kernend = (vm_offset_t)&end;
300 memset(&edata, 0, kernend - (vm_offset_t)(&edata));
301
302 mips_postboot_fixup();
303
304 mips_pcpu0_init();
305 platform_counter_freq = malta_cpu_freq();
306 mips_timer_early_init(platform_counter_freq);
307
308 cninit();
309 printf("entry: platform_start()\n");
310
311 bootverbose = 1;
312 if (bootverbose) {
313 printf("cmd line: ");
314 for (i = 0; i < argc; i++)
315 printf("%s ", argv[i]);
316 printf("\n");
317
318 printf("envp:\n");
319 for (i = 0; envp[i]; i += 2)
320 printf("\t%s = %s\n", envp[i], envp[i+1]);
321
322 printf("memsize = %08x\n", memsize);
323 }
324
325 realmem = btoc(memsize);
326 mips_init();
327
328 mips_timer_init_params(platform_counter_freq, 0);
329 }
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