1 /*-
2 * Copyright (c) 2016 Stanislav Galabov
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 */
27
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD: releng/12.0/sys/mips/mediatek/mtk_clock.c 297667 2016-04-07 11:08:50Z sgalabov $");
30
31 #include <sys/param.h>
32 #include <sys/kernel.h>
33 #include <sys/bus.h>
34 #include <sys/module.h>
35
36 #include <dev/fdt/fdt_common.h>
37 #include <dev/ofw/openfirm.h>
38 #include <dev/ofw/ofw_bus.h>
39 #include <dev/ofw/ofw_bus_subr.h>
40 #include <dev/fdt/fdt_clock.h>
41
42 #include <mips/mediatek/mtk_sysctl.h>
43
44 #include "fdt_clock_if.h"
45
46 static const struct ofw_compat_data compat_data[] = {
47 { "ralink,rt2880-clock", 1 },
48
49 /* Sentinel */
50 { NULL, 0 }
51 };
52
53 static int
54 mtk_clock_probe(device_t dev)
55 {
56
57 if (!ofw_bus_status_okay(dev))
58 return (ENXIO);
59
60 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
61 return (ENXIO);
62
63 device_set_desc(dev, "MTK Clock Controller");
64
65 return (0);
66 }
67
68 static int
69 mtk_clock_attach(device_t dev)
70 {
71
72 if (device_get_unit(dev) != 0) {
73 device_printf(dev, "Only one clock control allowed\n");
74 return (ENXIO);
75 }
76
77 fdt_clock_register_provider(dev);
78
79 return (0);
80 }
81
82 #define CLOCK_ENABLE 1
83 #define CLOCK_DISABLE 0
84
85 static int
86 mtk_clock_set(device_t dev, int index, int value)
87 {
88 uint32_t mask;
89
90 /* Clock config register holds 32 clock gating bits */
91 if (index < 0 || index > 31)
92 return (EINVAL);
93
94 mask = (1u << index);
95
96 if (value == CLOCK_ENABLE)
97 mtk_sysctl_clr_set(SYSCTL_CLKCFG1, 0, mask);
98 else
99 mtk_sysctl_clr_set(SYSCTL_CLKCFG1, mask, 0);
100
101 return (0);
102 }
103
104 static int
105 mtk_clock_enable(device_t dev, int index)
106 {
107
108 return mtk_clock_set(dev, index, CLOCK_ENABLE);
109 }
110
111 static int
112 mtk_clock_disable(device_t dev, int index)
113 {
114
115 return mtk_clock_set(dev, index, CLOCK_DISABLE);
116 }
117
118 static int
119 mtk_clock_get_info(device_t dev, int index, struct fdt_clock_info *info)
120 {
121 uint32_t mask;
122
123 if (index < 0 || index > 31 || info == NULL)
124 return (EINVAL);
125
126 if (mtk_sysctl_get(SYSCTL_CLKCFG1) & mask)
127 info->flags = FDT_CIFLAG_RUNNING;
128 else
129 info->flags = 0;
130
131 return (0);
132 }
133
134 static device_method_t mtk_clock_methods[] = {
135 DEVMETHOD(device_probe, mtk_clock_probe),
136 DEVMETHOD(device_attach, mtk_clock_attach),
137
138 /* fdt_clock interface */
139 DEVMETHOD(fdt_clock_enable, mtk_clock_enable),
140 DEVMETHOD(fdt_clock_disable, mtk_clock_disable),
141 DEVMETHOD(fdt_clock_get_info, mtk_clock_get_info),
142
143 DEVMETHOD_END
144 };
145
146 static driver_t mtk_clock_driver = {
147 "clkctrl",
148 mtk_clock_methods,
149 0,
150 };
151 static devclass_t mtk_clock_devclass;
152
153 EARLY_DRIVER_MODULE(mtk_clock, simplebus, mtk_clock_driver, mtk_clock_devclass,
154 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_EARLY);
155
156 MODULE_DEPEND(mtk_clock, mtk_sysctl, 1, 1, 1);
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