mtk_gpio_v1.c

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    1 /*-
    2  * Copyright 2016 Stanislav Galabov
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  *
   14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   24  * SUCH DAMAGE.
   25  */
   26 
   27 #include <sys/cdefs.h>
   28 __FBSDID("$FreeBSD: releng/11.1/sys/mips/mediatek/mtk_gpio_v1.c 300149 2016-05-18 15:05:44Z andrew $");
   29         
   30 #include "opt_platform.h"
   31 
   32 #include <sys/param.h>
   33 #include <sys/systm.h>
   34 #include <sys/conf.h>
   35 #include <sys/bus.h>
   36 #include <sys/kernel.h>
   37 #include <sys/module.h>
   38 #include <sys/lock.h>
   39 #include <sys/mutex.h>
   40 #include <sys/proc.h>
   41 #include <sys/resource.h>
   42 #include <sys/gpio.h>
   43                 
   44 #include <machine/bus.h>
   45 #include <machine/intr.h>
   46 
   47 #include <mips/mediatek/mtk_soc.h>
   48                 
   49 #include <dev/gpio/gpiobusvar.h>
   50                 
   51 #include <dev/fdt/fdt_common.h>
   52 #include <dev/ofw/ofw_bus.h>
   53 #include <dev/ofw/ofw_bus_subr.h>
   54 
   55 #include <gnu/dts/include/dt-bindings/interrupt-controller/irq.h>
   56 
   57 #include "gpio_if.h"
   58 #include "pic_if.h"
   59 
   60 #define MTK_GPIO_PINS 32
   61 
   62 enum mtk_gpio_regs {
   63         GPIO_PIOINT = 0,
   64         GPIO_PIOEDGE,
   65         GPIO_PIORENA,
   66         GPIO_PIOFENA,
   67         GPIO_PIODATA,
   68         GPIO_PIODIR,
   69         GPIO_PIOPOL,
   70         GPIO_PIOSET,
   71         GPIO_PIORESET,
   72         GPIO_PIOTOG,
   73         GPIO_PIOMAX
   74 };
   75 
   76 struct mtk_gpio_pin_irqsrc {
   77         struct intr_irqsrc      isrc;
   78         u_int                   irq;
   79 };
   80 
   81 struct mtk_gpio_pin {
   82         uint32_t                        pin_caps;
   83         uint32_t                        pin_flags;
   84         enum intr_trigger               intr_trigger;
   85         enum intr_polarity              intr_polarity;
   86         char                            pin_name[GPIOMAXNAME];
   87         struct mtk_gpio_pin_irqsrc      pin_irqsrc;
   88 };
   89 
   90 struct mtk_gpio_softc {
   91         device_t                dev;
   92         device_t                busdev;
   93         struct resource         *res[2];
   94         struct mtx              mtx;
   95         struct mtk_gpio_pin     pins[MTK_GPIO_PINS];
   96         void                    *intrhand;
   97 
   98         uint8_t         regs[GPIO_PIOMAX];
   99         uint32_t                num_pins;
  100         uint8_t                 do_remap;
  101 };
  102 
  103 #define PIC_INTR_ISRC(sc, irq)  (&(sc)->pins[(irq)].pin_irqsrc.isrc)
  104 
  105 static struct resource_spec mtk_gpio_spec[] = {
  106         { SYS_RES_MEMORY, 0, RF_ACTIVE },
  107         { SYS_RES_IRQ,    0, RF_ACTIVE | RF_SHAREABLE },
  108         { -1, 0 }
  109 };
  110 
  111 static int mtk_gpio_probe(device_t dev);
  112 static int mtk_gpio_attach(device_t dev);
  113 static int mtk_gpio_detach(device_t dev);
  114 static int mtk_gpio_intr(void *arg);
  115 
  116 #define MTK_GPIO_LOCK(sc)               mtx_lock_spin(&(sc)->mtx)
  117 #define MTK_GPIO_UNLOCK(sc)             mtx_unlock_spin(&(sc)->mtx)
  118 #define MTK_GPIO_LOCK_INIT(sc)          \
  119     mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev),        \
  120     "mtk_gpio", MTX_SPIN)
  121 #define MTK_GPIO_LOCK_DESTROY(sc)       mtx_destroy(&(sc)->mtx)
  122 
  123 #define MTK_WRITE_4(sc, reg, val)       \
  124     bus_write_4((sc)->res[0], (sc)->regs[(reg)], (val))
  125 #define MTK_READ_4(sc, reg)             \
  126     bus_read_4((sc)->res[0], (sc)->regs[(reg)])
  127 
  128 static struct ofw_compat_data compat_data[] = {
  129         { "ralink,rt2880-gpio",         1 },
  130         { "ralink,rt3050-gpio",         1 },
  131         { "ralink,rt3352-gpio",         1 },
  132         { "ralink,rt3883-gpio",         1 },
  133         { "ralink,rt5350-gpio",         1 },
  134         { "ralink,mt7620a-gpio",        1 },
  135         { NULL,                         0 }
  136 };
  137 
  138 static int
  139 mtk_gpio_probe(device_t dev)
  140 {
  141         phandle_t node;
  142 
  143         if (!ofw_bus_status_okay(dev))
  144                 return (ENXIO);
  145 
  146         if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
  147                 return (ENXIO);
  148 
  149         node = ofw_bus_get_node(dev);
  150         if (!OF_hasprop(node, "gpio-controller"))
  151                 return (ENXIO);
  152 
  153         device_set_desc(dev, "MTK GPIO Controller (v1)");
  154 
  155         return (BUS_PROBE_DEFAULT);
  156 }
  157 
  158 static int
  159 mtk_pic_register_isrcs(struct mtk_gpio_softc *sc)
  160 {
  161         int error;
  162         uint32_t irq;
  163         struct intr_irqsrc *isrc;
  164         const char *name;
  165 
  166         name = device_get_nameunit(sc->dev);
  167         for (irq = 0; irq < sc->num_pins; irq++) {
  168                 sc->pins[irq].pin_irqsrc.irq = irq;
  169                 isrc = PIC_INTR_ISRC(sc, irq);
  170                 error = intr_isrc_register(isrc, sc->dev, 0, "%s", name);
  171                 if (error != 0) {
  172                         /* XXX call intr_isrc_deregister */
  173                         device_printf(sc->dev, "%s failed", __func__);
  174                         return (error);
  175                 }
  176         }
  177 
  178         return (0);
  179 }
  180 
  181 static int
  182 mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin,
  183     uint32_t dir)
  184 {
  185         uint32_t regval, mask = (1u << pin);
  186 
  187         if (!(sc->pins[pin].pin_caps & dir))
  188                 return (EINVAL);
  189 
  190         regval = MTK_READ_4(sc, GPIO_PIODIR);
  191         if (dir == GPIO_PIN_INPUT)
  192                 regval &= ~mask;
  193         else
  194                 regval |= mask;
  195         MTK_WRITE_4(sc, GPIO_PIODIR, regval);
  196 
  197         sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
  198         sc->pins[pin].pin_flags |= dir;
  199 
  200         return (0);
  201 }
  202 
  203 static int
  204 mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val)
  205 {
  206         uint32_t regval, mask = (1u << pin);
  207 
  208         regval = MTK_READ_4(sc, GPIO_PIOPOL);
  209         if (val)
  210                 regval |= mask;
  211         else
  212                 regval &= ~mask;
  213         MTK_WRITE_4(sc, GPIO_PIOPOL, regval);
  214         sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
  215         sc->pins[pin].pin_flags |= val;
  216 
  217         return (0);
  218 }
  219 
  220 static void
  221 mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin)
  222 {
  223         uint32_t mask = (1u << pin);
  224         uint32_t val;
  225 
  226         /* Clear cached gpio config */
  227         sc->pins[pin].pin_flags = 0;
  228 
  229         val = MTK_READ_4(sc, GPIO_PIORENA) |
  230             MTK_READ_4(sc, GPIO_PIOFENA);
  231         if (val & mask) {
  232                 /* Pin is in interrupt mode */
  233                 sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
  234                 val = MTK_READ_4(sc, GPIO_PIORENA);
  235                 if (val & mask)
  236                         sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
  237                 else
  238                         sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
  239         }
  240 
  241         val = MTK_READ_4(sc, GPIO_PIODIR);
  242         if (val & mask)
  243                 sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
  244         else
  245                 sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
  246 
  247         val = MTK_READ_4(sc, GPIO_PIOPOL);
  248         if (val & mask) {
  249                 if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) {
  250                         sc->pins[pin].pin_flags |= GPIO_PIN_INVIN;
  251                 } else {
  252                         sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT;
  253                 }
  254         }
  255 }
  256 
  257 static int
  258 mtk_gpio_attach(device_t dev)
  259 {
  260         struct mtk_gpio_softc *sc;
  261         phandle_t node;
  262         uint32_t i, num_pins;
  263 
  264         sc = device_get_softc(dev);
  265         sc->dev = dev;
  266 
  267         if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
  268                 device_printf(dev, "could not allocate resources for device\n");
  269                 return (ENXIO);
  270         }
  271 
  272         MTK_GPIO_LOCK_INIT(sc);
  273 
  274         node = ofw_bus_get_node(dev);
  275 
  276         if (OF_hasprop(node, "clocks"))
  277                 mtk_soc_start_clock(dev);
  278         if (OF_hasprop(node, "resets"))
  279                 mtk_soc_reset_device(dev);
  280 
  281         if (OF_getprop(node, "ralink,register-map", sc->regs,
  282             GPIO_PIOMAX) <= 0) {
  283                 device_printf(dev, "Failed to read register map\n");
  284                 return (ENXIO);
  285         }
  286 
  287         if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node,
  288             "ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0))
  289                 sc->num_pins = num_pins;
  290         else
  291                 sc->num_pins = MTK_GPIO_PINS;
  292 
  293         for (i = 0; i < sc->num_pins; i++) {
  294                 sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
  295                     GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
  296                 sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
  297                 sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
  298 
  299                 snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
  300                     device_get_unit(dev) + 'a', i);
  301                 sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
  302 
  303                 mtk_gpio_pin_probe(sc, i);
  304         }
  305 
  306         if (mtk_pic_register_isrcs(sc) != 0) {
  307                 device_printf(dev, "could not register PIC ISRCs\n");
  308                 goto fail;
  309         }
  310 
  311         if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
  312                 device_printf(dev, "could not register PIC\n");
  313                 goto fail;
  314         }
  315 
  316         if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
  317             mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
  318                 goto fail_pic;
  319 
  320         sc->busdev = gpiobus_attach_bus(dev);
  321         if (sc->busdev == NULL)
  322                 goto fail_pic;
  323 
  324         return (0);
  325 fail_pic:
  326         intr_pic_deregister(dev, OF_xref_from_node(node));
  327 fail:
  328         if(sc->intrhand != NULL)
  329                 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
  330         bus_release_resources(dev, mtk_gpio_spec, sc->res);
  331         MTK_GPIO_LOCK_DESTROY(sc);
  332         return (ENXIO);
  333 }
  334 
  335 static int
  336 mtk_gpio_detach(device_t dev)
  337 {
  338         struct mtk_gpio_softc *sc = device_get_softc(dev);
  339         phandle_t node;
  340 
  341         node = ofw_bus_get_node(dev);
  342         intr_pic_deregister(dev, OF_xref_from_node(node));
  343         if (sc->intrhand != NULL)
  344                 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
  345         bus_release_resources(dev, mtk_gpio_spec, sc->res);
  346         MTK_GPIO_LOCK_DESTROY(sc);
  347         return (0);
  348 }
  349 
  350 static device_t
  351 mtk_gpio_get_bus(device_t dev)
  352 {
  353         struct mtk_gpio_softc *sc = device_get_softc(dev);
  354 
  355         return (sc->busdev);
  356 }
  357 
  358 static int
  359 mtk_gpio_pin_max(device_t dev, int *maxpin)
  360 {
  361         struct mtk_gpio_softc *sc = device_get_softc(dev);
  362 
  363         *maxpin = sc->num_pins - 1;
  364 
  365         return (0);
  366 }
  367 
  368 static int
  369 mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
  370 {
  371         struct mtk_gpio_softc *sc = device_get_softc(dev);
  372 
  373         if (pin >= sc->num_pins)
  374                 return (EINVAL);
  375 
  376         MTK_GPIO_LOCK(sc);
  377         *caps = sc->pins[pin].pin_caps;
  378         MTK_GPIO_UNLOCK(sc);
  379 
  380         return (0);
  381 }
  382 
  383 static int
  384 mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
  385 {
  386         struct mtk_gpio_softc *sc = device_get_softc(dev);
  387 
  388         if (pin >= sc->num_pins)
  389                 return (EINVAL);
  390 
  391         MTK_GPIO_LOCK(sc);
  392         *flags = sc->pins[pin].pin_flags;
  393         MTK_GPIO_UNLOCK(sc);
  394 
  395         return (0);
  396 }
  397 
  398 static int
  399 mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
  400 {
  401         struct mtk_gpio_softc *sc = device_get_softc(dev);
  402 
  403         if (pin >= sc->num_pins)
  404                 return (EINVAL);
  405 
  406         strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
  407         name[GPIOMAXNAME - 1] = '\0';
  408 
  409         return (0);
  410 }
  411 
  412 static int
  413 mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
  414 {
  415         struct mtk_gpio_softc *sc;
  416         int retval;
  417 
  418         sc = device_get_softc(dev);
  419 
  420         if (pin >= sc->num_pins)
  421                 return (EINVAL);
  422 
  423         MTK_GPIO_LOCK(sc);
  424         retval = mtk_gpio_pin_set_direction(sc, pin,
  425             flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
  426         if (retval == 0)
  427                 retval = mtk_gpio_pin_set_invert(sc, pin,
  428                     flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT));
  429         MTK_GPIO_UNLOCK(sc);
  430 
  431         return (retval);
  432 }
  433 
  434 static int
  435 mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
  436 {
  437         struct mtk_gpio_softc *sc;
  438         int ret;
  439 
  440         sc = device_get_softc(dev);
  441         ret = 0;
  442 
  443         if (pin >= sc->num_pins)
  444                 return (EINVAL);
  445 
  446         MTK_GPIO_LOCK(sc);
  447         if (value)
  448                 MTK_WRITE_4(sc, GPIO_PIOSET, (1u << pin));
  449         else
  450                 MTK_WRITE_4(sc, GPIO_PIORESET, (1u << pin));
  451         MTK_GPIO_UNLOCK(sc);
  452 
  453         return (ret);
  454 }
  455 
  456 static int
  457 mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
  458 {
  459         struct mtk_gpio_softc *sc;
  460         uint32_t data;
  461         int ret;
  462 
  463         sc = device_get_softc(dev);
  464         ret = 0;
  465 
  466         if (pin >= sc->num_pins)
  467                 return (EINVAL);
  468 
  469         MTK_GPIO_LOCK(sc);
  470         data = MTK_READ_4(sc, GPIO_PIODATA);
  471         *val = (data & (1u << pin)) ? 1 : 0;
  472         MTK_GPIO_UNLOCK(sc);
  473 
  474         return (ret);
  475 }
  476 
  477 static int
  478 mtk_gpio_pin_toggle(device_t dev, uint32_t pin)
  479 {
  480         struct mtk_gpio_softc *sc;
  481         int ret;
  482 
  483         sc = device_get_softc(dev);
  484         ret = 0;
  485 
  486         if (pin >= sc->num_pins)
  487                 return (EINVAL);
  488 
  489         MTK_GPIO_LOCK(sc);
  490         if (!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) {
  491                 ret = EINVAL;
  492                 goto out;
  493         }
  494         MTK_WRITE_4(sc, GPIO_PIOTOG, (1u << pin));
  495 
  496 out:
  497         MTK_GPIO_UNLOCK(sc);
  498 
  499         return (ret);
  500 }
  501 
  502 static int
  503 mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
  504     struct intr_irqsrc **isrcp)
  505 {
  506         struct intr_map_data_fdt *daf;
  507         struct mtk_gpio_softc *sc;
  508 
  509         if (data->type != INTR_MAP_DATA_FDT)
  510                 return (ENOTSUP);
  511 
  512         sc = device_get_softc(dev);
  513         daf = (struct intr_map_data_fdt *)data;
  514 
  515         if (daf->ncells != 1 || daf->cells[0] >= sc->num_pins)
  516                 return (EINVAL);
  517 
  518         *isrcp = PIC_INTR_ISRC(sc, daf->cells[0]);
  519         return (0);
  520 }
  521 
  522 static void
  523 mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
  524 {
  525         struct mtk_gpio_softc *sc;
  526         struct mtk_gpio_pin_irqsrc *pisrc;
  527         uint32_t pin, mask, val;
  528 
  529         sc = device_get_softc(dev);
  530 
  531         pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
  532         pin = pisrc->irq;
  533         mask = 1u << pin;
  534 
  535         MTK_GPIO_LOCK(sc);
  536 
  537         if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) {
  538                 val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
  539                 MTK_WRITE_4(sc, GPIO_PIORENA, val);
  540                 val = MTK_READ_4(sc, GPIO_PIOFENA) | mask;
  541                 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
  542         } else {
  543                 val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
  544                 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
  545                 val = MTK_READ_4(sc, GPIO_PIORENA) | mask;
  546                 MTK_WRITE_4(sc, GPIO_PIORENA, val);
  547         }
  548 
  549         MTK_GPIO_UNLOCK(sc);
  550 }
  551 
  552 static void
  553 mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
  554 {
  555         struct mtk_gpio_softc *sc;
  556         struct mtk_gpio_pin_irqsrc *pisrc;
  557         uint32_t pin, mask, val;
  558 
  559         sc = device_get_softc(dev);
  560 
  561         pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
  562         pin = pisrc->irq;
  563         mask = 1u << pin;
  564 
  565         MTK_GPIO_LOCK(sc);
  566 
  567         val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
  568         MTK_WRITE_4(sc, GPIO_PIORENA, val);
  569         val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
  570         MTK_WRITE_4(sc, GPIO_PIOFENA, val);
  571 
  572         MTK_GPIO_UNLOCK(sc);
  573 }
  574 
  575 static void
  576 mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
  577 {
  578 
  579         mtk_gpio_pic_disable_intr(dev, isrc);
  580 }
  581 
  582 static void
  583 mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
  584 {
  585 
  586         mtk_gpio_pic_enable_intr(dev, isrc);
  587 }
  588 
  589 static void
  590 mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
  591 {
  592         struct mtk_gpio_softc *sc;
  593         struct mtk_gpio_pin_irqsrc *pisrc;
  594 
  595         pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
  596         sc = device_get_softc(dev);
  597         MTK_GPIO_LOCK(sc);
  598         MTK_WRITE_4(sc, GPIO_PIOINT, 1u << pisrc->irq);
  599         MTK_GPIO_UNLOCK(sc);
  600 }
  601 
  602 static int
  603 mtk_gpio_intr(void *arg)
  604 {
  605         struct mtk_gpio_softc *sc;
  606         uint32_t i, interrupts;
  607 
  608         sc = arg;
  609         interrupts = MTK_READ_4(sc, GPIO_PIOINT);
  610 
  611         for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
  612                 if ((interrupts & 0x1) == 0)
  613                         continue;
  614                 if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
  615                     curthread->td_intr_frame) != 0) {
  616                         device_printf(sc->dev, "spurious interrupt %d\n", i);
  617                 }
  618         }       
  619 
  620         return (FILTER_HANDLED);
  621 }
  622 
  623 static phandle_t
  624 mtk_gpio_get_node(device_t bus, device_t dev)
  625 {
  626 
  627         /* We only have one child, the GPIO bus, which needs our own node. */
  628         return (ofw_bus_get_node(bus));
  629 }
  630 
  631 static device_method_t mtk_gpio_methods[] = {
  632         /* Device interface */
  633         DEVMETHOD(device_probe,         mtk_gpio_probe),
  634         DEVMETHOD(device_attach,        mtk_gpio_attach),
  635         DEVMETHOD(device_detach,        mtk_gpio_detach),
  636         
  637         /* GPIO protocol */
  638         DEVMETHOD(gpio_get_bus,         mtk_gpio_get_bus),
  639         DEVMETHOD(gpio_pin_max,         mtk_gpio_pin_max),
  640         DEVMETHOD(gpio_pin_getname,     mtk_gpio_pin_getname),
  641         DEVMETHOD(gpio_pin_getflags,    mtk_gpio_pin_getflags),
  642         DEVMETHOD(gpio_pin_getcaps,     mtk_gpio_pin_getcaps),
  643         DEVMETHOD(gpio_pin_setflags,    mtk_gpio_pin_setflags),
  644         DEVMETHOD(gpio_pin_get,         mtk_gpio_pin_get),
  645         DEVMETHOD(gpio_pin_set,         mtk_gpio_pin_set),
  646         DEVMETHOD(gpio_pin_toggle,      mtk_gpio_pin_toggle),
  647 
  648         /* Interrupt controller interface */
  649         DEVMETHOD(pic_disable_intr,     mtk_gpio_pic_disable_intr),
  650         DEVMETHOD(pic_enable_intr,      mtk_gpio_pic_enable_intr),
  651         DEVMETHOD(pic_map_intr,         mtk_gpio_pic_map_intr),
  652         DEVMETHOD(pic_post_filter,      mtk_gpio_pic_post_filter),
  653         DEVMETHOD(pic_post_ithread,     mtk_gpio_pic_post_ithread),
  654         DEVMETHOD(pic_pre_ithread,      mtk_gpio_pic_pre_ithread),
  655 
  656         /* ofw_bus interface */
  657         DEVMETHOD(ofw_bus_get_node,     mtk_gpio_get_node),
  658 
  659         DEVMETHOD_END
  660 };
  661 
  662 static driver_t mtk_gpio_driver = {
  663         "gpio",
  664         mtk_gpio_methods,
  665         sizeof(struct mtk_gpio_softc),
  666 };
  667 
  668 static devclass_t mtk_gpio_devclass;
  669 
  670 EARLY_DRIVER_MODULE(mtk_gpio_v1, simplebus, mtk_gpio_driver,
  671     mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
Cache object: 1e418e4c21221d1ed6d8bf6fec22cdb2
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FreeBSD/Linux Kernel Cross Reference sys/mips/mediatek/mtk_gpio_v1.c

FreeBSD/Linux Kernel Cross Reference
sys/mips/mediatek/mtk_gpio_v1.c
