Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/mips/mediatek/mtk_gpio_v2.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /*- 2 * Copyright 2016 Stanislav Galabov 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD: releng/12.0/sys/mips/mediatek/mtk_gpio_v2.c 300149 2016-05-18 15:05:44Z andrew $"); 29 30 #include "opt_platform.h" 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/conf.h> 35 #include <sys/bus.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/lock.h> 39 #include <sys/mutex.h> 40 #include <sys/proc.h> 41 #include <sys/resource.h> 42 #include <sys/gpio.h> 43 44 #include <machine/bus.h> 45 #include <machine/intr.h> 46 47 #include <mips/mediatek/mtk_soc.h> 48 49 #include <dev/gpio/gpiobusvar.h> 50 51 #include <dev/fdt/fdt_common.h> 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 55 #include <gnu/dts/include/dt-bindings/interrupt-controller/irq.h> 56 57 #include "gpio_if.h" 58 #include "pic_if.h" 59 60 #define MTK_GPIO_PINS 32 61 62 struct mtk_gpio_pin_irqsrc { 63 struct intr_irqsrc isrc; 64 u_int irq; 65 }; 66 67 struct mtk_gpio_pin { 68 uint32_t pin_caps; 69 uint32_t pin_flags; 70 enum intr_trigger intr_trigger; 71 enum intr_polarity intr_polarity; 72 char pin_name[GPIOMAXNAME]; 73 struct mtk_gpio_pin_irqsrc pin_irqsrc; 74 }; 75 76 struct mtk_gpio_softc { 77 device_t dev; 78 device_t busdev; 79 struct resource *res[2]; 80 struct mtx mtx; 81 struct mtk_gpio_pin pins[MTK_GPIO_PINS]; 82 void *intrhand; 83 84 uint32_t num_pins; 85 uint32_t bank_id; 86 }; 87 88 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pins[(irq)].pin_irqsrc.isrc) 89 90 static struct resource_spec mtk_gpio_spec[] = { 91 { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE }, 92 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE }, 93 { -1, 0 } 94 }; 95 96 static int mtk_gpio_probe(device_t dev); 97 static int mtk_gpio_attach(device_t dev); 98 static int mtk_gpio_detach(device_t dev); 99 static int mtk_gpio_intr(void *arg); 100 101 #define MTK_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx) 102 #define MTK_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx) 103 #define MTK_GPIO_LOCK_INIT(sc) \ 104 mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \ 105 "mtk_gpio", MTX_SPIN) 106 #define MTK_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx) 107 108 #define MTK_WRITE_4(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val)) 109 #define MTK_READ_4(sc, reg) bus_read_4((sc)->res[0], (reg)) 110 111 /* Register definitions */ 112 #define GPIO_REG(_sc, _reg) ((_reg) + (_sc)->bank_id * 0x4) 113 #define GPIO_PIOINT(_sc) GPIO_REG((_sc), 0x0090) 114 #define GPIO_PIOEDGE(_sc) GPIO_REG((_sc), 0x00A0) 115 #define GPIO_PIORENA(_sc) GPIO_REG((_sc), 0x0050) 116 #define GPIO_PIOFENA(_sc) GPIO_REG((_sc), 0x0060) 117 #define GPIO_PIODATA(_sc) GPIO_REG((_sc), 0x0020) 118 #define GPIO_PIODIR(_sc) GPIO_REG((_sc), 0x0000) 119 #define GPIO_PIOPOL(_sc) GPIO_REG((_sc), 0x0010) 120 #define GPIO_PIOSET(_sc) GPIO_REG((_sc), 0x0030) 121 #define GPIO_PIORESET(_sc) GPIO_REG((_sc), 0x0040) 122 123 static struct ofw_compat_data compat_data[] = { 124 { "mtk,mt7621-gpio-bank", 1 }, 125 { "mtk,mt7628-gpio-bank", 1 }, 126 { NULL, 0 } 127 }; 128 129 static int 130 mtk_gpio_probe(device_t dev) 131 { 132 phandle_t node; 133 134 if (!ofw_bus_status_okay(dev)) 135 return (ENXIO); 136 137 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) 138 return (ENXIO); 139 140 node = ofw_bus_get_node(dev); 141 if (!OF_hasprop(node, "gpio-controller")) 142 return (ENXIO); 143 144 device_set_desc(dev, "MTK GPIO Controller (v2)"); 145 146 return (BUS_PROBE_DEFAULT); 147 } 148 149 static int 150 mtk_pic_register_isrcs(struct mtk_gpio_softc *sc) 151 { 152 int error; 153 uint32_t irq; 154 struct intr_irqsrc *isrc; 155 const char *name; 156 157 name = device_get_nameunit(sc->dev); 158 for (irq = 0; irq < sc->num_pins; irq++) { 159 sc->pins[irq].pin_irqsrc.irq = irq; 160 isrc = PIC_INTR_ISRC(sc, irq); 161 error = intr_isrc_register(isrc, sc->dev, 0, "%s", name); 162 if (error != 0) { 163 /* XXX call intr_isrc_deregister */ 164 device_printf(sc->dev, "%s failed", __func__); 165 return (error); 166 } 167 } 168 169 return (0); 170 } 171 172 static int 173 mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin, 174 uint32_t dir) 175 { 176 uint32_t regval, mask = (1u << pin); 177 178 if (!(sc->pins[pin].pin_caps & dir)) 179 return (EINVAL); 180 181 regval = MTK_READ_4(sc, GPIO_PIODIR(sc)); 182 if (dir == GPIO_PIN_INPUT) 183 regval &= ~mask; 184 else 185 regval |= mask; 186 MTK_WRITE_4(sc, GPIO_PIODIR(sc), regval); 187 188 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT); 189 sc->pins[pin].pin_flags |= dir; 190 191 return (0); 192 } 193 194 static int 195 mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val) 196 { 197 uint32_t regval, mask = (1u << pin); 198 199 regval = MTK_READ_4(sc, GPIO_PIOPOL(sc)); 200 if (val) 201 regval |= mask; 202 else 203 regval &= ~mask; 204 MTK_WRITE_4(sc, GPIO_PIOPOL(sc), regval); 205 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT); 206 sc->pins[pin].pin_flags |= val; 207 208 return (0); 209 } 210 211 static void 212 mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin) 213 { 214 uint32_t mask = (1u << pin); 215 uint32_t val; 216 217 /* Clear cached gpio config */ 218 sc->pins[pin].pin_flags = 0; 219 220 val = MTK_READ_4(sc, GPIO_PIORENA(sc)) | 221 MTK_READ_4(sc, GPIO_PIOFENA(sc)); 222 if (val & mask) { 223 /* Pin is in interrupt mode */ 224 sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE; 225 val = MTK_READ_4(sc, GPIO_PIORENA(sc)); 226 if (val & mask) 227 sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH; 228 else 229 sc->pins[pin].intr_polarity = INTR_POLARITY_LOW; 230 } 231 232 val = MTK_READ_4(sc, GPIO_PIODIR(sc)); 233 if (val & mask) 234 sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT; 235 else 236 sc->pins[pin].pin_flags |= GPIO_PIN_INPUT; 237 238 val = MTK_READ_4(sc, GPIO_PIOPOL(sc)); 239 if (val & mask) { 240 if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) { 241 sc->pins[pin].pin_flags |= GPIO_PIN_INVIN; 242 } else { 243 sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT; 244 } 245 } 246 } 247 248 static int 249 mtk_gpio_attach(device_t dev) 250 { 251 struct mtk_gpio_softc *sc; 252 phandle_t node; 253 uint32_t i, num_pins, bank_id; 254 255 sc = device_get_softc(dev); 256 sc->dev = dev; 257 258 if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) { 259 device_printf(dev, "could not allocate resources for device\n"); 260 return (ENXIO); 261 } 262 263 MTK_GPIO_LOCK_INIT(sc); 264 265 node = ofw_bus_get_node(dev); 266 267 if (OF_hasprop(node, "clocks")) 268 mtk_soc_start_clock(dev); 269 if (OF_hasprop(node, "resets")) 270 mtk_soc_reset_device(dev); 271 272 if (OF_hasprop(node, "mtk,bank-id") && (OF_getencprop(node, 273 "mtk,bank-id", &bank_id, sizeof(bank_id)) >= 0)) 274 sc->bank_id = bank_id; 275 else 276 sc->bank_id = device_get_unit(dev); 277 278 if (OF_hasprop(node, "mtk,num-pins") && (OF_getencprop(node, 279 "mtk,num-pins", &num_pins, sizeof(num_pins)) >= 0)) 280 sc->num_pins = num_pins; 281 else 282 sc->num_pins = MTK_GPIO_PINS; 283 284 for (i = 0; i < sc->num_pins; i++) { 285 sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | 286 GPIO_PIN_INVIN | GPIO_PIN_INVOUT; 287 sc->pins[i].intr_polarity = INTR_POLARITY_HIGH; 288 sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE; 289 290 snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d", 291 device_get_unit(dev) + 'a', i); 292 sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0'; 293 294 mtk_gpio_pin_probe(sc, i); 295 } 296 297 if (mtk_pic_register_isrcs(sc) != 0) { 298 device_printf(dev, "could not register PIC ISRCs\n"); 299 goto fail; 300 } 301 302 if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) { 303 device_printf(dev, "could not register PIC\n"); 304 goto fail; 305 } 306 307 if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE, 308 mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0) 309 goto fail_pic; 310 311 sc->busdev = gpiobus_attach_bus(dev); 312 if (sc->busdev == NULL) 313 goto fail_pic; 314 315 return (0); 316 fail_pic: 317 intr_pic_deregister(dev, OF_xref_from_node(node)); 318 fail: 319 if(sc->intrhand != NULL) 320 bus_teardown_intr(dev, sc->res[1], sc->intrhand); 321 bus_release_resources(dev, mtk_gpio_spec, sc->res); 322 MTK_GPIO_LOCK_DESTROY(sc); 323 return (ENXIO); 324 } 325 326 static int 327 mtk_gpio_detach(device_t dev) 328 { 329 struct mtk_gpio_softc *sc = device_get_softc(dev); 330 phandle_t node; 331 332 node = ofw_bus_get_node(dev); 333 intr_pic_deregister(dev, OF_xref_from_node(node)); 334 if (sc->intrhand != NULL) 335 bus_teardown_intr(dev, sc->res[1], sc->intrhand); 336 bus_release_resources(dev, mtk_gpio_spec, sc->res); 337 MTK_GPIO_LOCK_DESTROY(sc); 338 return (0); 339 } 340 341 static device_t 342 mtk_gpio_get_bus(device_t dev) 343 { 344 struct mtk_gpio_softc *sc = device_get_softc(dev); 345 346 return (sc->busdev); 347 } 348 349 static int 350 mtk_gpio_pin_max(device_t dev, int *maxpin) 351 { 352 struct mtk_gpio_softc *sc = device_get_softc(dev); 353 354 *maxpin = sc->num_pins - 1; 355 356 return (0); 357 } 358 359 static int 360 mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) 361 { 362 struct mtk_gpio_softc *sc = device_get_softc(dev); 363 364 if (pin >= sc->num_pins) 365 return (EINVAL); 366 367 MTK_GPIO_LOCK(sc); 368 *caps = sc->pins[pin].pin_caps; 369 MTK_GPIO_UNLOCK(sc); 370 371 return (0); 372 } 373 374 static int 375 mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) 376 { 377 struct mtk_gpio_softc *sc = device_get_softc(dev); 378 379 if (pin >= sc->num_pins) 380 return (EINVAL); 381 382 MTK_GPIO_LOCK(sc); 383 *flags = sc->pins[pin].pin_flags; 384 MTK_GPIO_UNLOCK(sc); 385 386 return (0); 387 } 388 389 static int 390 mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name) 391 { 392 struct mtk_gpio_softc *sc = device_get_softc(dev); 393 394 if (pin >= sc->num_pins) 395 return (EINVAL); 396 397 strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1); 398 name[GPIOMAXNAME - 1] = '\0'; 399 400 return (0); 401 } 402 403 static int 404 mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) 405 { 406 struct mtk_gpio_softc *sc; 407 int retval; 408 409 sc = device_get_softc(dev); 410 411 if (pin >= sc->num_pins) 412 return (EINVAL); 413 414 MTK_GPIO_LOCK(sc); 415 retval = mtk_gpio_pin_set_direction(sc, pin, 416 flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)); 417 if (retval == 0) 418 retval = mtk_gpio_pin_set_invert(sc, pin, 419 flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT)); 420 MTK_GPIO_UNLOCK(sc); 421 422 return (retval); 423 } 424 425 static int 426 mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) 427 { 428 struct mtk_gpio_softc *sc; 429 int ret; 430 431 sc = device_get_softc(dev); 432 ret = 0; 433 434 if (pin >= sc->num_pins) 435 return (EINVAL); 436 437 MTK_GPIO_LOCK(sc); 438 if (value) 439 MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin)); 440 else 441 MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin)); 442 MTK_GPIO_UNLOCK(sc); 443 444 return (ret); 445 } 446 447 static int 448 mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) 449 { 450 struct mtk_gpio_softc *sc; 451 uint32_t data; 452 int ret; 453 454 sc = device_get_softc(dev); 455 ret = 0; 456 457 if (pin >= sc->num_pins) 458 return (EINVAL); 459 460 MTK_GPIO_LOCK(sc); 461 data = MTK_READ_4(sc, GPIO_PIODATA(sc)); 462 *val = (data & (1u << pin)) ? 1 : 0; 463 MTK_GPIO_UNLOCK(sc); 464 465 return (ret); 466 } 467 468 static int 469 mtk_gpio_pin_toggle(device_t dev, uint32_t pin) 470 { 471 struct mtk_gpio_softc *sc; 472 uint32_t val; 473 int ret; 474 475 sc = device_get_softc(dev); 476 ret = 0; 477 478 if (pin >= sc->num_pins) 479 return (EINVAL); 480 481 MTK_GPIO_LOCK(sc); 482 if(!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) { 483 ret = EINVAL; 484 goto out; 485 } 486 val = MTK_READ_4(sc, GPIO_PIODATA(sc)); 487 val &= (1u << pin); 488 if (val) 489 MTK_WRITE_4(sc, GPIO_PIORESET(sc), (1u << pin)); 490 else 491 MTK_WRITE_4(sc, GPIO_PIOSET(sc), (1u << pin)); 492 493 out: 494 MTK_GPIO_UNLOCK(sc); 495 496 return (ret); 497 } 498 499 static int 500 mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data, 501 struct intr_irqsrc **isrcp) 502 { 503 struct intr_map_data_fdt *daf; 504 struct mtk_gpio_softc *sc; 505 506 if (data->type != INTR_MAP_DATA_FDT) 507 return (ENOTSUP); 508 509 sc = device_get_softc(dev); 510 daf = (struct intr_map_data_fdt *)data; 511 512 if (daf->ncells != 1 || daf->cells[0] >= sc->num_pins) 513 return (EINVAL); 514 515 *isrcp = PIC_INTR_ISRC(sc, daf->cells[0]); 516 return (0); 517 } 518 519 static void 520 mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc) 521 { 522 struct mtk_gpio_softc *sc; 523 struct mtk_gpio_pin_irqsrc *pisrc; 524 uint32_t pin, mask, val; 525 526 sc = device_get_softc(dev); 527 528 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; 529 pin = pisrc->irq; 530 mask = 1u << pin; 531 532 MTK_GPIO_LOCK(sc); 533 534 if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) { 535 val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask; 536 MTK_WRITE_4(sc, GPIO_PIORENA(sc), val); 537 val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) | mask; 538 MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val); 539 } else { 540 val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask; 541 MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val); 542 val = MTK_READ_4(sc, GPIO_PIORENA(sc)) | mask; 543 MTK_WRITE_4(sc, GPIO_PIORENA(sc), val); 544 } 545 546 MTK_GPIO_UNLOCK(sc); 547 } 548 549 static void 550 mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc) 551 { 552 struct mtk_gpio_softc *sc; 553 struct mtk_gpio_pin_irqsrc *pisrc; 554 uint32_t pin, mask, val; 555 556 sc = device_get_softc(dev); 557 558 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; 559 pin = pisrc->irq; 560 mask = 1u << pin; 561 562 MTK_GPIO_LOCK(sc); 563 564 val = MTK_READ_4(sc, GPIO_PIORENA(sc)) & ~mask; 565 MTK_WRITE_4(sc, GPIO_PIORENA(sc), val); 566 val = MTK_READ_4(sc, GPIO_PIOFENA(sc)) & ~mask; 567 MTK_WRITE_4(sc, GPIO_PIOFENA(sc), val); 568 569 MTK_GPIO_UNLOCK(sc); 570 } 571 572 static void 573 mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc) 574 { 575 576 mtk_gpio_pic_disable_intr(dev, isrc); 577 } 578 579 static void 580 mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) 581 { 582 583 mtk_gpio_pic_enable_intr(dev, isrc); 584 } 585 586 static void 587 mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) 588 { 589 struct mtk_gpio_softc *sc; 590 struct mtk_gpio_pin_irqsrc *pisrc; 591 592 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc; 593 sc = device_get_softc(dev); 594 MTK_GPIO_LOCK(sc); 595 MTK_WRITE_4(sc, GPIO_PIOINT(sc), 1u << pisrc->irq); 596 MTK_GPIO_UNLOCK(sc); 597 } 598 599 static int 600 mtk_gpio_intr(void *arg) 601 { 602 struct mtk_gpio_softc *sc; 603 uint32_t i, interrupts; 604 605 sc = arg; 606 interrupts = MTK_READ_4(sc, GPIO_PIOINT(sc)); 607 608 for (i = 0; interrupts != 0; i++, interrupts >>= 1) { 609 if ((interrupts & 0x1) == 0) 610 continue; 611 if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i), 612 curthread->td_intr_frame) != 0) { 613 device_printf(sc->dev, "spurious interrupt %d\n", i); 614 } 615 } 616 617 return (FILTER_HANDLED); 618 } 619 620 static phandle_t 621 mtk_gpio_get_node(device_t bus, device_t dev) 622 { 623 624 /* We only have one child, the GPIO bus, which needs our own node. */ 625 return (ofw_bus_get_node(bus)); 626 } 627 628 static device_method_t mtk_gpio_methods[] = { 629 /* Device interface */ 630 DEVMETHOD(device_probe, mtk_gpio_probe), 631 DEVMETHOD(device_attach, mtk_gpio_attach), 632 DEVMETHOD(device_detach, mtk_gpio_detach), 633 634 /* GPIO protocol */ 635 DEVMETHOD(gpio_get_bus, mtk_gpio_get_bus), 636 DEVMETHOD(gpio_pin_max, mtk_gpio_pin_max), 637 DEVMETHOD(gpio_pin_getname, mtk_gpio_pin_getname), 638 DEVMETHOD(gpio_pin_getflags, mtk_gpio_pin_getflags), 639 DEVMETHOD(gpio_pin_getcaps, mtk_gpio_pin_getcaps), 640 DEVMETHOD(gpio_pin_setflags, mtk_gpio_pin_setflags), 641 DEVMETHOD(gpio_pin_get, mtk_gpio_pin_get), 642 DEVMETHOD(gpio_pin_set, mtk_gpio_pin_set), 643 DEVMETHOD(gpio_pin_toggle, mtk_gpio_pin_toggle), 644 645 /* Interrupt controller interface */ 646 DEVMETHOD(pic_disable_intr, mtk_gpio_pic_disable_intr), 647 DEVMETHOD(pic_enable_intr, mtk_gpio_pic_enable_intr), 648 DEVMETHOD(pic_map_intr, mtk_gpio_pic_map_intr), 649 DEVMETHOD(pic_post_filter, mtk_gpio_pic_post_filter), 650 DEVMETHOD(pic_post_ithread, mtk_gpio_pic_post_ithread), 651 DEVMETHOD(pic_pre_ithread, mtk_gpio_pic_pre_ithread), 652 653 /* ofw_bus interface */ 654 DEVMETHOD(ofw_bus_get_node, mtk_gpio_get_node), 655 656 DEVMETHOD_END 657 }; 658 659 static driver_t mtk_gpio_driver = { 660 "gpio", 661 mtk_gpio_methods, 662 sizeof(struct mtk_gpio_softc), 663 }; 664 665 static devclass_t mtk_gpio_devclass; 666 667 EARLY_DRIVER_MODULE(mtk_gpio_v2, simplebus, mtk_gpio_driver, 668 mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
Cache object: 92e359426c8d2f7130b1a2474556a963
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]