1 /*-
2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
4 * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
12 * disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 */
29
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD: releng/11.0/sys/mips/mediatek/mtk_spi_v1.c 299155 2016-05-06 05:24:10Z sgalabov $");
32
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/bus.h>
36
37 #include <sys/kernel.h>
38 #include <sys/module.h>
39 #include <sys/rman.h>
40 #include <sys/lock.h>
41 #include <sys/mutex.h>
42
43 #include <machine/bus.h>
44 #include <machine/cpu.h>
45
46 #include <dev/spibus/spi.h>
47 #include <dev/spibus/spibusvar.h>
48 #include "spibus_if.h"
49
50 #include "opt_platform.h"
51
52 #include <dev/ofw/openfirm.h>
53 #include <dev/ofw/ofw_bus.h>
54 #include <dev/ofw/ofw_bus_subr.h>
55
56 #include <mips/mediatek/mtk_spi_v1.h>
57 #include <dev/flash/mx25lreg.h>
58
59 #undef MTK_SPI_DEBUG
60 #ifdef MTK_SPI_DEBUG
61 #define dprintf printf
62 #else
63 #define dprintf(x, arg...)
64 #endif
65
66 /*
67 * register space access macros
68 */
69 #define SPI_WRITE(sc, reg, val) do { \
70 bus_write_4(sc->sc_mem_res, (reg), (val)); \
71 } while (0)
72
73 #define SPI_READ(sc, reg) bus_read_4(sc->sc_mem_res, (reg))
74
75 #define SPI_SET_BITS(sc, reg, bits) \
76 SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) | (bits))
77
78 #define SPI_CLEAR_BITS(sc, reg, bits) \
79 SPI_WRITE(sc, reg, SPI_READ(sc, (reg)) & ~(bits))
80
81 struct mtk_spi_softc {
82 device_t sc_dev;
83 struct resource *sc_mem_res;
84 };
85
86 static int mtk_spi_probe(device_t);
87 static int mtk_spi_attach(device_t);
88 static int mtk_spi_detach(device_t);
89 static int mtk_spi_wait(struct mtk_spi_softc *);
90 static void mtk_spi_chip_activate(struct mtk_spi_softc *);
91 static void mtk_spi_chip_deactivate(struct mtk_spi_softc *);
92 static uint8_t mtk_spi_txrx(struct mtk_spi_softc *, uint8_t *, int);
93 static int mtk_spi_transfer(device_t, device_t, struct spi_command *);
94 static phandle_t mtk_spi_get_node(device_t, device_t);
95
96 static struct ofw_compat_data compat_data[] = {
97 { "ralink,rt2880-spi", 1 },
98 { "ralink,rt3050-spi", 1 },
99 { "ralink,rt3352-spi", 1 },
100 { "ralink,rt3883-spi", 1 },
101 { "ralink,rt5350-spi", 1 },
102 { "ralink,mt7620a-spi", 1 },
103 { NULL, 0 }
104 };
105
106 static int
107 mtk_spi_probe(device_t dev)
108 {
109
110 if (!ofw_bus_status_okay(dev))
111 return (ENXIO);
112
113 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
114 return(ENXIO);
115
116 device_set_desc(dev, "MTK SPI Controller (v1)");
117
118 return (0);
119 }
120
121 static int
122 mtk_spi_attach(device_t dev)
123 {
124 struct mtk_spi_softc *sc = device_get_softc(dev);
125 int rid;
126
127 sc->sc_dev = dev;
128 rid = 0;
129 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
130 RF_ACTIVE);
131 if (!sc->sc_mem_res) {
132 device_printf(dev, "Could not map memory\n");
133 return (ENXIO);
134 }
135
136 if (mtk_spi_wait(sc)) {
137 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
138 return (EBUSY);
139 }
140
141 SPI_WRITE(sc, MTK_SPICFG, MSBFIRST | SPICLKPOL | TX_ON_CLK_FALL |
142 SPI_CLK_DIV8); /* XXX: make it configurable */
143 /*
144 * W25Q64CV max 104MHz, bus 120-192 MHz, so divide by 2.
145 * Update: divide by 4, DEV2 to fast for flash.
146 */
147
148 device_add_child(dev, "spibus", 0);
149 return (bus_generic_attach(dev));
150 }
151
152 static int
153 mtk_spi_detach(device_t dev)
154 {
155 struct mtk_spi_softc *sc = device_get_softc(dev);
156
157 SPI_SET_BITS(sc, MTK_SPICTL, HIZSMOSI | CS_HIGH);
158
159 if (sc->sc_mem_res)
160 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
161
162 return (0);
163 }
164
165 static void
166 mtk_spi_chip_activate(struct mtk_spi_softc *sc)
167 {
168 mtk_spi_wait(sc);
169 /*
170 * Put all CSx to low
171 */
172 SPI_CLEAR_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
173 }
174
175 static void
176 mtk_spi_chip_deactivate(struct mtk_spi_softc *sc)
177 {
178 mtk_spi_wait(sc);
179 /*
180 * Put all CSx to high
181 */
182 SPI_SET_BITS(sc, MTK_SPICTL, CS_HIGH | HIZSMOSI);
183 }
184
185 static int
186 mtk_spi_wait(struct mtk_spi_softc *sc)
187 {
188 int i = 1000;
189
190 while (i--) {
191 if (!SPI_READ(sc, MTK_SPIBUSY))
192 break;
193 }
194 if (i == 0) {
195 printf("busy\n");
196 return (1);
197 }
198
199 return (0);
200 }
201
202 static uint8_t
203 mtk_spi_txrx(struct mtk_spi_softc *sc, uint8_t *data, int write)
204 {
205
206 if (mtk_spi_wait(sc))
207 return (EBUSY);
208
209 if (write == MTK_SPI_WRITE) {
210 SPI_WRITE(sc, MTK_SPIDATA, *data);
211 SPI_SET_BITS(sc, MTK_SPICTL, START_WRITE);
212 } else {/* MTK_SPI_READ */
213 SPI_SET_BITS(sc, MTK_SPICTL, START_READ);
214 if (mtk_spi_wait(sc))
215 return (EBUSY);
216
217 *data = SPI_READ(sc, MTK_SPIDATA) & 0xff;
218 }
219 return (0);
220 }
221
222 static int
223 mtk_spi_transfer(device_t dev, device_t child, struct spi_command *cmd)
224 {
225 struct mtk_spi_softc *sc;
226 uint8_t *buf, byte, *tx_buf;
227 struct spibus_ivar *devi = SPIBUS_IVAR(child);
228 int i, sz, error = 0, write = 0;
229
230 sc = device_get_softc(dev);
231
232 if (devi->cs != 0)
233 /* Only 1 CS */
234 return (ENXIO);
235
236 /* There is always a command to transfer. */
237 tx_buf = (uint8_t *)(cmd->tx_cmd);
238
239 /* Perform some fixup because MTK dont support duplex SPI */
240 switch(tx_buf[0]) {
241 case CMD_READ_IDENT:
242 cmd->tx_cmd_sz = 1;
243 cmd->rx_cmd_sz = 3;
244 break;
245 case CMD_ENTER_4B_MODE:
246 case CMD_EXIT_4B_MODE:
247 case CMD_WRITE_ENABLE:
248 case CMD_WRITE_DISABLE:
249 cmd->tx_cmd_sz = 1;
250 cmd->rx_cmd_sz = 0;
251 break;
252 case CMD_READ_STATUS:
253 cmd->tx_cmd_sz = 1;
254 cmd->rx_cmd_sz = 1;
255 break;
256 case CMD_READ:
257 case CMD_FAST_READ:
258 cmd->rx_cmd_sz = cmd->tx_data_sz = 0;
259 break;
260 case CMD_SECTOR_ERASE:
261 cmd->rx_cmd_sz = 0;
262 break;
263 case CMD_PAGE_PROGRAM:
264 cmd->rx_cmd_sz = cmd->rx_data_sz = 0;
265 break;
266 }
267
268 mtk_spi_chip_activate(sc);
269
270 if (cmd->tx_cmd_sz + cmd->rx_cmd_sz) {
271 buf = (uint8_t *)(cmd->rx_cmd);
272 tx_buf = (uint8_t *)(cmd->tx_cmd);
273 sz = cmd->tx_cmd_sz + cmd->rx_cmd_sz;
274
275 for (i = 0; i < sz; i++) {
276 if(i < cmd->tx_cmd_sz) {
277 byte = tx_buf[i];
278 error = mtk_spi_txrx(sc, &byte,
279 MTK_SPI_WRITE);
280 if (error)
281 goto mtk_spi_transfer_fail;
282 continue;
283 }
284 error = mtk_spi_txrx(sc, &byte,
285 MTK_SPI_READ);
286 if (error)
287 goto mtk_spi_transfer_fail;
288 buf[i] = byte;
289 }
290 }
291
292 /*
293 * Transfer/Receive data
294 */
295
296 if (cmd->tx_data_sz + cmd->rx_data_sz) {
297 write = (cmd->tx_data_sz > 0)?1:0;
298 buf = (uint8_t *)(write ? cmd->tx_data : cmd->rx_data);
299 sz = write ? cmd->tx_data_sz : cmd->rx_data_sz;
300
301 for (i = 0; i < sz; i++) {
302 byte = buf[i];
303 error = mtk_spi_txrx(sc, &byte,
304 write ? MTK_SPI_WRITE : MTK_SPI_READ);
305 if (error)
306 goto mtk_spi_transfer_fail;
307 buf[i] = byte;
308 }
309 }
310 mtk_spi_transfer_fail:
311 mtk_spi_chip_deactivate(sc);
312
313 return (error);
314 }
315
316 static phandle_t
317 mtk_spi_get_node(device_t bus, device_t dev)
318 {
319
320 /* We only have one child, the SPI bus, which needs our own node. */
321 return (ofw_bus_get_node(bus));
322 }
323
324 static device_method_t mtk_spi_methods[] = {
325 /* Device interface */
326 DEVMETHOD(device_probe, mtk_spi_probe),
327 DEVMETHOD(device_attach, mtk_spi_attach),
328 DEVMETHOD(device_detach, mtk_spi_detach),
329
330 DEVMETHOD(spibus_transfer, mtk_spi_transfer),
331
332 /* ofw_bus interface */
333 DEVMETHOD(ofw_bus_get_node, mtk_spi_get_node),
334
335 DEVMETHOD_END
336 };
337
338 static driver_t mtk_spi_driver = {
339 .name = "spi",
340 .methods = mtk_spi_methods,
341 .size = sizeof(struct mtk_spi_softc),
342 };
343
344 static devclass_t mtk_spi_devclass;
345
346 DRIVER_MODULE(mtk_spi_v1, simplebus, mtk_spi_driver, mtk_spi_devclass, 0, 0);
Cache object: b0493e0825ad754878d024166cfec89a
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