1 /*-
2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2011, Aleksandr Rybalko <ray@FreeBSD.org>
4 * Copyright (c) 2013, Alexander A. Mityaev <sansan@adm.ua>
5 * Copyright (c) 2016, Stanislav Galabov <sgalabov@gmail.com>
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
13 * disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 * $FreeBSD: releng/12.0/sys/mips/mediatek/mtk_spi_v1.h 297671 2016-04-07 11:21:42Z sgalabov $
31 */
32
33 #ifndef _MTK_SPIVAR_H_
34 #define _MTK_SPIVAR_H_
35
36 /* SPI controller interface */
37
38 #define MTK_SPISTAT 0x00
39 /* SPIBUSY is alias for SPIBUSY, because SPISTAT have only BUSY bit*/
40 #define MTK_SPIBUSY MTK_SPISTAT
41
42 #define MTK_SPICFG 0x10
43 #define MSBFIRST (1<<8)
44 #define SPICLKPOL (1<<6)
45 #define CAPT_ON_CLK_FALL (1<<5)
46 #define TX_ON_CLK_FALL (1<<4)
47 #define HIZSPI (1<<3) /* Set SPI pins to Tri-state */
48 #define SPI_CLK_SHIFT 0 /* SPI clock divide control */
49 #define SPI_CLK_MASK 0x00000007
50 #define SPI_CLK_DIV2 0
51 #define SPI_CLK_DIV4 1
52 #define SPI_CLK_DIV8 2
53 #define SPI_CLK_DIV16 3
54 #define SPI_CLK_DIV32 4
55 #define SPI_CLK_DIV64 5
56 #define SPI_CLK_DIV128 6
57 #define SPI_CLK_DISABLED 7
58
59 #define MTK_SPICTL 0x14
60 #define HIZSMOSI (1<<3)
61 #define START_WRITE (1<<2)
62 #define START_READ (1<<1)
63 #define CS_HIGH (1<<0)
64
65 #define MTK_SPIDATA 0x20
66 #define SPIDATA_MASK 0x000000ff
67
68 #define MTK_SPI_WRITE 1
69 #define MTK_SPI_READ 0
70
71 #endif /* _MTK_SPIVAR_H_ */
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