1 /* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
2 /*-
3 * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
4 *
5 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
36 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
37 *
38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions
40 * are met:
41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution.
46 * 3. All advertising materials mentioning features or use of this software
47 * must display the following acknowledgement:
48 * This product includes software developed by Christopher G. Demetriou
49 * for the NetBSD Project.
50 * 4. The name of the author may not be used to endorse or promote products
51 * derived from this software without specific prior written permission
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
54 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
55 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
56 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
57 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
58 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
59 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
60 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
61 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
62 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
63 *
64 * from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
65 * $FreeBSD: releng/11.1/sys/mips/mips/bus_space_generic.c 295504 2016-02-11 06:24:34Z adrian $
66 */
67 #include <sys/cdefs.h>
68 __FBSDID("$FreeBSD: releng/11.1/sys/mips/mips/bus_space_generic.c 295504 2016-02-11 06:24:34Z adrian $");
69
70 #include <sys/param.h>
71 #include <sys/systm.h>
72 #include <sys/bus.h>
73 #include <sys/kernel.h>
74 #include <sys/malloc.h>
75 #include <sys/ktr.h>
76
77 #include <vm/vm.h>
78 #include <vm/pmap.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_extern.h>
81
82 #include <machine/bus.h>
83 #include <machine/cache.h>
84
85 static struct bus_space generic_space = {
86 /* cookie */
87 .bs_cookie = (void *) 0,
88
89 /* mapping/unmapping */
90 .bs_map = generic_bs_map,
91 .bs_unmap = generic_bs_unmap,
92 .bs_subregion = generic_bs_subregion,
93
94 /* allocation/deallocation */
95 .bs_alloc = generic_bs_alloc,
96 .bs_free = generic_bs_free,
97
98 /* barrier */
99 .bs_barrier = generic_bs_barrier,
100
101 /* read (single) */
102 .bs_r_1 = generic_bs_r_1,
103 .bs_r_2 = generic_bs_r_2,
104 .bs_r_4 = generic_bs_r_4,
105 .bs_r_8 = generic_bs_r_8,
106
107 /* read multiple */
108 .bs_rm_1 = generic_bs_rm_1,
109 .bs_rm_2 = generic_bs_rm_2,
110 .bs_rm_4 = generic_bs_rm_4,
111 .bs_rm_8 = generic_bs_rm_8,
112
113 /* read region */
114 .bs_rr_1 = generic_bs_rr_1,
115 .bs_rr_2 = generic_bs_rr_2,
116 .bs_rr_4 = generic_bs_rr_4,
117 .bs_rr_8 = generic_bs_rr_8,
118
119 /* write (single) */
120 .bs_w_1 = generic_bs_w_1,
121 .bs_w_2 = generic_bs_w_2,
122 .bs_w_4 = generic_bs_w_4,
123 .bs_w_8 = generic_bs_w_8,
124
125 /* write multiple */
126 .bs_wm_1 = generic_bs_wm_1,
127 .bs_wm_2 = generic_bs_wm_2,
128 .bs_wm_4 = generic_bs_wm_4,
129 .bs_wm_8 = generic_bs_wm_8,
130
131 /* write region */
132 .bs_wr_1 = generic_bs_wr_1,
133 .bs_wr_2 = generic_bs_wr_2,
134 .bs_wr_4 = generic_bs_wr_4,
135 .bs_wr_8 = generic_bs_wr_8,
136
137 /* set multiple */
138 .bs_sm_1 = generic_bs_sm_1,
139 .bs_sm_2 = generic_bs_sm_2,
140 .bs_sm_4 = generic_bs_sm_4,
141 .bs_sm_8 = generic_bs_sm_8,
142
143 /* set region */
144 .bs_sr_1 = generic_bs_sr_1,
145 .bs_sr_2 = generic_bs_sr_2,
146 .bs_sr_4 = generic_bs_sr_4,
147 .bs_sr_8 = generic_bs_sr_8,
148
149 /* copy */
150 .bs_c_1 = generic_bs_c_1,
151 .bs_c_2 = generic_bs_c_2,
152 .bs_c_4 = generic_bs_c_4,
153 .bs_c_8 = generic_bs_c_8,
154
155 /* read (single) stream */
156 .bs_r_1_s = generic_bs_r_1,
157 .bs_r_2_s = generic_bs_r_2,
158 .bs_r_4_s = generic_bs_r_4,
159 .bs_r_8_s = generic_bs_r_8,
160
161 /* read multiple stream */
162 .bs_rm_1_s = generic_bs_rm_1,
163 .bs_rm_2_s = generic_bs_rm_2,
164 .bs_rm_4_s = generic_bs_rm_4,
165 .bs_rm_8_s = generic_bs_rm_8,
166
167 /* read region stream */
168 .bs_rr_1_s = generic_bs_rr_1,
169 .bs_rr_2_s = generic_bs_rr_2,
170 .bs_rr_4_s = generic_bs_rr_4,
171 .bs_rr_8_s = generic_bs_rr_8,
172
173 /* write (single) stream */
174 .bs_w_1_s = generic_bs_w_1,
175 .bs_w_2_s = generic_bs_w_2,
176 .bs_w_4_s = generic_bs_w_4,
177 .bs_w_8_s = generic_bs_w_8,
178
179 /* write multiple stream */
180 .bs_wm_1_s = generic_bs_wm_1,
181 .bs_wm_2_s = generic_bs_wm_2,
182 .bs_wm_4_s = generic_bs_wm_4,
183 .bs_wm_8_s = generic_bs_wm_8,
184
185 /* write region stream */
186 .bs_wr_1_s = generic_bs_wr_1,
187 .bs_wr_2_s = generic_bs_wr_2,
188 .bs_wr_4_s = generic_bs_wr_4,
189 .bs_wr_8_s = generic_bs_wr_8,
190 };
191
192 /* Ultra-gross kludge */
193 #if defined(CPU_CNMIPS) && (defined(__mips_n32) || defined(__mips_o32))
194 #include <contrib/octeon-sdk/cvmx.h>
195 #define rd8(a) cvmx_read64_uint8(a)
196 #define rd16(a) cvmx_read64_uint16(a)
197 #define rd32(a) cvmx_read64_uint32(a)
198 #define rd64(a) cvmx_read64_uint64(a)
199 #define wr8(a, v) cvmx_write64_uint8(a, v)
200 #define wr16(a, v) cvmx_write64_uint16(a, v)
201 #define wr32(a, v) cvmx_write64_uint32(a, v)
202 #define wr64(a, v) cvmx_write64_uint64(a, v)
203 #elif defined(CPU_SB1) && _BYTE_ORDER == _BIG_ENDIAN
204 #include <mips/sibyte/sb_bus_space.h>
205 #define rd8(a) sb_big_endian_read8(a)
206 #define rd16(a) sb_big_endian_read16(a)
207 #define rd32(a) sb_big_endian_read32(a)
208 #define wr8(a, v) sb_big_endian_write8(a, v)
209 #define wr16(a, v) sb_big_endian_write16(a, v)
210 #define wr32(a, v) sb_big_endian_write32(a, v)
211 #else
212 #define rd8(a) readb(a)
213 #define rd16(a) readw(a)
214 #define rd32(a) readl(a)
215 #ifdef readq
216 #define rd64(a) readq((a))
217 #endif
218 #define wr8(a, v) writeb(a, v)
219 #define wr16(a, v) writew(a, v)
220 #define wr32(a, v) writel(a, v)
221 #ifdef writeq
222 #define wr64(a, v) writeq(a, v)
223 #endif
224 #endif
225
226 /* generic bus_space tag */
227 bus_space_tag_t mips_bus_space_generic = &generic_space;
228
229 int
230 generic_bs_map(void *t __unused, bus_addr_t addr,
231 bus_size_t size, int flags __unused,
232 bus_space_handle_t *bshp)
233 {
234
235 *bshp = (bus_space_handle_t)pmap_mapdev((vm_paddr_t)addr,
236 (vm_size_t)size);
237 return (0);
238 }
239
240 void
241 generic_bs_unmap(void *t __unused, bus_space_handle_t bh,
242 bus_size_t size)
243 {
244
245 pmap_unmapdev((vm_offset_t)bh, (vm_size_t)size);
246 }
247
248 int
249 generic_bs_subregion(void *t __unused, bus_space_handle_t handle,
250 bus_size_t offset, bus_size_t size __unused,
251 bus_space_handle_t *bshp)
252 {
253
254 *bshp = handle + offset;
255 return (0);
256 }
257
258 int
259 generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
260 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
261 bus_addr_t *bpap, bus_space_handle_t *bshp)
262 {
263
264 panic("%s: not implemented", __func__);
265 }
266
267 void
268 generic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
269 {
270
271 panic("%s: not implemented", __func__);
272 }
273
274 uint8_t
275 generic_bs_r_1(void *t, bus_space_handle_t handle,
276 bus_size_t offset)
277 {
278
279 return (rd8(handle + offset));
280 }
281
282 uint16_t
283 generic_bs_r_2(void *t, bus_space_handle_t handle,
284 bus_size_t offset)
285 {
286
287 return (rd16(handle + offset));
288 }
289
290 uint32_t
291 generic_bs_r_4(void *t, bus_space_handle_t handle,
292 bus_size_t offset)
293 {
294
295 return (rd32(handle + offset));
296 }
297
298 uint64_t
299 generic_bs_r_8(void *t, bus_space_handle_t handle, bus_size_t offset)
300 {
301
302 #ifdef rd64
303 return(rd64(handle + offset));
304 #else
305 panic("%s: not implemented", __func__);
306 #endif
307 }
308
309 void
310 generic_bs_rm_1(void *t, bus_space_handle_t bsh,
311 bus_size_t offset, uint8_t *addr, size_t count)
312 {
313
314 while (count--)
315 *addr++ = rd8(bsh + offset);
316 }
317
318 void
319 generic_bs_rm_2(void *t, bus_space_handle_t bsh,
320 bus_size_t offset, uint16_t *addr, size_t count)
321 {
322 bus_addr_t baddr = bsh + offset;
323
324 while (count--)
325 *addr++ = rd16(baddr);
326 }
327
328 void
329 generic_bs_rm_4(void *t, bus_space_handle_t bsh,
330 bus_size_t offset, uint32_t *addr, size_t count)
331 {
332 bus_addr_t baddr = bsh + offset;
333
334 while (count--)
335 *addr++ = rd32(baddr);
336 }
337
338 void
339 generic_bs_rm_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
340 uint64_t *addr, size_t count)
341 {
342 #ifdef rd64
343 bus_addr_t baddr = bsh + offset;
344
345 while (count--)
346 *addr++ = rd64(baddr);
347 #else
348 panic("%s: not implemented", __func__);
349 #endif
350 }
351
352 /*
353 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
354 * described by tag/handle and starting at `offset' and copy into
355 * buffer provided.
356 */
357 void
358 generic_bs_rr_1(void *t, bus_space_handle_t bsh,
359 bus_size_t offset, uint8_t *addr, size_t count)
360 {
361 bus_addr_t baddr = bsh + offset;
362
363 while (count--) {
364 *addr++ = rd8(baddr);
365 baddr += 1;
366 }
367 }
368
369 void
370 generic_bs_rr_2(void *t, bus_space_handle_t bsh,
371 bus_size_t offset, uint16_t *addr, size_t count)
372 {
373 bus_addr_t baddr = bsh + offset;
374
375 while (count--) {
376 *addr++ = rd16(baddr);
377 baddr += 2;
378 }
379 }
380
381 void
382 generic_bs_rr_4(void *t, bus_space_handle_t bsh,
383 bus_size_t offset, uint32_t *addr, size_t count)
384 {
385 bus_addr_t baddr = bsh + offset;
386
387 while (count--) {
388 *addr++ = rd32(baddr);
389 baddr += 4;
390 }
391 }
392
393 void
394 generic_bs_rr_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
395 uint64_t *addr, size_t count)
396 {
397 #ifdef rd64
398 bus_addr_t baddr = bsh + offset;
399
400 while (count--) {
401 *addr++ = rd64(baddr);
402 baddr += 8;
403 }
404 #else
405 panic("%s: not implemented", __func__);
406 #endif
407 }
408
409 /*
410 * Write the 1, 2, 4, or 8 byte value `value' to bus space
411 * described by tag/handle/offset.
412 */
413 void
414 generic_bs_w_1(void *t, bus_space_handle_t bsh,
415 bus_size_t offset, uint8_t value)
416 {
417
418 wr8(bsh + offset, value);
419 }
420
421 void
422 generic_bs_w_2(void *t, bus_space_handle_t bsh,
423 bus_size_t offset, uint16_t value)
424 {
425
426 wr16(bsh + offset, value);
427 }
428
429 void
430 generic_bs_w_4(void *t, bus_space_handle_t bsh,
431 bus_size_t offset, uint32_t value)
432 {
433
434 wr32(bsh + offset, value);
435 }
436
437 void
438 generic_bs_w_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
439 uint64_t value)
440 {
441
442 #ifdef wr64
443 wr64(bsh + offset, value);
444 #else
445 panic("%s: not implemented", __func__);
446 #endif
447 }
448
449 /*
450 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
451 * provided to bus space described by tag/handle/offset.
452 */
453 void
454 generic_bs_wm_1(void *t, bus_space_handle_t bsh,
455 bus_size_t offset, const uint8_t *addr, size_t count)
456 {
457 bus_addr_t baddr = bsh + offset;
458
459 while (count--)
460 wr8(baddr, *addr++);
461 }
462
463 void
464 generic_bs_wm_2(void *t, bus_space_handle_t bsh,
465 bus_size_t offset, const uint16_t *addr, size_t count)
466 {
467 bus_addr_t baddr = bsh + offset;
468
469 while (count--)
470 wr16(baddr, *addr++);
471 }
472
473 void
474 generic_bs_wm_4(void *t, bus_space_handle_t bsh,
475 bus_size_t offset, const uint32_t *addr, size_t count)
476 {
477 bus_addr_t baddr = bsh + offset;
478
479 while (count--)
480 wr32(baddr, *addr++);
481 }
482
483 void
484 generic_bs_wm_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
485 const uint64_t *addr, size_t count)
486 {
487 #ifdef wr64
488 bus_addr_t baddr = bsh + offset;
489
490 while (count--)
491 wr64(baddr, *addr++);
492 #else
493 panic("%s: not implemented", __func__);
494 #endif
495 }
496
497 /*
498 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
499 * to bus space described by tag/handle starting at `offset'.
500 */
501 void
502 generic_bs_wr_1(void *t, bus_space_handle_t bsh,
503 bus_size_t offset, const uint8_t *addr, size_t count)
504 {
505 bus_addr_t baddr = bsh + offset;
506
507 while (count--) {
508 wr8(baddr, *addr++);
509 baddr += 1;
510 }
511 }
512
513 void
514 generic_bs_wr_2(void *t, bus_space_handle_t bsh,
515 bus_size_t offset, const uint16_t *addr, size_t count)
516 {
517 bus_addr_t baddr = bsh + offset;
518
519 while (count--) {
520 wr16(baddr, *addr++);
521 baddr += 2;
522 }
523 }
524
525 void
526 generic_bs_wr_4(void *t, bus_space_handle_t bsh,
527 bus_size_t offset, const uint32_t *addr, size_t count)
528 {
529 bus_addr_t baddr = bsh + offset;
530
531 while (count--) {
532 wr32(baddr, *addr++);
533 baddr += 4;
534 }
535 }
536
537 void
538 generic_bs_wr_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
539 const uint64_t *addr, size_t count)
540 {
541 #ifdef wr64
542 bus_addr_t baddr = bsh + offset;
543
544 while (count--) {
545 wr64(baddr, *addr++);
546 baddr += 8;
547 }
548 #else
549 panic("%s: not implemented", __func__);
550 #endif
551 }
552
553 /*
554 * Write the 1, 2, 4, or 8 byte value `val' to bus space described
555 * by tag/handle/offset `count' times.
556 */
557 void
558 generic_bs_sm_1(void *t, bus_space_handle_t bsh,
559 bus_size_t offset, uint8_t value, size_t count)
560 {
561 bus_addr_t addr = bsh + offset;
562
563 while (count--)
564 wr8(addr, value);
565 }
566
567 void
568 generic_bs_sm_2(void *t, bus_space_handle_t bsh,
569 bus_size_t offset, uint16_t value, size_t count)
570 {
571 bus_addr_t addr = bsh + offset;
572
573 while (count--)
574 wr16(addr, value);
575 }
576
577 void
578 generic_bs_sm_4(void *t, bus_space_handle_t bsh,
579 bus_size_t offset, uint32_t value, size_t count)
580 {
581 bus_addr_t addr = bsh + offset;
582
583 while (count--)
584 wr32(addr, value);
585 }
586
587 void
588 generic_bs_sm_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
589 uint64_t value, size_t count)
590 {
591 #ifdef wr64
592 bus_addr_t addr = bsh + offset;
593
594 while (count--)
595 wr64(addr, value);
596 #else
597 panic("%s: not implemented", __func__);
598 #endif
599 }
600
601 /*
602 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
603 * by tag/handle starting at `offset'.
604 */
605 void
606 generic_bs_sr_1(void *t, bus_space_handle_t bsh,
607 bus_size_t offset, uint8_t value, size_t count)
608 {
609 bus_addr_t addr = bsh + offset;
610
611 for (; count != 0; count--, addr++)
612 wr8(addr, value);
613 }
614
615 void
616 generic_bs_sr_2(void *t, bus_space_handle_t bsh,
617 bus_size_t offset, uint16_t value, size_t count)
618 {
619 bus_addr_t addr = bsh + offset;
620
621 for (; count != 0; count--, addr += 2)
622 wr16(addr, value);
623 }
624
625 void
626 generic_bs_sr_4(void *t, bus_space_handle_t bsh,
627 bus_size_t offset, uint32_t value, size_t count)
628 {
629 bus_addr_t addr = bsh + offset;
630
631 for (; count != 0; count--, addr += 4)
632 wr32(addr, value);
633 }
634
635 void
636 generic_bs_sr_8(void *t, bus_space_handle_t bsh, bus_size_t offset,
637 uint64_t value, size_t count)
638 {
639 #ifdef wr64
640 bus_addr_t addr = bsh + offset;
641
642 for (; count != 0; count--, addr += 8)
643 wr64(addr, value);
644 #else
645 panic("%s: not implemented", __func__);
646 #endif
647 }
648
649 /*
650 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
651 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
652 */
653 void
654 generic_bs_c_1(void *t, bus_space_handle_t bsh1,
655 bus_size_t off1, bus_space_handle_t bsh2,
656 bus_size_t off2, size_t count)
657 {
658 bus_addr_t addr1 = bsh1 + off1;
659 bus_addr_t addr2 = bsh2 + off2;
660
661 if (addr1 >= addr2) {
662 /* src after dest: copy forward */
663 for (; count != 0; count--, addr1++, addr2++)
664 wr8(addr2, rd8(addr1));
665 } else {
666 /* dest after src: copy backwards */
667 for (addr1 += (count - 1), addr2 += (count - 1);
668 count != 0; count--, addr1--, addr2--)
669 wr8(addr2, rd8(addr1));
670 }
671 }
672
673 void
674 generic_bs_c_2(void *t, bus_space_handle_t bsh1,
675 bus_size_t off1, bus_space_handle_t bsh2,
676 bus_size_t off2, size_t count)
677 {
678 bus_addr_t addr1 = bsh1 + off1;
679 bus_addr_t addr2 = bsh2 + off2;
680
681 if (addr1 >= addr2) {
682 /* src after dest: copy forward */
683 for (; count != 0; count--, addr1 += 2, addr2 += 2)
684 wr16(addr2, rd16(addr1));
685 } else {
686 /* dest after src: copy backwards */
687 for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
688 count != 0; count--, addr1 -= 2, addr2 -= 2)
689 wr16(addr2, rd16(addr1));
690 }
691 }
692
693 void
694 generic_bs_c_4(void *t, bus_space_handle_t bsh1,
695 bus_size_t off1, bus_space_handle_t bsh2,
696 bus_size_t off2, size_t count)
697 {
698 bus_addr_t addr1 = bsh1 + off1;
699 bus_addr_t addr2 = bsh2 + off2;
700
701 if (addr1 >= addr2) {
702 /* src after dest: copy forward */
703 for (; count != 0; count--, addr1 += 4, addr2 += 4)
704 wr32(addr2, rd32(addr1));
705 } else {
706 /* dest after src: copy backwards */
707 for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
708 count != 0; count--, addr1 -= 4, addr2 -= 4)
709 wr32(addr2, rd32(addr1));
710 }
711 }
712
713 void
714 generic_bs_c_8(void *t, bus_space_handle_t bsh1, bus_size_t off1,
715 bus_space_handle_t bsh2, bus_size_t off2, size_t count)
716 {
717 #if defined(rd64) && defined(wr64)
718 bus_addr_t addr1 = bsh1 + off1;
719 bus_addr_t addr2 = bsh2 + off2;
720
721 if (addr1 >= addr2) {
722 /* src after dest: copy forward */
723 for (; count != 0; count--, addr1 += 8, addr2 += 8)
724 wr64(addr2, rd64(addr1));
725 } else {
726 /* dest after src: copy backwards */
727 for (addr1 += 8 * (count - 1), addr2 += 8 * (count - 1);
728 count != 0; count--, addr1 -= 8, addr2 -= 8)
729 wr64(addr2, rd64(addr1));
730 }
731 #else
732 panic("%s: not implemented", __func__);
733 #endif
734 }
735
736 void
737 generic_bs_barrier(void *t __unused,
738 bus_space_handle_t bsh __unused,
739 bus_size_t offset __unused, bus_size_t len __unused,
740 int flags)
741 {
742 #if 0
743 if (flags & BUS_SPACE_BARRIER_WRITE)
744 mips_dcache_wbinv_all();
745 #endif
746 if (flags & BUS_SPACE_BARRIER_READ)
747 rmb();
748 if (flags & BUS_SPACE_BARRIER_WRITE)
749 wmb();
750 }
Cache object: e50ee521b4a358cdb4430449c4cba6df
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