The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/mips/mips/bus_space_generic.c

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    1 /*      $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $    */
    2 /*-
    3  * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
    4  *
    5  * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
    6  * All rights reserved.
    7  *
    8  * This code is derived from software contributed to The NetBSD Foundation
    9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
   10  * NASA Ames Research Center.
   11  *
   12  * Redistribution and use in source and binary forms, with or without
   13  * modification, are permitted provided that the following conditions
   14  * are met:
   15  * 1. Redistributions of source code must retain the above copyright
   16  *    notice, this list of conditions and the following disclaimer.
   17  * 2. Redistributions in binary form must reproduce the above copyright
   18  *    notice, this list of conditions and the following disclaimer in the
   19  *    documentation and/or other materials provided with the distribution.
   20  * 3. All advertising materials mentioning features or use of this software
   21  *    must display the following acknowledgement:
   22  *      This product includes software developed by the NetBSD
   23  *      Foundation, Inc. and its contributors.
   24  * 4. Neither the name of The NetBSD Foundation nor the names of its
   25  *    contributors may be used to endorse or promote products derived
   26  *    from this software without specific prior written permission.
   27  *
   28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   38  * POSSIBILITY OF SUCH DAMAGE.
   39  */
   40 
   41 /*
   42  * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
   43  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
   44  *
   45  * Redistribution and use in source and binary forms, with or without
   46  * modification, are permitted provided that the following conditions
   47  * are met:
   48  * 1. Redistributions of source code must retain the above copyright
   49  *    notice, this list of conditions and the following disclaimer.
   50  * 2. Redistributions in binary form must reproduce the above copyright
   51  *    notice, this list of conditions and the following disclaimer in the
   52  *    documentation and/or other materials provided with the distribution.
   53  * 3. All advertising materials mentioning features or use of this software
   54  *    must display the following acknowledgement:
   55  *      This product includes software developed by Christopher G. Demetriou
   56  *      for the NetBSD Project.
   57  * 4. The name of the author may not be used to endorse or promote products
   58  *    derived from this software without specific prior written permission
   59  *
   60  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   61  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   62  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   63  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   64  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   65  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   66  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   67  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   68  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   69  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   70  *
   71  *      from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
   72  * $FreeBSD: stable/8/sys/mips/mips/bus_space_generic.c 215938 2010-11-27 12:26:40Z jchandra $
   73  */
   74 #include <sys/cdefs.h>
   75 __FBSDID("$FreeBSD: stable/8/sys/mips/mips/bus_space_generic.c 215938 2010-11-27 12:26:40Z jchandra $");
   76 
   77 #include <sys/param.h>
   78 #include <sys/systm.h>
   79 #include <sys/bus.h>
   80 #include <sys/kernel.h>
   81 #include <sys/malloc.h>
   82 #include <sys/ktr.h>
   83 
   84 #include <vm/vm.h>
   85 #include <vm/pmap.h>
   86 #include <vm/vm_kern.h>
   87 #include <vm/vm_extern.h>
   88 
   89 #include <machine/bus.h>
   90 #include <machine/cache.h>
   91 
   92 static struct bus_space generic_space = {
   93         /* cookie */
   94         (void *) 0,
   95 
   96         /* mapping/unmapping */
   97         generic_bs_map,
   98         generic_bs_unmap,
   99         generic_bs_subregion,
  100 
  101         /* allocation/deallocation */
  102         NULL,
  103         NULL,
  104 
  105         /* barrier */
  106         generic_bs_barrier,
  107 
  108         /* read (single) */
  109         generic_bs_r_1,
  110         generic_bs_r_2,
  111         generic_bs_r_4,
  112         NULL,
  113 
  114         /* read multiple */
  115         generic_bs_rm_1,
  116         generic_bs_rm_2,
  117         generic_bs_rm_4,
  118         NULL,
  119 
  120         /* read region */
  121         generic_bs_rr_1,
  122         generic_bs_rr_2,
  123         generic_bs_rr_4,
  124         NULL,
  125 
  126         /* write (single) */
  127         generic_bs_w_1,
  128         generic_bs_w_2,
  129         generic_bs_w_4,
  130         NULL,
  131 
  132         /* write multiple */
  133         generic_bs_wm_1,
  134         generic_bs_wm_2,
  135         generic_bs_wm_4,
  136         NULL,
  137 
  138         /* write region */
  139         NULL,
  140         generic_bs_wr_2,
  141         generic_bs_wr_4,
  142         NULL,
  143 
  144         /* set multiple */
  145         NULL,
  146         NULL,
  147         NULL,
  148         NULL,
  149 
  150         /* set region */
  151         NULL,
  152         generic_bs_sr_2,
  153         generic_bs_sr_4,
  154         NULL,
  155 
  156         /* copy */
  157         NULL,
  158         generic_bs_c_2,
  159         NULL,
  160         NULL,
  161 
  162         /* read (single) stream */
  163         generic_bs_r_1,
  164         generic_bs_r_2,
  165         generic_bs_r_4,
  166         NULL,
  167 
  168         /* read multiple stream */
  169         generic_bs_rm_1,
  170         generic_bs_rm_2,
  171         generic_bs_rm_4,
  172         NULL,
  173 
  174         /* read region stream */
  175         generic_bs_rr_1,
  176         generic_bs_rr_2,
  177         generic_bs_rr_4,
  178         NULL,
  179 
  180         /* write (single) stream */
  181         generic_bs_w_1,
  182         generic_bs_w_2,
  183         generic_bs_w_4,
  184         NULL,
  185 
  186         /* write multiple stream */
  187         generic_bs_wm_1,
  188         generic_bs_wm_2,
  189         generic_bs_wm_4,
  190         NULL,
  191 
  192         /* write region stream */
  193         NULL,
  194         generic_bs_wr_2,
  195         generic_bs_wr_4,
  196         NULL,
  197 };
  198 
  199 /* Ultra-gross kludge */
  200 #include "opt_cputype.h"
  201 #if defined(CPU_CNMIPS) && (defined(__mips_n32) || defined(__mips_o32))
  202 #include <contrib/octeon-sdk/cvmx.h>
  203 #define rd8(a) cvmx_read64_uint8(a)
  204 #define rd16(a) cvmx_read64_uint16(a)
  205 #define rd32(a) cvmx_read64_uint32(a)
  206 #define wr8(a, v) cvmx_write64_uint8(a, v)
  207 #define wr16(a, v) cvmx_write64_uint16(a, v)
  208 #define wr32(a, v) cvmx_write64_uint32(a, v)
  209 #elif defined(CPU_SB1) && _BYTE_ORDER == _BIG_ENDIAN
  210 #include <mips/sibyte/sb_bus_space.h>
  211 #define rd8(a) sb_big_endian_read8(a)
  212 #define rd16(a) sb_big_endian_read16(a)
  213 #define rd32(a) sb_big_endian_read32(a)
  214 #define wr8(a, v) sb_big_endian_write8(a, v)
  215 #define wr16(a, v) sb_big_endian_write16(a, v)
  216 #define wr32(a, v) sb_big_endian_write32(a, v)
  217 #else
  218 #define rd8(a) readb(a)
  219 #define rd16(a) readw(a)
  220 #define rd32(a) readl(a)
  221 #define wr8(a, v) writeb(a, v)
  222 #define wr16(a, v) writew(a, v)
  223 #define wr32(a, v) writel(a, v)
  224 #endif
  225 
  226 /* generic bus_space tag */
  227 bus_space_tag_t mips_bus_space_generic = &generic_space;
  228 
  229 int
  230 generic_bs_map(void *t __unused, bus_addr_t addr,
  231               bus_size_t size __unused, int flags __unused,
  232               bus_space_handle_t *bshp)
  233 {
  234 
  235         *bshp = addr;
  236         return (0);
  237 }
  238 
  239 void
  240 generic_bs_unmap(void *t __unused, bus_space_handle_t bh __unused,
  241               bus_size_t size __unused)
  242 {
  243 
  244         /* Do nothing */
  245 }
  246 
  247 int
  248 generic_bs_subregion(void *t __unused, bus_space_handle_t handle __unused,
  249               bus_size_t offset __unused, bus_size_t size __unused,
  250               bus_space_handle_t *nhandle __unused)
  251 {
  252 
  253         printf("SUBREGION?!?!?!\n");
  254         /* Do nothing */
  255         return (0);
  256 }
  257 
  258 uint8_t
  259 generic_bs_r_1(void *t, bus_space_handle_t handle,
  260     bus_size_t offset)
  261 {
  262 
  263         return (rd8(handle + offset));
  264 }
  265 
  266 uint16_t
  267 generic_bs_r_2(void *t, bus_space_handle_t handle,
  268     bus_size_t offset)
  269 {
  270 
  271         return (rd16(handle + offset));
  272 }
  273 
  274 uint32_t
  275 generic_bs_r_4(void *t, bus_space_handle_t handle,
  276     bus_size_t offset)
  277 {
  278 
  279         return (rd32(handle + offset));
  280 }
  281 
  282 
  283 void
  284 generic_bs_rm_1(void *t, bus_space_handle_t bsh,
  285     bus_size_t offset, uint8_t *addr, size_t count)
  286 {
  287 
  288         while (count--)
  289                 *addr++ = rd8(bsh + offset);
  290 }
  291 
  292 void
  293 generic_bs_rm_2(void *t, bus_space_handle_t bsh,
  294     bus_size_t offset, uint16_t *addr, size_t count)
  295 {
  296         bus_addr_t baddr = bsh + offset;
  297 
  298         while (count--)
  299                 *addr++ = rd16(baddr);
  300 }
  301 
  302 void
  303 generic_bs_rm_4(void *t, bus_space_handle_t bsh,
  304     bus_size_t offset, uint32_t *addr, size_t count)
  305 {
  306         bus_addr_t baddr = bsh + offset;
  307 
  308         while (count--)
  309                 *addr++ = rd32(baddr);
  310 }
  311 
  312 
  313 /*
  314  * Read `count' 1, 2, 4, or 8 byte quantities from bus space
  315  * described by tag/handle and starting at `offset' and copy into
  316  * buffer provided.
  317  */
  318 void
  319 generic_bs_rr_1(void *t, bus_space_handle_t bsh,
  320     bus_size_t offset, uint8_t *addr, size_t count)
  321 {
  322         bus_addr_t baddr = bsh + offset;
  323 
  324         while (count--) {
  325                 *addr++ = rd8(baddr);
  326                 baddr += 1;
  327         }
  328 }
  329 
  330 void
  331 generic_bs_rr_2(void *t, bus_space_handle_t bsh,
  332     bus_size_t offset, uint16_t *addr, size_t count)
  333 {
  334         bus_addr_t baddr = bsh + offset;
  335 
  336         while (count--) {
  337                 *addr++ = rd16(baddr);
  338                 baddr += 2;
  339         }
  340 }
  341 
  342 void
  343 generic_bs_rr_4(void *t, bus_space_handle_t bsh,
  344     bus_size_t offset, uint32_t *addr, size_t count)
  345 {
  346         bus_addr_t baddr = bsh + offset;
  347 
  348         while (count--) {
  349                 *addr++ = rd32(baddr);
  350                 baddr += 4;
  351         }
  352 }
  353 
  354 /*
  355  * Write the 1, 2, 4, or 8 byte value `value' to bus space
  356  * described by tag/handle/offset.
  357  */
  358 void
  359 generic_bs_w_1(void *t, bus_space_handle_t bsh,
  360     bus_size_t offset, uint8_t value)
  361 {
  362 
  363         wr8(bsh + offset, value);
  364 }
  365 
  366 void
  367 generic_bs_w_2(void *t, bus_space_handle_t bsh,
  368     bus_size_t offset, uint16_t value)
  369 {
  370 
  371         wr16(bsh + offset, value);
  372 }
  373 
  374 void
  375 generic_bs_w_4(void *t, bus_space_handle_t bsh,
  376     bus_size_t offset, uint32_t value)
  377 {
  378 
  379         wr32(bsh + offset, value);
  380 }
  381 
  382 /*
  383  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
  384  * provided to bus space described by tag/handle/offset.
  385  */
  386 void
  387 generic_bs_wm_1(void *t, bus_space_handle_t bsh,
  388     bus_size_t offset, const uint8_t *addr, size_t count)
  389 {
  390         bus_addr_t baddr = bsh + offset;
  391 
  392         while (count--)
  393                 wr8(baddr, *addr++);
  394 }
  395 
  396 void
  397 generic_bs_wm_2(void *t, bus_space_handle_t bsh,
  398     bus_size_t offset, const uint16_t *addr, size_t count)
  399 {
  400         bus_addr_t baddr = bsh + offset;
  401 
  402         while (count--)
  403                 wr16(baddr, *addr++);
  404 }
  405 
  406 void
  407 generic_bs_wm_4(void *t, bus_space_handle_t bsh,
  408     bus_size_t offset, const uint32_t *addr, size_t count)
  409 {
  410         bus_addr_t baddr = bsh + offset;
  411 
  412         while (count--)
  413                 wr32(baddr, *addr++);
  414 }
  415 
  416 /*
  417  * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
  418  * to bus space described by tag/handle starting at `offset'.
  419  */
  420 void
  421 generic_bs_wr_1(void *t, bus_space_handle_t bsh,
  422     bus_size_t offset, const uint8_t *addr, size_t count)
  423 {
  424         bus_addr_t baddr = bsh + offset;
  425 
  426         while (count--) {
  427                 wr8(baddr, *addr++);
  428                 baddr += 1;
  429         }
  430 }
  431 
  432 void
  433 generic_bs_wr_2(void *t, bus_space_handle_t bsh,
  434     bus_size_t offset, const uint16_t *addr, size_t count)
  435 {
  436         bus_addr_t baddr = bsh + offset;
  437 
  438         while (count--) {
  439                 wr16(baddr, *addr++);
  440                 baddr += 2;
  441         }
  442 }
  443 
  444 void
  445 generic_bs_wr_4(void *t, bus_space_handle_t bsh,
  446     bus_size_t offset, const uint32_t *addr, size_t count)
  447 {
  448         bus_addr_t baddr = bsh + offset;
  449 
  450         while (count--) {
  451                 wr32(baddr, *addr++);
  452                 baddr += 4;
  453         }
  454 }
  455 
  456 /*
  457  * Write the 1, 2, 4, or 8 byte value `val' to bus space described
  458  * by tag/handle/offset `count' times.
  459  */
  460 void
  461 generic_bs_sm_1(void *t, bus_space_handle_t bsh,
  462     bus_size_t offset, uint8_t value, size_t count)
  463 {
  464         bus_addr_t addr = bsh + offset;
  465 
  466         while (count--)
  467                 wr8(addr, value);
  468 }
  469 
  470 void
  471 generic_bs_sm_2(void *t, bus_space_handle_t bsh,
  472     bus_size_t offset, uint16_t value, size_t count)
  473 {
  474         bus_addr_t addr = bsh + offset;
  475 
  476         while (count--)
  477                 wr16(addr, value);
  478 }
  479 
  480 void
  481 generic_bs_sm_4(void *t, bus_space_handle_t bsh,
  482     bus_size_t offset, uint32_t value, size_t count)
  483 {
  484         bus_addr_t addr = bsh + offset;
  485 
  486         while (count--)
  487                 wr32(addr, value);
  488 }
  489 
  490 /*
  491  * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
  492  * by tag/handle starting at `offset'.
  493  */
  494 void
  495 generic_bs_sr_1(void *t, bus_space_handle_t bsh,
  496     bus_size_t offset, uint8_t value, size_t count)
  497 {
  498         bus_addr_t addr = bsh + offset;
  499 
  500         for (; count != 0; count--, addr++)
  501                 wr8(addr, value);
  502 }
  503 
  504 void
  505 generic_bs_sr_2(void *t, bus_space_handle_t bsh,
  506                        bus_size_t offset, uint16_t value, size_t count)
  507 {
  508         bus_addr_t addr = bsh + offset;
  509 
  510         for (; count != 0; count--, addr += 2)
  511                 wr16(addr, value);
  512 }
  513 
  514 void
  515 generic_bs_sr_4(void *t, bus_space_handle_t bsh,
  516     bus_size_t offset, uint32_t value, size_t count)
  517 {
  518         bus_addr_t addr = bsh + offset;
  519 
  520         for (; count != 0; count--, addr += 4)
  521                 wr32(addr, value);
  522 }
  523 
  524 /*
  525  * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
  526  * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
  527  */
  528 void
  529 generic_bs_c_1(void *t, bus_space_handle_t bsh1,
  530     bus_size_t off1, bus_space_handle_t bsh2,
  531     bus_size_t off2, size_t count)
  532 {
  533         bus_addr_t addr1 = bsh1 + off1;
  534         bus_addr_t addr2 = bsh2 + off2;
  535 
  536         if (addr1 >= addr2) {
  537                 /* src after dest: copy forward */
  538                 for (; count != 0; count--, addr1++, addr2++)
  539                         wr8(addr2, rd8(addr1));
  540         } else {
  541                 /* dest after src: copy backwards */
  542                 for (addr1 += (count - 1), addr2 += (count - 1);
  543                     count != 0; count--, addr1--, addr2--)
  544                         wr8(addr2, rd8(addr1));
  545         }
  546 }
  547 
  548 void
  549 generic_bs_c_2(void *t, bus_space_handle_t bsh1,
  550     bus_size_t off1, bus_space_handle_t bsh2,
  551     bus_size_t off2, size_t count)
  552 {
  553         bus_addr_t addr1 = bsh1 + off1;
  554         bus_addr_t addr2 = bsh2 + off2;
  555 
  556         if (addr1 >= addr2) {
  557                 /* src after dest: copy forward */
  558                 for (; count != 0; count--, addr1 += 2, addr2 += 2)
  559                         wr16(addr2, rd16(addr1));
  560         } else {
  561                 /* dest after src: copy backwards */
  562                 for (addr1 += 2 * (count - 1), addr2 += 2 * (count - 1);
  563                     count != 0; count--, addr1 -= 2, addr2 -= 2)
  564                         wr16(addr2, rd16(addr1));
  565         }
  566 }
  567 
  568 void
  569 generic_bs_c_4(void *t, bus_space_handle_t bsh1,
  570     bus_size_t off1, bus_space_handle_t bsh2,
  571     bus_size_t off2, size_t count)
  572 {
  573         bus_addr_t addr1 = bsh1 + off1;
  574         bus_addr_t addr2 = bsh2 + off2;
  575 
  576         if (addr1 >= addr2) {
  577                 /* src after dest: copy forward */
  578                 for (; count != 0; count--, addr1 += 4, addr2 += 4)
  579                         wr32(addr2, rd32(addr1));
  580         } else {
  581                 /* dest after src: copy backwards */
  582                 for (addr1 += 4 * (count - 1), addr2 += 4 * (count - 1);
  583                     count != 0; count--, addr1 -= 4, addr2 -= 4)
  584                         wr32(addr2, rd32(addr1));
  585         }
  586 }
  587 
  588 void
  589 generic_bs_barrier(void *t __unused, 
  590                 bus_space_handle_t bsh __unused,
  591                 bus_size_t offset __unused, bus_size_t len __unused, 
  592                 int flags)
  593 {
  594 #if 0
  595         if (flags & BUS_SPACE_BARRIER_WRITE)
  596                 mips_dcache_wbinv_all();
  597 #endif
  598 }

Cache object: 743a5b6bcdb8e46b760cbbf8dbc7b2bb


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