1 /*-
2 * Copyright (c) 2006 Oleksandr Tymoshenko
3 * Copyright (c) 2002-2004 Juli Mallett <jmallett@FreeBSD.org>
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification, immediately at the beginning of the file.
12 * 2. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD: releng/8.1/sys/mips/mips/intr_machdep.c 195162 2009-06-29 16:45:50Z imp $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/bus.h>
35 #include <sys/interrupt.h>
36
37 #include <machine/clock.h>
38 #include <machine/cpu.h>
39 #include <machine/cpufunc.h>
40 #include <machine/cpuinfo.h>
41 #include <machine/cpuregs.h>
42 #include <machine/frame.h>
43 #include <machine/intr_machdep.h>
44 #include <machine/md_var.h>
45 #include <machine/trap.h>
46
47 static struct intr_event *hardintr_events[NHARD_IRQS];
48 static struct intr_event *softintr_events[NSOFT_IRQS];
49
50 #ifdef notyet
51 static int intrcnt_tab[NHARD_IRQS + NSOFT_IRQS];
52 static int intrcnt_index = 0;
53 static int last_printed = 0;
54 #endif
55
56 void
57 mips_mask_irq(void)
58 {
59
60 }
61
62 void
63 mips_unmask_irq(void)
64 {
65
66 }
67
68 void
69 cpu_establish_hardintr(const char *name, driver_filter_t *filt,
70 void (*handler)(void*), void *arg, int irq, int flags, void **cookiep)
71 {
72 struct intr_event *event;
73 int error;
74
75 printf("Establish HARD IRQ %d: filt %p handler %p arg %p\n",
76 irq, filt, handler, arg);
77 /*
78 * We have 6 levels, but thats 0 - 5 (not including 6)
79 */
80 if (irq < 0 || irq >= NHARD_IRQS)
81 panic("%s called for unknown hard intr %d", __func__, irq);
82
83 event = hardintr_events[irq];
84 if (event == NULL) {
85 error = intr_event_create(&event, (void *)irq, 0, irq,
86 (mask_fn)mips_mask_irq, (mask_fn)mips_unmask_irq,
87 NULL, NULL, "hard intr%d:", irq);
88 if (error)
89 return;
90 hardintr_events[irq] = event;
91 #ifdef notyet
92 last_printed += snprintf(intrnames + last_printed,
93 MAXCOMLEN + 1, "hard irq%d: %s", irq, name);
94 last_printed++;
95 intrcnt_tab[irq] = intrcnt_index;
96 intrcnt_index++;
97 #endif
98
99 }
100
101 intr_event_add_handler(event, name, filt, handler, arg,
102 intr_priority(flags), flags, cookiep);
103
104 mips_wr_status(mips_rd_status() | (((1 << irq) << 8) << 2));
105 }
106
107 void
108 cpu_establish_softintr(const char *name, driver_filter_t *filt,
109 void (*handler)(void*), void *arg, int irq, int flags,
110 void **cookiep)
111 {
112 struct intr_event *event;
113 int error;
114
115 printf("Establish SOFT IRQ %d: filt %p handler %p arg %p\n",
116 irq, filt, handler, arg);
117 if (irq < 0 || irq > NSOFT_IRQS)
118 panic("%s called for unknown hard intr %d", __func__, irq);
119
120 event = softintr_events[irq];
121 if (event == NULL) {
122 error = intr_event_create(&event, (void *)irq, 0, irq,
123 (mask_fn)mips_mask_irq, (mask_fn)mips_unmask_irq,
124 NULL, NULL, "intr%d:", irq);
125 if (error)
126 return;
127 softintr_events[irq] = event;
128 }
129
130 intr_event_add_handler(event, name, filt, handler, arg,
131 intr_priority(flags), flags, cookiep);
132
133 mips_wr_status(mips_rd_status() | (((1<< irq) << 8)));
134 }
135
136 void
137 cpu_intr(struct trapframe *tf)
138 {
139 struct intr_event *event;
140 register_t cause;
141 int hard, i, intr;
142
143 critical_enter();
144
145 cause = mips_rd_cause();
146 intr = (cause & MIPS_INT_MASK) >> 8;
147 cause &= ~MIPS_INT_MASK;
148 mips_wr_cause(cause);
149 while ((i = fls(intr)) != 0) {
150 intr &= ~(1 << (i - 1));
151 switch (i) {
152 case 1: case 2:
153 /* Software interrupt. */
154 i--; /* Get a 0-offset interrupt. */
155 hard = 0;
156 event = softintr_events[i];
157 break;
158 default:
159 /* Hardware interrupt. */
160 i -= 2; /* Trim software interrupt bits. */
161 i--; /* Get a 0-offset interrupt. */
162 hard = 1;
163 event = hardintr_events[i];
164 break;
165 }
166
167 if (!event || TAILQ_EMPTY(&event->ie_handlers)) {
168 printf("stray %s interrupt %d\n",
169 hard ? "hard" : "soft", i);
170 continue;
171 }
172
173 if (intr_event_handle(event, tf) != 0) {
174 printf("stray %s interrupt %d\n",
175 hard ? "hard" : "soft", i);
176 }
177 }
178
179 KASSERT(i == 0, ("all interrupts handled"));
180
181 critical_exit();
182 }
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