The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/mips/mips/locore.S

Version: -  FREEBSD  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-2  -  FREEBSD-11-1  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-4  -  FREEBSD-10-3  -  FREEBSD-10-2  -  FREEBSD-10-1  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-3  -  FREEBSD-9-2  -  FREEBSD-9-1  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-4  -  FREEBSD-8-3  -  FREEBSD-8-2  -  FREEBSD-8-1  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-4  -  FREEBSD-7-3  -  FREEBSD-7-2  -  FREEBSD-7-1  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-4  -  FREEBSD-6-3  -  FREEBSD-6-2  -  FREEBSD-6-1  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-5  -  FREEBSD-5-4  -  FREEBSD-5-3  -  FREEBSD-5-2  -  FREEBSD-5-1  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  linux-2.6  -  linux-2.4.22  -  MK83  -  MK84  -  PLAN9  -  DFBSD  -  NETBSD  -  NETBSD5  -  NETBSD4  -  NETBSD3  -  NETBSD20  -  OPENBSD  -  xnu-517  -  xnu-792  -  xnu-792.6.70  -  xnu-1228  -  xnu-1456.1.26  -  xnu-1699.24.8  -  xnu-2050.18.24  -  OPENSOLARIS  -  minix-3-1-1 
SearchContext: -  none  -  3  -  10 

    1 /*      $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $        */
    2 /*-
    3  * Copyright (c) 1992, 1993
    4  *      The Regents of the University of California.  All rights reserved.
    5  *
    6  * This code is derived from software contributed to Berkeley by
    7  * Digital Equipment Corporation and Ralph Campbell.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 4. Neither the name of the University nor the names of its contributors
   18  *    may be used to endorse or promote products derived from this software
   19  *    without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31  * SUCH DAMAGE.
   32  *
   33  * Copyright (C) 1989 Digital Equipment Corporation.
   34  * Permission to use, copy, modify, and distribute this software and
   35  * its documentation for any purpose and without fee is hereby granted,
   36  * provided that the above copyright notice appears in all copies.
   37  * Digital Equipment Corporation makes no representations about the
   38  * suitability of this software for any purpose.  It is provided "as is"
   39  * without express or implied warranty.
   40  *
   41  * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
   42  *      v 1.1 89/07/11 17:55:04 nelson Exp  SPRITE (DECWRL)
   43  * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
   44  *      v 9.2 90/01/29 18:00:39 shirriff Exp  SPRITE (DECWRL)
   45  * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
   46  *      v 1.1 89/07/10 14:27:41 nelson Exp  SPRITE (DECWRL)
   47  *
   48  *      from: @(#)locore.s      8.5 (Berkeley) 1/4/94
   49  *      JNPR: locore.S,v 1.6.2.1 2007/08/29 12:24:49 girish
   50  * $FreeBSD: stable/8/sys/mips/mips/locore.S 215938 2010-11-27 12:26:40Z jchandra $
   51  */
   52 
   53 /*
   54  * FREEBSD_DEVELOPERS_FIXME
   55  * The start routine below was written for a multi-core CPU
   56  * with each core being hyperthreaded. This serves as an example
   57  * for a complex CPU architecture. For a different CPU complex
   58  * please make necessary changes to read CPU-ID etc.
   59  * A clean solution would be to have a different locore file for
   60  * each CPU type.
   61  */
   62 
   63 /*
   64  *      Contains code that is the first executed at boot time plus
   65  *      assembly language support routines.
   66  */
   67 
   68 #include <machine/asm.h>
   69 #include <machine/cpu.h>
   70 #include <machine/cpuregs.h>
   71 #include <machine/regnum.h>
   72 
   73 #include "assym.s"
   74 
   75         .data
   76 #ifdef YAMON
   77 GLOBAL(fenvp)
   78         .space 4                        # Assumes mips32?  Is that OK?
   79 #endif
   80 
   81         .set noreorder
   82 
   83         .text
   84 
   85 GLOBAL(btext)
   86 ASM_ENTRY(_start)
   87 VECTOR(_locore, unknown)
   88         /* UNSAFE TO USE a0..a3, need to preserve the args from boot loader */
   89         mtc0    zero, MIPS_COP_0_CAUSE  # Clear soft interrupts
   90         
   91 #if defined(CPU_CNMIPS)
   92         /*
   93          * t1: Bits to set explicitly:
   94          *      Enable FPU
   95          */
   96 
   97         /* Set these bits */
   98         li      t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_SX | MIPS_SR_BEV)
   99 
  100         /* Reset these bits */
  101         li      t0, ~(MIPS_SR_DE | MIPS_SR_SOFT_RESET | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE)
  102 #elif defined (CPU_RMI)
  103         /* Set these bits */
  104         li      t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX)
  105 
  106         /* Reset these bits */
  107         li      t0, ~(MIPS_SR_BEV | MIPS_SR_SOFT_RESET | MIPS_SR_INT_IE)
  108 #else
  109         /*
  110          * t0: Bits to preserve if set:
  111          *      Soft reset
  112          *      Boot exception vectors (firmware-provided)
  113          */
  114         li      t0, (MIPS_SR_BEV | MIPS_SR_SOFT_RESET)
  115         /*
  116          * t1: Bits to set explicitly:
  117          *      Enable FPU
  118          */
  119         li      t1, MIPS_SR_COP_1_BIT
  120 #ifdef __mips_n64
  121         or      t1, MIPS_SR_KX | MIPS_SR_UX
  122 #endif
  123 #endif
  124         /*
  125          * Read coprocessor 0 status register, clear bits not
  126          * preserved (namely, clearing interrupt bits), and set
  127          * bits we want to explicitly set.
  128          */
  129         mfc0    t2, MIPS_COP_0_STATUS
  130         and     t2, t0
  131         or      t2, t1
  132         mtc0    t2, MIPS_COP_0_STATUS
  133         COP0_SYNC
  134 
  135         /* Make sure KSEG0 is cached */
  136         li      t0, MIPS_CCA_CACHED
  137         mtc0    t0, MIPS_COP_0_CONFIG
  138         COP0_SYNC
  139 
  140         /*xxximp
  141          * now that we pass a0...a3 to the platform_init routine, do we need
  142          * to stash this stuff here?
  143          */
  144 #ifdef YAMON
  145         /* Save YAMON boot environment pointer */
  146         sw      a2, _C_LABEL(fenvp)
  147 #endif
  148 
  149 #if defined(CPU_CNMIPS) && defined(SMP)
  150         .set push
  151         .set mips32r2
  152         rdhwr   t2, $0
  153         beqz    t2, 1f
  154         nop
  155         j       octeon_ap_wait
  156         nop
  157         .set pop
  158 1:
  159 #endif
  160 
  161         /*
  162          * Initialize stack and call machine startup.
  163          */
  164         PTR_LA          sp, _C_LABEL(pcpu_space)
  165         PTR_ADDU        sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ
  166 
  167         REG_S   zero, CALLFRAME_RA(sp)  # Zero out old ra for debugger
  168         REG_S   zero, CALLFRAME_SP(sp)  # Zero out old fp for debugger
  169 
  170         PTR_LA  gp, _C_LABEL(_gp)
  171 
  172         /* Call the platform-specific startup code. */
  173         jal     _C_LABEL(platform_start)
  174         nop
  175 
  176         PTR_LA  sp, _C_LABEL(thread0)
  177         PTR_L   a0, TD_PCB(sp)
  178         REG_LI  t0, ~7
  179         and     a0, a0, t0
  180         PTR_SUBU        sp, a0, CALLFRAME_SIZ
  181 
  182         jal     _C_LABEL(mi_startup)            # mi_startup(frame)
  183         sw      zero, CALLFRAME_SIZ - 8(sp)     # Zero out old fp for debugger
  184 
  185         PANIC("Startup failed!")
  186 
  187 VECTOR_END(_locore)

Cache object: 863867fe0db3948cad50dcddb8cc2639


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.