The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/mips/mips/pm_machdep.c

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    1 /*-
    2  * Copyright (c) 1992 Terrence R. Lambert.
    3  * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
    4  * All rights reserved.
    5  *
    6  * This code is derived from software contributed to Berkeley by
    7  * William Jolitz.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 4. Neither the name of the University nor the names of its contributors
   18  *    may be used to endorse or promote products derived from this software
   19  *    without specific prior written permission.
   20  *
   21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31  * SUCH DAMAGE.
   32  *
   33  *      from: @(#)machdep.c     7.4 (Berkeley) 6/3/91
   34  *      from: src/sys/i386/i386/machdep.c,v 1.385.2.3 2000/05/10 02:04:46 obrien
   35  *      JNPR: pm_machdep.c,v 1.9.2.1 2007/08/16 15:59:10 girish
   36  */
   37 
   38 #include <sys/cdefs.h>
   39 __FBSDID("$FreeBSD: releng/10.1/sys/mips/mips/pm_machdep.c 232896 2012-03-12 21:25:32Z jmallett $");
   40 
   41 #include "opt_compat.h"
   42 
   43 #include <sys/types.h>
   44 #include <sys/param.h>
   45 #include <sys/systm.h>
   46 #include <sys/sysent.h>
   47 #include <sys/proc.h>
   48 #include <sys/signalvar.h>
   49 #include <sys/exec.h>
   50 #include <sys/imgact.h>
   51 #include <sys/ucontext.h>
   52 #include <sys/lock.h>
   53 #include <sys/syscallsubr.h>
   54 #include <sys/sysproto.h>
   55 #include <sys/ptrace.h>
   56 #include <sys/syslog.h>
   57 #include <vm/vm.h>
   58 #include <vm/pmap.h>
   59 #include <vm/vm_map.h>
   60 #include <vm/vm_extern.h>
   61 #include <sys/user.h>
   62 #include <sys/uio.h>
   63 #include <machine/reg.h>
   64 #include <machine/md_var.h>
   65 #include <machine/sigframe.h>
   66 #include <machine/vmparam.h>
   67 #include <sys/vnode.h>
   68 #include <fs/pseudofs/pseudofs.h>
   69 #include <fs/procfs/procfs.h>
   70 
   71 #define UCONTEXT_MAGIC  0xACEDBADE
   72 
   73 /*
   74  * Send an interrupt to process.
   75  *
   76  * Stack is set up to allow sigcode stored
   77  * at top to call routine, followed by kcall
   78  * to sigreturn routine below.  After sigreturn
   79  * resets the signal mask, the stack, and the
   80  * frame pointer, it returns to the user
   81  * specified pc, psl.
   82  */
   83 void
   84 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
   85 {
   86         struct proc *p;
   87         struct thread *td;
   88         struct trapframe *regs;
   89         struct sigacts *psp;
   90         struct sigframe sf, *sfp;
   91         int sig;
   92         int oonstack;
   93 
   94         td = curthread;
   95         p = td->td_proc;
   96         PROC_LOCK_ASSERT(p, MA_OWNED);
   97         sig = ksi->ksi_signo;
   98         psp = p->p_sigacts;
   99         mtx_assert(&psp->ps_mtx, MA_OWNED);
  100 
  101         regs = td->td_frame;
  102         oonstack = sigonstack(regs->sp);
  103 
  104         /* save user context */
  105         bzero(&sf, sizeof(struct sigframe));
  106         sf.sf_uc.uc_sigmask = *mask;
  107         sf.sf_uc.uc_stack = td->td_sigstk;
  108         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  109         sf.sf_uc.uc_mcontext.mc_pc = regs->pc;
  110         sf.sf_uc.uc_mcontext.mullo = regs->mullo;
  111         sf.sf_uc.uc_mcontext.mulhi = regs->mulhi;
  112         sf.sf_uc.uc_mcontext.mc_tls = td->td_md.md_tls;
  113         sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC;  /* magic number */
  114         bcopy((void *)&regs->ast, (void *)&sf.sf_uc.uc_mcontext.mc_regs[1],
  115             sizeof(sf.sf_uc.uc_mcontext.mc_regs) - sizeof(register_t));
  116         sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
  117         if (sf.sf_uc.uc_mcontext.mc_fpused) {
  118                 /* if FPU has current state, save it first */
  119                 if (td == PCPU_GET(fpcurthread))
  120                         MipsSaveCurFPState(td);
  121                 bcopy((void *)&td->td_frame->f0,
  122                     (void *)sf.sf_uc.uc_mcontext.mc_fpregs,
  123                     sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
  124         }
  125 
  126         /* Allocate and validate space for the signal handler context. */
  127         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  128             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  129                 sfp = (struct sigframe *)((vm_offset_t)(td->td_sigstk.ss_sp +
  130                     td->td_sigstk.ss_size - sizeof(struct sigframe))
  131                     & ~(sizeof(__int64_t) - 1));
  132         } else
  133                 sfp = (struct sigframe *)((vm_offset_t)(regs->sp - 
  134                     sizeof(struct sigframe)) & ~(sizeof(__int64_t) - 1));
  135 
  136         /* Translate the signal if appropriate */
  137         if (p->p_sysent->sv_sigtbl) {
  138                 if (sig <= p->p_sysent->sv_sigsize)
  139                         sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  140         }
  141 
  142         /* Build the argument list for the signal handler. */
  143         regs->a0 = sig;
  144         regs->a2 = (register_t)(intptr_t)&sfp->sf_uc;
  145         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  146                 /* Signal handler installed with SA_SIGINFO. */
  147                 regs->a1 = (register_t)(intptr_t)&sfp->sf_si;
  148                 /* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */
  149 
  150                 /* fill siginfo structure */
  151                 sf.sf_si.si_signo = sig;
  152                 sf.sf_si.si_code = ksi->ksi_code;
  153                 sf.sf_si.si_addr = (void*)(intptr_t)regs->badvaddr;
  154         } else {
  155                 /* Old FreeBSD-style arguments. */
  156                 regs->a1 = ksi->ksi_code;
  157                 regs->a3 = regs->badvaddr;
  158                 /* sf.sf_ahu.sf_handler = catcher; */
  159         }
  160 
  161         mtx_unlock(&psp->ps_mtx);
  162         PROC_UNLOCK(p);
  163 
  164         /*
  165          * Copy the sigframe out to the user's stack.
  166          */
  167         if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
  168                 /*
  169                  * Something is wrong with the stack pointer.
  170                  * ...Kill the process.
  171                  */
  172                 PROC_LOCK(p);
  173                 sigexit(td, SIGILL);
  174         }
  175 
  176         regs->pc = (register_t)(intptr_t)catcher;
  177         regs->t9 = (register_t)(intptr_t)catcher;
  178         regs->sp = (register_t)(intptr_t)sfp;
  179         /*
  180          * Signal trampoline code is at base of user stack.
  181          */
  182         regs->ra = (register_t)(intptr_t)PS_STRINGS - *(p->p_sysent->sv_szsigcode);
  183         PROC_LOCK(p);
  184         mtx_lock(&psp->ps_mtx);
  185 }
  186 
  187 #ifdef GONE_IN_7
  188 /*
  189  * Build siginfo_t for SA thread
  190  */
  191 void
  192 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si)
  193 {
  194         struct proc *p;
  195         struct thread *td;
  196 
  197         td = curthread;
  198         p = td->td_proc;
  199         PROC_LOCK_ASSERT(p, MA_OWNED);
  200 
  201         bzero(si, sizeof(*si));
  202         si->si_signo = sig;
  203         si->si_code = code;
  204         /* XXXKSE fill other fields */
  205 }
  206 #endif
  207 
  208 /*
  209  * System call to cleanup state after a signal
  210  * has been taken.  Reset signal mask and
  211  * stack state from context left by sendsig (above).
  212  * Return to previous pc as specified by
  213  * context left by sendsig.
  214  */
  215 int
  216 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
  217 {
  218         ucontext_t uc;
  219         int error;
  220 
  221         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  222         if (error != 0)
  223             return (error);
  224 
  225         error = set_mcontext(td, &uc.uc_mcontext);
  226         if (error != 0)
  227                 return (error);
  228 
  229         kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
  230 
  231         return (EJUSTRETURN);
  232 }
  233 
  234 int
  235 ptrace_set_pc(struct thread *td, unsigned long addr)
  236 {
  237         td->td_frame->pc = (register_t) addr;
  238         return 0;
  239 }
  240 
  241 static int
  242 ptrace_read_int(struct thread *td, off_t addr, int *v)
  243 {
  244         struct iovec iov;
  245         struct uio uio;
  246 
  247         PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
  248         iov.iov_base = (caddr_t) v;
  249         iov.iov_len = sizeof(int);
  250         uio.uio_iov = &iov;
  251         uio.uio_iovcnt = 1;
  252         uio.uio_offset = (off_t)addr;
  253         uio.uio_resid = sizeof(int);
  254         uio.uio_segflg = UIO_SYSSPACE;
  255         uio.uio_rw = UIO_READ;
  256         uio.uio_td = td;
  257         return proc_rwmem(td->td_proc, &uio);
  258 }
  259 
  260 static int
  261 ptrace_write_int(struct thread *td, off_t addr, int v)
  262 {
  263         struct iovec iov;
  264         struct uio uio;
  265 
  266         PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
  267         iov.iov_base = (caddr_t) &v;
  268         iov.iov_len = sizeof(int);
  269         uio.uio_iov = &iov;
  270         uio.uio_iovcnt = 1;
  271         uio.uio_offset = (off_t)addr;
  272         uio.uio_resid = sizeof(int);
  273         uio.uio_segflg = UIO_SYSSPACE;
  274         uio.uio_rw = UIO_WRITE;
  275         uio.uio_td = td;
  276         return proc_rwmem(td->td_proc, &uio);
  277 }
  278 
  279 int
  280 ptrace_single_step(struct thread *td)
  281 {
  282         unsigned va;
  283         struct trapframe *locr0 = td->td_frame;
  284         int i;
  285         int bpinstr = MIPS_BREAK_SSTEP;
  286         int curinstr;
  287         struct proc *p;
  288 
  289         p = td->td_proc;
  290         PROC_UNLOCK(p);
  291         /*
  292          * Fetch what's at the current location.
  293          */
  294         ptrace_read_int(td,  (off_t)locr0->pc, &curinstr);
  295 
  296         /* compute next address after current location */
  297         if(curinstr != 0) {
  298                 va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr,
  299                     (uintptr_t)&curinstr);
  300         } else {
  301                 va = locr0->pc + 4;
  302         }
  303         if (td->td_md.md_ss_addr) {
  304                 printf("SS %s (%d): breakpoint already set at %x (va %x)\n",
  305                     p->p_comm, p->p_pid, td->td_md.md_ss_addr, va); /* XXX */
  306                 return (EFAULT);
  307         }
  308         td->td_md.md_ss_addr = va;
  309         /*
  310          * Fetch what's at the current location.
  311          */
  312         ptrace_read_int(td, (off_t)va, &td->td_md.md_ss_instr);
  313 
  314         /*
  315          * Store breakpoint instruction at the "next" location now.
  316          */
  317         i = ptrace_write_int (td, va, bpinstr);
  318 
  319         /*
  320          * The sync'ing of I & D caches is done by procfs_domem()
  321          * through procfs_rwmem().
  322          */
  323 
  324         PROC_LOCK(p);
  325         if (i < 0)
  326                 return (EFAULT);
  327 #if 0
  328         printf("SS %s (%d): breakpoint set at %x: %x (pc %x) br %x\n",
  329             p->p_comm, p->p_pid, p->p_md.md_ss_addr,
  330             p->p_md.md_ss_instr, locr0->pc, curinstr); /* XXX */
  331 #endif
  332         return (0);
  333 }
  334 
  335 
  336 void
  337 makectx(struct trapframe *tf, struct pcb *pcb)
  338 {
  339 
  340         pcb->pcb_regs.ra = tf->ra;
  341         pcb->pcb_regs.pc = tf->pc;
  342         pcb->pcb_regs.sp = tf->sp;
  343 }
  344 
  345 int
  346 fill_regs(struct thread *td, struct reg *regs)
  347 {
  348         memcpy(regs, td->td_frame, sizeof(struct reg));
  349         return (0);
  350 }
  351 
  352 int
  353 set_regs(struct thread *td, struct reg *regs)
  354 {
  355         struct trapframe *f;
  356         register_t sr;
  357 
  358         f = (struct trapframe *) td->td_frame;
  359         /*
  360          * Don't allow the user to change SR
  361          */
  362         sr = f->sr;
  363         memcpy(td->td_frame, regs, sizeof(struct reg));
  364         f->sr = sr;
  365         return (0);
  366 }
  367 
  368 int
  369 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
  370 {
  371         struct trapframe *tp;
  372 
  373         tp = td->td_frame;
  374         PROC_LOCK(curthread->td_proc);
  375         mcp->mc_onstack = sigonstack(tp->sp);
  376         PROC_UNLOCK(curthread->td_proc);
  377         bcopy((void *)&td->td_frame->zero, (void *)&mcp->mc_regs,
  378             sizeof(mcp->mc_regs));
  379 
  380         mcp->mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
  381         if (mcp->mc_fpused) {
  382                 bcopy((void *)&td->td_frame->f0, (void *)&mcp->mc_fpregs,
  383                     sizeof(mcp->mc_fpregs));
  384         }
  385         if (flags & GET_MC_CLEAR_RET) {
  386                 mcp->mc_regs[V0] = 0;
  387                 mcp->mc_regs[V1] = 0;
  388                 mcp->mc_regs[A3] = 0;
  389         }
  390 
  391         mcp->mc_pc = td->td_frame->pc;
  392         mcp->mullo = td->td_frame->mullo;
  393         mcp->mulhi = td->td_frame->mulhi;
  394         mcp->mc_tls = td->td_md.md_tls;
  395         return (0);
  396 }
  397 
  398 int
  399 set_mcontext(struct thread *td, const mcontext_t *mcp)
  400 {
  401         struct trapframe *tp;
  402 
  403         tp = td->td_frame;
  404         bcopy((void *)&mcp->mc_regs, (void *)&td->td_frame->zero,
  405             sizeof(mcp->mc_regs));
  406 
  407         td->td_md.md_flags = mcp->mc_fpused & MDTD_FPUSED;
  408         if (mcp->mc_fpused) {
  409                 bcopy((void *)&mcp->mc_fpregs, (void *)&td->td_frame->f0,
  410                     sizeof(mcp->mc_fpregs));
  411         }
  412         td->td_frame->pc = mcp->mc_pc;
  413         td->td_frame->mullo = mcp->mullo;
  414         td->td_frame->mulhi = mcp->mulhi;
  415         td->td_md.md_tls = mcp->mc_tls;
  416         /* Dont let user to set any bits in Status and casue registers */
  417 
  418         return (0);
  419 }
  420 
  421 int
  422 fill_fpregs(struct thread *td, struct fpreg *fpregs)
  423 {
  424         if (td == PCPU_GET(fpcurthread))
  425                 MipsSaveCurFPState(td);
  426         memcpy(fpregs, &td->td_frame->f0, sizeof(struct fpreg)); 
  427         return 0;
  428 }
  429 
  430 int
  431 set_fpregs(struct thread *td, struct fpreg *fpregs)
  432 {
  433         if (PCPU_GET(fpcurthread) == td)
  434                 PCPU_SET(fpcurthread, (struct thread *)0);
  435         memcpy(&td->td_frame->f0, fpregs, sizeof(struct fpreg));
  436         return 0;
  437 }
  438 
  439 
  440 /*
  441  * Clear registers on exec
  442  * $sp is set to the stack pointer passed in.  $pc is set to the entry
  443  * point given by the exec_package passed in, as is $t9 (used for PIC
  444  * code by the MIPS elf abi).
  445  */
  446 void
  447 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
  448 {
  449 
  450         bzero((caddr_t)td->td_frame, sizeof(struct trapframe));
  451 
  452         /*
  453          * The stack pointer has to be aligned to accommodate the largest
  454          * datatype at minimum.  This probably means it should be 16-byte
  455          * aligned, but for now we're 8-byte aligning it.
  456          */
  457         td->td_frame->sp = ((register_t) stack) & ~(sizeof(__int64_t) - 1);
  458 
  459         /*
  460          * If we're running o32 or n32 programs but have 64-bit registers,
  461          * GCC may use stack-relative addressing near the top of user
  462          * address space that, due to sign extension, will yield an
  463          * invalid address.  For instance, if sp is 0x7fffff00 then GCC
  464          * might do something like this to load a word from 0x7ffffff0:
  465          *
  466          *      addu    sp, sp, 32768
  467          *      lw      t0, -32528(sp)
  468          *
  469          * On systems with 64-bit registers, sp is sign-extended to
  470          * 0xffffffff80007f00 and the load is instead done from
  471          * 0xffffffff7ffffff0.
  472          *
  473          * To prevent this, we subtract 64K from the stack pointer here.
  474          *
  475          * For consistency, we should just always do this unless we're
  476          * running n64 programs.  For now, since we don't support
  477          * COMPAT_FREEBSD32 on n64 kernels, we just do it unless we're
  478          * running n64 kernels.
  479          */
  480 #if !defined(__mips_n64)
  481         td->td_frame->sp -= 65536;
  482 #endif
  483 
  484         td->td_frame->pc = imgp->entry_addr & ~3;
  485         td->td_frame->t9 = imgp->entry_addr & ~3; /* abicall req */
  486         td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
  487             (mips_rd_status() & MIPS_SR_INT_MASK);
  488 #if defined(__mips_n32) 
  489         td->td_frame->sr |= MIPS_SR_PX;
  490 #elif  defined(__mips_n64)
  491         td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
  492 #endif
  493         /*
  494          * FREEBSD_DEVELOPERS_FIXME:
  495          * Setup any other CPU-Specific registers (Not MIPS Standard)
  496          * and/or bits in other standard MIPS registers (if CPU-Specific)
  497          *  that are needed.
  498          */
  499 
  500         /*
  501          * Set up arguments for the rtld-capable crt0:
  502          *      a0      stack pointer
  503          *      a1      rtld cleanup (filled in by dynamic loader)
  504          *      a2      rtld object (filled in by dynamic loader)
  505          *      a3      ps_strings
  506          */
  507         td->td_frame->a0 = (register_t) stack;
  508         td->td_frame->a1 = 0;
  509         td->td_frame->a2 = 0;
  510         td->td_frame->a3 = (register_t)imgp->ps_strings;
  511 
  512         td->td_md.md_flags &= ~MDTD_FPUSED;
  513         if (PCPU_GET(fpcurthread) == td)
  514             PCPU_SET(fpcurthread, (struct thread *)0);
  515         td->td_md.md_ss_addr = 0;
  516 }
  517 
  518 int
  519 ptrace_clear_single_step(struct thread *td)
  520 {
  521         int i;
  522         struct proc *p;
  523 
  524         p = td->td_proc;
  525         PROC_LOCK_ASSERT(p, MA_OWNED);
  526         if (!td->td_md.md_ss_addr)
  527                 return EINVAL;
  528 
  529         /*
  530          * Restore original instruction and clear BP
  531          */
  532         i = ptrace_write_int (td, td->td_md.md_ss_addr, td->td_md.md_ss_instr);
  533 
  534         /* The sync'ing of I & D caches is done by procfs_domem(). */
  535 
  536         if (i < 0) {
  537                 log(LOG_ERR, "SS %s %d: can't restore instruction at %x: %x\n",
  538                     p->p_comm, p->p_pid, td->td_md.md_ss_addr,
  539                     td->td_md.md_ss_instr);
  540         }
  541         td->td_md.md_ss_addr = 0;
  542         return 0;
  543 }

Cache object: d6572610476a4ed415c1e56872509a1f


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