1 /*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
34 * from: src/sys/i386/i386/machdep.c,v 1.385.2.3 2000/05/10 02:04:46 obrien
35 * JNPR: pm_machdep.c,v 1.9.2.1 2007/08/16 15:59:10 girish
36 */
37
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD: releng/11.1/sys/mips/mips/pm_machdep.c 294930 2016-01-27 17:55:01Z jhb $");
40
41 #include "opt_compat.h"
42
43 #include <sys/types.h>
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/sysent.h>
47 #include <sys/proc.h>
48 #include <sys/signalvar.h>
49 #include <sys/exec.h>
50 #include <sys/imgact.h>
51 #include <sys/ucontext.h>
52 #include <sys/lock.h>
53 #include <sys/syscallsubr.h>
54 #include <sys/sysproto.h>
55 #include <sys/ptrace.h>
56 #include <sys/syslog.h>
57 #include <vm/vm.h>
58 #include <vm/pmap.h>
59 #include <vm/vm_map.h>
60 #include <vm/vm_extern.h>
61 #include <sys/user.h>
62 #include <sys/uio.h>
63 #include <machine/reg.h>
64 #include <machine/md_var.h>
65 #include <machine/sigframe.h>
66 #include <machine/vmparam.h>
67 #include <sys/vnode.h>
68 #include <fs/pseudofs/pseudofs.h>
69 #include <fs/procfs/procfs.h>
70
71 #define UCONTEXT_MAGIC 0xACEDBADE
72
73 /*
74 * Send an interrupt to process.
75 *
76 * Stack is set up to allow sigcode stored
77 * at top to call routine, followed by kcall
78 * to sigreturn routine below. After sigreturn
79 * resets the signal mask, the stack, and the
80 * frame pointer, it returns to the user
81 * specified pc, psl.
82 */
83 void
84 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
85 {
86 struct proc *p;
87 struct thread *td;
88 struct trapframe *regs;
89 struct sigacts *psp;
90 struct sigframe sf, *sfp;
91 int sig;
92 int oonstack;
93
94 td = curthread;
95 p = td->td_proc;
96 PROC_LOCK_ASSERT(p, MA_OWNED);
97 sig = ksi->ksi_signo;
98 psp = p->p_sigacts;
99 mtx_assert(&psp->ps_mtx, MA_OWNED);
100
101 regs = td->td_frame;
102 oonstack = sigonstack(regs->sp);
103
104 /* save user context */
105 bzero(&sf, sizeof(struct sigframe));
106 sf.sf_uc.uc_sigmask = *mask;
107 sf.sf_uc.uc_stack = td->td_sigstk;
108 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
109 sf.sf_uc.uc_mcontext.mc_pc = regs->pc;
110 sf.sf_uc.uc_mcontext.mullo = regs->mullo;
111 sf.sf_uc.uc_mcontext.mulhi = regs->mulhi;
112 sf.sf_uc.uc_mcontext.mc_tls = td->td_md.md_tls;
113 sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC; /* magic number */
114 bcopy((void *)®s->ast, (void *)&sf.sf_uc.uc_mcontext.mc_regs[1],
115 sizeof(sf.sf_uc.uc_mcontext.mc_regs) - sizeof(register_t));
116 sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
117 if (sf.sf_uc.uc_mcontext.mc_fpused) {
118 /* if FPU has current state, save it first */
119 if (td == PCPU_GET(fpcurthread))
120 MipsSaveCurFPState(td);
121 bcopy((void *)&td->td_frame->f0,
122 (void *)sf.sf_uc.uc_mcontext.mc_fpregs,
123 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
124 }
125
126 /* Allocate and validate space for the signal handler context. */
127 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
128 SIGISMEMBER(psp->ps_sigonstack, sig)) {
129 sfp = (struct sigframe *)(((uintptr_t)td->td_sigstk.ss_sp +
130 td->td_sigstk.ss_size - sizeof(struct sigframe))
131 & ~(sizeof(__int64_t) - 1));
132 } else
133 sfp = (struct sigframe *)((vm_offset_t)(regs->sp -
134 sizeof(struct sigframe)) & ~(sizeof(__int64_t) - 1));
135
136 /* Build the argument list for the signal handler. */
137 regs->a0 = sig;
138 regs->a2 = (register_t)(intptr_t)&sfp->sf_uc;
139 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
140 /* Signal handler installed with SA_SIGINFO. */
141 regs->a1 = (register_t)(intptr_t)&sfp->sf_si;
142 /* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */
143
144 /* fill siginfo structure */
145 sf.sf_si.si_signo = sig;
146 sf.sf_si.si_code = ksi->ksi_code;
147 sf.sf_si.si_addr = (void*)(intptr_t)regs->badvaddr;
148 } else {
149 /* Old FreeBSD-style arguments. */
150 regs->a1 = ksi->ksi_code;
151 regs->a3 = regs->badvaddr;
152 /* sf.sf_ahu.sf_handler = catcher; */
153 }
154
155 mtx_unlock(&psp->ps_mtx);
156 PROC_UNLOCK(p);
157
158 /*
159 * Copy the sigframe out to the user's stack.
160 */
161 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
162 /*
163 * Something is wrong with the stack pointer.
164 * ...Kill the process.
165 */
166 PROC_LOCK(p);
167 sigexit(td, SIGILL);
168 }
169
170 regs->pc = (register_t)(intptr_t)catcher;
171 regs->t9 = (register_t)(intptr_t)catcher;
172 regs->sp = (register_t)(intptr_t)sfp;
173 /*
174 * Signal trampoline code is at base of user stack.
175 */
176 regs->ra = (register_t)(intptr_t)PS_STRINGS - *(p->p_sysent->sv_szsigcode);
177 PROC_LOCK(p);
178 mtx_lock(&psp->ps_mtx);
179 }
180
181 /*
182 * System call to cleanup state after a signal
183 * has been taken. Reset signal mask and
184 * stack state from context left by sendsig (above).
185 * Return to previous pc as specified by
186 * context left by sendsig.
187 */
188 int
189 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
190 {
191 ucontext_t uc;
192 int error;
193
194 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
195 if (error != 0)
196 return (error);
197
198 error = set_mcontext(td, &uc.uc_mcontext);
199 if (error != 0)
200 return (error);
201
202 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
203
204 return (EJUSTRETURN);
205 }
206
207 int
208 ptrace_set_pc(struct thread *td, unsigned long addr)
209 {
210 td->td_frame->pc = (register_t) addr;
211 return 0;
212 }
213
214 static int
215 ptrace_read_int(struct thread *td, off_t addr, int *v)
216 {
217
218 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v))
219 return (ENOMEM);
220 return (0);
221 }
222
223 static int
224 ptrace_write_int(struct thread *td, off_t addr, int v)
225 {
226
227 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v))
228 return (ENOMEM);
229 return (0);
230 }
231
232 int
233 ptrace_single_step(struct thread *td)
234 {
235 unsigned va;
236 struct trapframe *locr0 = td->td_frame;
237 int i;
238 int bpinstr = MIPS_BREAK_SSTEP;
239 int curinstr;
240 struct proc *p;
241
242 p = td->td_proc;
243 PROC_UNLOCK(p);
244 /*
245 * Fetch what's at the current location.
246 */
247 ptrace_read_int(td, (off_t)locr0->pc, &curinstr);
248
249 /* compute next address after current location */
250 if(curinstr != 0) {
251 va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr,
252 (uintptr_t)&curinstr);
253 } else {
254 va = locr0->pc + 4;
255 }
256 if (td->td_md.md_ss_addr) {
257 printf("SS %s (%d): breakpoint already set at %x (va %x)\n",
258 p->p_comm, p->p_pid, td->td_md.md_ss_addr, va); /* XXX */
259 return (EFAULT);
260 }
261 td->td_md.md_ss_addr = va;
262 /*
263 * Fetch what's at the current location.
264 */
265 ptrace_read_int(td, (off_t)va, &td->td_md.md_ss_instr);
266
267 /*
268 * Store breakpoint instruction at the "next" location now.
269 */
270 i = ptrace_write_int (td, va, bpinstr);
271
272 /*
273 * The sync'ing of I & D caches is done by procfs_domem()
274 * through procfs_rwmem().
275 */
276
277 PROC_LOCK(p);
278 if (i < 0)
279 return (EFAULT);
280 #if 0
281 printf("SS %s (%d): breakpoint set at %x: %x (pc %x) br %x\n",
282 p->p_comm, p->p_pid, p->p_md.md_ss_addr,
283 p->p_md.md_ss_instr, locr0->pc, curinstr); /* XXX */
284 #endif
285 return (0);
286 }
287
288
289 void
290 makectx(struct trapframe *tf, struct pcb *pcb)
291 {
292
293 pcb->pcb_regs.ra = tf->ra;
294 pcb->pcb_regs.pc = tf->pc;
295 pcb->pcb_regs.sp = tf->sp;
296 }
297
298 int
299 fill_regs(struct thread *td, struct reg *regs)
300 {
301 memcpy(regs, td->td_frame, sizeof(struct reg));
302 return (0);
303 }
304
305 int
306 set_regs(struct thread *td, struct reg *regs)
307 {
308 struct trapframe *f;
309 register_t sr;
310
311 f = (struct trapframe *) td->td_frame;
312 /*
313 * Don't allow the user to change SR
314 */
315 sr = f->sr;
316 memcpy(td->td_frame, regs, sizeof(struct reg));
317 f->sr = sr;
318 return (0);
319 }
320
321 int
322 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
323 {
324 struct trapframe *tp;
325
326 tp = td->td_frame;
327 PROC_LOCK(curthread->td_proc);
328 mcp->mc_onstack = sigonstack(tp->sp);
329 PROC_UNLOCK(curthread->td_proc);
330 bcopy((void *)&td->td_frame->zero, (void *)&mcp->mc_regs,
331 sizeof(mcp->mc_regs));
332
333 mcp->mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
334 if (mcp->mc_fpused) {
335 bcopy((void *)&td->td_frame->f0, (void *)&mcp->mc_fpregs,
336 sizeof(mcp->mc_fpregs));
337 }
338 if (flags & GET_MC_CLEAR_RET) {
339 mcp->mc_regs[V0] = 0;
340 mcp->mc_regs[V1] = 0;
341 mcp->mc_regs[A3] = 0;
342 }
343
344 mcp->mc_pc = td->td_frame->pc;
345 mcp->mullo = td->td_frame->mullo;
346 mcp->mulhi = td->td_frame->mulhi;
347 mcp->mc_tls = td->td_md.md_tls;
348 return (0);
349 }
350
351 int
352 set_mcontext(struct thread *td, mcontext_t *mcp)
353 {
354 struct trapframe *tp;
355
356 tp = td->td_frame;
357 bcopy((void *)&mcp->mc_regs, (void *)&td->td_frame->zero,
358 sizeof(mcp->mc_regs));
359
360 td->td_md.md_flags = mcp->mc_fpused & MDTD_FPUSED;
361 if (mcp->mc_fpused) {
362 bcopy((void *)&mcp->mc_fpregs, (void *)&td->td_frame->f0,
363 sizeof(mcp->mc_fpregs));
364 }
365 td->td_frame->pc = mcp->mc_pc;
366 td->td_frame->mullo = mcp->mullo;
367 td->td_frame->mulhi = mcp->mulhi;
368 td->td_md.md_tls = mcp->mc_tls;
369 /* Dont let user to set any bits in status and cause registers. */
370
371 return (0);
372 }
373
374 int
375 fill_fpregs(struct thread *td, struct fpreg *fpregs)
376 {
377 if (td == PCPU_GET(fpcurthread))
378 MipsSaveCurFPState(td);
379 memcpy(fpregs, &td->td_frame->f0, sizeof(struct fpreg));
380 return 0;
381 }
382
383 int
384 set_fpregs(struct thread *td, struct fpreg *fpregs)
385 {
386 if (PCPU_GET(fpcurthread) == td)
387 PCPU_SET(fpcurthread, (struct thread *)0);
388 memcpy(&td->td_frame->f0, fpregs, sizeof(struct fpreg));
389 return 0;
390 }
391
392
393 /*
394 * Clear registers on exec
395 * $sp is set to the stack pointer passed in. $pc is set to the entry
396 * point given by the exec_package passed in, as is $t9 (used for PIC
397 * code by the MIPS elf abi).
398 */
399 void
400 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
401 {
402
403 bzero((caddr_t)td->td_frame, sizeof(struct trapframe));
404
405 /*
406 * The stack pointer has to be aligned to accommodate the largest
407 * datatype at minimum. This probably means it should be 16-byte
408 * aligned, but for now we're 8-byte aligning it.
409 */
410 td->td_frame->sp = ((register_t) stack) & ~(sizeof(__int64_t) - 1);
411
412 /*
413 * If we're running o32 or n32 programs but have 64-bit registers,
414 * GCC may use stack-relative addressing near the top of user
415 * address space that, due to sign extension, will yield an
416 * invalid address. For instance, if sp is 0x7fffff00 then GCC
417 * might do something like this to load a word from 0x7ffffff0:
418 *
419 * addu sp, sp, 32768
420 * lw t0, -32528(sp)
421 *
422 * On systems with 64-bit registers, sp is sign-extended to
423 * 0xffffffff80007f00 and the load is instead done from
424 * 0xffffffff7ffffff0.
425 *
426 * To prevent this, we subtract 64K from the stack pointer here.
427 *
428 * For consistency, we should just always do this unless we're
429 * running n64 programs. For now, since we don't support
430 * COMPAT_FREEBSD32 on n64 kernels, we just do it unless we're
431 * running n64 kernels.
432 */
433 #if !defined(__mips_n64)
434 td->td_frame->sp -= 65536;
435 #endif
436
437 td->td_frame->pc = imgp->entry_addr & ~3;
438 td->td_frame->t9 = imgp->entry_addr & ~3; /* abicall req */
439 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
440 (mips_rd_status() & MIPS_SR_INT_MASK);
441 #if defined(__mips_n32)
442 td->td_frame->sr |= MIPS_SR_PX;
443 #elif defined(__mips_n64)
444 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
445 #endif
446 /*
447 * FREEBSD_DEVELOPERS_FIXME:
448 * Setup any other CPU-Specific registers (Not MIPS Standard)
449 * and/or bits in other standard MIPS registers (if CPU-Specific)
450 * that are needed.
451 */
452
453 /*
454 * Set up arguments for the rtld-capable crt0:
455 * a0 stack pointer
456 * a1 rtld cleanup (filled in by dynamic loader)
457 * a2 rtld object (filled in by dynamic loader)
458 * a3 ps_strings
459 */
460 td->td_frame->a0 = (register_t) stack;
461 td->td_frame->a1 = 0;
462 td->td_frame->a2 = 0;
463 td->td_frame->a3 = (register_t)imgp->ps_strings;
464
465 td->td_md.md_flags &= ~MDTD_FPUSED;
466 if (PCPU_GET(fpcurthread) == td)
467 PCPU_SET(fpcurthread, (struct thread *)0);
468 td->td_md.md_ss_addr = 0;
469 }
470
471 int
472 ptrace_clear_single_step(struct thread *td)
473 {
474 int i;
475 struct proc *p;
476
477 p = td->td_proc;
478 PROC_LOCK_ASSERT(p, MA_OWNED);
479 if (!td->td_md.md_ss_addr)
480 return EINVAL;
481
482 /*
483 * Restore original instruction and clear BP
484 */
485 i = ptrace_write_int (td, td->td_md.md_ss_addr, td->td_md.md_ss_instr);
486
487 /* The sync'ing of I & D caches is done by procfs_domem(). */
488
489 if (i < 0) {
490 log(LOG_ERR, "SS %s %d: can't restore instruction at %x: %x\n",
491 p->p_comm, p->p_pid, td->td_md.md_ss_addr,
492 td->td_md.md_ss_instr);
493 }
494 td->td_md.md_ss_addr = 0;
495 return 0;
496 }
Cache object: fa240d343cf55e32c99fd36f664180b4
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