FreeBSD/Linux Kernel Cross Reference
sys/mips/mips/swtch.S
1 /* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */
2 /*-
3 * Copyright (c) 1992, 1993
4 * The Regents of the University of California. All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * Digital Equipment Corporation and Ralph Campbell.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * Copyright (C) 1989 Digital Equipment Corporation.
34 * Permission to use, copy, modify, and distribute this software and
35 * its documentation for any purpose and without fee is hereby granted,
36 * provided that the above copyright notice appears in all copies.
37 * Digital Equipment Corporation makes no representations about the
38 * suitability of this software for any purpose. It is provided "as is"
39 * without express or implied warranty.
40 *
41 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
42 * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL)
43 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
44 * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL)
45 * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
46 * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL)
47 *
48 * from: @(#)locore.s 8.5 (Berkeley) 1/4/94
49 * JNPR: swtch.S,v 1.6.2.1 2007/09/10 10:36:50 girish
50 * $FreeBSD$
51 */
52
53 /*
54 * Contains code that is the first executed at boot time plus
55 * assembly language support routines.
56 */
57
58 #include "opt_compat.h"
59 #include <sys/syscall.h>
60 #include <machine/asm.h>
61 #include <machine/cpu.h>
62 #include <machine/cpuregs.h>
63 #include <machine/regnum.h>
64 #include <machine/pte.h>
65 #include <machine/pcb.h>
66
67 #include "assym.s"
68
69 .set noreorder # Noreorder is default style!
70
71 /*
72 * Setup for and return to user.
73 */
74 LEAF(fork_trampoline)
75 move a0,s0
76 move a1,s1
77 jal _C_LABEL(fork_exit)
78 move a2,s2 #BDSlot
79
80 DO_AST
81
82 mfc0 v0, MIPS_COP_0_STATUS
83 and v0, ~(MIPS_SR_INT_IE)
84 mtc0 v0, MIPS_COP_0_STATUS # disable interrupts
85 COP0_SYNC
86 /*
87 * The use of k1 for storing the PCB pointer must be done only
88 * after interrupts are disabled. Otherwise it will get overwritten
89 * by the interrupt code.
90 */
91 .set noat
92 GET_CPU_PCPU(k1)
93 PTR_L k1, PC_CURPCB(k1)
94
95 RESTORE_U_PCB_REG(t0, MULLO, k1)
96 RESTORE_U_PCB_REG(t1, MULHI, k1)
97 mtlo t0
98 mthi t1
99 RESTORE_U_PCB_REG(a0, PC, k1)
100 RESTORE_U_PCB_REG(AT, AST, k1)
101 RESTORE_U_PCB_REG(v0, V0, k1)
102 MTC0 a0, MIPS_COP_0_EXC_PC # set return address
103
104 RESTORE_U_PCB_REG(v1, V1, k1)
105 RESTORE_U_PCB_REG(a0, A0, k1)
106 RESTORE_U_PCB_REG(a1, A1, k1)
107 RESTORE_U_PCB_REG(a2, A2, k1)
108 RESTORE_U_PCB_REG(a3, A3, k1)
109 RESTORE_U_PCB_REG(t0, T0, k1)
110 RESTORE_U_PCB_REG(t1, T1, k1)
111 RESTORE_U_PCB_REG(t2, T2, k1)
112 RESTORE_U_PCB_REG(t3, T3, k1)
113 RESTORE_U_PCB_REG(ta0, TA0, k1)
114 RESTORE_U_PCB_REG(ta1, TA1, k1)
115 RESTORE_U_PCB_REG(ta2, TA2, k1)
116 RESTORE_U_PCB_REG(ta3, TA3, k1)
117 RESTORE_U_PCB_REG(s0, S0, k1)
118 RESTORE_U_PCB_REG(s1, S1, k1)
119 RESTORE_U_PCB_REG(s2, S2, k1)
120 RESTORE_U_PCB_REG(s3, S3, k1)
121 RESTORE_U_PCB_REG(s4, S4, k1)
122 RESTORE_U_PCB_REG(s5, S5, k1)
123 RESTORE_U_PCB_REG(s6, S6, k1)
124 RESTORE_U_PCB_REG(s7, S7, k1)
125 RESTORE_U_PCB_REG(t8, T8, k1)
126 RESTORE_U_PCB_REG(t9, T9, k1)
127 RESTORE_U_PCB_REG(k0, SR, k1)
128 RESTORE_U_PCB_REG(gp, GP, k1)
129 RESTORE_U_PCB_REG(s8, S8, k1)
130 RESTORE_U_PCB_REG(ra, RA, k1)
131 RESTORE_U_PCB_REG(sp, SP, k1)
132 li k1, ~MIPS_SR_INT_MASK
133 and k0, k0, k1
134 mfc0 k1, MIPS_COP_0_STATUS
135 and k1, k1, MIPS_SR_INT_MASK
136 or k0, k0, k1
137 mtc0 k0, MIPS_COP_0_STATUS # switch to user mode (when eret...)
138 HAZARD_DELAY
139 sync
140 eret
141 .set at
142 END(fork_trampoline)
143
144 /*
145 * Update pcb, saving current processor state.
146 * Note: this only works if pcbp != curproc's pcb since
147 * cpu_switch() will copy over pcb_context.
148 *
149 * savectx(struct pcb *pcbp);
150 */
151 LEAF(savectx)
152 SAVE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0)
153 SAVE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0)
154 SAVE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0)
155 SAVE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0)
156 mfc0 v0, MIPS_COP_0_STATUS
157 SAVE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0)
158 SAVE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0)
159 SAVE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0)
160 SAVE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0)
161 SAVE_U_PCB_CONTEXT(sp, PCB_REG_SP, a0)
162 SAVE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0)
163 SAVE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0)
164 SAVE_U_PCB_CONTEXT(v0, PCB_REG_SR, a0)
165 SAVE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0)
166
167 move v0, ra /* save 'ra' before we trash it */
168 jal 1f
169 nop
170 1:
171 SAVE_U_PCB_CONTEXT(ra, PCB_REG_PC, a0)
172 move ra, v0 /* restore 'ra' before returning */
173
174 j ra
175 move v0, zero
176 END(savectx)
177
178 NESTED(cpu_throw, CALLFRAME_SIZ, ra)
179 mfc0 t0, MIPS_COP_0_STATUS # t0 = saved status register
180 nop
181 nop
182 and a3, t0, ~(MIPS_SR_INT_IE)
183 mtc0 a3, MIPS_COP_0_STATUS # Disable all interrupts
184 ITLBNOPFIX
185 j mips_sw1 # We're not interested in old
186 # thread's context, so jump
187 # right to action
188 nop # BDSLOT
189 END(cpu_throw)
190
191 /*
192 * cpu_switch(struct thread *old, struct thread *new, struct mutex *mtx);
193 * a0 - old
194 * a1 - new
195 * a2 - mtx
196 * Find the highest priority process and resume it.
197 */
198 NESTED(cpu_switch, CALLFRAME_SIZ, ra)
199 mfc0 t0, MIPS_COP_0_STATUS # t0 = saved status register
200 nop
201 nop
202 and a3, t0, ~(MIPS_SR_INT_IE)
203 mtc0 a3, MIPS_COP_0_STATUS # Disable all interrupts
204 ITLBNOPFIX
205 beqz a0, mips_sw1
206 move a3, a0
207 PTR_L a0, TD_PCB(a0) # load PCB addr of curproc
208 SAVE_U_PCB_CONTEXT(sp, PCB_REG_SP, a0) # save old sp
209 PTR_SUBU sp, sp, CALLFRAME_SIZ
210 REG_S ra, CALLFRAME_RA(sp)
211 .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ)
212 SAVE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0) # do a 'savectx()'
213 SAVE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0)
214 SAVE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0)
215 SAVE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0)
216 SAVE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0)
217 SAVE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0)
218 SAVE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0)
219 SAVE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0)
220 SAVE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0)
221 SAVE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0) # save return address
222 SAVE_U_PCB_CONTEXT(t0, PCB_REG_SR, a0) # save status register
223 SAVE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0)
224 jal getpc
225 nop
226 getpc:
227 SAVE_U_PCB_CONTEXT(ra, PCB_REG_PC, a0) # save return address
228
229 #ifdef CPU_CNMIPS
230
231 lw t2, TD_MDFLAGS(a3) # get md_flags
232 and t1, t2, MDTD_COP2USED
233 beqz t1, cop2_untouched
234 nop
235
236 /* Clear cop2used flag */
237 and t2, t2, ~MDTD_COP2USED
238 sw t2, TD_MDFLAGS(a3)
239
240 and t2, t0, ~MIPS_SR_COP_2_BIT # clear COP_2 enable bit
241 SAVE_U_PCB_CONTEXT(t2, PCB_REG_SR, a0) # save status register
242
243 RESTORE_U_PCB_REG(t0, PS, a0) # get CPU status register
244 and t2, t0, ~MIPS_SR_COP_2_BIT # clear COP_2 enable bit
245 SAVE_U_PCB_REG(t2, PS, a0) # save stratus register
246
247 /* preserve a0..a3 */
248 move s0, a0
249 move s1, a1
250 move s2, a2
251 move s3, a3
252
253 /* does kernel own COP2 context? */
254 lw t1, TD_COP2OWNER(a3) # get md_cop2owner
255 beqz t1, userland_cop2 # 0 - it's userland context
256 nop
257
258 PTR_L a0, TD_COP2(a3)
259 beqz a0, no_cop2_context
260 nop
261
262 j do_cop2_save
263 nop
264
265 userland_cop2:
266
267 PTR_L a0, TD_UCOP2(a3)
268 beqz a0, no_cop2_context
269 nop
270
271 do_cop2_save:
272 jal octeon_cop2_save
273 nop
274
275 no_cop2_context:
276 move a3, s3
277 move a2, s2
278 move a1, s1
279 move a0, s0
280
281 cop2_untouched:
282 #endif
283
284 PTR_S a2, TD_LOCK(a3) # Switchout td_lock
285
286 mips_sw1:
287 #if defined(SMP) && defined(SCHED_ULE)
288 PTR_LA t0, _C_LABEL(blocked_lock)
289 blocked_loop:
290 PTR_L t1, TD_LOCK(a1)
291 beq t0, t1, blocked_loop
292 nop
293 #endif
294 move s7, a1 # Store newthread
295 /*
296 * Switch to new context.
297 */
298 GET_CPU_PCPU(a3)
299 PTR_S a1, PC_CURTHREAD(a3)
300 PTR_L a2, TD_PCB(a1)
301 PTR_S a2, PC_CURPCB(a3)
302 PTR_L v0, TD_KSTACK(a1)
303 #if defined(__mips_n64)
304 PTR_LI s0, MIPS_XKSEG_START
305 #else
306 PTR_LI s0, MIPS_KSEG2_START # If Uarea addr is below kseg2,
307 #endif
308 bltu v0, s0, sw2 # no need to insert in TLB.
309 PTE_L a1, TD_UPTE + 0(s7) # a1 = u. pte #0
310 PTE_L a2, TD_UPTE + PTESIZE(s7) # a2 = u. pte #1
311 /*
312 * Wiredown the USPACE of newproc in TLB entry#0. Check whether target
313 * USPACE is already in another place of TLB before that, and if so
314 * invalidate that TLB entry.
315 * NOTE: This is hard coded to UPAGES == 2.
316 * Also, there should be no TLB faults at this point.
317 */
318 MTC0 v0, MIPS_COP_0_TLB_HI # VPN = va
319 HAZARD_DELAY
320 tlbp # probe VPN
321 HAZARD_DELAY
322 mfc0 s0, MIPS_COP_0_TLB_INDEX
323 HAZARD_DELAY
324
325 PTR_LI t1, MIPS_KSEG0_START # invalidate tlb entry
326 bltz s0, entry0set
327 nop
328 sll s0, PAGE_SHIFT + 1
329 addu t1, s0
330 MTC0 t1, MIPS_COP_0_TLB_HI
331 PTE_MTC0 zero, MIPS_COP_0_TLB_LO0
332 PTE_MTC0 zero, MIPS_COP_0_TLB_LO1
333 HAZARD_DELAY
334 tlbwi
335 HAZARD_DELAY
336 MTC0 v0, MIPS_COP_0_TLB_HI # set VPN again
337
338 entry0set:
339 /* SMP!! - Works only for unshared TLB case - i.e. no v-cpus */
340 mtc0 zero, MIPS_COP_0_TLB_INDEX # TLB entry #0
341 HAZARD_DELAY
342 PTE_MTC0 a1, MIPS_COP_0_TLB_LO0 # upte[0]
343 HAZARD_DELAY
344 PTE_MTC0 a2, MIPS_COP_0_TLB_LO1 # upte[1]
345 HAZARD_DELAY
346 tlbwi # set TLB entry #0
347 HAZARD_DELAY
348 /*
349 * Now running on new u struct.
350 */
351 sw2:
352 PTR_L s0, TD_PCB(s7)
353 RESTORE_U_PCB_CONTEXT(sp, PCB_REG_SP, s0)
354 PTR_LA t1, _C_LABEL(pmap_activate) # s7 = new proc pointer
355 jalr t1 # s7 = new proc pointer
356 move a0, s7 # BDSLOT
357 /*
358 * Restore registers and return.
359 */
360 move a0, s0
361 RESTORE_U_PCB_CONTEXT(gp, PCB_REG_GP, a0)
362 RESTORE_U_PCB_CONTEXT(v0, PCB_REG_SR, a0) # restore kernel context
363 RESTORE_U_PCB_CONTEXT(ra, PCB_REG_RA, a0)
364 RESTORE_U_PCB_CONTEXT(s0, PCB_REG_S0, a0)
365 RESTORE_U_PCB_CONTEXT(s1, PCB_REG_S1, a0)
366 RESTORE_U_PCB_CONTEXT(s2, PCB_REG_S2, a0)
367 RESTORE_U_PCB_CONTEXT(s3, PCB_REG_S3, a0)
368 RESTORE_U_PCB_CONTEXT(s4, PCB_REG_S4, a0)
369 RESTORE_U_PCB_CONTEXT(s5, PCB_REG_S5, a0)
370 RESTORE_U_PCB_CONTEXT(s6, PCB_REG_S6, a0)
371 RESTORE_U_PCB_CONTEXT(s7, PCB_REG_S7, a0)
372 RESTORE_U_PCB_CONTEXT(s8, PCB_REG_S8, a0)
373
374 mfc0 t0, MIPS_COP_0_STATUS
375 and t0, t0, MIPS_SR_INT_MASK
376 and v0, v0, ~MIPS_SR_INT_MASK
377 or v0, v0, t0
378 mtc0 v0, MIPS_COP_0_STATUS
379 ITLBNOPFIX
380
381 j ra
382 nop
383 END(cpu_switch)
384
385 /*----------------------------------------------------------------------------
386 *
387 * MipsSwitchFPState --
388 *
389 * Save the current state into 'from' and restore it from 'to'.
390 *
391 * MipsSwitchFPState(from, to)
392 * struct thread *from;
393 * struct trapframe *to;
394 *
395 * Results:
396 * None.
397 *
398 * Side effects:
399 * None.
400 *
401 *----------------------------------------------------------------------------
402 */
403 LEAF(MipsSwitchFPState)
404 .set push
405 .set hardfloat
406 mfc0 t1, MIPS_COP_0_STATUS # Save old SR
407 li t0, MIPS_SR_COP_1_BIT # enable the coprocessor
408 mtc0 t0, MIPS_COP_0_STATUS
409 ITLBNOPFIX
410
411 beq a0, zero, 1f # skip save if NULL pointer
412 nop
413 /*
414 * First read out the status register to make sure that all FP operations
415 * have completed.
416 */
417 PTR_L a0, TD_PCB(a0) # get pointer to pcb for proc
418 cfc1 t0, MIPS_FPU_CSR # stall til FP done
419 cfc1 t0, MIPS_FPU_CSR # now get status
420 li t3, ~MIPS_SR_COP_1_BIT
421 RESTORE_U_PCB_REG(t2, PS, a0) # get CPU status register
422 SAVE_U_PCB_FPSR(t0, FSR_NUM, a0) # save FP status
423 and t2, t2, t3 # clear COP_1 enable bit
424 SAVE_U_PCB_REG(t2, PS, a0) # save new status register
425 /*
426 * Save the floating point registers.
427 */
428 SAVE_U_PCB_FPREG($f0, F0_NUM, a0)
429 SAVE_U_PCB_FPREG($f1, F1_NUM, a0)
430 SAVE_U_PCB_FPREG($f2, F2_NUM, a0)
431 SAVE_U_PCB_FPREG($f3, F3_NUM, a0)
432 SAVE_U_PCB_FPREG($f4, F4_NUM, a0)
433 SAVE_U_PCB_FPREG($f5, F5_NUM, a0)
434 SAVE_U_PCB_FPREG($f6, F6_NUM, a0)
435 SAVE_U_PCB_FPREG($f7, F7_NUM, a0)
436 SAVE_U_PCB_FPREG($f8, F8_NUM, a0)
437 SAVE_U_PCB_FPREG($f9, F9_NUM, a0)
438 SAVE_U_PCB_FPREG($f10, F10_NUM, a0)
439 SAVE_U_PCB_FPREG($f11, F11_NUM, a0)
440 SAVE_U_PCB_FPREG($f12, F12_NUM, a0)
441 SAVE_U_PCB_FPREG($f13, F13_NUM, a0)
442 SAVE_U_PCB_FPREG($f14, F14_NUM, a0)
443 SAVE_U_PCB_FPREG($f15, F15_NUM, a0)
444 SAVE_U_PCB_FPREG($f16, F16_NUM, a0)
445 SAVE_U_PCB_FPREG($f17, F17_NUM, a0)
446 SAVE_U_PCB_FPREG($f18, F18_NUM, a0)
447 SAVE_U_PCB_FPREG($f19, F19_NUM, a0)
448 SAVE_U_PCB_FPREG($f20, F20_NUM, a0)
449 SAVE_U_PCB_FPREG($f21, F21_NUM, a0)
450 SAVE_U_PCB_FPREG($f22, F22_NUM, a0)
451 SAVE_U_PCB_FPREG($f23, F23_NUM, a0)
452 SAVE_U_PCB_FPREG($f24, F24_NUM, a0)
453 SAVE_U_PCB_FPREG($f25, F25_NUM, a0)
454 SAVE_U_PCB_FPREG($f26, F26_NUM, a0)
455 SAVE_U_PCB_FPREG($f27, F27_NUM, a0)
456 SAVE_U_PCB_FPREG($f28, F28_NUM, a0)
457 SAVE_U_PCB_FPREG($f29, F29_NUM, a0)
458 SAVE_U_PCB_FPREG($f30, F30_NUM, a0)
459 SAVE_U_PCB_FPREG($f31, F31_NUM, a0)
460
461 1:
462 /*
463 * Restore the floating point registers.
464 */
465 RESTORE_U_PCB_FPSR(t0, FSR_NUM, a1) # get status register
466 RESTORE_U_PCB_FPREG($f0, F0_NUM, a1)
467 RESTORE_U_PCB_FPREG($f1, F1_NUM, a1)
468 RESTORE_U_PCB_FPREG($f2, F2_NUM, a1)
469 RESTORE_U_PCB_FPREG($f3, F3_NUM, a1)
470 RESTORE_U_PCB_FPREG($f4, F4_NUM, a1)
471 RESTORE_U_PCB_FPREG($f5, F5_NUM, a1)
472 RESTORE_U_PCB_FPREG($f6, F6_NUM, a1)
473 RESTORE_U_PCB_FPREG($f7, F7_NUM, a1)
474 RESTORE_U_PCB_FPREG($f8, F8_NUM, a1)
475 RESTORE_U_PCB_FPREG($f9, F9_NUM, a1)
476 RESTORE_U_PCB_FPREG($f10, F10_NUM, a1)
477 RESTORE_U_PCB_FPREG($f11, F11_NUM, a1)
478 RESTORE_U_PCB_FPREG($f12, F12_NUM, a1)
479 RESTORE_U_PCB_FPREG($f13, F13_NUM, a1)
480 RESTORE_U_PCB_FPREG($f14, F14_NUM, a1)
481 RESTORE_U_PCB_FPREG($f15, F15_NUM, a1)
482 RESTORE_U_PCB_FPREG($f16, F16_NUM, a1)
483 RESTORE_U_PCB_FPREG($f17, F17_NUM, a1)
484 RESTORE_U_PCB_FPREG($f18, F18_NUM, a1)
485 RESTORE_U_PCB_FPREG($f19, F19_NUM, a1)
486 RESTORE_U_PCB_FPREG($f20, F20_NUM, a1)
487 RESTORE_U_PCB_FPREG($f21, F21_NUM, a1)
488 RESTORE_U_PCB_FPREG($f22, F22_NUM, a1)
489 RESTORE_U_PCB_FPREG($f23, F23_NUM, a1)
490 RESTORE_U_PCB_FPREG($f24, F24_NUM, a1)
491 RESTORE_U_PCB_FPREG($f25, F25_NUM, a1)
492 RESTORE_U_PCB_FPREG($f26, F26_NUM, a1)
493 RESTORE_U_PCB_FPREG($f27, F27_NUM, a1)
494 RESTORE_U_PCB_FPREG($f28, F28_NUM, a1)
495 RESTORE_U_PCB_FPREG($f29, F29_NUM, a1)
496 RESTORE_U_PCB_FPREG($f30, F30_NUM, a1)
497 RESTORE_U_PCB_FPREG($f31, F31_NUM, a1)
498
499 and t0, t0, ~MIPS_FPU_EXCEPTION_BITS
500 ctc1 t0, MIPS_FPU_CSR
501 nop
502
503 mtc0 t1, MIPS_COP_0_STATUS # Restore the status register.
504 ITLBNOPFIX
505 j ra
506 nop
507 .set pop
508 END(MipsSwitchFPState)
509
510 /*----------------------------------------------------------------------------
511 *
512 * MipsSaveCurFPState --
513 *
514 * Save the current floating point coprocessor state.
515 *
516 * MipsSaveCurFPState(td)
517 * struct thread *td;
518 *
519 * Results:
520 * None.
521 *
522 * Side effects:
523 * machFPCurProcPtr is cleared.
524 *
525 *----------------------------------------------------------------------------
526 */
527 LEAF(MipsSaveCurFPState)
528 .set push
529 .set hardfloat
530 PTR_L a0, TD_PCB(a0) # get pointer to pcb for thread
531 mfc0 t1, MIPS_COP_0_STATUS # Disable interrupts and
532 li t0, MIPS_SR_COP_1_BIT # enable the coprocessor
533 mtc0 t0, MIPS_COP_0_STATUS
534 ITLBNOPFIX
535 GET_CPU_PCPU(a1)
536 PTR_S zero, PC_FPCURTHREAD(a1) # indicate state has been saved
537 /*
538 * First read out the status register to make sure that all FP operations
539 * have completed.
540 */
541 RESTORE_U_PCB_REG(t2, PS, a0) # get CPU status register
542 li t3, ~MIPS_SR_COP_1_BIT
543 and t2, t2, t3 # clear COP_1 enable bit
544 cfc1 t0, MIPS_FPU_CSR # stall til FP done
545 cfc1 t0, MIPS_FPU_CSR # now get status
546 SAVE_U_PCB_REG(t2, PS, a0) # save new status register
547 SAVE_U_PCB_FPSR(t0, FSR_NUM, a0) # save FP status
548 /*
549 * Save the floating point registers.
550 */
551 SAVE_U_PCB_FPREG($f0, F0_NUM, a0)
552 SAVE_U_PCB_FPREG($f1, F1_NUM, a0)
553 SAVE_U_PCB_FPREG($f2, F2_NUM, a0)
554 SAVE_U_PCB_FPREG($f3, F3_NUM, a0)
555 SAVE_U_PCB_FPREG($f4, F4_NUM, a0)
556 SAVE_U_PCB_FPREG($f5, F5_NUM, a0)
557 SAVE_U_PCB_FPREG($f6, F6_NUM, a0)
558 SAVE_U_PCB_FPREG($f7, F7_NUM, a0)
559 SAVE_U_PCB_FPREG($f8, F8_NUM, a0)
560 SAVE_U_PCB_FPREG($f9, F9_NUM, a0)
561 SAVE_U_PCB_FPREG($f10, F10_NUM, a0)
562 SAVE_U_PCB_FPREG($f11, F11_NUM, a0)
563 SAVE_U_PCB_FPREG($f12, F12_NUM, a0)
564 SAVE_U_PCB_FPREG($f13, F13_NUM, a0)
565 SAVE_U_PCB_FPREG($f14, F14_NUM, a0)
566 SAVE_U_PCB_FPREG($f15, F15_NUM, a0)
567 SAVE_U_PCB_FPREG($f16, F16_NUM, a0)
568 SAVE_U_PCB_FPREG($f17, F17_NUM, a0)
569 SAVE_U_PCB_FPREG($f18, F18_NUM, a0)
570 SAVE_U_PCB_FPREG($f19, F19_NUM, a0)
571 SAVE_U_PCB_FPREG($f20, F20_NUM, a0)
572 SAVE_U_PCB_FPREG($f21, F21_NUM, a0)
573 SAVE_U_PCB_FPREG($f22, F22_NUM, a0)
574 SAVE_U_PCB_FPREG($f23, F23_NUM, a0)
575 SAVE_U_PCB_FPREG($f24, F24_NUM, a0)
576 SAVE_U_PCB_FPREG($f25, F25_NUM, a0)
577 SAVE_U_PCB_FPREG($f26, F26_NUM, a0)
578 SAVE_U_PCB_FPREG($f27, F27_NUM, a0)
579 SAVE_U_PCB_FPREG($f28, F28_NUM, a0)
580 SAVE_U_PCB_FPREG($f29, F29_NUM, a0)
581 SAVE_U_PCB_FPREG($f30, F30_NUM, a0)
582 SAVE_U_PCB_FPREG($f31, F31_NUM, a0)
583
584 mtc0 t1, MIPS_COP_0_STATUS # Restore the status register.
585 ITLBNOPFIX
586 j ra
587 nop
588 .set pop
589 END(MipsSaveCurFPState)
590
591 /*
592 * This code is copied the user's stack for returning from signal handlers
593 * (see sendsig() and sigreturn()). We have to compute the address
594 * of the sigcontext struct for the sigreturn call.
595 */
596 .globl _C_LABEL(sigcode)
597 _C_LABEL(sigcode):
598 PTR_ADDU a0, sp, SIGF_UC # address of ucontext
599 li v0, SYS_sigreturn
600 # sigreturn (ucp)
601 syscall
602 break 0 # just in case sigreturn fails
603 .globl _C_LABEL(esigcode)
604 _C_LABEL(esigcode):
605
606 .data
607 .globl szsigcode
608 szsigcode:
609 .long esigcode-sigcode
610 .text
611
612 #if (defined(__mips_n32) || defined(__mips_n64)) && defined(COMPAT_FREEBSD32)
613 .globl _C_LABEL(sigcode32)
614 _C_LABEL(sigcode32):
615 addu a0, sp, SIGF32_UC # address of ucontext
616 li v0, SYS_sigreturn
617 # sigreturn (ucp)
618 syscall
619 break 0 # just in case sigreturn fails
620 .globl _C_LABEL(esigcode32)
621 _C_LABEL(esigcode32):
622
623 .data
624 .globl szsigcode32
625 szsigcode32:
626 .long esigcode32-sigcode32
627 .text
628 #endif
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