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1 /* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */ 2 /*- 3 * Copyright (c) 1992, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * Digital Equipment Corporation and Ralph Campbell. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * Copyright (C) 1989 Digital Equipment Corporation. 34 * Permission to use, copy, modify, and distribute this software and 35 * its documentation for any purpose and without fee is hereby granted, 36 * provided that the above copyright notice appears in all copies. 37 * Digital Equipment Corporation makes no representations about the 38 * suitability of this software for any purpose. It is provided "as is" 39 * without express or implied warranty. 40 * 41 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s, 42 * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL) 43 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s, 44 * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL) 45 * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s, 46 * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL) 47 * 48 * from: @(#)locore.s 8.5 (Berkeley) 1/4/94 49 * JNPR: swtch.S,v 1.6.2.1 2007/09/10 10:36:50 girish 50 * $FreeBSD: releng/9.1/sys/mips/mips/swtch.S 219121 2011-03-01 03:25:18Z jchandra $ 51 */ 52 53 /* 54 * Contains code that is the first executed at boot time plus 55 * assembly language support routines. 56 */ 57 58 #include "opt_cputype.h" 59 #include <sys/syscall.h> 60 #include <machine/asm.h> 61 #include <machine/cpu.h> 62 #include <machine/cpuregs.h> 63 #include <machine/regnum.h> 64 #include <machine/pte.h> 65 66 #include "assym.s" 67 68 .set noreorder # Noreorder is default style! 69 70 #define SAVE_U_PCB_REG(reg, offs, base) \ 71 REG_S reg, U_PCB_REGS + (SZREG * offs) (base) 72 73 #define RESTORE_U_PCB_REG(reg, offs, base) \ 74 REG_L reg, U_PCB_REGS + (SZREG * offs) (base) 75 76 #define SAVE_U_PCB_FPREG(reg, offs, base) \ 77 FP_S reg, U_PCB_FPREGS + (SZFPREG * offs) (base) 78 79 #define RESTORE_U_PCB_FPREG(reg, offs, base) \ 80 FP_L reg, U_PCB_FPREGS + (SZFPREG * offs) (base) 81 82 #define SAVE_U_PCB_FPSR(reg, offs, base) \ 83 REG_S reg, U_PCB_FPREGS + (SZFPREG * offs) (base) 84 85 #define RESTORE_U_PCB_FPSR(reg, offs, base) \ 86 REG_L reg, U_PCB_FPREGS + (SZFPREG * offs) (base) 87 88 #define SAVE_U_PCB_CONTEXT(reg, offs, base) \ 89 REG_S reg, U_PCB_CONTEXT + (SZREG * offs) (base) 90 91 #define RESTORE_U_PCB_CONTEXT(reg, offs, base) \ 92 REG_L reg, U_PCB_CONTEXT + (SZREG * offs) (base) 93 94 95 /* 96 * Setup for and return to user. 97 */ 98 LEAF(fork_trampoline) 99 move a0,s0 100 move a1,s1 101 jal _C_LABEL(fork_exit) 102 move a2,s2 #BDSlot 103 104 DO_AST 105 106 mfc0 v0, MIPS_COP_0_STATUS 107 and v0, ~(MIPS_SR_INT_IE) 108 mtc0 v0, MIPS_COP_0_STATUS # disable interrupts 109 COP0_SYNC 110 /* 111 * The use of k1 for storing the PCB pointer must be done only 112 * after interrupts are disabled. Otherwise it will get overwritten 113 * by the interrupt code. 114 */ 115 .set noat 116 GET_CPU_PCPU(k1) 117 PTR_L k1, PC_CURPCB(k1) 118 119 RESTORE_U_PCB_REG(t0, MULLO, k1) 120 RESTORE_U_PCB_REG(t1, MULHI, k1) 121 mtlo t0 122 mthi t1 123 RESTORE_U_PCB_REG(a0, PC, k1) 124 RESTORE_U_PCB_REG(AT, AST, k1) 125 RESTORE_U_PCB_REG(v0, V0, k1) 126 MTC0 a0, MIPS_COP_0_EXC_PC # set return address 127 128 RESTORE_U_PCB_REG(v1, V1, k1) 129 RESTORE_U_PCB_REG(a0, A0, k1) 130 RESTORE_U_PCB_REG(a1, A1, k1) 131 RESTORE_U_PCB_REG(a2, A2, k1) 132 RESTORE_U_PCB_REG(a3, A3, k1) 133 RESTORE_U_PCB_REG(t0, T0, k1) 134 RESTORE_U_PCB_REG(t1, T1, k1) 135 RESTORE_U_PCB_REG(t2, T2, k1) 136 RESTORE_U_PCB_REG(t3, T3, k1) 137 RESTORE_U_PCB_REG(ta0, TA0, k1) 138 RESTORE_U_PCB_REG(ta1, TA1, k1) 139 RESTORE_U_PCB_REG(ta2, TA2, k1) 140 RESTORE_U_PCB_REG(ta3, TA3, k1) 141 RESTORE_U_PCB_REG(s0, S0, k1) 142 RESTORE_U_PCB_REG(s1, S1, k1) 143 RESTORE_U_PCB_REG(s2, S2, k1) 144 RESTORE_U_PCB_REG(s3, S3, k1) 145 RESTORE_U_PCB_REG(s4, S4, k1) 146 RESTORE_U_PCB_REG(s5, S5, k1) 147 RESTORE_U_PCB_REG(s6, S6, k1) 148 RESTORE_U_PCB_REG(s7, S7, k1) 149 RESTORE_U_PCB_REG(t8, T8, k1) 150 RESTORE_U_PCB_REG(t9, T9, k1) 151 RESTORE_U_PCB_REG(k0, SR, k1) 152 RESTORE_U_PCB_REG(gp, GP, k1) 153 RESTORE_U_PCB_REG(s8, S8, k1) 154 RESTORE_U_PCB_REG(ra, RA, k1) 155 RESTORE_U_PCB_REG(sp, SP, k1) 156 li k1, ~MIPS_SR_INT_MASK 157 and k0, k0, k1 158 mfc0 k1, MIPS_COP_0_STATUS 159 and k1, k1, MIPS_SR_INT_MASK 160 or k0, k0, k1 161 mtc0 k0, MIPS_COP_0_STATUS # switch to user mode (when eret...) 162 HAZARD_DELAY 163 sync 164 eret 165 .set at 166 END(fork_trampoline) 167 168 /* 169 * Update pcb, saving current processor state. 170 * Note: this only works if pcbp != curproc's pcb since 171 * cpu_switch() will copy over pcb_context. 172 * 173 * savectx(struct pcb *pcbp); 174 */ 175 LEAF(savectx) 176 SAVE_U_PCB_CONTEXT(s0, PREG_S0, a0) 177 SAVE_U_PCB_CONTEXT(s1, PREG_S1, a0) 178 SAVE_U_PCB_CONTEXT(s2, PREG_S2, a0) 179 SAVE_U_PCB_CONTEXT(s3, PREG_S3, a0) 180 mfc0 v0, MIPS_COP_0_STATUS 181 SAVE_U_PCB_CONTEXT(s4, PREG_S4, a0) 182 SAVE_U_PCB_CONTEXT(s5, PREG_S5, a0) 183 SAVE_U_PCB_CONTEXT(s6, PREG_S6, a0) 184 SAVE_U_PCB_CONTEXT(s7, PREG_S7, a0) 185 SAVE_U_PCB_CONTEXT(sp, PREG_SP, a0) 186 SAVE_U_PCB_CONTEXT(s8, PREG_S8, a0) 187 SAVE_U_PCB_CONTEXT(ra, PREG_RA, a0) 188 SAVE_U_PCB_CONTEXT(v0, PREG_SR, a0) 189 SAVE_U_PCB_CONTEXT(gp, PREG_GP, a0) 190 191 move v0, ra /* save 'ra' before we trash it */ 192 jal 1f 193 nop 194 1: 195 SAVE_U_PCB_CONTEXT(ra, PREG_PC, a0) 196 move ra, v0 /* restore 'ra' before returning */ 197 198 j ra 199 move v0, zero 200 END(savectx) 201 202 NON_LEAF(cpu_throw, CALLFRAME_SIZ, ra) 203 mfc0 t0, MIPS_COP_0_STATUS # t0 = saved status register 204 nop 205 nop 206 and a3, t0, ~(MIPS_SR_INT_IE) 207 mtc0 a3, MIPS_COP_0_STATUS # Disable all interrupts 208 ITLBNOPFIX 209 j mips_sw1 # We're not interested in old 210 # thread's context, so jump 211 # right to action 212 nop # BDSLOT 213 END(cpu_throw) 214 215 /* 216 * cpu_switch(struct thread *old, struct thread *new, struct mutex *mtx); 217 * a0 - old 218 * a1 - new 219 * a2 - mtx 220 * Find the highest priority process and resume it. 221 */ 222 NON_LEAF(cpu_switch, CALLFRAME_SIZ, ra) 223 mfc0 t0, MIPS_COP_0_STATUS # t0 = saved status register 224 nop 225 nop 226 and a3, t0, ~(MIPS_SR_INT_IE) 227 mtc0 a3, MIPS_COP_0_STATUS # Disable all interrupts 228 ITLBNOPFIX 229 beqz a0, mips_sw1 230 move a3, a0 231 PTR_L a0, TD_PCB(a0) # load PCB addr of curproc 232 SAVE_U_PCB_CONTEXT(sp, PREG_SP, a0) # save old sp 233 PTR_SUBU sp, sp, CALLFRAME_SIZ 234 REG_S ra, CALLFRAME_RA(sp) 235 .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) 236 SAVE_U_PCB_CONTEXT(s0, PREG_S0, a0) # do a 'savectx()' 237 SAVE_U_PCB_CONTEXT(s1, PREG_S1, a0) 238 SAVE_U_PCB_CONTEXT(s2, PREG_S2, a0) 239 SAVE_U_PCB_CONTEXT(s3, PREG_S3, a0) 240 SAVE_U_PCB_CONTEXT(s4, PREG_S4, a0) 241 SAVE_U_PCB_CONTEXT(s5, PREG_S5, a0) 242 SAVE_U_PCB_CONTEXT(s6, PREG_S6, a0) 243 SAVE_U_PCB_CONTEXT(s7, PREG_S7, a0) 244 SAVE_U_PCB_CONTEXT(s8, PREG_S8, a0) 245 SAVE_U_PCB_CONTEXT(ra, PREG_RA, a0) # save return address 246 SAVE_U_PCB_CONTEXT(t0, PREG_SR, a0) # save status register 247 SAVE_U_PCB_CONTEXT(gp, PREG_GP, a0) 248 jal getpc 249 nop 250 getpc: 251 SAVE_U_PCB_CONTEXT(ra, PREG_PC, a0) # save return address 252 253 PTR_S a2, TD_LOCK(a3) # Switchout td_lock 254 255 mips_sw1: 256 #if defined(SMP) && defined(SCHED_ULE) 257 PTR_LA t0, _C_LABEL(blocked_lock) 258 blocked_loop: 259 PTR_L t1, TD_LOCK(a1) 260 beq t0, t1, blocked_loop 261 nop 262 #endif 263 move s7, a1 # Store newthread 264 /* 265 * Switch to new context. 266 */ 267 GET_CPU_PCPU(a3) 268 PTR_S a1, PC_CURTHREAD(a3) 269 PTR_L a2, TD_PCB(a1) 270 PTR_S a2, PC_CURPCB(a3) 271 PTR_L v0, TD_KSTACK(a1) 272 #if defined(__mips_n64) 273 PTR_LI s0, MIPS_XKSEG_START 274 #else 275 PTR_LI s0, MIPS_KSEG2_START # If Uarea addr is below kseg2, 276 #endif 277 bltu v0, s0, sw2 # no need to insert in TLB. 278 PTE_L a1, TD_UPTE + 0(s7) # a1 = u. pte #0 279 PTE_L a2, TD_UPTE + PTESIZE(s7) # a2 = u. pte #1 280 /* 281 * Wiredown the USPACE of newproc in TLB entry#0. Check whether target 282 * USPACE is already in another place of TLB before that, and if so 283 * invalidate that TLB entry. 284 * NOTE: This is hard coded to UPAGES == 2. 285 * Also, there should be no TLB faults at this point. 286 */ 287 MTC0 v0, MIPS_COP_0_TLB_HI # VPN = va 288 HAZARD_DELAY 289 tlbp # probe VPN 290 HAZARD_DELAY 291 mfc0 s0, MIPS_COP_0_TLB_INDEX 292 HAZARD_DELAY 293 294 PTR_LI t1, MIPS_KSEG0_START # invalidate tlb entry 295 bltz s0, entry0set 296 nop 297 sll s0, PAGE_SHIFT + 1 298 addu t1, s0 299 MTC0 t1, MIPS_COP_0_TLB_HI 300 PTE_MTC0 zero, MIPS_COP_0_TLB_LO0 301 PTE_MTC0 zero, MIPS_COP_0_TLB_LO1 302 HAZARD_DELAY 303 tlbwi 304 HAZARD_DELAY 305 MTC0 v0, MIPS_COP_0_TLB_HI # set VPN again 306 307 entry0set: 308 /* SMP!! - Works only for unshared TLB case - i.e. no v-cpus */ 309 mtc0 zero, MIPS_COP_0_TLB_INDEX # TLB entry #0 310 HAZARD_DELAY 311 PTE_MTC0 a1, MIPS_COP_0_TLB_LO0 # upte[0] 312 HAZARD_DELAY 313 PTE_MTC0 a2, MIPS_COP_0_TLB_LO1 # upte[1] 314 HAZARD_DELAY 315 tlbwi # set TLB entry #0 316 HAZARD_DELAY 317 /* 318 * Now running on new u struct. 319 */ 320 sw2: 321 PTR_L s0, TD_PCB(s7) 322 RESTORE_U_PCB_CONTEXT(sp, PREG_SP, s0) 323 PTR_LA t1, _C_LABEL(pmap_activate) # s7 = new proc pointer 324 jalr t1 # s7 = new proc pointer 325 move a0, s7 # BDSLOT 326 /* 327 * Restore registers and return. 328 */ 329 move a0, s0 330 RESTORE_U_PCB_CONTEXT(gp, PREG_GP, a0) 331 RESTORE_U_PCB_CONTEXT(v0, PREG_SR, a0) # restore kernel context 332 RESTORE_U_PCB_CONTEXT(ra, PREG_RA, a0) 333 RESTORE_U_PCB_CONTEXT(s0, PREG_S0, a0) 334 RESTORE_U_PCB_CONTEXT(s1, PREG_S1, a0) 335 RESTORE_U_PCB_CONTEXT(s2, PREG_S2, a0) 336 RESTORE_U_PCB_CONTEXT(s3, PREG_S3, a0) 337 RESTORE_U_PCB_CONTEXT(s4, PREG_S4, a0) 338 RESTORE_U_PCB_CONTEXT(s5, PREG_S5, a0) 339 RESTORE_U_PCB_CONTEXT(s6, PREG_S6, a0) 340 RESTORE_U_PCB_CONTEXT(s7, PREG_S7, a0) 341 RESTORE_U_PCB_CONTEXT(s8, PREG_S8, a0) 342 343 mfc0 t0, MIPS_COP_0_STATUS 344 and t0, t0, MIPS_SR_INT_MASK 345 and v0, v0, ~MIPS_SR_INT_MASK 346 or v0, v0, t0 347 mtc0 v0, MIPS_COP_0_STATUS 348 ITLBNOPFIX 349 350 j ra 351 nop 352 END(cpu_switch) 353 354 /*---------------------------------------------------------------------------- 355 * 356 * MipsSwitchFPState -- 357 * 358 * Save the current state into 'from' and restore it from 'to'. 359 * 360 * MipsSwitchFPState(from, to) 361 * struct thread *from; 362 * struct trapframe *to; 363 * 364 * Results: 365 * None. 366 * 367 * Side effects: 368 * None. 369 * 370 *---------------------------------------------------------------------------- 371 */ 372 LEAF(MipsSwitchFPState) 373 mfc0 t1, MIPS_COP_0_STATUS # Save old SR 374 li t0, MIPS_SR_COP_1_BIT # enable the coprocessor 375 mtc0 t0, MIPS_COP_0_STATUS 376 ITLBNOPFIX 377 378 beq a0, zero, 1f # skip save if NULL pointer 379 nop 380 /* 381 * First read out the status register to make sure that all FP operations 382 * have completed. 383 */ 384 PTR_L a0, TD_PCB(a0) # get pointer to pcb for proc 385 cfc1 t0, MIPS_FPU_CSR # stall til FP done 386 cfc1 t0, MIPS_FPU_CSR # now get status 387 li t3, ~MIPS_SR_COP_1_BIT 388 RESTORE_U_PCB_REG(t2, PS, a0) # get CPU status register 389 SAVE_U_PCB_FPSR(t0, FSR_NUM, a0) # save FP status 390 and t2, t2, t3 # clear COP_1 enable bit 391 SAVE_U_PCB_REG(t2, PS, a0) # save new status register 392 /* 393 * Save the floating point registers. 394 */ 395 SAVE_U_PCB_FPREG($f0, F0_NUM, a0) 396 SAVE_U_PCB_FPREG($f1, F1_NUM, a0) 397 SAVE_U_PCB_FPREG($f2, F2_NUM, a0) 398 SAVE_U_PCB_FPREG($f3, F3_NUM, a0) 399 SAVE_U_PCB_FPREG($f4, F4_NUM, a0) 400 SAVE_U_PCB_FPREG($f5, F5_NUM, a0) 401 SAVE_U_PCB_FPREG($f6, F6_NUM, a0) 402 SAVE_U_PCB_FPREG($f7, F7_NUM, a0) 403 SAVE_U_PCB_FPREG($f8, F8_NUM, a0) 404 SAVE_U_PCB_FPREG($f9, F9_NUM, a0) 405 SAVE_U_PCB_FPREG($f10, F10_NUM, a0) 406 SAVE_U_PCB_FPREG($f11, F11_NUM, a0) 407 SAVE_U_PCB_FPREG($f12, F12_NUM, a0) 408 SAVE_U_PCB_FPREG($f13, F13_NUM, a0) 409 SAVE_U_PCB_FPREG($f14, F14_NUM, a0) 410 SAVE_U_PCB_FPREG($f15, F15_NUM, a0) 411 SAVE_U_PCB_FPREG($f16, F16_NUM, a0) 412 SAVE_U_PCB_FPREG($f17, F17_NUM, a0) 413 SAVE_U_PCB_FPREG($f18, F18_NUM, a0) 414 SAVE_U_PCB_FPREG($f19, F19_NUM, a0) 415 SAVE_U_PCB_FPREG($f20, F20_NUM, a0) 416 SAVE_U_PCB_FPREG($f21, F21_NUM, a0) 417 SAVE_U_PCB_FPREG($f22, F22_NUM, a0) 418 SAVE_U_PCB_FPREG($f23, F23_NUM, a0) 419 SAVE_U_PCB_FPREG($f24, F24_NUM, a0) 420 SAVE_U_PCB_FPREG($f25, F25_NUM, a0) 421 SAVE_U_PCB_FPREG($f26, F26_NUM, a0) 422 SAVE_U_PCB_FPREG($f27, F27_NUM, a0) 423 SAVE_U_PCB_FPREG($f28, F28_NUM, a0) 424 SAVE_U_PCB_FPREG($f29, F29_NUM, a0) 425 SAVE_U_PCB_FPREG($f30, F30_NUM, a0) 426 SAVE_U_PCB_FPREG($f31, F31_NUM, a0) 427 428 1: 429 /* 430 * Restore the floating point registers. 431 */ 432 RESTORE_U_PCB_FPSR(t0, FSR_NUM, a1) # get status register 433 RESTORE_U_PCB_FPREG($f0, F0_NUM, a1) 434 RESTORE_U_PCB_FPREG($f1, F1_NUM, a1) 435 RESTORE_U_PCB_FPREG($f2, F2_NUM, a1) 436 RESTORE_U_PCB_FPREG($f3, F3_NUM, a1) 437 RESTORE_U_PCB_FPREG($f4, F4_NUM, a1) 438 RESTORE_U_PCB_FPREG($f5, F5_NUM, a1) 439 RESTORE_U_PCB_FPREG($f6, F6_NUM, a1) 440 RESTORE_U_PCB_FPREG($f7, F7_NUM, a1) 441 RESTORE_U_PCB_FPREG($f8, F8_NUM, a1) 442 RESTORE_U_PCB_FPREG($f9, F9_NUM, a1) 443 RESTORE_U_PCB_FPREG($f10, F10_NUM, a1) 444 RESTORE_U_PCB_FPREG($f11, F11_NUM, a1) 445 RESTORE_U_PCB_FPREG($f12, F12_NUM, a1) 446 RESTORE_U_PCB_FPREG($f13, F13_NUM, a1) 447 RESTORE_U_PCB_FPREG($f14, F14_NUM, a1) 448 RESTORE_U_PCB_FPREG($f15, F15_NUM, a1) 449 RESTORE_U_PCB_FPREG($f16, F16_NUM, a1) 450 RESTORE_U_PCB_FPREG($f17, F17_NUM, a1) 451 RESTORE_U_PCB_FPREG($f18, F18_NUM, a1) 452 RESTORE_U_PCB_FPREG($f19, F19_NUM, a1) 453 RESTORE_U_PCB_FPREG($f20, F20_NUM, a1) 454 RESTORE_U_PCB_FPREG($f21, F21_NUM, a1) 455 RESTORE_U_PCB_FPREG($f22, F22_NUM, a1) 456 RESTORE_U_PCB_FPREG($f23, F23_NUM, a1) 457 RESTORE_U_PCB_FPREG($f24, F24_NUM, a1) 458 RESTORE_U_PCB_FPREG($f25, F25_NUM, a1) 459 RESTORE_U_PCB_FPREG($f26, F26_NUM, a1) 460 RESTORE_U_PCB_FPREG($f27, F27_NUM, a1) 461 RESTORE_U_PCB_FPREG($f28, F28_NUM, a1) 462 RESTORE_U_PCB_FPREG($f29, F29_NUM, a1) 463 RESTORE_U_PCB_FPREG($f30, F30_NUM, a1) 464 RESTORE_U_PCB_FPREG($f31, F31_NUM, a1) 465 466 and t0, t0, ~MIPS_FPU_EXCEPTION_BITS 467 ctc1 t0, MIPS_FPU_CSR 468 nop 469 470 mtc0 t1, MIPS_COP_0_STATUS # Restore the status register. 471 ITLBNOPFIX 472 j ra 473 nop 474 END(MipsSwitchFPState) 475 476 /*---------------------------------------------------------------------------- 477 * 478 * MipsSaveCurFPState -- 479 * 480 * Save the current floating point coprocessor state. 481 * 482 * MipsSaveCurFPState(td) 483 * struct thread *td; 484 * 485 * Results: 486 * None. 487 * 488 * Side effects: 489 * machFPCurProcPtr is cleared. 490 * 491 *---------------------------------------------------------------------------- 492 */ 493 LEAF(MipsSaveCurFPState) 494 PTR_L a0, TD_PCB(a0) # get pointer to pcb for thread 495 mfc0 t1, MIPS_COP_0_STATUS # Disable interrupts and 496 li t0, MIPS_SR_COP_1_BIT # enable the coprocessor 497 mtc0 t0, MIPS_COP_0_STATUS 498 ITLBNOPFIX 499 GET_CPU_PCPU(a1) 500 PTR_S zero, PC_FPCURTHREAD(a1) # indicate state has been saved 501 /* 502 * First read out the status register to make sure that all FP operations 503 * have completed. 504 */ 505 RESTORE_U_PCB_REG(t2, PS, a0) # get CPU status register 506 li t3, ~MIPS_SR_COP_1_BIT 507 and t2, t2, t3 # clear COP_1 enable bit 508 cfc1 t0, MIPS_FPU_CSR # stall til FP done 509 cfc1 t0, MIPS_FPU_CSR # now get status 510 SAVE_U_PCB_REG(t2, PS, a0) # save new status register 511 SAVE_U_PCB_FPSR(t0, FSR_NUM, a0) # save FP status 512 /* 513 * Save the floating point registers. 514 */ 515 SAVE_U_PCB_FPREG($f0, F0_NUM, a0) 516 SAVE_U_PCB_FPREG($f1, F1_NUM, a0) 517 SAVE_U_PCB_FPREG($f2, F2_NUM, a0) 518 SAVE_U_PCB_FPREG($f3, F3_NUM, a0) 519 SAVE_U_PCB_FPREG($f4, F4_NUM, a0) 520 SAVE_U_PCB_FPREG($f5, F5_NUM, a0) 521 SAVE_U_PCB_FPREG($f6, F6_NUM, a0) 522 SAVE_U_PCB_FPREG($f7, F7_NUM, a0) 523 SAVE_U_PCB_FPREG($f8, F8_NUM, a0) 524 SAVE_U_PCB_FPREG($f9, F9_NUM, a0) 525 SAVE_U_PCB_FPREG($f10, F10_NUM, a0) 526 SAVE_U_PCB_FPREG($f11, F11_NUM, a0) 527 SAVE_U_PCB_FPREG($f12, F12_NUM, a0) 528 SAVE_U_PCB_FPREG($f13, F13_NUM, a0) 529 SAVE_U_PCB_FPREG($f14, F14_NUM, a0) 530 SAVE_U_PCB_FPREG($f15, F15_NUM, a0) 531 SAVE_U_PCB_FPREG($f16, F16_NUM, a0) 532 SAVE_U_PCB_FPREG($f17, F17_NUM, a0) 533 SAVE_U_PCB_FPREG($f18, F18_NUM, a0) 534 SAVE_U_PCB_FPREG($f19, F19_NUM, a0) 535 SAVE_U_PCB_FPREG($f20, F20_NUM, a0) 536 SAVE_U_PCB_FPREG($f21, F21_NUM, a0) 537 SAVE_U_PCB_FPREG($f22, F22_NUM, a0) 538 SAVE_U_PCB_FPREG($f23, F23_NUM, a0) 539 SAVE_U_PCB_FPREG($f24, F24_NUM, a0) 540 SAVE_U_PCB_FPREG($f25, F25_NUM, a0) 541 SAVE_U_PCB_FPREG($f26, F26_NUM, a0) 542 SAVE_U_PCB_FPREG($f27, F27_NUM, a0) 543 SAVE_U_PCB_FPREG($f28, F28_NUM, a0) 544 SAVE_U_PCB_FPREG($f29, F29_NUM, a0) 545 SAVE_U_PCB_FPREG($f30, F30_NUM, a0) 546 SAVE_U_PCB_FPREG($f31, F31_NUM, a0) 547 548 mtc0 t1, MIPS_COP_0_STATUS # Restore the status register. 549 ITLBNOPFIX 550 j ra 551 nop 552 END(MipsSaveCurFPState) 553 554 /* 555 * When starting init, call this to configure the process for user 556 * mode. This will be inherited by other processes. 557 */ 558 LEAF_NOPROFILE(prepare_usermode) 559 j ra 560 nop 561 END(prepare_usermode) 562 563 564 /* 565 * This code is copied the user's stack for returning from signal handlers 566 * (see sendsig() and sigreturn()). We have to compute the address 567 * of the sigcontext struct for the sigreturn call. 568 */ 569 .globl _C_LABEL(sigcode) 570 _C_LABEL(sigcode): 571 PTR_ADDU a0, sp, SIGF_UC # address of ucontext 572 li v0, SYS_sigreturn 573 # sigreturn (ucp) 574 syscall 575 break 0 # just in case sigreturn fails 576 .globl _C_LABEL(esigcode) 577 _C_LABEL(esigcode): 578 579 .data 580 .globl szsigcode 581 szsigcode: 582 .long esigcode-sigcode 583 .text
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