1 /*-
2 * Copyright (c) 1982, 1986 The Regents of the University of California.
3 * Copyright (c) 1989, 1990 William Jolitz
4 * Copyright (c) 1994 John Dyson
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department, and William Jolitz.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 4. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
36 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
37 * from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
38 * JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
39 */
40
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
43
44 #include "opt_compat.h"
45 #include "opt_ddb.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/malloc.h>
50 #include <sys/proc.h>
51 #include <sys/syscall.h>
52 #include <sys/sysent.h>
53 #include <sys/buf.h>
54 #include <sys/vnode.h>
55 #include <sys/vmmeter.h>
56 #include <sys/kernel.h>
57 #include <sys/sysctl.h>
58 #include <sys/unistd.h>
59
60 #include <machine/cache.h>
61 #include <machine/clock.h>
62 #include <machine/cpu.h>
63 #include <machine/md_var.h>
64 #include <machine/pcb.h>
65
66 #include <vm/vm.h>
67 #include <vm/vm_extern.h>
68 #include <vm/pmap.h>
69 #include <vm/vm_kern.h>
70 #include <vm/vm_map.h>
71 #include <vm/vm_page.h>
72 #include <vm/vm_pageout.h>
73 #include <vm/vm_param.h>
74 #include <vm/uma.h>
75 #include <vm/uma_int.h>
76
77 #include <sys/user.h>
78 #include <sys/mbuf.h>
79
80 /* Duplicated from asm.h */
81 #if defined(__mips_o32)
82 #define SZREG 4
83 #else
84 #define SZREG 8
85 #endif
86 #if defined(__mips_o32) || defined(__mips_o64)
87 #define CALLFRAME_SIZ (SZREG * (4 + 2))
88 #elif defined(__mips_n32) || defined(__mips_n64)
89 #define CALLFRAME_SIZ (SZREG * 4)
90 #endif
91
92 /*
93 * Finish a fork operation, with process p2 nearly set up.
94 * Copy and update the pcb, set up the stack so that the child
95 * ready to run and return to user mode.
96 */
97 void
98 cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2,int flags)
99 {
100 struct proc *p1;
101 struct pcb *pcb2;
102
103 p1 = td1->td_proc;
104 if ((flags & RFPROC) == 0)
105 return;
106 /* It is assumed that the vm_thread_alloc called
107 * cpu_thread_alloc() before cpu_fork is called.
108 */
109
110 /* Point the pcb to the top of the stack */
111 pcb2 = td2->td_pcb;
112
113 /* Copy p1's pcb, note that in this case
114 * our pcb also includes the td_frame being copied
115 * too. The older mips2 code did an additional copy
116 * of the td_frame, for us that's not needed any
117 * longer (this copy does them both)
118 */
119 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
120
121 /* Point mdproc and then copy over td1's contents
122 * md_proc is empty for MIPS
123 */
124 td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
125
126 /*
127 * Set up return-value registers as fork() libc stub expects.
128 */
129 td2->td_frame->v0 = 0;
130 td2->td_frame->v1 = 1;
131 td2->td_frame->a3 = 0;
132
133 if (td1 == PCPU_GET(fpcurthread))
134 MipsSaveCurFPState(td1);
135
136 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
137 /* Make sp 64-bit aligned */
138 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
139 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
140 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
141 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
142 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
143 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
144 (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
145 /*
146 * FREEBSD_DEVELOPERS_FIXME:
147 * Setup any other CPU-Specific registers (Not MIPS Standard)
148 * and/or bits in other standard MIPS registers (if CPU-Specific)
149 * that are needed.
150 */
151
152 td2->td_md.md_tls = td1->td_md.md_tls;
153 td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
154 td2->td_md.md_spinlock_count = 1;
155 #ifdef CPU_CNMIPS
156 if (td1->td_md.md_flags & MDTD_COP2USED) {
157 if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) {
158 if (td1->td_md.md_ucop2)
159 octeon_cop2_save(td1->td_md.md_ucop2);
160 else
161 panic("cpu_fork: ucop2 is NULL but COP2 is enabled");
162 }
163 else {
164 if (td1->td_md.md_cop2)
165 octeon_cop2_save(td1->td_md.md_cop2);
166 else
167 panic("cpu_fork: cop2 is NULL but COP2 is enabled");
168 }
169 }
170
171 if (td1->td_md.md_cop2) {
172 td2->td_md.md_cop2 = octeon_cop2_alloc_ctx();
173 memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2,
174 sizeof(*td1->td_md.md_cop2));
175 }
176 if (td1->td_md.md_ucop2) {
177 td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
178 memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2,
179 sizeof(*td1->td_md.md_ucop2));
180 }
181 td2->td_md.md_cop2owner = td1->td_md.md_cop2owner;
182 pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
183 /* Clear COP2 bits for userland & kernel */
184 td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
185 pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT;
186 #endif
187 }
188
189 /*
190 * Intercept the return address from a freshly forked process that has NOT
191 * been scheduled yet.
192 *
193 * This is needed to make kernel threads stay in kernel mode.
194 */
195 void
196 cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg)
197 {
198 /*
199 * Note that the trap frame follows the args, so the function
200 * is really called like this: func(arg, frame);
201 */
202 td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
203 td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
204 }
205
206 void
207 cpu_exit(struct thread *td)
208 {
209 }
210
211 void
212 cpu_thread_exit(struct thread *td)
213 {
214
215 if (PCPU_GET(fpcurthread) == td)
216 PCPU_GET(fpcurthread) = (struct thread *)0;
217 #ifdef CPU_CNMIPS
218 if (td->td_md.md_cop2)
219 memset(td->td_md.md_cop2, 0,
220 sizeof(*td->td_md.md_cop2));
221 if (td->td_md.md_ucop2)
222 memset(td->td_md.md_ucop2, 0,
223 sizeof(*td->td_md.md_ucop2));
224 #endif
225 }
226
227 void
228 cpu_thread_free(struct thread *td)
229 {
230 #ifdef CPU_CNMIPS
231 if (td->td_md.md_cop2)
232 octeon_cop2_free_ctx(td->td_md.md_cop2);
233 if (td->td_md.md_ucop2)
234 octeon_cop2_free_ctx(td->td_md.md_ucop2);
235 td->td_md.md_cop2 = NULL;
236 td->td_md.md_ucop2 = NULL;
237 #endif
238 }
239
240 void
241 cpu_thread_clean(struct thread *td)
242 {
243 }
244
245 void
246 cpu_thread_swapin(struct thread *td)
247 {
248 pt_entry_t *pte;
249 int i;
250
251 /*
252 * The kstack may be at a different physical address now.
253 * Cache the PTEs for the Kernel stack in the machine dependent
254 * part of the thread struct so cpu_switch() can quickly map in
255 * the pcb struct and kernel stack.
256 */
257 for (i = 0; i < KSTACK_PAGES; i++) {
258 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
259 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
260 }
261 }
262
263 void
264 cpu_thread_swapout(struct thread *td)
265 {
266 }
267
268 void
269 cpu_thread_alloc(struct thread *td)
270 {
271 pt_entry_t *pte;
272 int i;
273
274 KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
275 td->td_pcb = (struct pcb *)(td->td_kstack +
276 td->td_kstack_pages * PAGE_SIZE) - 1;
277 td->td_frame = &td->td_pcb->pcb_regs;
278
279 for (i = 0; i < KSTACK_PAGES; i++) {
280 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
281 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
282 }
283 }
284
285 void
286 cpu_set_syscall_retval(struct thread *td, int error)
287 {
288 struct trapframe *locr0 = td->td_frame;
289 unsigned int code;
290 int quad_syscall;
291
292 code = locr0->v0;
293 quad_syscall = 0;
294 #if defined(__mips_n32) || defined(__mips_n64)
295 #ifdef COMPAT_FREEBSD32
296 if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32))
297 quad_syscall = 1;
298 #endif
299 #else
300 if (code == SYS___syscall)
301 quad_syscall = 1;
302 #endif
303
304 if (code == SYS_syscall)
305 code = locr0->a0;
306 else if (code == SYS___syscall) {
307 if (quad_syscall)
308 code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
309 else
310 code = locr0->a0;
311 }
312
313 switch (error) {
314 case 0:
315 if (quad_syscall && code != SYS_lseek) {
316 /*
317 * System call invoked through the
318 * SYS___syscall interface but the
319 * return value is really just 32
320 * bits.
321 */
322 locr0->v0 = td->td_retval[0];
323 if (_QUAD_LOWWORD)
324 locr0->v1 = td->td_retval[0];
325 locr0->a3 = 0;
326 } else {
327 locr0->v0 = td->td_retval[0];
328 locr0->v1 = td->td_retval[1];
329 locr0->a3 = 0;
330 }
331 break;
332
333 case ERESTART:
334 locr0->pc = td->td_pcb->pcb_tpc;
335 break;
336
337 case EJUSTRETURN:
338 break; /* nothing to do */
339
340 default:
341 if (quad_syscall && code != SYS_lseek) {
342 locr0->v0 = error;
343 if (_QUAD_LOWWORD)
344 locr0->v1 = error;
345 locr0->a3 = 1;
346 } else {
347 locr0->v0 = error;
348 locr0->a3 = 1;
349 }
350 }
351 }
352
353 /*
354 * Initialize machine state, mostly pcb and trap frame for a new
355 * thread, about to return to userspace. Put enough state in the new
356 * thread's PCB to get it to go back to the fork_return(), which
357 * finalizes the thread state and handles peculiarities of the first
358 * return to userspace for the new thread.
359 */
360 void
361 cpu_copy_thread(struct thread *td, struct thread *td0)
362 {
363 struct pcb *pcb2;
364
365 /* Point the pcb to the top of the stack. */
366 pcb2 = td->td_pcb;
367
368 /*
369 * Copy the upcall pcb. This loads kernel regs.
370 * Those not loaded individually below get their default
371 * values here.
372 *
373 * XXXKSE It might be a good idea to simply skip this as
374 * the values of the other registers may be unimportant.
375 * This would remove any requirement for knowing the KSE
376 * at this time (see the matching comment below for
377 * more analysis) (need a good safe default).
378 * In MIPS, the trapframe is the first element of the PCB
379 * and gets copied when we copy the PCB. No separate copy
380 * is needed.
381 */
382 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
383
384 /*
385 * Set registers for trampoline to user mode.
386 */
387
388 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
389 /* Make sp 64-bit aligned */
390 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
391 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
392 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
393 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
394 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
395 /* Dont set IE bit in SR. sched lock release will take care of it */
396 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
397 (MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
398
399 /*
400 * FREEBSD_DEVELOPERS_FIXME:
401 * Setup any other CPU-Specific registers (Not MIPS Standard)
402 * that are needed.
403 */
404
405 /* Setup to release spin count in in fork_exit(). */
406 td->td_md.md_spinlock_count = 1;
407 td->td_md.md_saved_intr = MIPS_SR_INT_IE;
408 #if 0
409 /* Maybe we need to fix this? */
410 td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
411 (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
412 (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
413 #endif
414 }
415
416 /*
417 * Set that machine state for performing an upcall that starts
418 * the entry function with the given argument.
419 */
420 void
421 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
422 stack_t *stack)
423 {
424 struct trapframe *tf;
425 register_t sp;
426
427 /*
428 * At the point where a function is called, sp must be 8
429 * byte aligned[for compatibility with 64-bit CPUs]
430 * in ``See MIPS Run'' by D. Sweetman, p. 269
431 * align stack
432 */
433 sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~0x7) -
434 CALLFRAME_SIZ;
435
436 /*
437 * Set the trap frame to point at the beginning of the uts
438 * function.
439 */
440 tf = td->td_frame;
441 bzero(tf, sizeof(struct trapframe));
442 tf->sp = sp;
443 tf->pc = (register_t)(intptr_t)entry;
444 /*
445 * MIPS ABI requires T9 to be the same as PC
446 * in subroutine entry point
447 */
448 tf->t9 = (register_t)(intptr_t)entry;
449 tf->a0 = (register_t)(intptr_t)arg;
450
451 /*
452 * Keep interrupt mask
453 */
454 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
455 (mips_rd_status() & MIPS_SR_INT_MASK);
456 #if defined(__mips_n32)
457 td->td_frame->sr |= MIPS_SR_PX;
458 #elif defined(__mips_n64)
459 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
460 #endif
461 /* tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
462 /**XXX the above may now be wrong -- mips2 implements this as panic */
463 /*
464 * FREEBSD_DEVELOPERS_FIXME:
465 * Setup any other CPU-Specific registers (Not MIPS Standard)
466 * that are needed.
467 */
468 }
469
470 /*
471 * Implement the pre-zeroed page mechanism.
472 * This routine is called from the idle loop.
473 */
474
475 #define ZIDLE_LO(v) ((v) * 2 / 3)
476 #define ZIDLE_HI(v) ((v) * 4 / 5)
477
478 /*
479 * Software interrupt handler for queued VM system processing.
480 */
481 void
482 swi_vm(void *dummy)
483 {
484
485 if (busdma_swi_pending)
486 busdma_swi();
487 }
488
489 int
490 cpu_set_user_tls(struct thread *td, void *tls_base)
491 {
492
493 td->td_md.md_tls = (char*)tls_base;
494
495 return (0);
496 }
497
498 #ifdef DDB
499 #include <ddb/ddb.h>
500
501 #define DB_PRINT_REG(ptr, regname) \
502 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
503
504 #define DB_PRINT_REG_ARRAY(ptr, arrname, regname) \
505 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
506
507 static void
508 dump_trapframe(struct trapframe *trapframe)
509 {
510
511 db_printf("Trapframe at %p\n", trapframe);
512
513 DB_PRINT_REG(trapframe, zero);
514 DB_PRINT_REG(trapframe, ast);
515 DB_PRINT_REG(trapframe, v0);
516 DB_PRINT_REG(trapframe, v1);
517 DB_PRINT_REG(trapframe, a0);
518 DB_PRINT_REG(trapframe, a1);
519 DB_PRINT_REG(trapframe, a2);
520 DB_PRINT_REG(trapframe, a3);
521 #if defined(__mips_n32) || defined(__mips_n64)
522 DB_PRINT_REG(trapframe, a4);
523 DB_PRINT_REG(trapframe, a5);
524 DB_PRINT_REG(trapframe, a6);
525 DB_PRINT_REG(trapframe, a7);
526 DB_PRINT_REG(trapframe, t0);
527 DB_PRINT_REG(trapframe, t1);
528 DB_PRINT_REG(trapframe, t2);
529 DB_PRINT_REG(trapframe, t3);
530 #else
531 DB_PRINT_REG(trapframe, t0);
532 DB_PRINT_REG(trapframe, t1);
533 DB_PRINT_REG(trapframe, t2);
534 DB_PRINT_REG(trapframe, t3);
535 DB_PRINT_REG(trapframe, t4);
536 DB_PRINT_REG(trapframe, t5);
537 DB_PRINT_REG(trapframe, t6);
538 DB_PRINT_REG(trapframe, t7);
539 #endif
540 DB_PRINT_REG(trapframe, s0);
541 DB_PRINT_REG(trapframe, s1);
542 DB_PRINT_REG(trapframe, s2);
543 DB_PRINT_REG(trapframe, s3);
544 DB_PRINT_REG(trapframe, s4);
545 DB_PRINT_REG(trapframe, s5);
546 DB_PRINT_REG(trapframe, s6);
547 DB_PRINT_REG(trapframe, s7);
548 DB_PRINT_REG(trapframe, t8);
549 DB_PRINT_REG(trapframe, t9);
550 DB_PRINT_REG(trapframe, k0);
551 DB_PRINT_REG(trapframe, k1);
552 DB_PRINT_REG(trapframe, gp);
553 DB_PRINT_REG(trapframe, sp);
554 DB_PRINT_REG(trapframe, s8);
555 DB_PRINT_REG(trapframe, ra);
556 DB_PRINT_REG(trapframe, sr);
557 DB_PRINT_REG(trapframe, mullo);
558 DB_PRINT_REG(trapframe, mulhi);
559 DB_PRINT_REG(trapframe, badvaddr);
560 DB_PRINT_REG(trapframe, cause);
561 DB_PRINT_REG(trapframe, pc);
562 }
563
564 DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
565 {
566 struct thread *td;
567 struct pcb *pcb;
568 struct trapframe *trapframe;
569
570 /* Determine which thread to examine. */
571 if (have_addr)
572 td = db_lookup_thread(addr, true);
573 else
574 td = curthread;
575
576 pcb = td->td_pcb;
577
578 db_printf("Thread %d at %p\n", td->td_tid, td);
579
580 db_printf("PCB at %p\n", pcb);
581
582 trapframe = &pcb->pcb_regs;
583 dump_trapframe(trapframe);
584
585 db_printf("PCB Context:\n");
586 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
587 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
588 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
589 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
590 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
591 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
592 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
593 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
594 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
595 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
596 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
597 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
598 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
599 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
600
601 db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
602 db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
603 db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
604
605 if (td->td_frame != trapframe) {
606 db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
607 td->td_frame, trapframe);
608 }
609 }
610
611 /*
612 * Dump the trapframe beginning at address specified by first argument.
613 */
614 DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
615 {
616
617 if (!have_addr)
618 return;
619
620 dump_trapframe((struct trapframe *)addr);
621 }
622
623 #endif /* DDB */
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