The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/mips/vm_machdep.c

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    1 /*-
    2  * SPDX-License-Identifier: BSD-3-Clause
    3  *
    4  * Copyright (c) 1982, 1986 The Regents of the University of California.
    5  * Copyright (c) 1989, 1990 William Jolitz
    6  * Copyright (c) 1994 John Dyson
    7  * All rights reserved.
    8  *
    9  * This code is derived from software contributed to Berkeley by
   10  * the Systems Programming Group of the University of Utah Computer
   11  * Science Department, and William Jolitz.
   12  *
   13  * Redistribution and use in source and binary forms, with or without
   14  * modification, are permitted provided that the following conditions
   15  * are met:
   16  * 1. Redistributions of source code must retain the above copyright
   17  *    notice, this list of conditions and the following disclaimer.
   18  * 2. Redistributions in binary form must reproduce the above copyright
   19  *    notice, this list of conditions and the following disclaimer in the
   20  *    documentation and/or other materials provided with the distribution.
   21  * 3. Neither the name of the University nor the names of its contributors
   22  *    may be used to endorse or promote products derived from this software
   23  *    without specific prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  *      from: @(#)vm_machdep.c  7.3 (Berkeley) 5/13/91
   38  *      Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
   39  *      from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
   40  *      JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
   41  */
   42 
   43 #include <sys/cdefs.h>
   44 __FBSDID("$FreeBSD: stable/12/sys/mips/mips/vm_machdep.c 345446 2019-03-23 11:47:13Z kib $");
   45 
   46 #include "opt_ddb.h"
   47 
   48 #include <sys/param.h>
   49 #include <sys/systm.h>
   50 #include <sys/malloc.h>
   51 #include <sys/proc.h>
   52 #include <sys/syscall.h>
   53 #include <sys/sysent.h>
   54 #include <sys/buf.h>
   55 #include <sys/vnode.h>
   56 #include <sys/vmmeter.h>
   57 #include <sys/kernel.h>
   58 #include <sys/sysctl.h>
   59 #include <sys/unistd.h>
   60 
   61 #include <machine/abi.h>
   62 #include <machine/cache.h>
   63 #include <machine/clock.h>
   64 #include <machine/cpu.h>
   65 #include <machine/cpufunc.h>
   66 #include <machine/cpuinfo.h>
   67 #include <machine/md_var.h>
   68 #include <machine/pcb.h>
   69 #include <machine/tls.h>
   70 
   71 #include <vm/vm.h>
   72 #include <vm/vm_extern.h>
   73 #include <vm/pmap.h>
   74 #include <vm/vm_kern.h>
   75 #include <vm/vm_map.h>
   76 #include <vm/vm_page.h>
   77 #include <vm/vm_pageout.h>
   78 #include <vm/vm_param.h>
   79 #include <vm/uma.h>
   80 #include <vm/uma_int.h>
   81 
   82 #include <sys/user.h>
   83 #include <sys/mbuf.h>
   84 
   85 /*
   86  * Finish a fork operation, with process p2 nearly set up.
   87  * Copy and update the pcb, set up the stack so that the child
   88  * ready to run and return to user mode.
   89  */
   90 void
   91 cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2,int flags)
   92 {
   93         struct proc *p1;
   94         struct pcb *pcb2;
   95 
   96         p1 = td1->td_proc;
   97         if ((flags & RFPROC) == 0)
   98                 return;
   99         /* It is assumed that the vm_thread_alloc called
  100          * cpu_thread_alloc() before cpu_fork is called.
  101          */
  102 
  103         /* Point the pcb to the top of the stack */
  104         pcb2 = td2->td_pcb;
  105 
  106         /* Copy p1's pcb, note that in this case
  107          * our pcb also includes the td_frame being copied
  108          * too. The older mips2 code did an additional copy
  109          * of the td_frame, for us that's not needed any
  110          * longer (this copy does them both) 
  111          */
  112         bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
  113 
  114         /* Point mdproc and then copy over td1's contents
  115          * md_proc is empty for MIPS
  116          */
  117         td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
  118 
  119         /*
  120          * Set up return-value registers as fork() libc stub expects.
  121          */
  122         td2->td_frame->v0 = 0;
  123         td2->td_frame->v1 = 1;
  124         td2->td_frame->a3 = 0;
  125 
  126         if (td1 == PCPU_GET(fpcurthread))
  127                 MipsSaveCurFPState(td1);
  128 
  129         pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
  130         /* Make sp 64-bit aligned */
  131         pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
  132             ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
  133         pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
  134         pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
  135         pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
  136         pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
  137             (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
  138         /*
  139          * FREEBSD_DEVELOPERS_FIXME:
  140          * Setup any other CPU-Specific registers (Not MIPS Standard)
  141          * and/or bits in other standard MIPS registers (if CPU-Specific)
  142          *  that are needed.
  143          */
  144 
  145         td2->td_md.md_tls = td1->td_md.md_tls;
  146         td2->td_md.md_tls_tcb_offset = td1->td_md.md_tls_tcb_offset;
  147         td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
  148         td2->td_md.md_spinlock_count = 1;
  149 #ifdef CPU_CNMIPS
  150         if (td1->td_md.md_flags & MDTD_COP2USED) {
  151                 if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) {
  152                         if (td1->td_md.md_ucop2)
  153                                 octeon_cop2_save(td1->td_md.md_ucop2);
  154                         else
  155                                 panic("cpu_fork: ucop2 is NULL but COP2 is enabled");
  156                 }
  157                 else {
  158                         if (td1->td_md.md_cop2)
  159                                 octeon_cop2_save(td1->td_md.md_cop2);
  160                         else
  161                                 panic("cpu_fork: cop2 is NULL but COP2 is enabled");
  162                 }
  163         }
  164 
  165         if (td1->td_md.md_cop2) {
  166                 td2->td_md.md_cop2 = octeon_cop2_alloc_ctx();
  167                 memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2, 
  168                         sizeof(*td1->td_md.md_cop2));
  169         }
  170         if (td1->td_md.md_ucop2) {
  171                 td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
  172                 memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2, 
  173                         sizeof(*td1->td_md.md_ucop2));
  174         }
  175         td2->td_md.md_cop2owner = td1->td_md.md_cop2owner;
  176         pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
  177         /* Clear COP2 bits for userland & kernel */
  178         td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
  179         pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT;
  180 #endif
  181 }
  182 
  183 /*
  184  * Intercept the return address from a freshly forked process that has NOT
  185  * been scheduled yet.
  186  *
  187  * This is needed to make kernel threads stay in kernel mode.
  188  */
  189 void
  190 cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg)
  191 {
  192         /*
  193          * Note that the trap frame follows the args, so the function
  194          * is really called like this:  func(arg, frame);
  195          */
  196         td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
  197         td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
  198 }
  199 
  200 void
  201 cpu_exit(struct thread *td)
  202 {
  203 }
  204 
  205 void
  206 cpu_thread_exit(struct thread *td)
  207 {
  208 
  209         if (PCPU_GET(fpcurthread) == td)
  210                 PCPU_GET(fpcurthread) = (struct thread *)0;
  211 #ifdef  CPU_CNMIPS
  212         if (td->td_md.md_cop2)
  213                 memset(td->td_md.md_cop2, 0,
  214                         sizeof(*td->td_md.md_cop2));
  215         if (td->td_md.md_ucop2)
  216                 memset(td->td_md.md_ucop2, 0,
  217                         sizeof(*td->td_md.md_ucop2));
  218 #endif
  219 }
  220 
  221 void
  222 cpu_thread_free(struct thread *td)
  223 {
  224 #ifdef  CPU_CNMIPS
  225         if (td->td_md.md_cop2)
  226                 octeon_cop2_free_ctx(td->td_md.md_cop2);
  227         if (td->td_md.md_ucop2)
  228                 octeon_cop2_free_ctx(td->td_md.md_ucop2);
  229         td->td_md.md_cop2 = NULL;
  230         td->td_md.md_ucop2 = NULL;
  231 #endif
  232 }
  233 
  234 void
  235 cpu_thread_clean(struct thread *td)
  236 {
  237 }
  238 
  239 void
  240 cpu_thread_swapin(struct thread *td)
  241 {
  242         pt_entry_t *pte;
  243         int i;
  244 
  245         /*
  246          * The kstack may be at a different physical address now.
  247          * Cache the PTEs for the Kernel stack in the machine dependent
  248          * part of the thread struct so cpu_switch() can quickly map in
  249          * the pcb struct and kernel stack.
  250          */
  251         for (i = 0; i < KSTACK_PAGES; i++) {
  252                 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
  253                 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
  254         }
  255 }
  256 
  257 void
  258 cpu_thread_swapout(struct thread *td)
  259 {
  260 }
  261 
  262 void
  263 cpu_thread_alloc(struct thread *td)
  264 {
  265         pt_entry_t *pte;
  266         int i;
  267 
  268         KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
  269         td->td_pcb = (struct pcb *)(td->td_kstack +
  270             td->td_kstack_pages * PAGE_SIZE) - 1;
  271         td->td_frame = &td->td_pcb->pcb_regs;
  272 
  273         for (i = 0; i < KSTACK_PAGES; i++) {
  274                 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
  275                 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
  276         }
  277 }
  278 
  279 void
  280 cpu_set_syscall_retval(struct thread *td, int error)
  281 {
  282         struct trapframe *locr0 = td->td_frame;
  283         unsigned int code;
  284         int quad_syscall;
  285 
  286         code = locr0->v0;
  287         quad_syscall = 0;
  288 #if defined(__mips_n32) || defined(__mips_n64)
  289 #ifdef COMPAT_FREEBSD32
  290         if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32))
  291                 quad_syscall = 1;
  292 #endif
  293 #else
  294         if (code == SYS___syscall)
  295                 quad_syscall = 1;
  296 #endif
  297 
  298         if (code == SYS_syscall)
  299                 code = locr0->a0;
  300         else if (code == SYS___syscall) {
  301                 if (quad_syscall)
  302                         code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
  303                 else
  304                         code = locr0->a0;
  305         }
  306 
  307         switch (error) {
  308         case 0:
  309                 if (quad_syscall && code != SYS_lseek) {
  310                         /*
  311                          * System call invoked through the
  312                          * SYS___syscall interface but the
  313                          * return value is really just 32
  314                          * bits.
  315                          */
  316                         locr0->v0 = td->td_retval[0];
  317                         if (_QUAD_LOWWORD)
  318                                 locr0->v1 = td->td_retval[0];
  319                         locr0->a3 = 0;
  320                 } else {
  321                         locr0->v0 = td->td_retval[0];
  322                         locr0->v1 = td->td_retval[1];
  323                         locr0->a3 = 0;
  324                 }
  325                 break;
  326 
  327         case ERESTART:
  328                 locr0->pc = td->td_pcb->pcb_tpc;
  329                 break;
  330 
  331         case EJUSTRETURN:
  332                 break;  /* nothing to do */
  333 
  334         default:
  335                 if (quad_syscall && code != SYS_lseek) {
  336                         locr0->v0 = error;
  337                         if (_QUAD_LOWWORD)
  338                                 locr0->v1 = error;
  339                         locr0->a3 = 1;
  340                 } else {
  341                         locr0->v0 = error;
  342                         locr0->a3 = 1;
  343                 }
  344         }
  345 }
  346 
  347 /*
  348  * Initialize machine state, mostly pcb and trap frame for a new
  349  * thread, about to return to userspace.  Put enough state in the new
  350  * thread's PCB to get it to go back to the fork_return(), which
  351  * finalizes the thread state and handles peculiarities of the first
  352  * return to userspace for the new thread.
  353  */
  354 void
  355 cpu_copy_thread(struct thread *td, struct thread *td0)
  356 {
  357         struct pcb *pcb2;
  358 
  359         /* Point the pcb to the top of the stack. */
  360         pcb2 = td->td_pcb;
  361 
  362         /*
  363          * Copy the upcall pcb.  This loads kernel regs.
  364          * Those not loaded individually below get their default
  365          * values here.
  366          *
  367          * XXXKSE It might be a good idea to simply skip this as
  368          * the values of the other registers may be unimportant.
  369          * This would remove any requirement for knowing the KSE
  370          * at this time (see the matching comment below for
  371          * more analysis) (need a good safe default).
  372          * In MIPS, the trapframe is the first element of the PCB
  373          * and gets copied when we copy the PCB. No separate copy
  374          * is needed.
  375          */
  376         bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
  377 
  378         /*
  379          * Set registers for trampoline to user mode.
  380          */
  381 
  382         pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
  383         /* Make sp 64-bit aligned */
  384         pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
  385             ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
  386         pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
  387         pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
  388         pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
  389         /* Dont set IE bit in SR. sched lock release will take care of it */
  390         pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
  391             (MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
  392 
  393         /*
  394          * FREEBSD_DEVELOPERS_FIXME:
  395          * Setup any other CPU-Specific registers (Not MIPS Standard)
  396          * that are needed.
  397          */
  398 
  399         /* Setup to release spin count in in fork_exit(). */
  400         td->td_md.md_spinlock_count = 1;
  401         td->td_md.md_saved_intr = MIPS_SR_INT_IE;
  402 #if 0
  403             /* Maybe we need to fix this? */
  404         td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
  405                                   (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
  406                                   (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
  407 #endif
  408 }
  409 
  410 /*
  411  * Set that machine state for performing an upcall that starts
  412  * the entry function with the given argument.
  413  */
  414 void
  415 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
  416     stack_t *stack)
  417 {
  418         struct trapframe *tf;
  419         register_t sp;
  420 
  421         sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~(STACK_ALIGN - 1)) -
  422             CALLFRAME_SIZ;
  423 
  424         /*
  425          * Set the trap frame to point at the beginning of the uts
  426          * function.
  427          */
  428         tf = td->td_frame;
  429         bzero(tf, sizeof(struct trapframe));
  430         tf->sp = sp;
  431         tf->pc = (register_t)(intptr_t)entry;
  432         /* 
  433          * MIPS ABI requires T9 to be the same as PC 
  434          * in subroutine entry point
  435          */
  436         tf->t9 = (register_t)(intptr_t)entry; 
  437         tf->a0 = (register_t)(intptr_t)arg;
  438 
  439         /*
  440          * Keep interrupt mask
  441          */
  442         td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
  443             (mips_rd_status() & MIPS_SR_INT_MASK);
  444 #if defined(__mips_n32) 
  445         td->td_frame->sr |= MIPS_SR_PX;
  446 #elif  defined(__mips_n64)
  447         td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
  448 #endif
  449 /*      tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
  450         /**XXX the above may now be wrong -- mips2 implements this as panic */
  451         /*
  452          * FREEBSD_DEVELOPERS_FIXME:
  453          * Setup any other CPU-Specific registers (Not MIPS Standard)
  454          * that are needed.
  455          */
  456 }
  457 
  458 bool
  459 cpu_exec_vmspace_reuse(struct proc *p __unused, vm_map_t map __unused)
  460 {
  461 
  462         return (true);
  463 }
  464 
  465 int
  466 cpu_procctl(struct thread *td __unused, int idtype __unused, id_t id __unused,
  467     int com __unused, void *data __unused)
  468 {
  469 
  470         return (EINVAL);
  471 }
  472 
  473 /*
  474  * Software interrupt handler for queued VM system processing.
  475  */
  476 void
  477 swi_vm(void *dummy)
  478 {
  479 
  480         if (busdma_swi_pending)
  481                 busdma_swi();
  482 }
  483 
  484 int
  485 cpu_set_user_tls(struct thread *td, void *tls_base)
  486 {
  487 
  488 #if defined(__mips_n64) && defined(COMPAT_FREEBSD32)
  489         if (td->td_proc && SV_PROC_FLAG(td->td_proc, SV_ILP32))
  490                 td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE32;
  491         else
  492 #endif
  493         td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE;
  494         td->td_md.md_tls = (char*)tls_base;
  495         if (td == curthread && cpuinfo.userlocal_reg == true) {
  496                 mips_wr_userlocal((unsigned long)tls_base +
  497                     td->td_md.md_tls_tcb_offset);
  498         }
  499 
  500         return (0);
  501 }
  502 
  503 #ifdef DDB
  504 #include <ddb/ddb.h>
  505 
  506 #define DB_PRINT_REG(ptr, regname)                      \
  507         db_printf("  %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
  508 
  509 #define DB_PRINT_REG_ARRAY(ptr, arrname, regname)       \
  510         db_printf("  %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
  511 
  512 static void
  513 dump_trapframe(struct trapframe *trapframe)
  514 {
  515 
  516         db_printf("Trapframe at %p\n", trapframe);
  517 
  518         DB_PRINT_REG(trapframe, zero);
  519         DB_PRINT_REG(trapframe, ast);
  520         DB_PRINT_REG(trapframe, v0);
  521         DB_PRINT_REG(trapframe, v1);
  522         DB_PRINT_REG(trapframe, a0);
  523         DB_PRINT_REG(trapframe, a1);
  524         DB_PRINT_REG(trapframe, a2);
  525         DB_PRINT_REG(trapframe, a3);
  526 #if defined(__mips_n32) || defined(__mips_n64)
  527         DB_PRINT_REG(trapframe, a4);
  528         DB_PRINT_REG(trapframe, a5);
  529         DB_PRINT_REG(trapframe, a6);
  530         DB_PRINT_REG(trapframe, a7);
  531         DB_PRINT_REG(trapframe, t0);
  532         DB_PRINT_REG(trapframe, t1);
  533         DB_PRINT_REG(trapframe, t2);
  534         DB_PRINT_REG(trapframe, t3);
  535 #else
  536         DB_PRINT_REG(trapframe, t0);
  537         DB_PRINT_REG(trapframe, t1);
  538         DB_PRINT_REG(trapframe, t2);
  539         DB_PRINT_REG(trapframe, t3);
  540         DB_PRINT_REG(trapframe, t4);
  541         DB_PRINT_REG(trapframe, t5);
  542         DB_PRINT_REG(trapframe, t6);
  543         DB_PRINT_REG(trapframe, t7);
  544 #endif
  545         DB_PRINT_REG(trapframe, s0);
  546         DB_PRINT_REG(trapframe, s1);
  547         DB_PRINT_REG(trapframe, s2);
  548         DB_PRINT_REG(trapframe, s3);
  549         DB_PRINT_REG(trapframe, s4);
  550         DB_PRINT_REG(trapframe, s5);
  551         DB_PRINT_REG(trapframe, s6);
  552         DB_PRINT_REG(trapframe, s7);
  553         DB_PRINT_REG(trapframe, t8);
  554         DB_PRINT_REG(trapframe, t9);
  555         DB_PRINT_REG(trapframe, k0);
  556         DB_PRINT_REG(trapframe, k1);
  557         DB_PRINT_REG(trapframe, gp);
  558         DB_PRINT_REG(trapframe, sp);
  559         DB_PRINT_REG(trapframe, s8);
  560         DB_PRINT_REG(trapframe, ra);
  561         DB_PRINT_REG(trapframe, sr);
  562         DB_PRINT_REG(trapframe, mullo);
  563         DB_PRINT_REG(trapframe, mulhi);
  564         DB_PRINT_REG(trapframe, badvaddr);
  565         DB_PRINT_REG(trapframe, cause);
  566         DB_PRINT_REG(trapframe, pc);
  567 }
  568 
  569 DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
  570 {
  571         struct thread *td;
  572         struct pcb *pcb;
  573         struct trapframe *trapframe;
  574 
  575         /* Determine which thread to examine. */
  576         if (have_addr)
  577                 td = db_lookup_thread(addr, true);
  578         else
  579                 td = curthread;
  580         
  581         pcb = td->td_pcb;
  582 
  583         db_printf("Thread %d at %p\n", td->td_tid, td);
  584 
  585         db_printf("PCB at %p\n", pcb);
  586 
  587         trapframe = &pcb->pcb_regs;
  588         dump_trapframe(trapframe);
  589 
  590         db_printf("PCB Context:\n");
  591         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
  592         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
  593         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
  594         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
  595         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
  596         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
  597         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
  598         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
  599         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
  600         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
  601         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
  602         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
  603         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
  604         DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
  605 
  606         db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
  607         db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
  608         db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
  609 
  610         if (td->td_frame != trapframe) {
  611                 db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
  612                           td->td_frame, trapframe);
  613         }
  614 }
  615 
  616 /*
  617  * Dump the trapframe beginning at address specified by first argument.
  618  */
  619 DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
  620 {
  621         
  622         if (!have_addr)
  623                 return;
  624 
  625         dump_trapframe((struct trapframe *)addr);
  626 }
  627 
  628 #endif  /* DDB */

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