The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/mips/mips/vm_machdep.c

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    1 /*-
    2  * Copyright (c) 1982, 1986 The Regents of the University of California.
    3  * Copyright (c) 1989, 1990 William Jolitz
    4  * Copyright (c) 1994 John Dyson
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to Berkeley by
    8  * the Systems Programming Group of the University of Utah Computer
    9  * Science Department, and William Jolitz.
   10  *
   11  * Redistribution and use in source and binary forms, with or without
   12  * modification, are permitted provided that the following conditions
   13  * are met:
   14  * 1. Redistributions of source code must retain the above copyright
   15  *    notice, this list of conditions and the following disclaimer.
   16  * 2. Redistributions in binary form must reproduce the above copyright
   17  *    notice, this list of conditions and the following disclaimer in the
   18  *    documentation and/or other materials provided with the distribution.
   19  * 4. Neither the name of the University nor the names of its contributors
   20  *    may be used to endorse or promote products derived from this software
   21  *    without specific prior written permission.
   22  *
   23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33  * SUCH DAMAGE.
   34  *
   35  *      from: @(#)vm_machdep.c  7.3 (Berkeley) 5/13/91
   36  *      Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
   37  *      from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
   38  *      JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
   39  */
   40 
   41 #include <sys/cdefs.h>
   42 __FBSDID("$FreeBSD: releng/8.0/sys/mips/mips/vm_machdep.c 178172 2008-04-13 07:27:37Z imp $");
   43 
   44 #include <sys/param.h>
   45 #include <sys/systm.h>
   46 #include <sys/malloc.h>
   47 #include <sys/proc.h>
   48 #include <sys/buf.h>
   49 #include <sys/vnode.h>
   50 #include <sys/vmmeter.h>
   51 #include <sys/kernel.h>
   52 #include <sys/sysctl.h>
   53 #include <sys/unistd.h>
   54 
   55 #include <machine/clock.h>
   56 #include <machine/cpu.h>
   57 #include <machine/md_var.h>
   58 #include <machine/pcb.h>
   59 #include <machine/pltfm.h>
   60 
   61 #include <vm/vm.h>
   62 #include <vm/vm_param.h>
   63 #include <sys/lock.h>
   64 #include <vm/vm_kern.h>
   65 #include <vm/vm_page.h>
   66 #include <vm/vm_map.h>
   67 #include <vm/vm_extern.h>
   68 
   69 #include <sys/user.h>
   70 #include <sys/mbuf.h>
   71 #include <sys/sf_buf.h>
   72 
   73 #ifndef NSFBUFS
   74 #define NSFBUFS         (512 + maxusers * 16)
   75 #endif
   76 
   77 static void     sf_buf_init(void *arg);
   78 SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL);
   79 
   80 LIST_HEAD(sf_head, sf_buf);
   81 
   82 
   83 /*
   84  * A hash table of active sendfile(2) buffers
   85  */
   86 static struct sf_head *sf_buf_active;
   87 static u_long sf_buf_hashmask;
   88 
   89 #define SF_BUF_HASH(m)  (((m) - vm_page_array) & sf_buf_hashmask)
   90 
   91 static TAILQ_HEAD(, sf_buf) sf_buf_freelist;
   92 static u_int    sf_buf_alloc_want;
   93 
   94 /*
   95  * A lock used to synchronize access to the hash table and free list
   96  */
   97 static struct mtx sf_buf_lock;
   98 
   99 /*
  100  * Finish a fork operation, with process p2 nearly set up.
  101  * Copy and update the pcb, set up the stack so that the child
  102  * ready to run and return to user mode.
  103  */
  104 void
  105 cpu_fork(register struct thread *td1,register struct proc *p2,
  106     struct thread *td2,int flags)
  107 {
  108         register struct proc *p1;
  109         struct pcb *pcb2;
  110 
  111         p1 = td1->td_proc;
  112         if ((flags & RFPROC) == 0)
  113                 return;
  114         /* It is assumed that the vm_thread_alloc called
  115          * cpu_thread_alloc() before cpu_fork is called.
  116          */
  117 
  118         /* Point the pcb to the top of the stack */
  119         pcb2 = td2->td_pcb;
  120 
  121         /* Copy p1's pcb, note that in this case
  122          * our pcb also includes the td_frame being copied
  123          * too. The older mips2 code did an additional copy
  124          * of the td_frame, for us thats not needed any
  125          * longer (this copy does them both 
  126          */
  127         bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
  128 
  129         /* Point mdproc and then copy over td1's contents
  130          * md_proc is empty for MIPS
  131          */
  132         td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
  133 
  134         /*
  135          * Set up return-value registers as fork() libc stub expects.
  136          */
  137         td2->td_frame->v0 = 0;
  138         td2->td_frame->v1 = 1;
  139         td2->td_frame->a3 = 0;
  140 
  141         if (td1 == PCPU_GET(fpcurthread))
  142                 MipsSaveCurFPState(td1);
  143 
  144         pcb2->pcb_context.val[PCB_REG_RA] = (register_t)fork_trampoline;
  145         /* Make sp 64-bit aligned */
  146         pcb2->pcb_context.val[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
  147             ~(sizeof(__int64_t) - 1)) - STAND_FRAME_SIZE);
  148         pcb2->pcb_context.val[PCB_REG_S0] = (register_t)fork_return;
  149         pcb2->pcb_context.val[PCB_REG_S1] = (register_t)td2;
  150         pcb2->pcb_context.val[PCB_REG_S2] = (register_t)td2->td_frame;
  151         pcb2->pcb_context.val[PCB_REG_SR] = SR_INT_MASK;
  152         /*
  153          * FREEBSD_DEVELOPERS_FIXME:
  154          * Setup any other CPU-Specific registers (Not MIPS Standard)
  155          * and/or bits in other standard MIPS registers (if CPU-Specific)
  156          *  that are needed.
  157          */
  158 
  159         td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
  160         td2->td_md.md_spinlock_count = 1;
  161 #ifdef TARGET_OCTEON
  162         pcb2->pcb_context.val[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS32_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
  163 #endif
  164 
  165 }
  166 
  167 /*
  168  * Intercept the return address from a freshly forked process that has NOT
  169  * been scheduled yet.
  170  *
  171  * This is needed to make kernel threads stay in kernel mode.
  172  */
  173 void
  174 cpu_set_fork_handler(struct thread *td, void (*func) __P((void *)), void *arg)
  175 {
  176         /*
  177          * Note that the trap frame follows the args, so the function
  178          * is really called like this:  func(arg, frame);
  179          */
  180         td->td_pcb->pcb_context.val[PCB_REG_S0] = (register_t) func;
  181         td->td_pcb->pcb_context.val[PCB_REG_S1] = (register_t) arg;
  182 }
  183 
  184 void
  185 cpu_exit(struct thread *td)
  186 {
  187 }
  188 
  189 void
  190 cpu_thread_exit(struct thread *td)
  191 {
  192 
  193         if (PCPU_GET(fpcurthread) == td)
  194                 PCPU_GET(fpcurthread) = (struct thread *)0;
  195 }
  196 
  197 void
  198 cpu_thread_free(struct thread *td)
  199 {
  200 }
  201 
  202 void
  203 cpu_thread_clean(struct thread *td)
  204 {
  205 }
  206 
  207 void
  208 cpu_thread_swapin(struct thread *td)
  209 {
  210         pt_entry_t *pte;
  211         int i;
  212 
  213         /*
  214          * The kstack may be at a different physical address now.
  215          * Cache the PTEs for the Kernel stack in the machine dependent
  216          * part of the thread struct so cpu_switch() can quickly map in
  217          * the pcb struct and kernel stack.
  218          */
  219         if (!(pte = pmap_segmap(kernel_pmap, td->td_md.md_realstack)))
  220                 panic("cpu_thread_swapin: invalid segmap");
  221         pte += ((vm_offset_t)td->td_md.md_realstack >> PGSHIFT) & (NPTEPG - 1);
  222 
  223         for (i = 0; i < KSTACK_PAGES - 1; i++) {
  224                 td->td_md.md_upte[i] = *pte & ~(PTE_RO|PTE_WIRED);
  225                 pte++;
  226         }
  227 }
  228 
  229 void
  230 cpu_thread_swapout(struct thread *td)
  231 {
  232 }
  233 
  234 void
  235 cpu_thread_alloc(struct thread *td)
  236 {
  237         pt_entry_t *pte;
  238         int i;
  239 
  240         if(td->td_kstack & (1 << PAGE_SHIFT))
  241                 td->td_md.md_realstack = td->td_kstack + PAGE_SIZE;
  242         else
  243                 td->td_md.md_realstack = td->td_kstack;
  244 
  245         td->td_pcb = (struct pcb *)(td->td_md.md_realstack +
  246             (td->td_kstack_pages - 1) * PAGE_SIZE) - 1;
  247         td->td_frame = &td->td_pcb->pcb_regs;
  248 
  249         if (!(pte = pmap_segmap(kernel_pmap, td->td_md.md_realstack)))
  250                 panic("cpu_thread_alloc: invalid segmap");
  251         pte += ((vm_offset_t)td->td_md.md_realstack >> PGSHIFT) & (NPTEPG - 1);
  252 
  253         for (i = 0; i < KSTACK_PAGES - 1; i++) {
  254                 td->td_md.md_upte[i] = *pte & ~(PTE_RO|PTE_WIRED);
  255                 pte++;
  256         }
  257 }
  258 
  259 /*
  260  * Initialize machine state (pcb and trap frame) for a new thread about to
  261  * upcall. Put enough state in the new thread's PCB to get it to go back
  262  * userret(), where we can intercept it again to set the return (upcall)
  263  * Address and stack, along with those from upcals that are from other sources
  264  * such as those generated in thread_userret() itself.
  265  */
  266 void
  267 cpu_set_upcall(struct thread *td, struct thread *td0)
  268 {
  269         struct pcb *pcb2;
  270 
  271         /* Point the pcb to the top of the stack. */
  272         pcb2 = td->td_pcb;
  273 
  274         /*
  275          * Copy the upcall pcb.  This loads kernel regs.
  276          * Those not loaded individually below get their default
  277          * values here.
  278          *
  279          * XXXKSE It might be a good idea to simply skip this as
  280          * the values of the other registers may be unimportant.
  281          * This would remove any requirement for knowing the KSE
  282          * at this time (see the matching comment below for
  283          * more analysis) (need a good safe default).
  284          * In MIPS, the trapframe is the first element of the PCB
  285          * and gets copied when we copy the PCB. No seperate copy
  286          * is needed.
  287          */
  288         bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
  289 
  290         /*
  291          * Set registers for trampoline to user mode.
  292          */
  293 
  294         pcb2->pcb_context.val[PCB_REG_RA] = (register_t)fork_trampoline;
  295         /* Make sp 64-bit aligned */
  296         pcb2->pcb_context.val[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
  297             ~(sizeof(__int64_t) - 1)) - STAND_FRAME_SIZE);
  298         pcb2->pcb_context.val[PCB_REG_S0] = (register_t)fork_return;
  299         pcb2->pcb_context.val[PCB_REG_S1] = (register_t)td;
  300         pcb2->pcb_context.val[PCB_REG_S2] = (register_t)td->td_frame;
  301 
  302 
  303         /* Dont set IE bit in SR. sched lock release will take care of it */
  304 /* idle_mask is jmips pcb2->pcb_context.val[11] = (ALL_INT_MASK & idle_mask); */
  305         pcb2->pcb_context.val[PCB_REG_SR] = SR_INT_MASK;
  306 #ifdef TARGET_OCTEON
  307         pcb2->pcb_context.val[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT |
  308           MIPS32_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
  309 #endif
  310 
  311         /*
  312          * FREEBSD_DEVELOPERS_FIXME:
  313          * Setup any other CPU-Specific registers (Not MIPS Standard)
  314          * that are needed.
  315          */
  316 
  317         /* SMP Setup to release sched_lock in fork_exit(). */
  318         td->td_md.md_spinlock_count = 1;
  319         td->td_md.md_saved_intr = MIPS_SR_INT_IE;
  320 #if 0
  321             /* Maybe we need to fix this? */
  322         td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
  323                                   (MIPS32_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
  324                                   (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
  325 #endif
  326 }
  327 
  328 /*
  329  * Set that machine state for performing an upcall that has to
  330  * be done in thread_userret() so that those upcalls generated
  331  * in thread_userret() itself can be done as well.
  332  */
  333 void
  334 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
  335     stack_t *stack)
  336 {
  337         struct trapframe *tf;
  338         u_int32_t sp;
  339 
  340         /*
  341         * At the point where a function is called, sp must be 8
  342         * byte aligned[for compatibility with 64-bit CPUs]
  343         * in ``See MIPS Run'' by D. Sweetman, p. 269
  344         * align stack */
  345         sp = ((uint32_t)(stack->ss_sp + stack->ss_size) & ~0x7) -
  346             STAND_FRAME_SIZE;
  347 
  348         /*
  349          * Set the trap frame to point at the beginning of the uts
  350          * function.
  351          */
  352         tf = td->td_frame;
  353         bzero(tf, sizeof(struct trapframe));
  354         tf->sp = (register_t)sp;
  355         tf->pc = (register_t)entry;
  356         tf->a0 = (register_t)arg;
  357 
  358         tf->sr = SR_KSU_USER | SR_EXL;
  359 #ifdef TARGET_OCTEON
  360         tf->sr |=  MIPS_SR_INT_IE | MIPS_SR_COP_0_BIT | MIPS_SR_UX |
  361           MIPS_SR_KX;
  362 #endif
  363 /*      tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
  364         /**XXX the above may now be wrong -- mips2 implements this as panic */
  365         /*
  366          * FREEBSD_DEVELOPERS_FIXME:
  367          * Setup any other CPU-Specific registers (Not MIPS Standard)
  368          * that are needed.
  369          */
  370 }
  371 /*
  372  * Convert kernel VA to physical address
  373  */
  374 u_long
  375 kvtop(void *addr)
  376 {
  377         vm_offset_t va;
  378 
  379         va = pmap_kextract((vm_offset_t)addr);
  380         if (va == 0)
  381                 panic("kvtop: zero page frame");
  382         return((int)va);
  383 }
  384 
  385 /*
  386  * Implement the pre-zeroed page mechanism.
  387  * This routine is called from the idle loop.
  388  */
  389 
  390 #define ZIDLE_LO(v)     ((v) * 2 / 3)
  391 #define ZIDLE_HI(v)     ((v) * 4 / 5)
  392 
  393 /*
  394  * Tell whether this address is in some physical memory region.
  395  * Currently used by the kernel coredump code in order to avoid
  396  * dumping non-memory physical address space.
  397  */
  398 int
  399 is_physical_memory(vm_offset_t addr)
  400 {
  401         if (addr >= SDRAM_ADDR_START && addr <= SDRAM_ADDR_END)
  402                 return 1;
  403         else
  404                 return 0;
  405 }
  406 
  407 int
  408 is_cacheable_mem(vm_offset_t pa)
  409 {
  410         if ((pa >= SDRAM_ADDR_START && pa <= SDRAM_ADDR_END) ||
  411 #ifdef FLASH_ADDR_START
  412             (pa >= FLASH_ADDR_START && pa <= FLASH_ADDR_END))
  413 #else
  414             0)
  415 #endif
  416                 return 1;
  417         else
  418                 return 0;
  419 }
  420 
  421 /*
  422  * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-))
  423  */
  424 static void
  425 sf_buf_init(void *arg)
  426 {
  427         struct sf_buf *sf_bufs;
  428         vm_offset_t sf_base;
  429         int i;
  430 
  431         nsfbufs = NSFBUFS;
  432         TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs);
  433 
  434         sf_buf_active = hashinit(nsfbufs, M_TEMP, &sf_buf_hashmask);
  435         TAILQ_INIT(&sf_buf_freelist);
  436         sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE);
  437         sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP,
  438             M_NOWAIT | M_ZERO);
  439         for (i = 0; i < nsfbufs; i++) {
  440                 sf_bufs[i].kva = sf_base + i * PAGE_SIZE;
  441                 TAILQ_INSERT_TAIL(&sf_buf_freelist, &sf_bufs[i], free_entry);
  442         }
  443         sf_buf_alloc_want = 0;
  444         mtx_init(&sf_buf_lock, "sf_buf", NULL, MTX_DEF);
  445 }
  446 
  447 /*
  448  * Allocate an sf_buf for the given vm_page.  On this machine, however, there
  449  * is no sf_buf object.  Instead, an opaque pointer to the given vm_page is
  450  * returned.
  451  */
  452 struct sf_buf *
  453 sf_buf_alloc(struct vm_page *m, int flags)
  454 {
  455         struct sf_head *hash_list;
  456         struct sf_buf *sf;
  457         int error;
  458 
  459         hash_list = &sf_buf_active[SF_BUF_HASH(m)];
  460         mtx_lock(&sf_buf_lock);
  461         LIST_FOREACH(sf, hash_list, list_entry) {
  462                 if (sf->m == m) {
  463                         sf->ref_count++;
  464                         if (sf->ref_count == 1) {
  465                                 TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry);
  466                                 nsfbufsused++;
  467                                 nsfbufspeak = imax(nsfbufspeak, nsfbufsused);
  468                         }
  469                         goto done;
  470                 }
  471         }
  472         while ((sf = TAILQ_FIRST(&sf_buf_freelist)) == NULL) {
  473                 if (flags & SFB_NOWAIT)
  474                         goto done;
  475                 sf_buf_alloc_want++;
  476                 mbstat.sf_allocwait++;
  477                 error = msleep(&sf_buf_freelist, &sf_buf_lock,
  478                     (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0);
  479                 sf_buf_alloc_want--;
  480 
  481                 /*
  482                  * If we got a signal, don't risk going back to sleep.
  483                  */
  484                 if (error)
  485                         goto done;
  486         }
  487         TAILQ_REMOVE(&sf_buf_freelist, sf, free_entry);
  488         if (sf->m != NULL)
  489                 LIST_REMOVE(sf, list_entry);
  490         LIST_INSERT_HEAD(hash_list, sf, list_entry);
  491         sf->ref_count = 1;
  492         sf->m = m;
  493         nsfbufsused++;
  494         nsfbufspeak = imax(nsfbufspeak, nsfbufsused);
  495         pmap_qenter(sf->kva, &sf->m, 1);
  496 done:
  497         mtx_unlock(&sf_buf_lock);
  498         return (sf);
  499 }
  500 
  501 /*
  502  * Free the sf_buf.  In fact, do nothing because there are no resources
  503  * associated with the sf_buf.
  504  */
  505 void
  506 sf_buf_free(struct sf_buf *sf)
  507 {
  508         mtx_lock(&sf_buf_lock);
  509         sf->ref_count--;
  510         if (sf->ref_count == 0) {
  511                 TAILQ_INSERT_TAIL(&sf_buf_freelist, sf, free_entry);
  512                 nsfbufsused--;
  513                 if (sf_buf_alloc_want > 0)
  514                         wakeup_one(&sf_buf_freelist);
  515         }
  516         mtx_unlock(&sf_buf_lock);
  517 }
  518 
  519 /*
  520  * Software interrupt handler for queued VM system processing.
  521  */
  522 void
  523 swi_vm(void *dummy)
  524 {
  525 }
  526 
  527 int
  528 cpu_set_user_tls(struct thread *td, void *tls_base)
  529 {
  530 
  531         /* TBD */
  532         return (0);
  533 }
  534 
  535 void
  536 cpu_throw(struct thread *old, struct thread *new)
  537 {
  538 
  539         func_2args_asmmacro(&mips_cpu_throw, old, new);
  540         panic("mips_cpu_throw() returned");
  541 }

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