1 /*-
2 * Copyright (c) 1982, 1986 The Regents of the University of California.
3 * Copyright (c) 1989, 1990 William Jolitz
4 * Copyright (c) 1994 John Dyson
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department, and William Jolitz.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 4. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
36 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
37 * from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
38 * JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
39 */
40
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
43
44 #include "opt_cputype.h"
45 #include "opt_ddb.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/malloc.h>
50 #include <sys/proc.h>
51 #include <sys/syscall.h>
52 #include <sys/buf.h>
53 #include <sys/vnode.h>
54 #include <sys/vmmeter.h>
55 #include <sys/kernel.h>
56 #include <sys/sysctl.h>
57 #include <sys/unistd.h>
58
59 #include <machine/asm.h>
60 #include <machine/cache.h>
61 #include <machine/clock.h>
62 #include <machine/cpu.h>
63 #include <machine/md_var.h>
64 #include <machine/pcb.h>
65
66 #include <vm/vm.h>
67 #include <vm/vm_extern.h>
68 #include <vm/pmap.h>
69 #include <vm/vm_kern.h>
70 #include <vm/vm_map.h>
71 #include <vm/vm_page.h>
72 #include <vm/vm_pageout.h>
73 #include <vm/vm_param.h>
74 #include <vm/uma.h>
75 #include <vm/uma_int.h>
76
77 #include <sys/user.h>
78 #include <sys/mbuf.h>
79 #include <sys/sf_buf.h>
80
81 #ifndef NSFBUFS
82 #define NSFBUFS (512 + maxusers * 16)
83 #endif
84
85 static void sf_buf_init(void *arg);
86 SYSINIT(sock_sf, SI_SUB_MBUF, SI_ORDER_ANY, sf_buf_init, NULL);
87
88 /*
89 * Expanded sf_freelist head. Really an SLIST_HEAD() in disguise, with the
90 * sf_freelist head with the sf_lock mutex.
91 */
92 static struct {
93 SLIST_HEAD(, sf_buf) sf_head;
94 struct mtx sf_lock;
95 } sf_freelist;
96
97 static u_int sf_buf_alloc_want;
98
99 /*
100 * Finish a fork operation, with process p2 nearly set up.
101 * Copy and update the pcb, set up the stack so that the child
102 * ready to run and return to user mode.
103 */
104 void
105 cpu_fork(register struct thread *td1,register struct proc *p2,
106 struct thread *td2,int flags)
107 {
108 register struct proc *p1;
109 struct pcb *pcb2;
110
111 p1 = td1->td_proc;
112 if ((flags & RFPROC) == 0)
113 return;
114 /* It is assumed that the vm_thread_alloc called
115 * cpu_thread_alloc() before cpu_fork is called.
116 */
117
118 /* Point the pcb to the top of the stack */
119 pcb2 = td2->td_pcb;
120
121 /* Copy p1's pcb, note that in this case
122 * our pcb also includes the td_frame being copied
123 * too. The older mips2 code did an additional copy
124 * of the td_frame, for us that's not needed any
125 * longer (this copy does them both)
126 */
127 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
128
129 /* Point mdproc and then copy over td1's contents
130 * md_proc is empty for MIPS
131 */
132 td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
133
134 /*
135 * Set up return-value registers as fork() libc stub expects.
136 */
137 td2->td_frame->v0 = 0;
138 td2->td_frame->v1 = 1;
139 td2->td_frame->a3 = 0;
140
141 if (td1 == PCPU_GET(fpcurthread))
142 MipsSaveCurFPState(td1);
143
144 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
145 /* Make sp 64-bit aligned */
146 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
147 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
148 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
149 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
150 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
151 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
152 (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
153 /*
154 * FREEBSD_DEVELOPERS_FIXME:
155 * Setup any other CPU-Specific registers (Not MIPS Standard)
156 * and/or bits in other standard MIPS registers (if CPU-Specific)
157 * that are needed.
158 */
159
160 td2->td_md.md_tls = td1->td_md.md_tls;
161 td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
162 td2->td_md.md_spinlock_count = 1;
163 #ifdef CPU_CNMIPS
164 pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
165 #endif
166 }
167
168 /*
169 * Intercept the return address from a freshly forked process that has NOT
170 * been scheduled yet.
171 *
172 * This is needed to make kernel threads stay in kernel mode.
173 */
174 void
175 cpu_set_fork_handler(struct thread *td, void (*func) __P((void *)), void *arg)
176 {
177 /*
178 * Note that the trap frame follows the args, so the function
179 * is really called like this: func(arg, frame);
180 */
181 td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
182 td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
183 }
184
185 void
186 cpu_exit(struct thread *td)
187 {
188 }
189
190 void
191 cpu_thread_exit(struct thread *td)
192 {
193
194 if (PCPU_GET(fpcurthread) == td)
195 PCPU_GET(fpcurthread) = (struct thread *)0;
196 }
197
198 void
199 cpu_thread_free(struct thread *td)
200 {
201 }
202
203 void
204 cpu_thread_clean(struct thread *td)
205 {
206 }
207
208 void
209 cpu_thread_swapin(struct thread *td)
210 {
211 pt_entry_t *pte;
212 int i;
213
214 /*
215 * The kstack may be at a different physical address now.
216 * Cache the PTEs for the Kernel stack in the machine dependent
217 * part of the thread struct so cpu_switch() can quickly map in
218 * the pcb struct and kernel stack.
219 */
220 for (i = 0; i < KSTACK_PAGES; i++) {
221 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
222 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
223 }
224 }
225
226 void
227 cpu_thread_swapout(struct thread *td)
228 {
229 }
230
231 void
232 cpu_thread_alloc(struct thread *td)
233 {
234 pt_entry_t *pte;
235 int i;
236
237 KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
238 td->td_pcb = (struct pcb *)(td->td_kstack +
239 td->td_kstack_pages * PAGE_SIZE) - 1;
240 td->td_frame = &td->td_pcb->pcb_regs;
241
242 for (i = 0; i < KSTACK_PAGES; i++) {
243 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
244 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
245 }
246 }
247
248 void
249 cpu_set_syscall_retval(struct thread *td, int error)
250 {
251 struct trapframe *locr0 = td->td_frame;
252 unsigned int code;
253 int quad_syscall;
254
255 code = locr0->v0;
256 quad_syscall = 0;
257 #if defined(__mips_o32)
258 if (code == SYS___syscall)
259 quad_syscall = 1;
260 #endif
261
262 if (code == SYS_syscall)
263 code = locr0->a0;
264 else if (code == SYS___syscall) {
265 if (quad_syscall)
266 code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
267 else
268 code = locr0->a0;
269 }
270
271 switch (error) {
272 case 0:
273 if (quad_syscall && code != SYS_lseek) {
274 /*
275 * System call invoked through the
276 * SYS___syscall interface but the
277 * return value is really just 32
278 * bits.
279 */
280 locr0->v0 = td->td_retval[0];
281 if (_QUAD_LOWWORD)
282 locr0->v1 = td->td_retval[0];
283 locr0->a3 = 0;
284 } else {
285 locr0->v0 = td->td_retval[0];
286 locr0->v1 = td->td_retval[1];
287 locr0->a3 = 0;
288 }
289 break;
290
291 case ERESTART:
292 locr0->pc = td->td_pcb->pcb_tpc;
293 break;
294
295 case EJUSTRETURN:
296 break; /* nothing to do */
297
298 default:
299 if (quad_syscall && code != SYS_lseek) {
300 locr0->v0 = error;
301 if (_QUAD_LOWWORD)
302 locr0->v1 = error;
303 locr0->a3 = 1;
304 } else {
305 locr0->v0 = error;
306 locr0->a3 = 1;
307 }
308 }
309 }
310
311 /*
312 * Initialize machine state (pcb and trap frame) for a new thread about to
313 * upcall. Put enough state in the new thread's PCB to get it to go back
314 * userret(), where we can intercept it again to set the return (upcall)
315 * Address and stack, along with those from upcalls that are from other sources
316 * such as those generated in thread_userret() itself.
317 */
318 void
319 cpu_set_upcall(struct thread *td, struct thread *td0)
320 {
321 struct pcb *pcb2;
322
323 /* Point the pcb to the top of the stack. */
324 pcb2 = td->td_pcb;
325
326 /*
327 * Copy the upcall pcb. This loads kernel regs.
328 * Those not loaded individually below get their default
329 * values here.
330 *
331 * XXXKSE It might be a good idea to simply skip this as
332 * the values of the other registers may be unimportant.
333 * This would remove any requirement for knowing the KSE
334 * at this time (see the matching comment below for
335 * more analysis) (need a good safe default).
336 * In MIPS, the trapframe is the first element of the PCB
337 * and gets copied when we copy the PCB. No separate copy
338 * is needed.
339 */
340 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
341
342 /*
343 * Set registers for trampoline to user mode.
344 */
345
346 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
347 /* Make sp 64-bit aligned */
348 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
349 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
350 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
351 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
352 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
353 /* Dont set IE bit in SR. sched lock release will take care of it */
354 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
355 (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
356
357 #ifdef CPU_CNMIPS
358 pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT |
359 MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
360 #endif
361
362 /*
363 * FREEBSD_DEVELOPERS_FIXME:
364 * Setup any other CPU-Specific registers (Not MIPS Standard)
365 * that are needed.
366 */
367
368 /* SMP Setup to release sched_lock in fork_exit(). */
369 td->td_md.md_spinlock_count = 1;
370 td->td_md.md_saved_intr = MIPS_SR_INT_IE;
371 #if 0
372 /* Maybe we need to fix this? */
373 td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
374 (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
375 (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
376 #endif
377 }
378
379 /*
380 * Set that machine state for performing an upcall that has to
381 * be done in thread_userret() so that those upcalls generated
382 * in thread_userret() itself can be done as well.
383 */
384 void
385 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
386 stack_t *stack)
387 {
388 struct trapframe *tf;
389 register_t sp;
390
391 /*
392 * At the point where a function is called, sp must be 8
393 * byte aligned[for compatibility with 64-bit CPUs]
394 * in ``See MIPS Run'' by D. Sweetman, p. 269
395 * align stack */
396 sp = ((register_t)(intptr_t)(stack->ss_sp + stack->ss_size) & ~0x7) -
397 CALLFRAME_SIZ;
398
399 /*
400 * Set the trap frame to point at the beginning of the uts
401 * function.
402 */
403 tf = td->td_frame;
404 bzero(tf, sizeof(struct trapframe));
405 tf->sp = sp;
406 tf->pc = (register_t)(intptr_t)entry;
407 /*
408 * MIPS ABI requires T9 to be the same as PC
409 * in subroutine entry point
410 */
411 tf->t9 = (register_t)(intptr_t)entry;
412 tf->a0 = (register_t)(intptr_t)arg;
413
414 /*
415 * Keep interrupt mask
416 */
417 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
418 (mips_rd_status() & MIPS_SR_INT_MASK);
419 #if defined(__mips_n32)
420 td->td_frame->sr |= MIPS_SR_PX;
421 #elif defined(__mips_n64)
422 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
423 #endif
424 #ifdef CPU_CNMIPS
425 tf->sr |= MIPS_SR_INT_IE | MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_UX |
426 MIPS_SR_KX;
427 #endif
428 /* tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
429 /**XXX the above may now be wrong -- mips2 implements this as panic */
430 /*
431 * FREEBSD_DEVELOPERS_FIXME:
432 * Setup any other CPU-Specific registers (Not MIPS Standard)
433 * that are needed.
434 */
435 }
436 /*
437 * Convert kernel VA to physical address
438 */
439 u_long
440 kvtop(void *addr)
441 {
442 vm_offset_t va;
443
444 va = pmap_kextract((vm_offset_t)addr);
445 if (va == 0)
446 panic("kvtop: zero page frame");
447 return((intptr_t)va);
448 }
449
450 /*
451 * Implement the pre-zeroed page mechanism.
452 * This routine is called from the idle loop.
453 */
454
455 #define ZIDLE_LO(v) ((v) * 2 / 3)
456 #define ZIDLE_HI(v) ((v) * 4 / 5)
457
458 /*
459 * Allocate a pool of sf_bufs (sendfile(2) or "super-fast" if you prefer. :-))
460 */
461 static void
462 sf_buf_init(void *arg)
463 {
464 struct sf_buf *sf_bufs;
465 vm_offset_t sf_base;
466 int i;
467
468 nsfbufs = NSFBUFS;
469 TUNABLE_INT_FETCH("kern.ipc.nsfbufs", &nsfbufs);
470
471 mtx_init(&sf_freelist.sf_lock, "sf_bufs list lock", NULL, MTX_DEF);
472 SLIST_INIT(&sf_freelist.sf_head);
473 sf_base = kmem_alloc_nofault(kernel_map, nsfbufs * PAGE_SIZE);
474 sf_bufs = malloc(nsfbufs * sizeof(struct sf_buf), M_TEMP,
475 M_NOWAIT | M_ZERO);
476 for (i = 0; i < nsfbufs; i++) {
477 sf_bufs[i].kva = sf_base + i * PAGE_SIZE;
478 SLIST_INSERT_HEAD(&sf_freelist.sf_head, &sf_bufs[i], free_list);
479 }
480 sf_buf_alloc_want = 0;
481 }
482
483 /*
484 * Get an sf_buf from the freelist. Will block if none are available.
485 */
486 struct sf_buf *
487 sf_buf_alloc(struct vm_page *m, int flags)
488 {
489 struct sf_buf *sf;
490 int error;
491
492 mtx_lock(&sf_freelist.sf_lock);
493 while ((sf = SLIST_FIRST(&sf_freelist.sf_head)) == NULL) {
494 if (flags & SFB_NOWAIT)
495 break;
496 sf_buf_alloc_want++;
497 mbstat.sf_allocwait++;
498 error = msleep(&sf_freelist, &sf_freelist.sf_lock,
499 (flags & SFB_CATCH) ? PCATCH | PVM : PVM, "sfbufa", 0);
500 sf_buf_alloc_want--;
501
502 /*
503 * If we got a signal, don't risk going back to sleep.
504 */
505 if (error)
506 break;
507 }
508 if (sf != NULL) {
509 SLIST_REMOVE_HEAD(&sf_freelist.sf_head, free_list);
510 sf->m = m;
511 nsfbufsused++;
512 nsfbufspeak = imax(nsfbufspeak, nsfbufsused);
513 pmap_qenter(sf->kva, &sf->m, 1);
514 }
515 mtx_unlock(&sf_freelist.sf_lock);
516 return (sf);
517 }
518
519 /*
520 * Release resources back to the system.
521 */
522 void
523 sf_buf_free(struct sf_buf *sf)
524 {
525
526 pmap_qremove(sf->kva, 1);
527 mtx_lock(&sf_freelist.sf_lock);
528 SLIST_INSERT_HEAD(&sf_freelist.sf_head, sf, free_list);
529 nsfbufsused--;
530 if (sf_buf_alloc_want > 0)
531 wakeup(&sf_freelist);
532 mtx_unlock(&sf_freelist.sf_lock);
533 }
534
535 /*
536 * Software interrupt handler for queued VM system processing.
537 */
538 void
539 swi_vm(void *dummy)
540 {
541 }
542
543 int
544 cpu_set_user_tls(struct thread *td, void *tls_base)
545 {
546
547 td->td_md.md_tls = tls_base;
548 return (0);
549 }
550
551 #ifdef DDB
552 #include <ddb/ddb.h>
553
554 #define DB_PRINT_REG(ptr, regname) \
555 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
556
557 #define DB_PRINT_REG_ARRAY(ptr, arrname, regname) \
558 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
559
560 static void
561 dump_trapframe(struct trapframe *trapframe)
562 {
563
564 db_printf("Trapframe at %p\n", trapframe);
565
566 DB_PRINT_REG(trapframe, zero);
567 DB_PRINT_REG(trapframe, ast);
568 DB_PRINT_REG(trapframe, v0);
569 DB_PRINT_REG(trapframe, v1);
570 DB_PRINT_REG(trapframe, a0);
571 DB_PRINT_REG(trapframe, a1);
572 DB_PRINT_REG(trapframe, a2);
573 DB_PRINT_REG(trapframe, a3);
574 DB_PRINT_REG(trapframe, t0);
575 DB_PRINT_REG(trapframe, t1);
576 DB_PRINT_REG(trapframe, t2);
577 DB_PRINT_REG(trapframe, t3);
578 DB_PRINT_REG(trapframe, t4);
579 DB_PRINT_REG(trapframe, t5);
580 DB_PRINT_REG(trapframe, t6);
581 DB_PRINT_REG(trapframe, t7);
582 DB_PRINT_REG(trapframe, s0);
583 DB_PRINT_REG(trapframe, s1);
584 DB_PRINT_REG(trapframe, s2);
585 DB_PRINT_REG(trapframe, s3);
586 DB_PRINT_REG(trapframe, s4);
587 DB_PRINT_REG(trapframe, s5);
588 DB_PRINT_REG(trapframe, s6);
589 DB_PRINT_REG(trapframe, s7);
590 DB_PRINT_REG(trapframe, t8);
591 DB_PRINT_REG(trapframe, t9);
592 DB_PRINT_REG(trapframe, k0);
593 DB_PRINT_REG(trapframe, k1);
594 DB_PRINT_REG(trapframe, gp);
595 DB_PRINT_REG(trapframe, sp);
596 DB_PRINT_REG(trapframe, s8);
597 DB_PRINT_REG(trapframe, ra);
598 DB_PRINT_REG(trapframe, sr);
599 DB_PRINT_REG(trapframe, mullo);
600 DB_PRINT_REG(trapframe, mulhi);
601 DB_PRINT_REG(trapframe, badvaddr);
602 DB_PRINT_REG(trapframe, cause);
603 DB_PRINT_REG(trapframe, pc);
604 }
605
606 DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
607 {
608 struct thread *td;
609 struct pcb *pcb;
610 struct trapframe *trapframe;
611
612 /* Determine which thread to examine. */
613 if (have_addr)
614 td = db_lookup_thread(addr, TRUE);
615 else
616 td = curthread;
617
618 pcb = td->td_pcb;
619
620 db_printf("Thread %d at %p\n", td->td_tid, td);
621
622 db_printf("PCB at %p\n", pcb);
623
624 trapframe = &pcb->pcb_regs;
625 dump_trapframe(trapframe);
626
627 db_printf("PCB Context:\n");
628 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
629 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
630 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
631 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
632 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
633 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
634 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
635 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
636 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
637 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
638 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
639 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
640 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
641 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
642
643 db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
644 db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
645 db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
646
647 if (td->td_frame != trapframe) {
648 db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
649 td->td_frame, trapframe);
650 }
651 }
652
653 /*
654 * Dump the trapframe beginning at address specified by first argument.
655 */
656 DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
657 {
658
659 if (!have_addr)
660 return;
661
662 dump_trapframe((struct trapframe *)addr);
663 }
664
665 #endif /* DDB */
Cache object: 4494d2d3205b522cecb04d1f4fd36353
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