The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/nlm/interrupt.h

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    1 /*-
    2  * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
    3  * reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions are
    7  * met:
    8  *
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in
   13  *    the documentation and/or other materials provided with the
   14  *    distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   19  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
   20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   26  * THE POSSIBILITY OF SUCH DAMAGE.
   27  *
   28  * NETLOGIC_BSD
   29  * $FreeBSD: releng/11.2/sys/mips/nlm/interrupt.h 331722 2018-03-29 02:50:57Z eadler $
   30  */
   31 
   32 #ifndef _RMI_INTERRUPT_H_
   33 #define _RMI_INTERRUPT_H_
   34 
   35 /* Defines for the IRQ numbers */
   36 
   37 #define IRQ_IPI                 41  /* 8-39 are used by PIC interrupts */
   38 #define IRQ_MSGRING             6
   39 #define IRQ_TIMER               7
   40 
   41 #define PIC_IRQ_BASE            8
   42 #define PIC_IRT_LAST_IRQ        39
   43 #define XLP_IRQ_IS_PICINTR(irq) ((irq) >= PIC_IRQ_BASE && \
   44                                     (irq) <= PIC_IRT_LAST_IRQ)
   45 
   46 #define PIC_UART_0_IRQ          17
   47 #define PIC_UART_1_IRQ          18
   48 
   49 #define PIC_PCIE_0_IRQ          19
   50 #define PIC_PCIE_1_IRQ          20
   51 #define PIC_PCIE_2_IRQ          21
   52 #define PIC_PCIE_3_IRQ          22
   53 #define PIC_PCIE_IRQ(l)         (PIC_PCIE_0_IRQ + (l))
   54 
   55 #define PIC_USB_0_IRQ           23
   56 #define PIC_USB_1_IRQ           24
   57 #define PIC_USB_2_IRQ           25
   58 #define PIC_USB_3_IRQ           26
   59 #define PIC_USB_4_IRQ           27
   60 #define PIC_USB_IRQ(n)          (PIC_USB_0_IRQ + (n))
   61 
   62 #define PIC_MMC_IRQ             29
   63 #define PIC_I2C_0_IRQ           30
   64 #define PIC_I2C_1_IRQ           31
   65 #define PIC_I2C_IRQ(n)          (PIC_I2C_0_IRQ + (n))
   66 
   67 /*
   68  * XLR needs custom pre and post handlers for PCI/PCI-e interrupts
   69  * XXX: maybe follow i386 intsrc model
   70  */
   71 void xlp_enable_irq(int irq);
   72 void xlp_set_bus_ack(int irq, void (*ack)(int, void *), void *arg);
   73 
   74 #endif                          /* _RMI_INTERRUPT_H_ */

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