1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
5 * reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * NETLOGIC_BSD */
31
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/bus.h>
38 #include <sys/interrupt.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41
42 #include <dev/ofw/ofw_bus.h>
43 #include <dev/ofw/ofw_bus_subr.h>
44
45 #include <machine/cpu.h>
46 #include <machine/cpufunc.h>
47 #include <machine/cpuinfo.h>
48 #include <machine/cpuregs.h>
49 #include <machine/frame.h>
50 #include <machine/intr_machdep.h>
51 #include <machine/md_var.h>
52 #include <machine/trap.h>
53 #include <machine/hwfunc.h>
54
55 #include <mips/nlm/hal/haldefs.h>
56 #include <mips/nlm/hal/iomap.h>
57 #include <mips/nlm/hal/mips-extns.h>
58 #include <mips/nlm/interrupt.h>
59 #include <mips/nlm/hal/pic.h>
60 #include <mips/nlm/xlp.h>
61
62 #define INTRCNT_COUNT 256
63 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
64
65 MALLOC_DECLARE(M_MIPSINTR);
66 MALLOC_DEFINE(M_MIPSINTR, "mipsintr", "MIPS interrupt handling");
67
68 u_long *intrcnt;
69 char *intrnames;
70 size_t sintrcnt;
71 size_t sintrnames;
72
73 struct xlp_intrsrc {
74 void (*bus_ack)(int, void *); /* Additional ack */
75 void *bus_ack_arg; /* arg for additional ack */
76 struct intr_event *ie; /* event corresponding to intr */
77 int irq;
78 int irt;
79 };
80
81 static struct xlp_intrsrc xlp_interrupts[XLR_MAX_INTR];
82 static mips_intrcnt_t mips_intr_counters[XLR_MAX_INTR];
83 static int intrcnt_index;
84
85 int
86 xlp_irq_to_irt(int irq)
87 {
88 uint32_t offset;
89
90 switch (irq) {
91 case PIC_UART_0_IRQ:
92 case PIC_UART_1_IRQ:
93 offset = XLP_IO_UART_OFFSET(0, irq - PIC_UART_0_IRQ);
94 return (xlp_socdev_irt(offset));
95 case PIC_PCIE_0_IRQ:
96 case PIC_PCIE_1_IRQ:
97 case PIC_PCIE_2_IRQ:
98 case PIC_PCIE_3_IRQ:
99 offset = XLP_IO_PCIE_OFFSET(0, irq - PIC_PCIE_0_IRQ);
100 return (xlp_socdev_irt(offset));
101 case PIC_USB_0_IRQ:
102 case PIC_USB_1_IRQ:
103 case PIC_USB_2_IRQ:
104 case PIC_USB_3_IRQ:
105 case PIC_USB_4_IRQ:
106 offset = XLP_IO_USB_OFFSET(0, irq - PIC_USB_0_IRQ);
107 return (xlp_socdev_irt(offset));
108 case PIC_I2C_0_IRQ:
109 case PIC_I2C_1_IRQ:
110 offset = XLP_IO_I2C0_OFFSET(0);
111 return (xlp_socdev_irt(offset) + irq - PIC_I2C_0_IRQ);
112 default:
113 printf("ERROR: %s: unknown irq %d\n", __func__, irq);
114 return (-1);
115 }
116 }
117
118 void
119 xlp_enable_irq(int irq)
120 {
121 uint64_t eimr;
122
123 eimr = nlm_read_c0_eimr();
124 nlm_write_c0_eimr(eimr | (1ULL << irq));
125 }
126
127 void
128 cpu_establish_softintr(const char *name, driver_filter_t * filt,
129 void (*handler) (void *), void *arg, int irq, int flags,
130 void **cookiep)
131 {
132
133 panic("Soft interrupts unsupported!\n");
134 }
135
136 static void
137 xlp_post_filter(void *source)
138 {
139 struct xlp_intrsrc *src = source;
140
141 if (src->bus_ack)
142 src->bus_ack(src->irq, src->bus_ack_arg);
143 nlm_pic_ack(xlp_pic_base, src->irt);
144 }
145
146 static void
147 xlp_pre_ithread(void *source)
148 {
149 struct xlp_intrsrc *src = source;
150
151 if (src->bus_ack)
152 src->bus_ack(src->irq, src->bus_ack_arg);
153 }
154
155 static void
156 xlp_post_ithread(void *source)
157 {
158 struct xlp_intrsrc *src = source;
159
160 nlm_pic_ack(xlp_pic_base, src->irt);
161 }
162
163 void
164 xlp_set_bus_ack(int irq, void (*ack)(int, void *), void *arg)
165 {
166 struct xlp_intrsrc *src;
167
168 KASSERT(irq > 0 && irq <= XLR_MAX_INTR,
169 ("%s called for bad hard intr %d", __func__, irq));
170
171 /* no locking needed - this will called early in boot */
172 src = &xlp_interrupts[irq];
173 KASSERT(src->ie != NULL,
174 ("%s called after IRQ enable for %d.", __func__, irq));
175 src->bus_ack_arg = arg;
176 src->bus_ack = ack;
177 }
178
179 void
180 cpu_establish_hardintr(const char *name, driver_filter_t * filt,
181 void (*handler) (void *), void *arg, int irq, int flags,
182 void **cookiep)
183 {
184 struct intr_event *ie; /* descriptor for the IRQ */
185 struct xlp_intrsrc *src = NULL;
186 int errcode;
187
188 KASSERT(irq > 0 && irq <= XLR_MAX_INTR ,
189 ("%s called for bad hard intr %d", __func__, irq));
190
191 /*
192 * Locking - not needed now, because we do this only on
193 * startup from CPU0
194 */
195 src = &xlp_interrupts[irq];
196 ie = src->ie;
197 if (ie == NULL) {
198 /*
199 * PIC based interrupts need ack in PIC, and some SoC
200 * components need additional acks (e.g. PCI)
201 */
202 if (XLP_IRQ_IS_PICINTR(irq))
203 errcode = intr_event_create(&ie, src, 0, irq,
204 xlp_pre_ithread, xlp_post_ithread, xlp_post_filter,
205 NULL, "hard intr%d:", irq);
206 else {
207 if (filt == NULL)
208 panic("Unsupported non filter percpu intr %d", irq);
209 errcode = intr_event_create(&ie, src, 0, irq,
210 NULL, NULL, NULL, NULL, "hard intr%d:", irq);
211 }
212 if (errcode) {
213 printf("Could not create event for intr %d\n", irq);
214 return;
215 }
216 src->irq = irq;
217 src->ie = ie;
218 }
219 if (XLP_IRQ_IS_PICINTR(irq)) {
220 /* Set all irqs to CPU 0 for now */
221 src->irt = xlp_irq_to_irt(irq);
222 nlm_pic_write_irt_direct(xlp_pic_base, src->irt, 1, 0,
223 PIC_LOCAL_SCHEDULING, irq, 0);
224 }
225
226 intr_event_add_handler(ie, name, filt, handler, arg,
227 intr_priority(flags), flags, cookiep);
228 xlp_enable_irq(irq);
229 }
230
231 void
232 cpu_intr(struct trapframe *tf)
233 {
234 struct intr_event *ie;
235 uint64_t eirr, eimr;
236 int i;
237
238 critical_enter();
239
240 /* find a list of enabled interrupts */
241 eirr = nlm_read_c0_eirr();
242 eimr = nlm_read_c0_eimr();
243 eirr &= eimr;
244
245 if (eirr == 0) {
246 critical_exit();
247 return;
248 }
249 /*
250 * No need to clear the EIRR here as the handler writes to
251 * compare which ACKs the interrupt.
252 */
253 if (eirr & (1 << IRQ_TIMER)) {
254 intr_event_handle(xlp_interrupts[IRQ_TIMER].ie, tf);
255 critical_exit();
256 return;
257 }
258
259 /* FIXME sched pin >? LOCK>? */
260 for (i = sizeof(eirr) * 8 - 1; i >= 0; i--) {
261 if ((eirr & (1ULL << i)) == 0)
262 continue;
263
264 ie = xlp_interrupts[i].ie;
265 /* Don't account special IRQs */
266 switch (i) {
267 case IRQ_IPI:
268 case IRQ_MSGRING:
269 break;
270 default:
271 mips_intrcnt_inc(mips_intr_counters[i]);
272 }
273
274 /* Ack the IRQ on the CPU */
275 nlm_write_c0_eirr(1ULL << i);
276 if (intr_event_handle(ie, tf) != 0) {
277 printf("stray interrupt %d\n", i);
278 }
279 }
280 critical_exit();
281 }
282
283 void
284 mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
285 {
286 int idx = counter - intrcnt;
287
288 KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
289
290 snprintf(intrnames + (MAXCOMLEN + 1) * idx,
291 MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
292 }
293
294 mips_intrcnt_t
295 mips_intrcnt_create(const char* name)
296 {
297 mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
298
299 mips_intrcnt_setname(counter, name);
300 return counter;
301 }
302
303 void
304 cpu_init_interrupts()
305 {
306 int i;
307 char name[MAXCOMLEN + 1];
308
309 intrcnt = mallocarray(INTRCNT_COUNT, sizeof(u_long), M_MIPSINTR,
310 M_WAITOK | M_ZERO);
311 intrnames = mallocarray(INTRCNT_COUNT, INTRNAME_LEN, M_MIPSINTR,
312 M_WAITOK | M_ZERO);
313 sintrcnt = INTRCNT_COUNT * sizeof(u_long);
314 sintrnames = INTRCNT_COUNT * INTRNAME_LEN;
315
316 /*
317 * Initialize all available vectors so spare IRQ
318 * would show up in systat output
319 */
320 for (i = 0; i < XLR_MAX_INTR; i++) {
321 snprintf(name, MAXCOMLEN + 1, "int%d:", i);
322 mips_intr_counters[i] = mips_intrcnt_create(name);
323 }
324 }
325
326 static int xlp_pic_probe(device_t);
327 static int xlp_pic_attach(device_t);
328
329 static int
330 xlp_pic_probe(device_t dev)
331 {
332
333 if (!ofw_bus_is_compatible(dev, "netlogic,xlp-pic"))
334 return (ENXIO);
335 device_set_desc(dev, "XLP PIC");
336 return (0);
337 }
338
339 static int
340 xlp_pic_attach(device_t dev)
341 {
342
343 return (0);
344 }
345
346 static device_method_t xlp_pic_methods[] = {
347 DEVMETHOD(device_probe, xlp_pic_probe),
348 DEVMETHOD(device_attach, xlp_pic_attach),
349
350 DEVMETHOD_END
351 };
352
353 static driver_t xlp_pic_driver = {
354 "xlp_pic",
355 xlp_pic_methods,
356 1, /* no softc */
357 };
358
359 static devclass_t xlp_pic_devclass;
360 DRIVER_MODULE(xlp_pic, simplebus, xlp_pic_driver, xlp_pic_devclass, 0, 0);
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