The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/mips/nlm/xlp.h

Version: -  FREEBSD  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-2  -  FREEBSD-11-1  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-4  -  FREEBSD-10-3  -  FREEBSD-10-2  -  FREEBSD-10-1  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-3  -  FREEBSD-9-2  -  FREEBSD-9-1  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-4  -  FREEBSD-8-3  -  FREEBSD-8-2  -  FREEBSD-8-1  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-4  -  FREEBSD-7-3  -  FREEBSD-7-2  -  FREEBSD-7-1  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-4  -  FREEBSD-6-3  -  FREEBSD-6-2  -  FREEBSD-6-1  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-5  -  FREEBSD-5-4  -  FREEBSD-5-3  -  FREEBSD-5-2  -  FREEBSD-5-1  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  linux-2.6  -  linux-2.4.22  -  MK83  -  MK84  -  PLAN9  -  DFBSD  -  NETBSD  -  NETBSD5  -  NETBSD4  -  NETBSD3  -  NETBSD20  -  OPENBSD  -  xnu-517  -  xnu-792  -  xnu-792.6.70  -  xnu-1228  -  xnu-1456.1.26  -  xnu-1699.24.8  -  xnu-2050.18.24  -  OPENSOLARIS  -  minix-3-1-1 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
    3  * reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions are
    7  * met:
    8  *
    9  * 1. Redistributions of source code must retain the above copyright
   10  *    notice, this list of conditions and the following disclaimer.
   11  * 2. Redistributions in binary form must reproduce the above copyright
   12  *    notice, this list of conditions and the following disclaimer in
   13  *    the documentation and/or other materials provided with the
   14  *    distribution.
   15  * 
   16  * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   19  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE 
   20  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
   26  * THE POSSIBILITY OF SUCH DAMAGE.
   27  *
   28  * NETLOGIC_BSD
   29  * $FreeBSD: stable/9/sys/mips/nlm/xlp.h 225394 2011-09-05 10:45:29Z jchandra $
   30  */
   31 
   32 #ifndef __NLM_XLP_H__
   33 #define __NLM_XLP_H__
   34 #include <mips/nlm/hal/pic.h>
   35 
   36 #define PIC_UART_0_IRQ  9
   37 #define PIC_UART_1_IRQ  10
   38 
   39 #define PIC_PCIE_0_IRQ  11
   40 #define PIC_PCIE_1_IRQ  12
   41 #define PIC_PCIE_2_IRQ  13
   42 #define PIC_PCIE_3_IRQ  14
   43 
   44 #define PIC_EHCI_0_IRQ  39 
   45 #define PIC_EHCI_1_IRQ  42 
   46 #define PIC_MMC_IRQ             43
   47 
   48 #ifndef LOCORE
   49 /*
   50  * FreeBSD can be started with few threads and cores turned off,
   51  * so have a hardware thread id to FreeBSD cpuid mapping.
   52  */
   53 extern int xlp_ncores;
   54 extern int xlp_threads_per_core;
   55 extern uint32_t xlp_hw_thread_mask;
   56 extern int xlp_cpuid_to_hwtid[];
   57 extern int xlp_hwtid_to_cpuid[];
   58 #ifdef SMP
   59 extern void xlp_enable_threads(int code);
   60 #endif
   61 
   62 static __inline__ int
   63 xlp_irt_to_irq(int irt)
   64 {
   65         switch (irt) {
   66                 case PIC_IRT_MMC_INDEX :
   67                         return PIC_MMC_IRQ;
   68                 case PIC_IRT_EHCI_0_INDEX :
   69                         return PIC_EHCI_0_IRQ;
   70                 case PIC_IRT_EHCI_1_INDEX :
   71                         return PIC_EHCI_1_IRQ;
   72                 case PIC_IRT_UART_0_INDEX :
   73                         return PIC_UART_0_IRQ;
   74                 case PIC_IRT_UART_1_INDEX :
   75                         return PIC_UART_1_IRQ;
   76                 case PIC_IRT_PCIE_LINK_0_INDEX :
   77                         return PIC_PCIE_0_IRQ;
   78                 case PIC_IRT_PCIE_LINK_1_INDEX :
   79                         return PIC_PCIE_1_IRQ;
   80                 case PIC_IRT_PCIE_LINK_2_INDEX :
   81                         return PIC_PCIE_2_IRQ;
   82                 case PIC_IRT_PCIE_LINK_3_INDEX :
   83                         return PIC_PCIE_3_IRQ;
   84                 default: panic("Bad IRT %d\n", irt);
   85         }
   86 }
   87 
   88 static __inline__ int
   89 xlp_irq_to_irt(int irq)
   90 {
   91         switch (irq) {
   92                 case PIC_MMC_IRQ :
   93                         return PIC_IRT_MMC_INDEX;
   94                 case PIC_EHCI_0_IRQ :
   95                         return PIC_IRT_EHCI_0_INDEX;
   96                 case PIC_EHCI_1_IRQ :
   97                         return PIC_IRT_EHCI_1_INDEX;
   98                 case PIC_UART_0_IRQ :
   99                         return PIC_IRT_UART_0_INDEX;
  100                 case PIC_UART_1_IRQ :
  101                         return PIC_IRT_UART_1_INDEX;
  102                 case PIC_PCIE_0_IRQ :
  103                         return PIC_IRT_PCIE_LINK_0_INDEX;
  104                 case PIC_PCIE_1_IRQ :
  105                         return PIC_IRT_PCIE_LINK_1_INDEX;
  106                 case PIC_PCIE_2_IRQ :
  107                         return PIC_IRT_PCIE_LINK_2_INDEX;
  108                 case PIC_PCIE_3_IRQ :
  109                         return PIC_IRT_PCIE_LINK_3_INDEX;
  110                 default: panic("Bad IRQ %d\n", irq);
  111         }
  112 }
  113 
  114 static __inline__ int
  115 xlp_irq_is_picintr(int irq)
  116 {
  117         switch (irq) {
  118                 case PIC_MMC_IRQ : return 1;
  119                 case PIC_EHCI_0_IRQ : return 1;
  120                 case PIC_EHCI_1_IRQ : return 1;
  121                 case PIC_UART_0_IRQ : return 1;
  122                 case PIC_UART_1_IRQ : return 1;
  123                 case PIC_PCIE_0_IRQ : return 1;
  124                 case PIC_PCIE_1_IRQ : return 1;
  125                 case PIC_PCIE_2_IRQ : return 1;
  126                 case PIC_PCIE_3_IRQ : return 1;
  127                 default: return 0;
  128         }
  129 }
  130 #endif /* LOCORE */
  131 #endif /* __NLM_XLP_H__ */

Cache object: 84afd982a3a0422496a9be9ce14a078d


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.