The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/mips/rmi/board.h

Version: -  FREEBSD  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-2  -  FREEBSD-11-1  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-4  -  FREEBSD-10-3  -  FREEBSD-10-2  -  FREEBSD-10-1  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-3  -  FREEBSD-9-2  -  FREEBSD-9-1  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-4  -  FREEBSD-8-3  -  FREEBSD-8-2  -  FREEBSD-8-1  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-4  -  FREEBSD-7-3  -  FREEBSD-7-2  -  FREEBSD-7-1  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-4  -  FREEBSD-6-3  -  FREEBSD-6-2  -  FREEBSD-6-1  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-5  -  FREEBSD-5-4  -  FREEBSD-5-3  -  FREEBSD-5-2  -  FREEBSD-5-1  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  linux-2.6  -  linux-2.4.22  -  MK83  -  MK84  -  PLAN9  -  DFBSD  -  NETBSD  -  NETBSD5  -  NETBSD4  -  NETBSD3  -  NETBSD20  -  OPENBSD  -  xnu-517  -  xnu-792  -  xnu-792.6.70  -  xnu-1228  -  xnu-1456.1.26  -  xnu-1699.24.8  -  xnu-2050.18.24  -  OPENSOLARIS  -  minix-3-1-1 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * Copyright (c) 2003-2009 RMI Corporation
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. Neither the name of RMI Corporation, nor the names of its contributors,
   14  *    may be used to endorse or promote products derived from this software
   15  *    without specific prior written permission.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * RMI_BSD
   30  * $FreeBSD: releng/8.4/sys/mips/rmi/board.h 215938 2010-11-27 12:26:40Z jchandra $
   31  */
   32 #ifndef _RMI_BOARD_H_
   33 #define _RMI_BOARD_H_
   34 
   35 /*
   36  * Engineering boards have a major/minor number in their EEPROM to 
   37  * identify their configuration
   38  */
   39 #define RMI_XLR_BOARD_ARIZONA_I         1
   40 #define RMI_XLR_BOARD_ARIZONA_II        2
   41 #define RMI_XLR_BOARD_ARIZONA_III       3
   42 #define RMI_XLR_BOARD_ARIZONA_IV        4
   43 #define RMI_XLR_BOARD_ARIZONA_V         5
   44 #define RMI_XLR_BOARD_ARIZONA_VI        6
   45 #define RMI_XLR_BOARD_ARIZONA_VII       7
   46 #define RMI_XLR_BOARD_ARIZONA_VIII      8
   47 #define RMI_XLR_BOARD_ARIZONA_XI        11
   48 #define RMI_XLR_BOARD_ARIZONA_XII       12
   49 
   50 /*
   51  * RMI Chips - Values in Processor ID field
   52  */
   53 #define RMI_CHIP_XLR732         0x00
   54 #define RMI_CHIP_XLR716         0x02
   55 #define RMI_CHIP_XLR308         0x06
   56 #define RMI_CHIP_XLR532         0x09
   57 
   58 /*
   59  * XLR C revisions
   60  */
   61 #define RMI_CHIP_XLR308_C       0x0F
   62 #define RMI_CHIP_XLR508_C       0x0b
   63 #define RMI_CHIP_XLR516_C       0x0a
   64 #define RMI_CHIP_XLR532_C       0x08
   65 
   66 /*
   67  * XLS processors
   68  */
   69 #define RMI_CHIP_XLS408         0x88  /* Lite "Condor" */
   70 #define RMI_CHIP_XLS608         0x80  /* Internal */
   71 #define RMI_CHIP_XLS404         0x8c  /* Lite "Condor" */
   72 #define RMI_CHIP_XLS208         0x8e
   73 #define RMI_CHIP_XLS204         0x8f
   74 #define RMI_CHIP_XLS108         0xce
   75 #define RMI_CHIP_XLS104         0xcf
   76 
   77 /*
   78  * XLS B revision chips
   79  */
   80 #define RMI_CHIP_XLS616_B0      0x40
   81 #define RMI_CHIP_XLS608_B0      0x4a
   82 #define RMI_CHIP_XLS416_B0      0x44
   83 #define RMI_CHIP_XLS412_B0      0x4c
   84 #define RMI_CHIP_XLS408_B0      0x4e
   85 #define RMI_CHIP_XLS404_B0      0x4f
   86 
   87 /* 
   88  * The XLS product line has chip versions 0x4x and 0x8x
   89  */
   90 static __inline unsigned int
   91 xlr_is_xls(void)
   92 {
   93         uint32_t prid = mips_rd_prid();
   94 
   95         return ((prid & 0xf000) == 0x8000 || (prid & 0xf000) == 0x4000 ||
   96             (prid & 0xf000) == 0xc000);
   97 }
   98 
   99 /*
  100  * The last byte of the processor id field is revision
  101  */
  102 static __inline unsigned int
  103 xlr_revision(void)
  104 {
  105 
  106         return (mips_rd_prid() & 0xff);
  107 }
  108 
  109 /*
  110  * The 15:8 byte of the PR Id register is the Processor ID
  111  */
  112 static __inline unsigned int
  113 xlr_processor_id(void)
  114 {
  115 
  116         return ((mips_rd_prid() & 0xff00) >> 8);
  117 }
  118 
  119 /*
  120  * The processor is XLR and C-Series
  121  */
  122 static __inline unsigned int
  123 xlr_is_c_revision(void)
  124 {
  125         int processor_id = xlr_processor_id();
  126         int revision_id  = xlr_revision();
  127 
  128         switch (processor_id) {
  129         /* 
  130          * These are the relevant PIDs for XLR
  131          * steppings (hawk and above). For these,
  132          * PIDs, Rev-Ids of [5-9] indicate 'C'.
  133          */
  134         case RMI_CHIP_XLR308_C:
  135         case RMI_CHIP_XLR508_C:
  136         case RMI_CHIP_XLR516_C:
  137         case RMI_CHIP_XLR532_C:
  138         case RMI_CHIP_XLR716:
  139         case RMI_CHIP_XLR732:
  140                 if (revision_id >= 5 && revision_id <= 9) 
  141                         return (1);
  142         default:
  143                 return (0);
  144         }
  145         return (0);
  146 }
  147 
  148 /*
  149  * RMI Engineering boards which are PCI cards
  150  * These should come up in PCI device mode (not yet)
  151  */
  152 static __inline int
  153 xlr_board_pci(int board_major)
  154 {
  155 
  156         return ((board_major == RMI_XLR_BOARD_ARIZONA_III) ||
  157                 (board_major == RMI_XLR_BOARD_ARIZONA_V));
  158 }
  159 
  160 static __inline int
  161 xlr_is_xls1xx(void)
  162 {
  163         uint32_t chipid = xlr_processor_id();
  164 
  165         return (chipid == 0xce || chipid == 0xcf);
  166 }
  167 
  168 static __inline int
  169 xlr_is_xls2xx(void)
  170 {
  171         uint32_t chipid = xlr_processor_id();
  172 
  173         return (chipid == 0x8e || chipid == 0x8f);
  174 }
  175 
  176 static __inline int
  177 xlr_is_xls4xx_lite(void)
  178 {
  179         uint32_t chipid = xlr_processor_id();
  180 
  181         return (chipid == 0x88 || chipid == 0x8c);
  182 }
  183 
  184 static __inline unsigned int
  185 xlr_is_xls_b0(void)
  186 {
  187         uint32_t chipid = xlr_processor_id();
  188 
  189         return (chipid >= 0x40 && chipid <= 0x4f);
  190 }
  191 
  192 /* SPI-4 --> 8 ports, 1G MAC --> 4 ports and 10G MAC --> 1 port */
  193 #define MAX_NA_PORTS            8
  194 
  195 /* all our knowledge of chip and board that cannot be detected run-time goes here */
  196 enum gmac_block_types { XLR_GMAC, XLR_XGMAC, XLR_SPI4};
  197 enum gmac_port_types  { XLR_RGMII, XLR_SGMII, XLR_PORT0_RGMII, XLR_XGMII, XLR_XAUI };
  198 
  199 struct xlr_board_info {
  200         int is_xls;
  201         int nr_cpus;
  202         int usb;                               /* usb enabled ? */
  203         int cfi;                               /* compact flash driver for NOR? */
  204         int ata;                               /* ata driver */
  205         int pci_irq;
  206         struct stn_cc **credit_configs;        /* pointer to Core station credits */
  207         struct bucket_size *bucket_sizes;      /* pointer to Core station bucket */
  208         int *msgmap;                           /* mapping of message station to devices */
  209         int gmacports;                         /* number of gmac ports on the board */
  210         struct xlr_gmac_block_t {              /* refers to the set of GMACs controlled by a 
  211                                                   network accelarator */
  212                 int  type;                     /* see  enum gmac_block_types */
  213                 unsigned int enabled;          /* mask of ports enabled */   
  214                 struct stn_cc *credit_config;  /* credit configuration */
  215                 int station_id;                /* station id for sending msgs */
  216                 int station_txbase;            /* station id for tx */
  217                 int station_rfr;               /* free desc bucket */
  218                 int  mode;                     /* see gmac_block_modes */
  219                 uint32_t baseaddr;             /* IO base */
  220                 int baseirq;        /* first irq for this block, the rest are in sequence */
  221                 int baseinst;       /* the first rge unit for this block */
  222                 int num_ports;
  223                 struct xlr_gmac_port {
  224                         int valid;
  225                         int type;               /* see enum gmac_port_types */
  226                         uint32_t instance;      /* identifies the GMAC to which
  227                                                    this port is bound to. */
  228                         uint32_t phy_addr;
  229                         uint32_t base_addr;
  230                         uint32_t mii_addr;
  231                         uint32_t pcs_addr;
  232                         uint32_t serdes_addr;
  233                         uint32_t tx_bucket_id;
  234                         uint32_t mdint_id;
  235                 } gmac_port[MAX_NA_PORTS];
  236         } gmac_block [3];
  237 };
  238 
  239 extern struct xlr_board_info xlr_board_info;
  240 int xlr_board_info_setup(void);
  241 
  242 #endif

Cache object: 3b3be8133ad133545a63fe643c21d463


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.