The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/mips/rmi/iomap.h

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    1 /*-
    2  * Copyright (c) 2003-2009 RMI Corporation
    3  * All rights reserved.
    4  *
    5  * Redistribution and use in source and binary forms, with or without
    6  * modification, are permitted provided that the following conditions
    7  * are met:
    8  * 1. Redistributions of source code must retain the above copyright
    9  *    notice, this list of conditions and the following disclaimer.
   10  * 2. Redistributions in binary form must reproduce the above copyright
   11  *    notice, this list of conditions and the following disclaimer in the
   12  *    documentation and/or other materials provided with the distribution.
   13  * 3. Neither the name of RMI Corporation, nor the names of its contributors,
   14  *    may be used to endorse or promote products derived from this software
   15  *    without specific prior written permission.
   16  *
   17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27  * SUCH DAMAGE.
   28  *
   29  * RMI_BSD
   30  * $FreeBSD: releng/8.4/sys/mips/rmi/iomap.h 215938 2010-11-27 12:26:40Z jchandra $
   31  */
   32 #ifndef _RMI_IOMAP_H_
   33 #define _RMI_IOMAP_H_
   34 
   35 #include <machine/endian.h>
   36 #define XLR_DEVICE_REGISTER_BASE        0x1EF00000
   37 #define DEFAULT_XLR_IO_BASE 0xffffffffbef00000ULL
   38 #define XLR_IO_SIZE                   0x1000
   39 
   40 #define XLR_IO_BRIDGE_OFFSET          0x00000
   41 
   42 #define XLR_IO_DDR2_CHN0_OFFSET       0x01000
   43 #define XLR_IO_DDR2_CHN1_OFFSET       0x02000
   44 #define XLR_IO_DDR2_CHN2_OFFSET       0x03000
   45 #define XLR_IO_DDR2_CHN3_OFFSET       0x04000
   46 
   47 #define XLR_IO_RLD2_CHN0_OFFSET       0x05000
   48 #define XLR_IO_RLD2_CHN1_OFFSET       0x06000
   49 
   50 #define XLR_IO_SRAM_OFFSET            0x07000
   51 
   52 #define XLR_IO_PIC_OFFSET             0x08000
   53 #define XLR_IO_PCIX_OFFSET            0x09000
   54 #define XLR_IO_HT_OFFSET              0x0A000
   55 
   56 #define XLR_IO_SECURITY_OFFSET        0x0B000
   57 
   58 #define XLR_IO_GMAC_0_OFFSET          0x0C000
   59 #define XLR_IO_GMAC_1_OFFSET          0x0D000
   60 #define XLR_IO_GMAC_2_OFFSET          0x0E000
   61 #define XLR_IO_GMAC_3_OFFSET          0x0F000
   62 
   63 #define XLR_IO_SPI4_0_OFFSET          0x10000
   64 #define XLR_IO_XGMAC_0_OFFSET         0x11000
   65 #define XLR_IO_SPI4_1_OFFSET          0x12000
   66 #define XLR_IO_XGMAC_1_OFFSET         0x13000
   67 
   68 #define XLR_IO_UART_0_OFFSET          0x14000
   69 #define XLR_IO_UART_1_OFFSET          0x15000
   70 #define XLR_UART0ADDR                 (XLR_IO_UART_0_OFFSET+XLR_DEVICE_REGISTER_BASE)
   71 
   72 
   73 
   74 #define XLR_IO_I2C_0_OFFSET           0x16000
   75 #define XLR_IO_I2C_1_OFFSET           0x17000
   76 
   77 #define XLR_IO_GPIO_OFFSET            0x18000
   78 
   79 #define XLR_IO_FLASH_OFFSET           0x19000
   80 
   81 #define XLR_IO_TB_OFFSET                  0x1C000
   82 
   83 #define XLR_IO_GMAC_4_OFFSET          0x20000
   84 #define XLR_IO_GMAC_5_OFFSET          0x21000
   85 #define XLR_IO_GMAC_6_OFFSET          0x22000
   86 #define XLR_IO_GMAC_7_OFFSET          0x23000
   87 
   88 #define XLR_IO_PCIE_0_OFFSET          0x1E000
   89 #define XLR_IO_PCIE_1_OFFSET          0x1F000
   90 
   91 #define XLR_IO_USB_0_OFFSET           0x24000
   92 #define XLR_IO_USB_1_OFFSET           0x25000
   93 
   94 #define XLR_IO_COMP_OFFSET            0x1d000
   95 
   96 /* Base Address (Virtual) of the PCI Config address space
   97  * For now, choose 256M phys in kseg1 = 0xA0000000 + (1<<28)
   98  * Config space spans 256 (num of buses) * 256 (num functions) * 256 bytes
   99  * ie 1<<24 = 16M
  100  */
  101 #define DEFAULT_PCI_CONFIG_BASE         0x18000000
  102 #define DEFAULT_HT_TYPE0_CFG_BASE       0x16000000
  103 #define DEFAULT_HT_TYPE1_CFG_BASE       0x17000000
  104 
  105 typedef volatile __uint32_t xlr_reg_t;
  106 extern unsigned long xlr_io_base;
  107 
  108 #define xlr_io_mmio(offset) ((xlr_reg_t *)(xlr_io_base+(offset)))
  109 
  110 #define xlr_read_reg(base, offset) (__ntohl((base)[(offset)]))
  111 #define xlr_write_reg(base, offset, value) ((base)[(offset)] = __htonl((value)))
  112 
  113 extern void on_chip_init(void);
  114 
  115 #endif                          /* _RMI_IOMAP_H_ */

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