The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/netisdn/i4b_l2fsm.c

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10 

    1 /*
    2  * Copyright (c) 1997, 2000 Hellmuth Michaelis. All rights reserved.
    3  *
    4  * Redistribution and use in source and binary forms, with or without
    5  * modification, are permitted provided that the following conditions
    6  * are met:
    7  * 1. Redistributions of source code must retain the above copyright
    8  *    notice, this list of conditions and the following disclaimer.
    9  * 2. Redistributions in binary form must reproduce the above copyright
   10  *    notice, this list of conditions and the following disclaimer in the
   11  *    documentation and/or other materials provided with the distribution.
   12  *
   13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23  * SUCH DAMAGE.
   24  *
   25  *---------------------------------------------------------------------------
   26  *
   27  *      i4b_l2fsm.c - layer 2 FSM
   28  *      -------------------------
   29  *
   30  *      $Id: i4b_l2fsm.c,v 1.6 2002/09/27 15:37:55 provos Exp $ 
   31  *
   32  * $FreeBSD$
   33  *
   34  *      last edit-date: [Fri Jan  5 11:33:47 2001]
   35  *
   36  *---------------------------------------------------------------------------*/
   37 
   38 #include <sys/cdefs.h>
   39 __KERNEL_RCSID(0, "$NetBSD: i4b_l2fsm.c,v 1.6 2002/09/27 15:37:55 provos Exp $");
   40 
   41 #ifdef __FreeBSD__
   42 #include "i4bq921.h"
   43 #else
   44 #define NI4BQ921        1
   45 #endif
   46 #if NI4BQ921 > 0
   47 
   48 #include <sys/param.h>
   49 #include <sys/kernel.h>
   50 #include <sys/systm.h>
   51 #include <sys/mbuf.h>
   52 #include <sys/socket.h>
   53 #include <net/if.h>
   54 
   55 #if defined(__NetBSD__) && __NetBSD_Version__ >= 104230000
   56 #include <sys/callout.h>
   57 #endif
   58 
   59 #ifdef __FreeBSD__
   60 #include <machine/i4b_debug.h>
   61 #include <machine/i4b_ioctl.h>
   62 #else
   63 #include <netisdn/i4b_debug.h>
   64 #include <netisdn/i4b_ioctl.h>
   65 #endif
   66 
   67 #include <netisdn/i4b_global.h>
   68 #include <netisdn/i4b_l2.h>
   69 #include <netisdn/i4b_l1l2.h>
   70 #include <netisdn/i4b_isdnq931.h>
   71 #include <netisdn/i4b_mbuf.h>
   72 
   73 #include <netisdn/i4b_l2.h>
   74 #include <netisdn/i4b_l2fsm.h>
   75 
   76 
   77 #if DO_I4B_DEBUG
   78 static char *l2state_text[N_STATES] = {
   79         "ST_TEI_UNAS",
   80         "ST_ASG_AW_TEI",
   81         "ST_EST_AW_TEI",
   82         "ST_TEI_ASGD",
   83 
   84         "ST_AW_EST",
   85         "ST_AW_REL",
   86         "ST_MULTIFR",
   87         "ST_TIMREC",
   88 
   89         "ST_SUBSET",
   90         "Illegal State"
   91 };
   92 
   93 static char *l2event_text[N_EVENTS] = {
   94         "EV_DLESTRQ",
   95         "EV_DLUDTRQ",
   96         "EV_MDASGRQ",
   97         "EV_MDERRRS",
   98         "EV_PSDEACT",
   99         "EV_MDREMRQ",
  100         "EV_RXSABME",
  101         "EV_RXDISC",
  102         "EV_RXUA",
  103         "EV_RXDM",
  104         "EV_T200EXP",
  105         "EV_DLDATRQ",
  106         "EV_DLRELRQ",
  107         "EV_T203EXP",
  108         "EV_OWNBUSY",
  109         "EV_OWNRDY", 
  110         "EV_RXRR",
  111         "EV_RXREJ",
  112         "EV_RXRNR",
  113         "EV_RXFRMR",
  114         "Illegal Event"
  115 };
  116 #endif
  117 
  118 static void F_TU01 __P((l2_softc_t *, struct isdn_l3_driver *));
  119 static void F_TU03 __P((l2_softc_t *, struct isdn_l3_driver *));
  120 
  121 static void F_TA03 __P((l2_softc_t *, struct isdn_l3_driver *));
  122 static void F_TA04 __P((l2_softc_t *, struct isdn_l3_driver *));
  123 static void F_TA05 __P((l2_softc_t *, struct isdn_l3_driver *));
  124 
  125 static void F_TE03 __P((l2_softc_t *, struct isdn_l3_driver *));
  126 static void F_TE04 __P((l2_softc_t *, struct isdn_l3_driver *));
  127 static void F_TE05 __P((l2_softc_t *, struct isdn_l3_driver *));
  128 
  129 static void F_T01 __P((l2_softc_t *, struct isdn_l3_driver *));
  130 static void F_T05 __P((l2_softc_t *, struct isdn_l3_driver *));
  131 static void F_T06 __P((l2_softc_t *, struct isdn_l3_driver *));
  132 static void F_T07 __P((l2_softc_t *, struct isdn_l3_driver *));
  133 static void F_T08 __P((l2_softc_t *, struct isdn_l3_driver *));
  134 static void F_T09 __P((l2_softc_t *, struct isdn_l3_driver *));
  135 static void F_T10 __P((l2_softc_t *, struct isdn_l3_driver *));
  136 static void F_T13 __P((l2_softc_t *, struct isdn_l3_driver *));
  137 
  138 static void F_AE01 __P((l2_softc_t *, struct isdn_l3_driver *));
  139 static void F_AE05 __P((l2_softc_t *, struct isdn_l3_driver *));
  140 static void F_AE06 __P((l2_softc_t *, struct isdn_l3_driver *));
  141 static void F_AE07 __P((l2_softc_t *, struct isdn_l3_driver *));
  142 static void F_AE08 __P((l2_softc_t *, struct isdn_l3_driver *));
  143 static void F_AE09 __P((l2_softc_t *, struct isdn_l3_driver *));
  144 static void F_AE10 __P((l2_softc_t *, struct isdn_l3_driver *));
  145 static void F_AE11 __P((l2_softc_t *, struct isdn_l3_driver *));
  146 static void F_AE12 __P((l2_softc_t *, struct isdn_l3_driver *));
  147 
  148 static void F_AR05 __P((l2_softc_t *, struct isdn_l3_driver *));
  149 static void F_AR06 __P((l2_softc_t *, struct isdn_l3_driver *));
  150 static void F_AR07 __P((l2_softc_t *, struct isdn_l3_driver *));
  151 static void F_AR08 __P((l2_softc_t *, struct isdn_l3_driver *));
  152 static void F_AR09 __P((l2_softc_t *, struct isdn_l3_driver *));
  153 static void F_AR10 __P((l2_softc_t *, struct isdn_l3_driver *));
  154 static void F_AR11 __P((l2_softc_t *, struct isdn_l3_driver *));
  155 
  156 static void F_MF01 __P((l2_softc_t *, struct isdn_l3_driver *));
  157 static void F_MF05 __P((l2_softc_t *, struct isdn_l3_driver *));
  158 static void F_MF06 __P((l2_softc_t *, struct isdn_l3_driver *));
  159 static void F_MF07 __P((l2_softc_t *, struct isdn_l3_driver *));
  160 static void F_MF08 __P((l2_softc_t *, struct isdn_l3_driver *));
  161 static void F_MF09 __P((l2_softc_t *, struct isdn_l3_driver *));
  162 static void F_MF10 __P((l2_softc_t *, struct isdn_l3_driver *));
  163 static void F_MF11 __P((l2_softc_t *, struct isdn_l3_driver *));
  164 static void F_MF12 __P((l2_softc_t *, struct isdn_l3_driver *));
  165 static void F_MF13 __P((l2_softc_t *, struct isdn_l3_driver *));
  166 static void F_MF14 __P((l2_softc_t *, struct isdn_l3_driver *));
  167 static void F_MF15 __P((l2_softc_t *, struct isdn_l3_driver *));
  168 static void F_MF16 __P((l2_softc_t *, struct isdn_l3_driver *));
  169 static void F_MF17 __P((l2_softc_t *, struct isdn_l3_driver *));
  170 static void F_MF18 __P((l2_softc_t *, struct isdn_l3_driver *));
  171 static void F_MF19 __P((l2_softc_t *, struct isdn_l3_driver *));
  172 static void F_MF20 __P((l2_softc_t *, struct isdn_l3_driver *));
  173 
  174 static void F_TR01 __P((l2_softc_t *, struct isdn_l3_driver *));
  175 static void F_TR05 __P((l2_softc_t *, struct isdn_l3_driver *));
  176 static void F_TR06 __P((l2_softc_t *, struct isdn_l3_driver *));
  177 static void F_TR07 __P((l2_softc_t *, struct isdn_l3_driver *));
  178 static void F_TR08 __P((l2_softc_t *, struct isdn_l3_driver *));
  179 static void F_TR09 __P((l2_softc_t *, struct isdn_l3_driver *));
  180 static void F_TR10 __P((l2_softc_t *, struct isdn_l3_driver *));
  181 static void F_TR11 __P((l2_softc_t *, struct isdn_l3_driver *));
  182 static void F_TR12 __P((l2_softc_t *, struct isdn_l3_driver *));
  183 static void F_TR13 __P((l2_softc_t *, struct isdn_l3_driver *));
  184 static void F_TR15 __P((l2_softc_t *, struct isdn_l3_driver *));
  185 static void F_TR16 __P((l2_softc_t *, struct isdn_l3_driver *));
  186 static void F_TR17 __P((l2_softc_t *, struct isdn_l3_driver *));
  187 static void F_TR18 __P((l2_softc_t *, struct isdn_l3_driver *));
  188 static void F_TR19 __P((l2_softc_t *, struct isdn_l3_driver *));
  189 static void F_TR20 __P((l2_softc_t *, struct isdn_l3_driver *));
  190 static void F_ILL __P((l2_softc_t *, struct isdn_l3_driver *));
  191 static void F_NCNA __P((l2_softc_t *, struct isdn_l3_driver *));
  192 
  193 /*---------------------------------------------------------------------------*
  194  *      FSM illegal state default action
  195  *---------------------------------------------------------------------------*/ 
  196 static void
  197 F_ILL(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  198 {
  199         NDBGL2(L2_F_ERR, "FSM function F_ILL executing");
  200 }
  201 
  202 /*---------------------------------------------------------------------------*
  203  *      FSM No change, No action
  204  *---------------------------------------------------------------------------*/ 
  205 static void
  206 F_NCNA(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  207 {
  208         NDBGL2(L2_F_MSG, "FSM function F_NCNA executing");
  209 }
  210 
  211 /*---------------------------------------------------------------------------*
  212  *      layer 2 state transition table
  213  *---------------------------------------------------------------------------*/ 
  214 struct l2state_tab {
  215         void (*func) __P((l2_softc_t *, struct isdn_l3_driver *));      /* function to execute */
  216         int newstate;                           /* next state */
  217 } l2state_tab[N_EVENTS][N_STATES] = {
  218 
  219 /* STATE:       ST_TEI_UNAS,                    ST_ASG_AW_TEI,                  ST_EST_AW_TEI,                  ST_TEI_ASGD,            ST_AW_EST,              ST_AW_REL,              ST_MULTIFR,             ST_TIMREC,              ST_SUBSET,              ILLEGAL STATE   */
  220 /* -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
  221 /*EV_DLESTRQ*/{ {F_TU01, ST_EST_AW_TEI},        {F_NCNA, ST_EST_AW_TEI},        {F_ILL, ST_ILL},                {F_T01, ST_AW_EST},     {F_AE01, ST_AW_EST},    {F_ILL, ST_ILL},        {F_MF01, ST_AW_EST},    {F_TR01, ST_AW_EST},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  222 /*EV_DLUDTRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  223 /*EV_MDASGRQ*/{ {F_TU03, ST_TEI_ASGD},          {F_TA03, ST_TEI_ASGD},          {F_TE03, ST_AW_EST},            {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  224 /*EV_MDERRRS*/{ {F_ILL, ST_ILL},                {F_TA04, ST_TEI_UNAS},          {F_TE04, ST_TEI_UNAS},          {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  225 /*EV_PSDEACT*/{ {F_ILL, ST_ILL},                {F_TA05, ST_TEI_UNAS},          {F_TE05, ST_TEI_UNAS},          {F_T05, ST_TEI_ASGD},   {F_AE05, ST_TEI_ASGD},  {F_AR05, ST_TEI_ASGD},  {F_MF05, ST_TEI_ASGD},  {F_TR05, ST_TEI_ASGD},  {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  226 /*EV_MDREMRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T06, ST_TEI_UNAS},   {F_AE06, ST_TEI_UNAS},  {F_AR06, ST_TEI_UNAS},  {F_MF06, ST_TEI_UNAS},  {F_TR06, ST_TEI_UNAS},  {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  227 /*EV_RXSABME*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T07, ST_SUBSET},     {F_AE07, ST_AW_EST},    {F_AR07, ST_AW_REL},    {F_MF07, ST_MULTIFR},   {F_TR07, ST_MULTIFR},   {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  228 /*EV_RXDISC */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T08, ST_TEI_ASGD},   {F_AE08, ST_AW_EST},    {F_AR08, ST_AW_REL},    {F_MF08, ST_TEI_ASGD},  {F_TR08, ST_TEI_ASGD},  {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  229 /*EV_RXUA   */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T09, ST_TEI_ASGD},   {F_AE09, ST_SUBSET},    {F_AR09, ST_SUBSET},    {F_MF09, ST_MULTIFR},   {F_TR09, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  230 /*EV_RXDM   */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T10, ST_SUBSET},     {F_AE10, ST_SUBSET},    {F_AR10, ST_SUBSET},    {F_MF10, ST_SUBSET},    {F_TR10, ST_AW_EST},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  231 /*EV_T200EXP*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_AE11, ST_SUBSET},    {F_AR11, ST_SUBSET},    {F_MF11, ST_TIMREC},    {F_TR11, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  232 /*EV_DLDATRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_AE12, ST_AW_EST},    {F_ILL, ST_ILL},        {F_MF12, ST_MULTIFR},   {F_TR12, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  233 /*EV_DLRELRQ*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_T13, ST_TEI_ASGD},   {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF13, ST_AW_REL},    {F_TR13, ST_AW_REL},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  234 /*EV_T203EXP*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF14, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  235 /*EV_OWNBUSY*/{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF15, ST_MULTIFR},   {F_TR15, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  236 /*EV_OWNRDY */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF16, ST_MULTIFR},   {F_TR16, ST_TIMREC},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  237 /*EV_RXRR   */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF17, ST_SUBSET},    {F_TR17, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  238 /*EV_RXREJ  */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF18, ST_SUBSET},    {F_TR18, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  239 /*EV_RXRNR  */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF19, ST_SUBSET},    {F_TR19, ST_SUBSET},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  240 /*EV_RXFRMR */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_MF20, ST_AW_EST},    {F_TR20, ST_AW_EST},    {F_ILL, ST_ILL},        {F_ILL, ST_ILL} },
  241 /*EV_ILL    */{ {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},                {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL},        {F_ILL, ST_ILL} }
  242 };
  243 
  244 /*---------------------------------------------------------------------------*
  245  *      event handler, executes function and sets new state
  246  *---------------------------------------------------------------------------*/ 
  247 void i4b_next_l2state(l2_softc_t *l2sc, struct isdn_l3_driver *drv, int event)
  248 {
  249         int currstate, newstate;
  250         int (*savpostfsmfunc)(struct isdn_l3_driver *) = NULL;
  251 
  252         /* check event number */
  253         if(event > N_EVENTS)
  254                 panic("i4b_l2fsm.c: event > N_EVENTS");
  255 
  256         /* get current state and check it */
  257         if((currstate = l2sc->Q921_state) > N_STATES)   /* failsafe */
  258                 panic("i4b_l2fsm.c: currstate > N_STATES");     
  259 
  260         /* get new state and check it */
  261         if((newstate = l2state_tab[event][currstate].newstate) > N_STATES)
  262                 panic("i4b_l2fsm.c: newstate > N_STATES");      
  263         
  264         
  265         if(newstate != ST_SUBSET)
  266         {       /* state function does NOT set new state */
  267                 NDBGL2(L2_F_MSG, "FSM event [%s]: [%s/%d => %s/%d]",
  268                                 l2event_text[event],
  269                                 l2state_text[currstate], currstate,
  270                                 l2state_text[newstate], newstate);
  271         }
  272 
  273         /* execute state transition function */
  274         (*l2state_tab[event][currstate].func)(l2sc, drv);
  275 
  276         if(newstate == ST_SUBSET)
  277         {       /* state function DOES set new state */
  278                 NDBGL2(L2_F_MSG, "FSM S-event [%s]: [%s => %s]", l2event_text[event],
  279                                            l2state_text[currstate],
  280                                            l2state_text[l2sc->Q921_state]);
  281         }
  282         
  283         /* check for illegal new state */
  284 
  285         if(newstate == ST_ILL)
  286         {
  287                 newstate = currstate;
  288                 NDBGL2(L2_F_ERR, "FSM illegal state, state = %s, event = %s!",
  289                                 l2state_text[currstate],
  290                                 l2event_text[event]);
  291         }
  292 
  293         /* check if state machine function has to set new state */
  294 
  295         if(newstate != ST_SUBSET)
  296                 l2sc->Q921_state = newstate;        /* no, we set new state */
  297 
  298         if(l2sc->postfsmfunc != NULL)
  299         {
  300                 NDBGL2(L2_F_MSG, "FSM executing postfsmfunc!");
  301                 /* try to avoid an endless loop */
  302                 savpostfsmfunc = l2sc->postfsmfunc;
  303                 l2sc->postfsmfunc = NULL;
  304                 (*savpostfsmfunc)(l2sc->postfsmarg);
  305         }
  306 }
  307 
  308 #if DO_I4B_DEBUG
  309 /*---------------------------------------------------------------------------*
  310  *      return pointer to current state description
  311  *---------------------------------------------------------------------------*/ 
  312 char *i4b_print_l2state(l2_softc_t *l2sc)
  313 {
  314         return((char *) l2state_text[l2sc->Q921_state]);
  315 }
  316 #endif
  317 
  318 /*---------------------------------------------------------------------------*
  319  *      FSM state ST_TEI_UNAS event dl establish request
  320  *---------------------------------------------------------------------------*/ 
  321 static void
  322 F_TU01(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  323 {
  324         NDBGL2(L2_F_MSG, "FSM function F_TU01 executing");
  325         i4b_mdl_assign_ind(l2sc);
  326 }
  327 
  328 /*---------------------------------------------------------------------------*
  329  *      FSM state ST_TEI_UNAS event mdl assign request
  330  *---------------------------------------------------------------------------*/ 
  331 static void
  332 F_TU03(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  333 {
  334         NDBGL2(L2_F_MSG, "FSM function F_TU03 executing");
  335 }
  336 
  337 /*---------------------------------------------------------------------------*
  338  *      FSM state ST_ASG_AW_TEI event mdl assign request
  339  *---------------------------------------------------------------------------*/ 
  340 static void
  341 F_TA03(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  342 {
  343         NDBGL2(L2_F_MSG, "FSM function F_TA03 executing");
  344 }
  345 
  346 /*---------------------------------------------------------------------------*
  347  *      FSM state ST_ASG_AW_TEI event mdl error response
  348  *---------------------------------------------------------------------------*/ 
  349 static void
  350 F_TA04(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  351 {
  352         NDBGL2(L2_F_MSG, "FSM function F_TA04 executing");
  353 }
  354 
  355 /*---------------------------------------------------------------------------*
  356  *      FSM state ST_ASG_AW_TEI event persistent deactivation
  357  *---------------------------------------------------------------------------*/ 
  358 static void
  359 F_TA05(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  360 {
  361         NDBGL2(L2_F_MSG, "FSM function F_TA05 executing");
  362 }
  363 
  364 /*---------------------------------------------------------------------------*
  365  *      FSM state ST_EST_AW_TEI event mdl assign request
  366  *---------------------------------------------------------------------------*/ 
  367 static void
  368 F_TE03(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  369 {
  370         NDBGL2(L2_F_MSG, "FSM function F_TE03 executing");
  371         i4b_establish_data_link(l2sc);
  372         l2sc->l3initiated = 1;
  373 }
  374 
  375 /*---------------------------------------------------------------------------*
  376  *      FSM state ST_EST_AW_TEI event mdl error response
  377  *---------------------------------------------------------------------------*/ 
  378 static void
  379 F_TE04(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  380 {
  381         NDBGL2(L2_F_MSG, "FSM function F_TE04 executing");
  382         l2sc->postfsmarg = l2sc->drv;
  383         l2sc->postfsmfunc = i4b_dl_release_ind;
  384 }
  385 
  386 /*---------------------------------------------------------------------------*
  387  *      FSM state ST_EST_AW_TEI event persistent deactivation
  388  *---------------------------------------------------------------------------*/ 
  389 static void
  390 F_TE05(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  391 {
  392         NDBGL2(L2_F_MSG, "FSM function F_TE05 executing");
  393         l2sc->postfsmarg = l2sc->drv;
  394         l2sc->postfsmfunc = i4b_dl_release_ind;
  395 }
  396 
  397 /*---------------------------------------------------------------------------*
  398  *      FSM state ST_TEI_ASGD event dl establish request
  399  *---------------------------------------------------------------------------*/ 
  400 static void
  401 F_T01(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  402 {
  403         NDBGL2(L2_F_MSG, "FSM function F_T01 executing");
  404         i4b_establish_data_link(l2sc);
  405         l2sc->l3initiated = 1;
  406 }
  407 
  408 /*---------------------------------------------------------------------------*
  409  *      FSM state ST_TEI_ASGD event persistent deactivation
  410  *---------------------------------------------------------------------------*/ 
  411 static void
  412 F_T05(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  413 {
  414         NDBGL2(L2_F_MSG, "FSM function F_T05 executing");
  415 }
  416 
  417 /*---------------------------------------------------------------------------*
  418  *      FSM state ST_TEI_ASGD event mdl remove request
  419  *---------------------------------------------------------------------------*/ 
  420 static void
  421 F_T06(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  422 {
  423         NDBGL2(L2_F_MSG, "FSM function F_T06 executing");
  424 /*XXX*/ i4b_mdl_assign_ind(l2sc);
  425 }
  426 
  427 /*---------------------------------------------------------------------------*
  428  *      FSM state ST_TEI_ASGD event rx'd SABME
  429  *---------------------------------------------------------------------------*/ 
  430 static void
  431 F_T07(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  432 {
  433         NDBGL2(L2_F_MSG, "FSM function F_T07 executing");
  434 
  435 /* XXX */
  436 #ifdef NOTDEF
  437         if(NOT able to establish)
  438         {
  439                 i4b_tx_dm(l2sc, l2sc->rxd_PF);
  440                 l2sc->Q921_state = ST_TEI_ASGD;
  441                 return;
  442         }
  443 #endif
  444 
  445         i4b_clear_exception_conditions(l2sc);
  446 
  447         i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE);
  448         
  449         i4b_tx_ua(l2sc, l2sc->rxd_PF);
  450 
  451         l2sc->vs = 0;
  452         l2sc->va = 0;
  453         l2sc->vr = 0;   
  454 
  455         l2sc->postfsmarg = l2sc->drv;
  456         l2sc->postfsmfunc = i4b_dl_establish_ind;
  457 
  458         i4b_T203_start(l2sc);   
  459 
  460         l2sc->Q921_state = ST_MULTIFR;
  461 }
  462 
  463 /*---------------------------------------------------------------------------*
  464  *      FSM state ST_TEI_ASGD event rx'd DISC
  465  *---------------------------------------------------------------------------*/ 
  466 static void
  467 F_T08(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  468 {
  469         NDBGL2(L2_F_MSG, "FSM function F_T08 executing");
  470         i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_IDLE);
  471         i4b_tx_ua(l2sc, l2sc->rxd_PF);
  472 }
  473 
  474 /*---------------------------------------------------------------------------*
  475  *      FSM state ST_TEI_ASGD event rx'd UA
  476  *---------------------------------------------------------------------------*/ 
  477 static void
  478 F_T09(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  479 {
  480         NDBGL2(L2_F_MSG, "FSM function F_T09 executing");
  481         i4b_mdl_error_ind(l2sc, "F_T09", MDL_ERR_C);
  482         i4b_mdl_error_ind(l2sc, "F_T09", MDL_ERR_D);    
  483 }
  484 
  485 /*---------------------------------------------------------------------------*
  486  *      FSM state ST_TEI_ASGD event rx'd DM
  487  *---------------------------------------------------------------------------*/ 
  488 static void
  489 F_T10(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  490 {
  491         NDBGL2(L2_F_MSG, "FSM function F_T10 executing");
  492 
  493         if(l2sc->rxd_PF)
  494         {
  495                 l2sc->Q921_state = ST_TEI_ASGD;
  496         }
  497         else
  498         {
  499 #ifdef NOTDEF
  500                 if(NOT able_to_etablish)
  501                 {
  502                         l2sc->Q921_state = ST_TEI_ASGD;
  503                         return;
  504                 }
  505 #endif
  506                 i4b_establish_data_link(l2sc);
  507 
  508                 l2sc->l3initiated = 1;
  509 
  510                 l2sc->Q921_state = ST_AW_EST;
  511         }
  512 }
  513 
  514 /*---------------------------------------------------------------------------*
  515  *      FSM state ST_TEI_ASGD event dl release request
  516  *---------------------------------------------------------------------------*/ 
  517 static void
  518 F_T13(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  519 {
  520         NDBGL2(L2_F_MSG, "FSM function F_T13 executing");
  521         l2sc->postfsmarg = l2sc->drv;
  522         l2sc->postfsmfunc = i4b_dl_release_cnf;
  523 }
  524 
  525 /*---------------------------------------------------------------------------*
  526  *      FSM state ST_AW_EST event dl establish request
  527  *---------------------------------------------------------------------------*/ 
  528 static void
  529 F_AE01(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  530 {
  531         NDBGL2(L2_F_MSG, "FSM function F_AE01 executing");
  532 
  533         i4b_Dcleanifq(&l2sc->i_queue);
  534         
  535         l2sc->l3initiated = 1;
  536 }
  537 
  538 /*---------------------------------------------------------------------------*
  539  *      FSM state ST_AW_EST event persistent deactivation
  540  *---------------------------------------------------------------------------*/ 
  541 static void
  542 F_AE05(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  543 {
  544         NDBGL2(L2_F_MSG, "FSM function F_AE05 executing");
  545 
  546         i4b_Dcleanifq(&l2sc->i_queue);  
  547 
  548         l2sc->postfsmarg = l2sc->drv;
  549         l2sc->postfsmfunc = i4b_dl_release_ind;
  550 
  551         i4b_T200_stop(l2sc);
  552 }
  553 
  554 /*---------------------------------------------------------------------------*
  555  *      FSM state ST_AW_EST event mdl remove request
  556  *---------------------------------------------------------------------------*/ 
  557 static void
  558 F_AE06(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  559 {
  560         NDBGL2(L2_F_MSG, "FSM function F_AE06 executing");
  561 
  562         i4b_Dcleanifq(&l2sc->i_queue);  
  563 
  564         l2sc->postfsmarg = l2sc->drv;
  565         l2sc->postfsmfunc = i4b_dl_release_ind;
  566 
  567         i4b_T200_stop(l2sc);
  568 
  569 /*XXX*/ i4b_mdl_assign_ind(l2sc);
  570 }
  571 
  572 /*---------------------------------------------------------------------------*
  573  *      FSM state ST_AW_EST event rx'd SABME
  574  *---------------------------------------------------------------------------*/ 
  575 static void
  576 F_AE07(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  577 {
  578         NDBGL2(L2_F_MSG, "FSM function F_AE07 executing");
  579         i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE);
  580         i4b_tx_ua(l2sc, l2sc->rxd_PF);
  581 }
  582 
  583 /*---------------------------------------------------------------------------*
  584  *      FSM state ST_AW_EST event rx'd DISC
  585  *---------------------------------------------------------------------------*/ 
  586 static void
  587 F_AE08(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  588 {
  589         NDBGL2(L2_F_MSG, "FSM function F_AE08 executing");
  590         i4b_tx_dm(l2sc, l2sc->rxd_PF);
  591 }
  592 
  593 /*---------------------------------------------------------------------------*
  594  *      FSM state ST_AW_EST event rx'd UA
  595  *---------------------------------------------------------------------------*/ 
  596 static void
  597 F_AE09(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  598 {
  599         NDBGL2(L2_F_MSG, "FSM function F_AE09 executing");
  600 
  601         if(l2sc->rxd_PF == 0)
  602         {
  603                 i4b_mdl_error_ind(l2sc, "F_AE09", MDL_ERR_D);
  604                 l2sc->Q921_state = ST_AW_EST;
  605         }
  606         else
  607         {
  608                 if(l2sc->l3initiated)
  609                 {
  610                         l2sc->l3initiated = 0;
  611                         l2sc->vr = 0;
  612                         l2sc->postfsmarg = l2sc->drv;
  613                         l2sc->postfsmfunc = i4b_dl_establish_cnf;
  614                 }
  615                 else
  616                 {
  617                         if(l2sc->vs != l2sc->va)
  618                         {
  619                                 i4b_Dcleanifq(&l2sc->i_queue);
  620                                 l2sc->postfsmarg = l2sc->drv;
  621                                 l2sc->postfsmfunc = i4b_dl_establish_ind;
  622                         }
  623                 }
  624 
  625                 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE);
  626                 
  627                 i4b_T200_stop(l2sc);
  628                 i4b_T203_start(l2sc);
  629 
  630                 l2sc->vs = 0;
  631                 l2sc->va = 0;
  632 
  633                 l2sc->Q921_state = ST_MULTIFR;
  634         }
  635 }
  636 
  637 /*---------------------------------------------------------------------------*
  638  *      FSM state ST_AW_EST event rx'd DM
  639  *---------------------------------------------------------------------------*/ 
  640 static void
  641 F_AE10(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  642 {
  643         NDBGL2(L2_F_MSG, "FSM function F_AE10 executing");
  644 
  645         if(l2sc->rxd_PF == 0)
  646         {
  647                 l2sc->Q921_state = ST_AW_EST;
  648         }
  649         else
  650         {
  651                 i4b_Dcleanifq(&l2sc->i_queue);
  652 
  653                 l2sc->postfsmarg = l2sc->drv;
  654                 l2sc->postfsmfunc = i4b_dl_release_ind;
  655 
  656                 i4b_T200_stop(l2sc);
  657 
  658                 l2sc->Q921_state = ST_TEI_ASGD;         
  659         }
  660 }
  661 
  662 /*---------------------------------------------------------------------------*
  663  *      FSM state ST_AW_EST event T200 expiry
  664  *---------------------------------------------------------------------------*/ 
  665 static void
  666 F_AE11(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  667 {
  668         NDBGL2(L2_F_MSG, "FSM function F_AE11 executing");
  669 
  670         if(l2sc->RC >= N200)
  671         {
  672                 i4b_Dcleanifq(&l2sc->i_queue);
  673 
  674                 i4b_mdl_error_ind(l2sc, "F_AE11", MDL_ERR_G);
  675 
  676                 l2sc->postfsmarg = l2sc->drv;
  677                 l2sc->postfsmfunc = i4b_dl_release_ind;
  678 
  679                 l2sc->Q921_state = ST_TEI_ASGD;
  680         }
  681         else
  682         {
  683                 l2sc->RC++;
  684 
  685                 i4b_tx_sabme(l2sc, P1);
  686 
  687                 i4b_T200_start(l2sc);
  688 
  689                 l2sc->Q921_state = ST_AW_EST;
  690         }
  691 }
  692 
  693 /*---------------------------------------------------------------------------*
  694  *      FSM state ST_AW_EST event dl data request
  695  *---------------------------------------------------------------------------*/ 
  696 static void
  697 F_AE12(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  698 {
  699         NDBGL2(L2_F_MSG, "FSM function F_AE12 executing");
  700 
  701         if(l2sc->l3initiated == 0)
  702         {
  703                 i4b_i_frame_queued_up(l2sc);
  704         }
  705 }
  706 
  707 /*---------------------------------------------------------------------------*
  708  *      FSM state ST_AW_REL event persistent deactivation
  709  *---------------------------------------------------------------------------*/ 
  710 static void
  711 F_AR05(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  712 {
  713         NDBGL2(L2_F_MSG, "FSM function F_AR05 executing");
  714 
  715         l2sc->postfsmarg = l2sc->drv;
  716         l2sc->postfsmfunc = i4b_dl_release_cnf;
  717 
  718         i4b_T200_stop(l2sc);
  719 }
  720 
  721 /*---------------------------------------------------------------------------*
  722  *      FSM state ST_AW_REL event mdl remove request
  723  *---------------------------------------------------------------------------*/ 
  724 static void
  725 F_AR06(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  726 {
  727         NDBGL2(L2_F_MSG, "FSM function F_AR06 executing");
  728 
  729         l2sc->postfsmarg = l2sc->drv;
  730         l2sc->postfsmfunc = i4b_dl_release_cnf;
  731 
  732         i4b_T200_stop(l2sc);
  733 
  734 /*XXX*/ i4b_mdl_assign_ind(l2sc);       
  735 }
  736 
  737 /*---------------------------------------------------------------------------*
  738  *      FSM state ST_AW_REL event rx'd SABME
  739  *---------------------------------------------------------------------------*/ 
  740 static void
  741 F_AR07(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  742 {
  743         NDBGL2(L2_F_MSG, "FSM function F_AR07 executing");      
  744         i4b_tx_dm(l2sc, l2sc->rxd_PF);
  745 }
  746 
  747 /*---------------------------------------------------------------------------*
  748  *      FSM state ST_AW_REL event rx'd DISC
  749  *---------------------------------------------------------------------------*/ 
  750 static void
  751 F_AR08(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  752 {
  753         NDBGL2(L2_F_MSG, "FSM function F_AR08 executing");
  754         i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_IDLE);
  755         i4b_tx_ua(l2sc, l2sc->rxd_PF);  
  756 }
  757 
  758 /*---------------------------------------------------------------------------*
  759  *      FSM state ST_AW_REL event rx'd UA
  760  *---------------------------------------------------------------------------*/ 
  761 static void
  762 F_AR09(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  763 {
  764         NDBGL2(L2_F_MSG, "FSM function F_AR09 executing");
  765 
  766         if(l2sc->rxd_PF)
  767         {
  768                 l2sc->postfsmarg = l2sc->drv;
  769                 l2sc->postfsmfunc = i4b_dl_release_cnf;
  770 
  771                 i4b_T200_stop(l2sc);
  772 
  773                 l2sc->Q921_state = ST_TEI_ASGD;
  774         }
  775         else
  776         {
  777                 i4b_mdl_error_ind(l2sc, "F_AR09", MDL_ERR_D);
  778                 
  779                 l2sc->Q921_state = ST_AW_REL;
  780         }
  781 }
  782 
  783 /*---------------------------------------------------------------------------*
  784  *      FSM state ST_AW_REL event rx'd DM
  785  *---------------------------------------------------------------------------*/ 
  786 static void
  787 F_AR10(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  788 {
  789         NDBGL2(L2_F_MSG, "FSM function F_AR10 executing");
  790 
  791         if(l2sc->rxd_PF)
  792         {
  793                 l2sc->postfsmarg = l2sc->drv;
  794                 l2sc->postfsmfunc = i4b_dl_release_cnf;
  795 
  796                 i4b_T200_stop(l2sc);
  797 
  798                 l2sc->Q921_state = ST_TEI_ASGD;
  799         }
  800         else
  801         {
  802                 l2sc->Q921_state = ST_AW_REL;
  803         }
  804 }
  805 
  806 /*---------------------------------------------------------------------------*
  807  *      FSM state ST_AW_REL event T200 expiry
  808  *---------------------------------------------------------------------------*/ 
  809 static void
  810 F_AR11(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  811 {
  812         NDBGL2(L2_F_MSG, "FSM function F_AR11 executing");
  813 
  814         if(l2sc->RC >= N200)
  815         {
  816                 i4b_mdl_error_ind(l2sc, "F_AR11", MDL_ERR_H);
  817 
  818                 l2sc->postfsmarg = l2sc->drv;
  819                 l2sc->postfsmfunc = i4b_dl_release_cnf;
  820 
  821                 l2sc->Q921_state = ST_TEI_ASGD;
  822         }
  823         else
  824         {
  825                 l2sc->RC++;
  826 
  827                 i4b_tx_disc(l2sc, P1);
  828 
  829                 i4b_T200_start(l2sc);
  830 
  831                 l2sc->Q921_state = ST_AW_REL;
  832         }
  833 }
  834 
  835 /*---------------------------------------------------------------------------*
  836  *      FSM state ST_MULTIFR event dl establish request
  837  *---------------------------------------------------------------------------*/ 
  838 static void
  839 F_MF01(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  840 {
  841         NDBGL2(L2_F_MSG, "FSM function F_MF01 executing");
  842 
  843         i4b_Dcleanifq(&l2sc->i_queue);
  844 
  845         i4b_establish_data_link(l2sc);
  846         
  847         l2sc->l3initiated = 1;
  848 }
  849 
  850 /*---------------------------------------------------------------------------*
  851  *      FSM state ST_MULTIFR event persistent deactivation
  852  *---------------------------------------------------------------------------*/ 
  853 static void
  854 F_MF05(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  855 {
  856         NDBGL2(L2_F_MSG, "FSM function F_MF05 executing");
  857 
  858         i4b_Dcleanifq(&l2sc->i_queue);
  859         
  860         l2sc->postfsmarg = l2sc->drv;
  861         l2sc->postfsmfunc = i4b_dl_release_ind;
  862         
  863         i4b_T200_stop(l2sc);
  864         i4b_T203_stop(l2sc);
  865 }
  866 
  867 /*---------------------------------------------------------------------------*
  868  *      FSM state ST_MULTIFR event mdl remove request
  869  *---------------------------------------------------------------------------*/ 
  870 static void
  871 F_MF06(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  872 {
  873         NDBGL2(L2_F_MSG, "FSM function F_MF06 executing");
  874 
  875         i4b_Dcleanifq(&l2sc->i_queue);
  876         
  877         l2sc->postfsmarg = l2sc->drv;
  878         l2sc->postfsmfunc = i4b_dl_release_ind;
  879         
  880         i4b_T200_stop(l2sc);
  881         i4b_T203_stop(l2sc);
  882 
  883 /*XXX*/ i4b_mdl_assign_ind(l2sc);       
  884 }
  885 
  886 /*---------------------------------------------------------------------------*
  887  *      FSM state ST_MULTIFR event rx'd SABME
  888  *---------------------------------------------------------------------------*/ 
  889 static void
  890 F_MF07(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  891 {
  892         NDBGL2(L2_F_MSG, "FSM function F_MF07 executing");
  893 
  894         i4b_clear_exception_conditions(l2sc);
  895 
  896         i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE);        
  897 
  898         i4b_tx_ua(l2sc, l2sc->rxd_PF);
  899 
  900         i4b_mdl_error_ind(l2sc, "F_MF07", MDL_ERR_F);
  901 
  902         if(l2sc->vs != l2sc->va)
  903         {
  904                 i4b_Dcleanifq(&l2sc->i_queue);
  905         
  906                 l2sc->postfsmarg = l2sc->drv;
  907                 l2sc->postfsmfunc = i4b_dl_establish_ind;
  908         }
  909 
  910         i4b_T200_stop(l2sc);
  911         i4b_T203_start(l2sc);
  912 
  913         l2sc->vs = 0;
  914         l2sc->va = 0;
  915         l2sc->vr = 0;   
  916 }
  917 
  918 /*---------------------------------------------------------------------------*
  919  *      FSM state ST_MULTIFR event rx'd DISC
  920  *---------------------------------------------------------------------------*/ 
  921 static void
  922 F_MF08(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  923 {
  924         NDBGL2(L2_F_MSG, "FSM function F_MF08 executing");
  925 
  926         i4b_Dcleanifq(&l2sc->i_queue);
  927         i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_IDLE);
  928         i4b_tx_ua(l2sc, l2sc->rxd_PF);
  929         
  930         l2sc->postfsmarg = l2sc->drv;
  931         l2sc->postfsmfunc = i4b_dl_release_ind;
  932 
  933         i4b_T200_stop(l2sc);
  934         i4b_T203_stop(l2sc);
  935 }
  936 
  937 /*---------------------------------------------------------------------------*
  938  *      FSM state ST_MULTIFR event rx'd UA
  939  *---------------------------------------------------------------------------*/ 
  940 static void
  941 F_MF09(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  942 {
  943         NDBGL2(L2_F_MSG, "FSM function F_MF09 executing");
  944         if(l2sc->rxd_PF)
  945                 i4b_mdl_error_ind(l2sc, "F_MF09", MDL_ERR_C);
  946         else
  947                 i4b_mdl_error_ind(l2sc, "F_MF09", MDL_ERR_D);
  948 }
  949 
  950 /*---------------------------------------------------------------------------*
  951  *      FSM state ST_MULTIFR event rx'd DM
  952  *---------------------------------------------------------------------------*/ 
  953 static void
  954 F_MF10(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  955 {
  956         NDBGL2(L2_F_MSG, "FSM function F_MF10 executing");
  957 
  958         if(l2sc->rxd_PF)
  959         {
  960                 i4b_mdl_error_ind(l2sc, "F_MF10", MDL_ERR_B);
  961                 
  962                 l2sc->Q921_state = ST_MULTIFR;
  963         }
  964         else
  965         {
  966                 i4b_mdl_error_ind(l2sc, "F_MF10", MDL_ERR_E);
  967                 
  968                 i4b_establish_data_link(l2sc);
  969 
  970                 l2sc->l3initiated = 0;
  971                 
  972                 l2sc->Q921_state = ST_AW_EST;
  973         }
  974 }
  975 
  976 /*---------------------------------------------------------------------------*
  977  *      FSM state ST_MULTIFR event T200 expiry
  978  *---------------------------------------------------------------------------*/ 
  979 static void
  980 F_MF11(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  981 {
  982         NDBGL2(L2_F_MSG, "FSM function F_MF11 executing");
  983 
  984         l2sc->RC = 0;
  985 
  986         i4b_transmit_enquire(l2sc);
  987 
  988         l2sc->RC++;
  989 }
  990 
  991 /*---------------------------------------------------------------------------*
  992  *      FSM state ST_MULTIFR event dl data request
  993  *---------------------------------------------------------------------------*/ 
  994 static void
  995 F_MF12(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
  996 {
  997         NDBGL2(L2_F_MSG, "FSM function F_MF12 executing");
  998 
  999         i4b_i_frame_queued_up(l2sc);
 1000 }
 1001 
 1002 /*---------------------------------------------------------------------------*
 1003  *      FSM state ST_MULTIFR event dl release request
 1004  *---------------------------------------------------------------------------*/ 
 1005 static void
 1006 F_MF13(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1007 {
 1008         NDBGL2(L2_F_MSG, "FSM function F_MF13 executing");
 1009 
 1010         i4b_Dcleanifq(&l2sc->i_queue);
 1011 
 1012         l2sc->RC = 0;
 1013 
 1014         i4b_tx_disc(l2sc, P1);
 1015         
 1016         i4b_T203_stop(l2sc);
 1017         i4b_T200_restart(l2sc); 
 1018 }
 1019 
 1020 /*---------------------------------------------------------------------------*
 1021  *      FSM state ST_MULTIFR event T203 expiry
 1022  *---------------------------------------------------------------------------*/ 
 1023 static void
 1024 F_MF14(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1025 {
 1026         NDBGL2(L2_F_MSG, "FSM function F_MF14 executing");
 1027 
 1028         i4b_transmit_enquire(l2sc);
 1029 
 1030         l2sc->RC = 0;
 1031 }
 1032 
 1033 /*---------------------------------------------------------------------------*
 1034  *      FSM state ST_MULTIFR event set own rx busy
 1035  *---------------------------------------------------------------------------*/ 
 1036 static void
 1037 F_MF15(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1038 {
 1039         NDBGL2(L2_F_MSG, "FSM function F_MF15 executing");
 1040 
 1041         if(l2sc->own_busy == 0)
 1042         {
 1043                 l2sc->own_busy = 1;
 1044 
 1045                 i4b_tx_rnr_response(l2sc, F0); /* wrong in Q.921 03/93 p 64 */
 1046 
 1047                 l2sc->ack_pend = 0;
 1048         }
 1049 }
 1050 
 1051 /*---------------------------------------------------------------------------*
 1052  *      FSM state ST_MULTIFR event clear own rx busy
 1053  *---------------------------------------------------------------------------*/ 
 1054 static void
 1055 F_MF16(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1056 {
 1057         NDBGL2(L2_F_MSG, "FSM function F_MF16 executing");
 1058 
 1059         if(l2sc->own_busy != 0)
 1060         {
 1061                 l2sc->own_busy = 0;
 1062 
 1063                 i4b_tx_rr_response(l2sc, F0); /* wrong in Q.921 03/93 p 64 */
 1064 
 1065                 l2sc->ack_pend = 0;
 1066         }
 1067 }
 1068 
 1069 /*---------------------------------------------------------------------------*
 1070  *      FSM state ST_MULTIFR event rx'd RR
 1071  *---------------------------------------------------------------------------*/ 
 1072 static void
 1073 F_MF17(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1074 {
 1075         NDBGL2(L2_F_MSG, "FSM function F_MF17 executing");
 1076 
 1077         l2sc->peer_busy = 0;
 1078 
 1079         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
 1080         {
 1081                 if(l2sc->rxd_PF == 1)
 1082                 {
 1083                         i4b_enquiry_response(l2sc);
 1084                 }
 1085         }
 1086         else
 1087         {
 1088                 if(l2sc->rxd_PF == 1)
 1089                 {
 1090                         i4b_mdl_error_ind(l2sc, "F_MF17", MDL_ERR_A);
 1091                 }
 1092         }
 1093 
 1094         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1095         {
 1096                 if(l2sc->rxd_NR == l2sc->vs)
 1097                 {
 1098                         l2sc->va = l2sc->rxd_NR;
 1099                         i4b_T200_stop(l2sc);
 1100                         i4b_T203_restart(l2sc);
 1101                 }
 1102                 else if(l2sc->rxd_NR != l2sc->va)
 1103                 {
 1104                         l2sc->va = l2sc->rxd_NR;
 1105                         i4b_T200_restart(l2sc);
 1106                 }
 1107                 l2sc->Q921_state = ST_MULTIFR;
 1108         }
 1109         else
 1110         {
 1111                 i4b_nr_error_recovery(l2sc);
 1112                 l2sc->Q921_state = ST_AW_EST;
 1113         }
 1114 }
 1115 
 1116 /*---------------------------------------------------------------------------*
 1117  *      FSM state ST_MULTIFR event rx'd REJ
 1118  *---------------------------------------------------------------------------*/ 
 1119 static void
 1120 F_MF18(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1121 {
 1122         NDBGL2(L2_F_MSG, "FSM function F_MF18 executing");
 1123 
 1124         l2sc->peer_busy = 0;
 1125 
 1126         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
 1127         {
 1128                 if(l2sc->rxd_PF == 1)
 1129                 {
 1130                         i4b_enquiry_response(l2sc);
 1131                 }
 1132         }
 1133         else
 1134         {
 1135                 if(l2sc->rxd_PF == 1)
 1136                 {
 1137                         i4b_mdl_error_ind(l2sc, "F_MF18", MDL_ERR_A);
 1138                 }
 1139         }
 1140 
 1141         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1142         {
 1143                 l2sc->va = l2sc->rxd_NR;
 1144                 i4b_T200_stop(l2sc);
 1145                 i4b_T203_start(l2sc);
 1146                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
 1147                 l2sc->Q921_state = ST_MULTIFR;
 1148         }
 1149         else
 1150         {
 1151                 i4b_nr_error_recovery(l2sc);
 1152                 l2sc->Q921_state = ST_AW_EST;           
 1153         }
 1154 }
 1155 
 1156 /*---------------------------------------------------------------------------*
 1157  *      FSM state ST_MULTIFR event rx'd RNR
 1158  *---------------------------------------------------------------------------*/ 
 1159 static void
 1160 F_MF19(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1161 {
 1162         NDBGL2(L2_F_MSG, "FSM function F_MF19 executing");
 1163 
 1164         l2sc->peer_busy = 1;
 1165 
 1166         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
 1167         {
 1168                 if(l2sc->rxd_PF == 1)
 1169                 {
 1170                         i4b_enquiry_response(l2sc);
 1171                 }
 1172         }
 1173         else
 1174         {
 1175                 if(l2sc->rxd_PF == 1)
 1176                 {
 1177                         i4b_mdl_error_ind(l2sc, "F_MF19", MDL_ERR_A);
 1178                 }
 1179         }
 1180 
 1181         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1182         {
 1183                 l2sc->va = l2sc->rxd_NR;
 1184                 i4b_T203_stop(l2sc);
 1185                 i4b_T200_restart(l2sc);
 1186                 l2sc->Q921_state = ST_MULTIFR;
 1187         }
 1188         else
 1189         {
 1190                 i4b_nr_error_recovery(l2sc);
 1191                 l2sc->Q921_state = ST_AW_EST;                
 1192         }
 1193 }
 1194 
 1195 /*---------------------------------------------------------------------------*
 1196  *      FSM state ST_MULTIFR event rx'd FRMR
 1197  *---------------------------------------------------------------------------*/ 
 1198 static void
 1199 F_MF20(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1200 {
 1201         NDBGL2(L2_F_MSG, "FSM function F_MF20 executing");
 1202 
 1203         i4b_mdl_error_ind(l2sc, "F_MF20", MDL_ERR_K);
 1204 
 1205         i4b_establish_data_link(l2sc);
 1206 
 1207         l2sc->l3initiated = 0;
 1208 }
 1209 
 1210 /*---------------------------------------------------------------------------*
 1211  *      FSM state ST_TIMREC event dl establish request
 1212  *---------------------------------------------------------------------------*/ 
 1213 static void
 1214 F_TR01(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1215 {
 1216         NDBGL2(L2_F_MSG, "FSM function F_TR01 executing");
 1217 
 1218         i4b_Dcleanifq(&l2sc->i_queue);
 1219 
 1220         i4b_establish_data_link(l2sc);
 1221 
 1222         l2sc->l3initiated = 1;
 1223 }
 1224 
 1225 /*---------------------------------------------------------------------------*
 1226  *      FSM state ST_TIMREC event persistent deactivation
 1227  *---------------------------------------------------------------------------*/ 
 1228 static void
 1229 F_TR05(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1230 {
 1231         NDBGL2(L2_F_MSG, "FSM function F_TR05 executing");
 1232 
 1233         i4b_Dcleanifq(&l2sc->i_queue);  
 1234 
 1235         l2sc->postfsmarg = l2sc->drv;
 1236         l2sc->postfsmfunc = i4b_dl_release_ind;
 1237 
 1238         i4b_T200_stop(l2sc);
 1239 }
 1240 
 1241 /*---------------------------------------------------------------------------*
 1242  *      FSM state ST_TIMREC event mdl remove request
 1243  *---------------------------------------------------------------------------*/ 
 1244 static void
 1245 F_TR06(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1246 {
 1247         NDBGL2(L2_F_MSG, "FSM function F_TR06 executing");
 1248 
 1249         i4b_Dcleanifq(&l2sc->i_queue);
 1250 
 1251         l2sc->postfsmarg = l2sc->drv;
 1252         l2sc->postfsmfunc = i4b_dl_release_ind;
 1253 
 1254         i4b_T200_stop(l2sc);
 1255 
 1256 /*XXX*/ i4b_mdl_assign_ind(l2sc);       
 1257 }
 1258 
 1259 /*---------------------------------------------------------------------------*
 1260  *      FSM state ST_TIMREC event rx'd SABME
 1261  *---------------------------------------------------------------------------*/ 
 1262 static void
 1263 F_TR07(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1264 {
 1265         NDBGL2(L2_F_MSG, "FSM function F_TR07 executing");
 1266 
 1267         i4b_clear_exception_conditions(l2sc);
 1268 
 1269         i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE);
 1270         
 1271         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 1272 
 1273         i4b_mdl_error_ind(l2sc, "F_TR07", MDL_ERR_F);
 1274 
 1275         if(l2sc->vs != l2sc->va)
 1276         {
 1277                 i4b_Dcleanifq(&l2sc->i_queue);          
 1278 
 1279                 l2sc->postfsmarg = l2sc->drv;
 1280                 l2sc->postfsmfunc = i4b_dl_establish_ind;
 1281         }
 1282 
 1283         i4b_T200_stop(l2sc);
 1284         i4b_T203_start(l2sc);
 1285         
 1286         l2sc->vs = 0;
 1287         l2sc->va = 0;
 1288         l2sc->vr = 0;
 1289 }
 1290 
 1291 /*---------------------------------------------------------------------------*
 1292  *      FSM state ST_TIMREC event rx'd DISC
 1293  *---------------------------------------------------------------------------*/ 
 1294 static void
 1295 F_TR08(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1296 {
 1297         NDBGL2(L2_F_MSG, "FSM function F_TR08 executing");
 1298 
 1299         i4b_Dcleanifq(&l2sc->i_queue);          
 1300         i4b_mdl_status_ind(drv, STI_L2STAT, LAYER_IDLE);
 1301         i4b_tx_ua(l2sc, l2sc->rxd_PF);
 1302 
 1303         l2sc->postfsmarg = drv;
 1304         l2sc->postfsmfunc = i4b_dl_release_ind;
 1305 
 1306         i4b_T200_stop(l2sc);
 1307 }
 1308 
 1309 /*---------------------------------------------------------------------------*
 1310  *      FSM state ST_TIMREC event rx'd UA
 1311  *---------------------------------------------------------------------------*/ 
 1312 static void
 1313 F_TR09(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1314 {
 1315         NDBGL2(L2_F_MSG, "FSM function F_TR09 executing");
 1316         if(l2sc->rxd_PF)
 1317                 i4b_mdl_error_ind(l2sc, "F_TR09", MDL_ERR_C);
 1318         else
 1319                 i4b_mdl_error_ind(l2sc, "F_TR09", MDL_ERR_D);   
 1320 }
 1321 
 1322 /*---------------------------------------------------------------------------*
 1323  *      FSM state ST_TIMREC event rx'd DM
 1324  *---------------------------------------------------------------------------*/ 
 1325 static void
 1326 F_TR10(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1327 {
 1328         NDBGL2(L2_F_MSG, "FSM function F_TR10 executing");
 1329 
 1330         if(l2sc->rxd_PF)
 1331         {
 1332                 i4b_mdl_error_ind(l2sc, "F_TR10", MDL_ERR_B);
 1333         }
 1334         else
 1335         {
 1336                 i4b_mdl_error_ind(l2sc, "F_TR10", MDL_ERR_E);
 1337         }
 1338 
 1339         i4b_establish_data_link(l2sc);
 1340 
 1341         l2sc->l3initiated = 0;
 1342 }
 1343 
 1344 /*---------------------------------------------------------------------------*
 1345  *      FSM state ST_TIMREC event T200 expiry
 1346  *---------------------------------------------------------------------------*/ 
 1347 static void
 1348 F_TR11(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1349 {
 1350         NDBGL2(L2_F_MSG, "FSM function F_TR11 executing");
 1351 
 1352         if(l2sc->RC >= N200)
 1353         {
 1354                 i4b_mdl_error_ind(l2sc, "F_TR11", MDL_ERR_I);
 1355 
 1356                 i4b_establish_data_link(l2sc);
 1357 
 1358                 l2sc->l3initiated = 0;
 1359 
 1360                 l2sc->Q921_state = ST_AW_EST;
 1361         }
 1362         else
 1363         {
 1364                 i4b_transmit_enquire(l2sc);
 1365 
 1366                 l2sc->RC++;
 1367 
 1368                 l2sc->Q921_state = ST_TIMREC;
 1369         }
 1370 }
 1371 
 1372 /*---------------------------------------------------------------------------*
 1373  *      FSM state ST_TIMREC event dl data request
 1374  *---------------------------------------------------------------------------*/ 
 1375 static void
 1376 F_TR12(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1377 {
 1378         NDBGL2(L2_F_MSG, "FSM function F_TR12 executing");
 1379 
 1380         i4b_i_frame_queued_up(l2sc);
 1381 }
 1382 
 1383 /*---------------------------------------------------------------------------*
 1384  *      FSM state ST_TIMREC event dl release request
 1385  *---------------------------------------------------------------------------*/ 
 1386 static void
 1387 F_TR13(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1388 {
 1389         NDBGL2(L2_F_MSG, "FSM function F_TR13 executing");
 1390 
 1391         i4b_Dcleanifq(&l2sc->i_queue);                  
 1392 
 1393         l2sc->RC = 0;
 1394 
 1395         i4b_tx_disc(l2sc, P1);
 1396 
 1397         i4b_T200_restart(l2sc);
 1398 }
 1399 
 1400 /*---------------------------------------------------------------------------*
 1401  *      FSM state ST_TIMREC event set own rx busy
 1402  *---------------------------------------------------------------------------*/ 
 1403 static void
 1404 F_TR15(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1405 {
 1406         NDBGL2(L2_F_MSG, "FSM function F_TR15 executing");
 1407 
 1408         if(l2sc->own_busy == 0)
 1409         {
 1410                 l2sc->own_busy = 1;
 1411 
 1412                 i4b_tx_rnr_response(l2sc, F0);
 1413 
 1414                 l2sc->ack_pend = 0;
 1415         }
 1416 }
 1417 
 1418 /*---------------------------------------------------------------------------*
 1419  *      FSM state ST_TIMREC event clear own rx busy
 1420  *---------------------------------------------------------------------------*/ 
 1421 static void
 1422 F_TR16(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1423 {
 1424         NDBGL2(L2_F_MSG, "FSM function F_TR16 executing");
 1425 
 1426         if(l2sc->own_busy != 0)
 1427         {
 1428                 l2sc->own_busy = 0;
 1429 
 1430                 i4b_tx_rr_response(l2sc, F0);   /* this is wrong         */
 1431                                                 /* in Q.921 03/93 p 74 ! */
 1432                 l2sc->ack_pend = 0;
 1433         }
 1434 }
 1435 
 1436 /*---------------------------------------------------------------------------*
 1437  *      FSM state ST_TIMREC event rx'd RR
 1438  *---------------------------------------------------------------------------*/ 
 1439 static void
 1440 F_TR17(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1441 {
 1442         NDBGL2(L2_F_MSG, "FSM function F_TR17 executing");
 1443 
 1444         l2sc->peer_busy = 0;
 1445 
 1446         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
 1447         {
 1448                 if(l2sc->rxd_PF == 1)
 1449                 {
 1450                         i4b_enquiry_response(l2sc);
 1451                 }
 1452         }
 1453         else
 1454         {
 1455                 if(l2sc->rxd_PF == 1)
 1456                 {
 1457                         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1458                         {
 1459                                 l2sc->va = l2sc->rxd_NR;
 1460                                 i4b_T200_stop(l2sc);
 1461                                 i4b_T203_start(l2sc);
 1462                                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
 1463                                 l2sc->Q921_state = ST_MULTIFR;
 1464                                 return;
 1465                         }
 1466                         else
 1467                         {
 1468                                 i4b_nr_error_recovery(l2sc);
 1469                                 l2sc->Q921_state = ST_AW_EST;
 1470                                 return;
 1471                         }
 1472                 }
 1473         }
 1474 
 1475         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1476         {
 1477                 l2sc->va = l2sc->rxd_NR;
 1478                 l2sc->Q921_state = ST_TIMREC;
 1479         }
 1480         else
 1481         {
 1482                 i4b_nr_error_recovery(l2sc);
 1483                 l2sc->Q921_state = ST_AW_EST;
 1484         }
 1485 }
 1486 
 1487 /*---------------------------------------------------------------------------*
 1488  *      FSM state ST_TIMREC event 
 1489  *---------------------------------------------------------------------------*/ 
 1490 static void
 1491 F_TR18(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1492 {
 1493         NDBGL2(L2_F_MSG, "FSM function F_TR18 executing");
 1494 
 1495         l2sc->peer_busy = 0;
 1496 
 1497         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
 1498         {
 1499                 if(l2sc->rxd_PF == 1)
 1500                 {
 1501                         i4b_enquiry_response(l2sc);
 1502                 }
 1503         }
 1504         else
 1505         {
 1506                 if(l2sc->rxd_PF == 1)
 1507                 {
 1508                         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1509                         {
 1510                                 l2sc->va = l2sc->rxd_NR;
 1511                                 i4b_T200_stop(l2sc);
 1512                                 i4b_T203_start(l2sc);
 1513                                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
 1514                                 l2sc->Q921_state = ST_MULTIFR;
 1515                                 return;
 1516                         }
 1517                         else
 1518                         {
 1519                                 i4b_nr_error_recovery(l2sc);
 1520                                 l2sc->Q921_state = ST_AW_EST;
 1521                                 return;
 1522                         }
 1523                 }
 1524         }
 1525 
 1526         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1527         {
 1528                 l2sc->va = l2sc->rxd_NR;
 1529                 l2sc->Q921_state = ST_TIMREC;
 1530         }
 1531         else
 1532         {
 1533                 i4b_nr_error_recovery(l2sc);
 1534                 l2sc->Q921_state = ST_AW_EST;
 1535         }
 1536 }
 1537 
 1538 /*---------------------------------------------------------------------------*
 1539  *      FSM state ST_TIMREC event rx'd RNR
 1540  *---------------------------------------------------------------------------*/ 
 1541 static void
 1542 F_TR19(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1543 {
 1544         NDBGL2(L2_F_MSG, "FSM function F_TR19 executing");
 1545 
 1546         l2sc->peer_busy = 0;
 1547 
 1548         if(l2sc->rxd_CR == CR_CMD_FROM_NT)
 1549         {
 1550                 if(l2sc->rxd_PF == 1)
 1551                 {
 1552                         i4b_enquiry_response(l2sc);
 1553                 }
 1554         }
 1555         else
 1556         {
 1557                 if(l2sc->rxd_PF == 1)
 1558                 {
 1559                         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1560                         {
 1561                                 l2sc->va = l2sc->rxd_NR;
 1562                                 i4b_T200_restart(l2sc);
 1563                                 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR);
 1564                                 l2sc->Q921_state = ST_MULTIFR;
 1565                                 return;
 1566                         }
 1567                         else
 1568                         {
 1569                                 i4b_nr_error_recovery(l2sc);
 1570                                 l2sc->Q921_state = ST_AW_EST;
 1571                                 return;
 1572                         }
 1573                 }
 1574         }
 1575 
 1576         if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs))
 1577         {
 1578                 l2sc->va = l2sc->rxd_NR;
 1579                 l2sc->Q921_state = ST_TIMREC;
 1580         }
 1581         else
 1582         {
 1583                 i4b_nr_error_recovery(l2sc);
 1584                 l2sc->Q921_state = ST_AW_EST;
 1585         }
 1586 }
 1587 
 1588 /*---------------------------------------------------------------------------*
 1589  *      FSM state ST_TIMREC event rx'd FRMR
 1590  *---------------------------------------------------------------------------*/ 
 1591 static void
 1592 F_TR20(l2_softc_t *l2sc, struct isdn_l3_driver *drv)
 1593 {
 1594         NDBGL2(L2_F_MSG, "FSM function F_TR20 executing");
 1595 
 1596         i4b_mdl_error_ind(l2sc, "F_TR20", MDL_ERR_K);
 1597 
 1598         i4b_establish_data_link(l2sc);
 1599 
 1600         l2sc->l3initiated = 0;
 1601 }
 1602         
 1603 #endif /* NI4BQ921 > 0 */

Cache object: f52c2c1ca0b5f817c0141fe393adb350


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.