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FreeBSD/Linux Kernel Cross Reference
sys/netisdn/i4b_l2fsm.c
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1 /* 2 * Copyright (c) 1997, 2000 Hellmuth Michaelis. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 *--------------------------------------------------------------------------- 26 * 27 * i4b_l2fsm.c - layer 2 FSM 28 * ------------------------- 29 * 30 * $Id: i4b_l2fsm.c,v 1.12 2007/01/24 13:08:15 hubertf Exp $ 31 * 32 * $FreeBSD$ 33 * 34 * last edit-date: [Fri Jan 5 11:33:47 2001] 35 * 36 *---------------------------------------------------------------------------*/ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: i4b_l2fsm.c,v 1.12 2007/01/24 13:08:15 hubertf Exp $"); 40 41 #ifdef __FreeBSD__ 42 #include "i4bq921.h" 43 #else 44 #define NI4BQ921 1 45 #endif 46 #if NI4BQ921 > 0 47 48 #include <sys/param.h> 49 #include <sys/kernel.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/socket.h> 53 #include <net/if.h> 54 55 #if defined(__NetBSD__) && __NetBSD_Version__ >= 104230000 56 #include <sys/callout.h> 57 #endif 58 59 #ifdef __FreeBSD__ 60 #include <machine/i4b_debug.h> 61 #include <machine/i4b_ioctl.h> 62 #else 63 #include <netisdn/i4b_debug.h> 64 #include <netisdn/i4b_ioctl.h> 65 #endif 66 67 #include <netisdn/i4b_global.h> 68 #include <netisdn/i4b_l2.h> 69 #include <netisdn/i4b_l1l2.h> 70 #include <netisdn/i4b_isdnq931.h> 71 #include <netisdn/i4b_mbuf.h> 72 73 #include <netisdn/i4b_l2fsm.h> 74 75 76 #if DO_I4B_DEBUG 77 static const char *l2state_text[N_STATES] = { 78 "ST_TEI_UNAS", 79 "ST_ASG_AW_TEI", 80 "ST_EST_AW_TEI", 81 "ST_TEI_ASGD", 82 83 "ST_AW_EST", 84 "ST_AW_REL", 85 "ST_MULTIFR", 86 "ST_TIMREC", 87 88 "ST_SUBSET", 89 "Illegal State" 90 }; 91 92 static const char *l2event_text[N_EVENTS] = { 93 "EV_DLESTRQ", 94 "EV_DLUDTRQ", 95 "EV_MDASGRQ", 96 "EV_MDERRRS", 97 "EV_PSDEACT", 98 "EV_MDREMRQ", 99 "EV_RXSABME", 100 "EV_RXDISC", 101 "EV_RXUA", 102 "EV_RXDM", 103 "EV_T200EXP", 104 "EV_DLDATRQ", 105 "EV_DLRELRQ", 106 "EV_T203EXP", 107 "EV_OWNBUSY", 108 "EV_OWNRDY", 109 "EV_RXRR", 110 "EV_RXREJ", 111 "EV_RXRNR", 112 "EV_RXFRMR", 113 "Illegal Event" 114 }; 115 #endif 116 117 static void F_TU01 __P((l2_softc_t *, struct isdn_l3_driver *)); 118 static void F_TU03 __P((l2_softc_t *, struct isdn_l3_driver *)); 119 120 static void F_TA03 __P((l2_softc_t *, struct isdn_l3_driver *)); 121 static void F_TA04 __P((l2_softc_t *, struct isdn_l3_driver *)); 122 static void F_TA05 __P((l2_softc_t *, struct isdn_l3_driver *)); 123 124 static void F_TE03 __P((l2_softc_t *, struct isdn_l3_driver *)); 125 static void F_TE04 __P((l2_softc_t *, struct isdn_l3_driver *)); 126 static void F_TE05 __P((l2_softc_t *, struct isdn_l3_driver *)); 127 128 static void F_T01 __P((l2_softc_t *, struct isdn_l3_driver *)); 129 static void F_T05 __P((l2_softc_t *, struct isdn_l3_driver *)); 130 static void F_T06 __P((l2_softc_t *, struct isdn_l3_driver *)); 131 static void F_T07 __P((l2_softc_t *, struct isdn_l3_driver *)); 132 static void F_T08 __P((l2_softc_t *, struct isdn_l3_driver *)); 133 static void F_T09 __P((l2_softc_t *, struct isdn_l3_driver *)); 134 static void F_T10 __P((l2_softc_t *, struct isdn_l3_driver *)); 135 static void F_T13 __P((l2_softc_t *, struct isdn_l3_driver *)); 136 137 static void F_AE01 __P((l2_softc_t *, struct isdn_l3_driver *)); 138 static void F_AE05 __P((l2_softc_t *, struct isdn_l3_driver *)); 139 static void F_AE06 __P((l2_softc_t *, struct isdn_l3_driver *)); 140 static void F_AE07 __P((l2_softc_t *, struct isdn_l3_driver *)); 141 static void F_AE08 __P((l2_softc_t *, struct isdn_l3_driver *)); 142 static void F_AE09 __P((l2_softc_t *, struct isdn_l3_driver *)); 143 static void F_AE10 __P((l2_softc_t *, struct isdn_l3_driver *)); 144 static void F_AE11 __P((l2_softc_t *, struct isdn_l3_driver *)); 145 static void F_AE12 __P((l2_softc_t *, struct isdn_l3_driver *)); 146 147 static void F_AR05 __P((l2_softc_t *, struct isdn_l3_driver *)); 148 static void F_AR06 __P((l2_softc_t *, struct isdn_l3_driver *)); 149 static void F_AR07 __P((l2_softc_t *, struct isdn_l3_driver *)); 150 static void F_AR08 __P((l2_softc_t *, struct isdn_l3_driver *)); 151 static void F_AR09 __P((l2_softc_t *, struct isdn_l3_driver *)); 152 static void F_AR10 __P((l2_softc_t *, struct isdn_l3_driver *)); 153 static void F_AR11 __P((l2_softc_t *, struct isdn_l3_driver *)); 154 155 static void F_MF01 __P((l2_softc_t *, struct isdn_l3_driver *)); 156 static void F_MF05 __P((l2_softc_t *, struct isdn_l3_driver *)); 157 static void F_MF06 __P((l2_softc_t *, struct isdn_l3_driver *)); 158 static void F_MF07 __P((l2_softc_t *, struct isdn_l3_driver *)); 159 static void F_MF08 __P((l2_softc_t *, struct isdn_l3_driver *)); 160 static void F_MF09 __P((l2_softc_t *, struct isdn_l3_driver *)); 161 static void F_MF10 __P((l2_softc_t *, struct isdn_l3_driver *)); 162 static void F_MF11 __P((l2_softc_t *, struct isdn_l3_driver *)); 163 static void F_MF12 __P((l2_softc_t *, struct isdn_l3_driver *)); 164 static void F_MF13 __P((l2_softc_t *, struct isdn_l3_driver *)); 165 static void F_MF14 __P((l2_softc_t *, struct isdn_l3_driver *)); 166 static void F_MF15 __P((l2_softc_t *, struct isdn_l3_driver *)); 167 static void F_MF16 __P((l2_softc_t *, struct isdn_l3_driver *)); 168 static void F_MF17 __P((l2_softc_t *, struct isdn_l3_driver *)); 169 static void F_MF18 __P((l2_softc_t *, struct isdn_l3_driver *)); 170 static void F_MF19 __P((l2_softc_t *, struct isdn_l3_driver *)); 171 static void F_MF20 __P((l2_softc_t *, struct isdn_l3_driver *)); 172 173 static void F_TR01 __P((l2_softc_t *, struct isdn_l3_driver *)); 174 static void F_TR05 __P((l2_softc_t *, struct isdn_l3_driver *)); 175 static void F_TR06 __P((l2_softc_t *, struct isdn_l3_driver *)); 176 static void F_TR07 __P((l2_softc_t *, struct isdn_l3_driver *)); 177 static void F_TR08 __P((l2_softc_t *, struct isdn_l3_driver *)); 178 static void F_TR09 __P((l2_softc_t *, struct isdn_l3_driver *)); 179 static void F_TR10 __P((l2_softc_t *, struct isdn_l3_driver *)); 180 static void F_TR11 __P((l2_softc_t *, struct isdn_l3_driver *)); 181 static void F_TR12 __P((l2_softc_t *, struct isdn_l3_driver *)); 182 static void F_TR13 __P((l2_softc_t *, struct isdn_l3_driver *)); 183 static void F_TR15 __P((l2_softc_t *, struct isdn_l3_driver *)); 184 static void F_TR16 __P((l2_softc_t *, struct isdn_l3_driver *)); 185 static void F_TR17 __P((l2_softc_t *, struct isdn_l3_driver *)); 186 static void F_TR18 __P((l2_softc_t *, struct isdn_l3_driver *)); 187 static void F_TR19 __P((l2_softc_t *, struct isdn_l3_driver *)); 188 static void F_TR20 __P((l2_softc_t *, struct isdn_l3_driver *)); 189 static void F_ILL __P((l2_softc_t *, struct isdn_l3_driver *)); 190 static void F_NCNA __P((l2_softc_t *, struct isdn_l3_driver *)); 191 192 /*---------------------------------------------------------------------------* 193 * FSM illegal state default action 194 *---------------------------------------------------------------------------*/ 195 static void 196 F_ILL(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 197 { 198 NDBGL2(L2_F_ERR, "FSM function F_ILL executing"); 199 } 200 201 /*---------------------------------------------------------------------------* 202 * FSM No change, No action 203 *---------------------------------------------------------------------------*/ 204 static void 205 F_NCNA(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 206 { 207 NDBGL2(L2_F_MSG, "FSM function F_NCNA executing"); 208 } 209 210 /*---------------------------------------------------------------------------* 211 * layer 2 state transition table 212 *---------------------------------------------------------------------------*/ 213 struct l2state_tab { 214 void (*func) __P((l2_softc_t *, struct isdn_l3_driver *)); /* function to execute */ 215 int newstate; /* next state */ 216 } l2state_tab[N_EVENTS][N_STATES] = { 217 218 /* STATE: ST_TEI_UNAS, ST_ASG_AW_TEI, ST_EST_AW_TEI, ST_TEI_ASGD, ST_AW_EST, ST_AW_REL, ST_MULTIFR, ST_TIMREC, ST_SUBSET, ILLEGAL STATE */ 219 /* -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ 220 /*EV_DLESTRQ*/{ {F_TU01, ST_EST_AW_TEI}, {F_NCNA, ST_EST_AW_TEI}, {F_ILL, ST_ILL}, {F_T01, ST_AW_EST}, {F_AE01, ST_AW_EST}, {F_ILL, ST_ILL}, {F_MF01, ST_AW_EST}, {F_TR01, ST_AW_EST}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 221 /*EV_DLUDTRQ*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 222 /*EV_MDASGRQ*/{ {F_TU03, ST_TEI_ASGD}, {F_TA03, ST_TEI_ASGD}, {F_TE03, ST_AW_EST}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 223 /*EV_MDERRRS*/{ {F_ILL, ST_ILL}, {F_TA04, ST_TEI_UNAS}, {F_TE04, ST_TEI_UNAS}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 224 /*EV_PSDEACT*/{ {F_ILL, ST_ILL}, {F_TA05, ST_TEI_UNAS}, {F_TE05, ST_TEI_UNAS}, {F_T05, ST_TEI_ASGD}, {F_AE05, ST_TEI_ASGD}, {F_AR05, ST_TEI_ASGD}, {F_MF05, ST_TEI_ASGD}, {F_TR05, ST_TEI_ASGD}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 225 /*EV_MDREMRQ*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_T06, ST_TEI_UNAS}, {F_AE06, ST_TEI_UNAS}, {F_AR06, ST_TEI_UNAS}, {F_MF06, ST_TEI_UNAS}, {F_TR06, ST_TEI_UNAS}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 226 /*EV_RXSABME*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_T07, ST_SUBSET}, {F_AE07, ST_AW_EST}, {F_AR07, ST_AW_REL}, {F_MF07, ST_MULTIFR}, {F_TR07, ST_MULTIFR}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 227 /*EV_RXDISC */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_T08, ST_TEI_ASGD}, {F_AE08, ST_AW_EST}, {F_AR08, ST_AW_REL}, {F_MF08, ST_TEI_ASGD}, {F_TR08, ST_TEI_ASGD}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 228 /*EV_RXUA */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_T09, ST_TEI_ASGD}, {F_AE09, ST_SUBSET}, {F_AR09, ST_SUBSET}, {F_MF09, ST_MULTIFR}, {F_TR09, ST_TIMREC}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 229 /*EV_RXDM */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_T10, ST_SUBSET}, {F_AE10, ST_SUBSET}, {F_AR10, ST_SUBSET}, {F_MF10, ST_SUBSET}, {F_TR10, ST_AW_EST}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 230 /*EV_T200EXP*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_AE11, ST_SUBSET}, {F_AR11, ST_SUBSET}, {F_MF11, ST_TIMREC}, {F_TR11, ST_SUBSET}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 231 /*EV_DLDATRQ*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_AE12, ST_AW_EST}, {F_ILL, ST_ILL}, {F_MF12, ST_MULTIFR}, {F_TR12, ST_TIMREC}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 232 /*EV_DLRELRQ*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_T13, ST_TEI_ASGD}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF13, ST_AW_REL}, {F_TR13, ST_AW_REL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 233 /*EV_T203EXP*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF14, ST_TIMREC}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 234 /*EV_OWNBUSY*/{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF15, ST_MULTIFR}, {F_TR15, ST_TIMREC}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 235 /*EV_OWNRDY */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF16, ST_MULTIFR}, {F_TR16, ST_TIMREC}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 236 /*EV_RXRR */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF17, ST_SUBSET}, {F_TR17, ST_SUBSET}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 237 /*EV_RXREJ */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF18, ST_SUBSET}, {F_TR18, ST_SUBSET}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 238 /*EV_RXRNR */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF19, ST_SUBSET}, {F_TR19, ST_SUBSET}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 239 /*EV_RXFRMR */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_MF20, ST_AW_EST}, {F_TR20, ST_AW_EST}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} }, 240 /*EV_ILL */{ {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL}, {F_ILL, ST_ILL} } 241 }; 242 243 /*---------------------------------------------------------------------------* 244 * event handler, executes function and sets new state 245 *---------------------------------------------------------------------------*/ 246 void i4b_next_l2state(l2_softc_t *l2sc, struct isdn_l3_driver *drv, int event) 247 { 248 int currstate, newstate; 249 int (*savpostfsmfunc)(struct isdn_l3_driver *) = NULL; 250 251 /* check event number */ 252 if(event > N_EVENTS) 253 panic("i4b_l2fsm.c: event > N_EVENTS"); 254 255 /* get current state and check it */ 256 if((currstate = l2sc->Q921_state) > N_STATES) /* failsafe */ 257 panic("i4b_l2fsm.c: currstate > N_STATES"); 258 259 /* get new state and check it */ 260 if((newstate = l2state_tab[event][currstate].newstate) > N_STATES) 261 panic("i4b_l2fsm.c: newstate > N_STATES"); 262 263 264 if(newstate != ST_SUBSET) 265 { /* state function does NOT set new state */ 266 NDBGL2(L2_F_MSG, "FSM event [%s]: [%s/%d => %s/%d]", 267 l2event_text[event], 268 l2state_text[currstate], currstate, 269 l2state_text[newstate], newstate); 270 } 271 272 /* execute state transition function */ 273 (*l2state_tab[event][currstate].func)(l2sc, drv); 274 275 if(newstate == ST_SUBSET) 276 { /* state function DOES set new state */ 277 NDBGL2(L2_F_MSG, "FSM S-event [%s]: [%s => %s]", l2event_text[event], 278 l2state_text[currstate], 279 l2state_text[l2sc->Q921_state]); 280 } 281 282 /* check for illegal new state */ 283 284 if(newstate == ST_ILL) 285 { 286 newstate = currstate; 287 NDBGL2(L2_F_ERR, "FSM illegal state, state = %s, event = %s!", 288 l2state_text[currstate], 289 l2event_text[event]); 290 } 291 292 /* check if state machine function has to set new state */ 293 294 if(newstate != ST_SUBSET) 295 l2sc->Q921_state = newstate; /* no, we set new state */ 296 297 if(l2sc->postfsmfunc != NULL) 298 { 299 NDBGL2(L2_F_MSG, "FSM executing postfsmfunc!"); 300 /* try to avoid an endless loop */ 301 savpostfsmfunc = l2sc->postfsmfunc; 302 l2sc->postfsmfunc = NULL; 303 (*savpostfsmfunc)(l2sc->postfsmarg); 304 } 305 } 306 307 #if DO_I4B_DEBUG 308 /*---------------------------------------------------------------------------* 309 * return pointer to current state description 310 *---------------------------------------------------------------------------*/ 311 const char *i4b_print_l2state(l2_softc_t *l2sc) 312 { 313 return(l2state_text[l2sc->Q921_state]); 314 } 315 #endif 316 317 /*---------------------------------------------------------------------------* 318 * FSM state ST_TEI_UNAS event dl establish request 319 *---------------------------------------------------------------------------*/ 320 static void 321 F_TU01(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 322 { 323 NDBGL2(L2_F_MSG, "FSM function F_TU01 executing"); 324 i4b_mdl_assign_ind(l2sc); 325 } 326 327 /*---------------------------------------------------------------------------* 328 * FSM state ST_TEI_UNAS event mdl assign request 329 *---------------------------------------------------------------------------*/ 330 static void 331 F_TU03(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 332 { 333 NDBGL2(L2_F_MSG, "FSM function F_TU03 executing"); 334 } 335 336 /*---------------------------------------------------------------------------* 337 * FSM state ST_ASG_AW_TEI event mdl assign request 338 *---------------------------------------------------------------------------*/ 339 static void 340 F_TA03(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 341 { 342 NDBGL2(L2_F_MSG, "FSM function F_TA03 executing"); 343 } 344 345 /*---------------------------------------------------------------------------* 346 * FSM state ST_ASG_AW_TEI event mdl error response 347 *---------------------------------------------------------------------------*/ 348 static void 349 F_TA04(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 350 { 351 NDBGL2(L2_F_MSG, "FSM function F_TA04 executing"); 352 } 353 354 /*---------------------------------------------------------------------------* 355 * FSM state ST_ASG_AW_TEI event persistent deactivation 356 *---------------------------------------------------------------------------*/ 357 static void 358 F_TA05(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 359 { 360 NDBGL2(L2_F_MSG, "FSM function F_TA05 executing"); 361 } 362 363 /*---------------------------------------------------------------------------* 364 * FSM state ST_EST_AW_TEI event mdl assign request 365 *---------------------------------------------------------------------------*/ 366 static void 367 F_TE03(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 368 { 369 NDBGL2(L2_F_MSG, "FSM function F_TE03 executing"); 370 i4b_establish_data_link(l2sc); 371 l2sc->l3initiated = 1; 372 } 373 374 /*---------------------------------------------------------------------------* 375 * FSM state ST_EST_AW_TEI event mdl error response 376 *---------------------------------------------------------------------------*/ 377 static void 378 F_TE04(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 379 { 380 NDBGL2(L2_F_MSG, "FSM function F_TE04 executing"); 381 l2sc->postfsmarg = l2sc->drv; 382 l2sc->postfsmfunc = i4b_dl_release_ind; 383 } 384 385 /*---------------------------------------------------------------------------* 386 * FSM state ST_EST_AW_TEI event persistent deactivation 387 *---------------------------------------------------------------------------*/ 388 static void 389 F_TE05(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 390 { 391 NDBGL2(L2_F_MSG, "FSM function F_TE05 executing"); 392 l2sc->postfsmarg = l2sc->drv; 393 l2sc->postfsmfunc = i4b_dl_release_ind; 394 } 395 396 /*---------------------------------------------------------------------------* 397 * FSM state ST_TEI_ASGD event dl establish request 398 *---------------------------------------------------------------------------*/ 399 static void 400 F_T01(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 401 { 402 NDBGL2(L2_F_MSG, "FSM function F_T01 executing"); 403 i4b_establish_data_link(l2sc); 404 l2sc->l3initiated = 1; 405 } 406 407 /*---------------------------------------------------------------------------* 408 * FSM state ST_TEI_ASGD event persistent deactivation 409 *---------------------------------------------------------------------------*/ 410 static void 411 F_T05(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 412 { 413 NDBGL2(L2_F_MSG, "FSM function F_T05 executing"); 414 } 415 416 /*---------------------------------------------------------------------------* 417 * FSM state ST_TEI_ASGD event mdl remove request 418 *---------------------------------------------------------------------------*/ 419 static void 420 F_T06(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 421 { 422 NDBGL2(L2_F_MSG, "FSM function F_T06 executing"); 423 /*XXX*/ i4b_mdl_assign_ind(l2sc); 424 } 425 426 /*---------------------------------------------------------------------------* 427 * FSM state ST_TEI_ASGD event rx'd SABME 428 *---------------------------------------------------------------------------*/ 429 static void 430 F_T07(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 431 { 432 NDBGL2(L2_F_MSG, "FSM function F_T07 executing"); 433 434 /* XXX */ 435 #ifdef NOTDEF 436 if(NOT able to establish) 437 { 438 i4b_tx_dm(l2sc, l2sc->rxd_PF); 439 l2sc->Q921_state = ST_TEI_ASGD; 440 return; 441 } 442 #endif 443 444 i4b_clear_exception_conditions(l2sc); 445 446 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE); 447 448 i4b_tx_ua(l2sc, l2sc->rxd_PF); 449 450 l2sc->vs = 0; 451 l2sc->va = 0; 452 l2sc->vr = 0; 453 454 l2sc->postfsmarg = l2sc->drv; 455 l2sc->postfsmfunc = i4b_dl_establish_ind; 456 457 i4b_T203_start(l2sc); 458 459 l2sc->Q921_state = ST_MULTIFR; 460 } 461 462 /*---------------------------------------------------------------------------* 463 * FSM state ST_TEI_ASGD event rx'd DISC 464 *---------------------------------------------------------------------------*/ 465 static void 466 F_T08(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 467 { 468 NDBGL2(L2_F_MSG, "FSM function F_T08 executing"); 469 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_IDLE); 470 i4b_tx_ua(l2sc, l2sc->rxd_PF); 471 } 472 473 /*---------------------------------------------------------------------------* 474 * FSM state ST_TEI_ASGD event rx'd UA 475 *---------------------------------------------------------------------------*/ 476 static void 477 F_T09(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 478 { 479 NDBGL2(L2_F_MSG, "FSM function F_T09 executing"); 480 i4b_mdl_error_ind(l2sc, "F_T09", MDL_ERR_C); 481 i4b_mdl_error_ind(l2sc, "F_T09", MDL_ERR_D); 482 } 483 484 /*---------------------------------------------------------------------------* 485 * FSM state ST_TEI_ASGD event rx'd DM 486 *---------------------------------------------------------------------------*/ 487 static void 488 F_T10(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 489 { 490 NDBGL2(L2_F_MSG, "FSM function F_T10 executing"); 491 492 if(l2sc->rxd_PF) 493 { 494 l2sc->Q921_state = ST_TEI_ASGD; 495 } 496 else 497 { 498 #ifdef NOTDEF 499 if(NOT able_to_etablish) 500 { 501 l2sc->Q921_state = ST_TEI_ASGD; 502 return; 503 } 504 #endif 505 i4b_establish_data_link(l2sc); 506 507 l2sc->l3initiated = 1; 508 509 l2sc->Q921_state = ST_AW_EST; 510 } 511 } 512 513 /*---------------------------------------------------------------------------* 514 * FSM state ST_TEI_ASGD event dl release request 515 *---------------------------------------------------------------------------*/ 516 static void 517 F_T13(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 518 { 519 NDBGL2(L2_F_MSG, "FSM function F_T13 executing"); 520 l2sc->postfsmarg = l2sc->drv; 521 l2sc->postfsmfunc = i4b_dl_release_cnf; 522 } 523 524 /*---------------------------------------------------------------------------* 525 * FSM state ST_AW_EST event dl establish request 526 *---------------------------------------------------------------------------*/ 527 static void 528 F_AE01(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 529 { 530 NDBGL2(L2_F_MSG, "FSM function F_AE01 executing"); 531 532 i4b_Dcleanifq(&l2sc->i_queue); 533 534 l2sc->l3initiated = 1; 535 } 536 537 /*---------------------------------------------------------------------------* 538 * FSM state ST_AW_EST event persistent deactivation 539 *---------------------------------------------------------------------------*/ 540 static void 541 F_AE05(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 542 { 543 NDBGL2(L2_F_MSG, "FSM function F_AE05 executing"); 544 545 i4b_Dcleanifq(&l2sc->i_queue); 546 547 l2sc->postfsmarg = l2sc->drv; 548 l2sc->postfsmfunc = i4b_dl_release_ind; 549 550 i4b_T200_stop(l2sc); 551 } 552 553 /*---------------------------------------------------------------------------* 554 * FSM state ST_AW_EST event mdl remove request 555 *---------------------------------------------------------------------------*/ 556 static void 557 F_AE06(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 558 { 559 NDBGL2(L2_F_MSG, "FSM function F_AE06 executing"); 560 561 i4b_Dcleanifq(&l2sc->i_queue); 562 563 l2sc->postfsmarg = l2sc->drv; 564 l2sc->postfsmfunc = i4b_dl_release_ind; 565 566 i4b_T200_stop(l2sc); 567 568 /*XXX*/ i4b_mdl_assign_ind(l2sc); 569 } 570 571 /*---------------------------------------------------------------------------* 572 * FSM state ST_AW_EST event rx'd SABME 573 *---------------------------------------------------------------------------*/ 574 static void 575 F_AE07(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 576 { 577 NDBGL2(L2_F_MSG, "FSM function F_AE07 executing"); 578 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE); 579 i4b_tx_ua(l2sc, l2sc->rxd_PF); 580 } 581 582 /*---------------------------------------------------------------------------* 583 * FSM state ST_AW_EST event rx'd DISC 584 *---------------------------------------------------------------------------*/ 585 static void 586 F_AE08(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 587 { 588 NDBGL2(L2_F_MSG, "FSM function F_AE08 executing"); 589 i4b_tx_dm(l2sc, l2sc->rxd_PF); 590 } 591 592 /*---------------------------------------------------------------------------* 593 * FSM state ST_AW_EST event rx'd UA 594 *---------------------------------------------------------------------------*/ 595 static void 596 F_AE09(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 597 { 598 NDBGL2(L2_F_MSG, "FSM function F_AE09 executing"); 599 600 if(l2sc->rxd_PF == 0) 601 { 602 i4b_mdl_error_ind(l2sc, "F_AE09", MDL_ERR_D); 603 l2sc->Q921_state = ST_AW_EST; 604 } 605 else 606 { 607 if(l2sc->l3initiated) 608 { 609 l2sc->l3initiated = 0; 610 l2sc->vr = 0; 611 l2sc->postfsmarg = l2sc->drv; 612 l2sc->postfsmfunc = i4b_dl_establish_cnf; 613 } 614 else 615 { 616 if(l2sc->vs != l2sc->va) 617 { 618 i4b_Dcleanifq(&l2sc->i_queue); 619 l2sc->postfsmarg = l2sc->drv; 620 l2sc->postfsmfunc = i4b_dl_establish_ind; 621 } 622 } 623 624 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE); 625 626 i4b_T200_stop(l2sc); 627 i4b_T203_start(l2sc); 628 629 l2sc->vs = 0; 630 l2sc->va = 0; 631 632 l2sc->Q921_state = ST_MULTIFR; 633 } 634 } 635 636 /*---------------------------------------------------------------------------* 637 * FSM state ST_AW_EST event rx'd DM 638 *---------------------------------------------------------------------------*/ 639 static void 640 F_AE10(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 641 { 642 NDBGL2(L2_F_MSG, "FSM function F_AE10 executing"); 643 644 if(l2sc->rxd_PF == 0) 645 { 646 l2sc->Q921_state = ST_AW_EST; 647 } 648 else 649 { 650 i4b_Dcleanifq(&l2sc->i_queue); 651 652 l2sc->postfsmarg = l2sc->drv; 653 l2sc->postfsmfunc = i4b_dl_release_ind; 654 655 i4b_T200_stop(l2sc); 656 657 l2sc->Q921_state = ST_TEI_ASGD; 658 } 659 } 660 661 /*---------------------------------------------------------------------------* 662 * FSM state ST_AW_EST event T200 expiry 663 *---------------------------------------------------------------------------*/ 664 static void 665 F_AE11(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 666 { 667 NDBGL2(L2_F_MSG, "FSM function F_AE11 executing"); 668 669 if(l2sc->RC >= N200) 670 { 671 i4b_Dcleanifq(&l2sc->i_queue); 672 673 i4b_mdl_error_ind(l2sc, "F_AE11", MDL_ERR_G); 674 675 l2sc->postfsmarg = l2sc->drv; 676 l2sc->postfsmfunc = i4b_dl_release_ind; 677 678 l2sc->Q921_state = ST_TEI_ASGD; 679 } 680 else 681 { 682 l2sc->RC++; 683 684 i4b_tx_sabme(l2sc, P1); 685 686 i4b_T200_start(l2sc); 687 688 l2sc->Q921_state = ST_AW_EST; 689 } 690 } 691 692 /*---------------------------------------------------------------------------* 693 * FSM state ST_AW_EST event dl data request 694 *---------------------------------------------------------------------------*/ 695 static void 696 F_AE12(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 697 { 698 NDBGL2(L2_F_MSG, "FSM function F_AE12 executing"); 699 700 if(l2sc->l3initiated == 0) 701 { 702 i4b_i_frame_queued_up(l2sc); 703 } 704 } 705 706 /*---------------------------------------------------------------------------* 707 * FSM state ST_AW_REL event persistent deactivation 708 *---------------------------------------------------------------------------*/ 709 static void 710 F_AR05(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 711 { 712 NDBGL2(L2_F_MSG, "FSM function F_AR05 executing"); 713 714 l2sc->postfsmarg = l2sc->drv; 715 l2sc->postfsmfunc = i4b_dl_release_cnf; 716 717 i4b_T200_stop(l2sc); 718 } 719 720 /*---------------------------------------------------------------------------* 721 * FSM state ST_AW_REL event mdl remove request 722 *---------------------------------------------------------------------------*/ 723 static void 724 F_AR06(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 725 { 726 NDBGL2(L2_F_MSG, "FSM function F_AR06 executing"); 727 728 l2sc->postfsmarg = l2sc->drv; 729 l2sc->postfsmfunc = i4b_dl_release_cnf; 730 731 i4b_T200_stop(l2sc); 732 733 /*XXX*/ i4b_mdl_assign_ind(l2sc); 734 } 735 736 /*---------------------------------------------------------------------------* 737 * FSM state ST_AW_REL event rx'd SABME 738 *---------------------------------------------------------------------------*/ 739 static void 740 F_AR07(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 741 { 742 NDBGL2(L2_F_MSG, "FSM function F_AR07 executing"); 743 i4b_tx_dm(l2sc, l2sc->rxd_PF); 744 } 745 746 /*---------------------------------------------------------------------------* 747 * FSM state ST_AW_REL event rx'd DISC 748 *---------------------------------------------------------------------------*/ 749 static void 750 F_AR08(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 751 { 752 NDBGL2(L2_F_MSG, "FSM function F_AR08 executing"); 753 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_IDLE); 754 i4b_tx_ua(l2sc, l2sc->rxd_PF); 755 } 756 757 /*---------------------------------------------------------------------------* 758 * FSM state ST_AW_REL event rx'd UA 759 *---------------------------------------------------------------------------*/ 760 static void 761 F_AR09(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 762 { 763 NDBGL2(L2_F_MSG, "FSM function F_AR09 executing"); 764 765 if(l2sc->rxd_PF) 766 { 767 l2sc->postfsmarg = l2sc->drv; 768 l2sc->postfsmfunc = i4b_dl_release_cnf; 769 770 i4b_T200_stop(l2sc); 771 772 l2sc->Q921_state = ST_TEI_ASGD; 773 } 774 else 775 { 776 i4b_mdl_error_ind(l2sc, "F_AR09", MDL_ERR_D); 777 778 l2sc->Q921_state = ST_AW_REL; 779 } 780 } 781 782 /*---------------------------------------------------------------------------* 783 * FSM state ST_AW_REL event rx'd DM 784 *---------------------------------------------------------------------------*/ 785 static void 786 F_AR10(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 787 { 788 NDBGL2(L2_F_MSG, "FSM function F_AR10 executing"); 789 790 if(l2sc->rxd_PF) 791 { 792 l2sc->postfsmarg = l2sc->drv; 793 l2sc->postfsmfunc = i4b_dl_release_cnf; 794 795 i4b_T200_stop(l2sc); 796 797 l2sc->Q921_state = ST_TEI_ASGD; 798 } 799 else 800 { 801 l2sc->Q921_state = ST_AW_REL; 802 } 803 } 804 805 /*---------------------------------------------------------------------------* 806 * FSM state ST_AW_REL event T200 expiry 807 *---------------------------------------------------------------------------*/ 808 static void 809 F_AR11(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 810 { 811 NDBGL2(L2_F_MSG, "FSM function F_AR11 executing"); 812 813 if(l2sc->RC >= N200) 814 { 815 i4b_mdl_error_ind(l2sc, "F_AR11", MDL_ERR_H); 816 817 l2sc->postfsmarg = l2sc->drv; 818 l2sc->postfsmfunc = i4b_dl_release_cnf; 819 820 l2sc->Q921_state = ST_TEI_ASGD; 821 } 822 else 823 { 824 l2sc->RC++; 825 826 i4b_tx_disc(l2sc, P1); 827 828 i4b_T200_start(l2sc); 829 830 l2sc->Q921_state = ST_AW_REL; 831 } 832 } 833 834 /*---------------------------------------------------------------------------* 835 * FSM state ST_MULTIFR event dl establish request 836 *---------------------------------------------------------------------------*/ 837 static void 838 F_MF01(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 839 { 840 NDBGL2(L2_F_MSG, "FSM function F_MF01 executing"); 841 842 i4b_Dcleanifq(&l2sc->i_queue); 843 844 i4b_establish_data_link(l2sc); 845 846 l2sc->l3initiated = 1; 847 } 848 849 /*---------------------------------------------------------------------------* 850 * FSM state ST_MULTIFR event persistent deactivation 851 *---------------------------------------------------------------------------*/ 852 static void 853 F_MF05(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 854 { 855 NDBGL2(L2_F_MSG, "FSM function F_MF05 executing"); 856 857 i4b_Dcleanifq(&l2sc->i_queue); 858 859 l2sc->postfsmarg = l2sc->drv; 860 l2sc->postfsmfunc = i4b_dl_release_ind; 861 862 i4b_T200_stop(l2sc); 863 i4b_T203_stop(l2sc); 864 } 865 866 /*---------------------------------------------------------------------------* 867 * FSM state ST_MULTIFR event mdl remove request 868 *---------------------------------------------------------------------------*/ 869 static void 870 F_MF06(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 871 { 872 NDBGL2(L2_F_MSG, "FSM function F_MF06 executing"); 873 874 i4b_Dcleanifq(&l2sc->i_queue); 875 876 l2sc->postfsmarg = l2sc->drv; 877 l2sc->postfsmfunc = i4b_dl_release_ind; 878 879 i4b_T200_stop(l2sc); 880 i4b_T203_stop(l2sc); 881 882 /*XXX*/ i4b_mdl_assign_ind(l2sc); 883 } 884 885 /*---------------------------------------------------------------------------* 886 * FSM state ST_MULTIFR event rx'd SABME 887 *---------------------------------------------------------------------------*/ 888 static void 889 F_MF07(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 890 { 891 NDBGL2(L2_F_MSG, "FSM function F_MF07 executing"); 892 893 i4b_clear_exception_conditions(l2sc); 894 895 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE); 896 897 i4b_tx_ua(l2sc, l2sc->rxd_PF); 898 899 i4b_mdl_error_ind(l2sc, "F_MF07", MDL_ERR_F); 900 901 if(l2sc->vs != l2sc->va) 902 { 903 i4b_Dcleanifq(&l2sc->i_queue); 904 905 l2sc->postfsmarg = l2sc->drv; 906 l2sc->postfsmfunc = i4b_dl_establish_ind; 907 } 908 909 i4b_T200_stop(l2sc); 910 i4b_T203_start(l2sc); 911 912 l2sc->vs = 0; 913 l2sc->va = 0; 914 l2sc->vr = 0; 915 } 916 917 /*---------------------------------------------------------------------------* 918 * FSM state ST_MULTIFR event rx'd DISC 919 *---------------------------------------------------------------------------*/ 920 static void 921 F_MF08(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 922 { 923 NDBGL2(L2_F_MSG, "FSM function F_MF08 executing"); 924 925 i4b_Dcleanifq(&l2sc->i_queue); 926 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_IDLE); 927 i4b_tx_ua(l2sc, l2sc->rxd_PF); 928 929 l2sc->postfsmarg = l2sc->drv; 930 l2sc->postfsmfunc = i4b_dl_release_ind; 931 932 i4b_T200_stop(l2sc); 933 i4b_T203_stop(l2sc); 934 } 935 936 /*---------------------------------------------------------------------------* 937 * FSM state ST_MULTIFR event rx'd UA 938 *---------------------------------------------------------------------------*/ 939 static void 940 F_MF09(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 941 { 942 NDBGL2(L2_F_MSG, "FSM function F_MF09 executing"); 943 if(l2sc->rxd_PF) 944 i4b_mdl_error_ind(l2sc, "F_MF09", MDL_ERR_C); 945 else 946 i4b_mdl_error_ind(l2sc, "F_MF09", MDL_ERR_D); 947 } 948 949 /*---------------------------------------------------------------------------* 950 * FSM state ST_MULTIFR event rx'd DM 951 *---------------------------------------------------------------------------*/ 952 static void 953 F_MF10(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 954 { 955 NDBGL2(L2_F_MSG, "FSM function F_MF10 executing"); 956 957 if(l2sc->rxd_PF) 958 { 959 i4b_mdl_error_ind(l2sc, "F_MF10", MDL_ERR_B); 960 961 l2sc->Q921_state = ST_MULTIFR; 962 } 963 else 964 { 965 i4b_mdl_error_ind(l2sc, "F_MF10", MDL_ERR_E); 966 967 i4b_establish_data_link(l2sc); 968 969 l2sc->l3initiated = 0; 970 971 l2sc->Q921_state = ST_AW_EST; 972 } 973 } 974 975 /*---------------------------------------------------------------------------* 976 * FSM state ST_MULTIFR event T200 expiry 977 *---------------------------------------------------------------------------*/ 978 static void 979 F_MF11(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 980 { 981 NDBGL2(L2_F_MSG, "FSM function F_MF11 executing"); 982 983 l2sc->RC = 0; 984 985 i4b_transmit_enquire(l2sc); 986 987 l2sc->RC++; 988 } 989 990 /*---------------------------------------------------------------------------* 991 * FSM state ST_MULTIFR event dl data request 992 *---------------------------------------------------------------------------*/ 993 static void 994 F_MF12(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 995 { 996 NDBGL2(L2_F_MSG, "FSM function F_MF12 executing"); 997 998 i4b_i_frame_queued_up(l2sc); 999 } 1000 1001 /*---------------------------------------------------------------------------* 1002 * FSM state ST_MULTIFR event dl release request 1003 *---------------------------------------------------------------------------*/ 1004 static void 1005 F_MF13(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1006 { 1007 NDBGL2(L2_F_MSG, "FSM function F_MF13 executing"); 1008 1009 i4b_Dcleanifq(&l2sc->i_queue); 1010 1011 l2sc->RC = 0; 1012 1013 i4b_tx_disc(l2sc, P1); 1014 1015 i4b_T203_stop(l2sc); 1016 i4b_T200_restart(l2sc); 1017 } 1018 1019 /*---------------------------------------------------------------------------* 1020 * FSM state ST_MULTIFR event T203 expiry 1021 *---------------------------------------------------------------------------*/ 1022 static void 1023 F_MF14(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1024 { 1025 NDBGL2(L2_F_MSG, "FSM function F_MF14 executing"); 1026 1027 i4b_transmit_enquire(l2sc); 1028 1029 l2sc->RC = 0; 1030 } 1031 1032 /*---------------------------------------------------------------------------* 1033 * FSM state ST_MULTIFR event set own rx busy 1034 *---------------------------------------------------------------------------*/ 1035 static void 1036 F_MF15(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1037 { 1038 NDBGL2(L2_F_MSG, "FSM function F_MF15 executing"); 1039 1040 if(l2sc->own_busy == 0) 1041 { 1042 l2sc->own_busy = 1; 1043 1044 i4b_tx_rnr_response(l2sc, F0); /* wrong in Q.921 03/93 p 64 */ 1045 1046 l2sc->ack_pend = 0; 1047 } 1048 } 1049 1050 /*---------------------------------------------------------------------------* 1051 * FSM state ST_MULTIFR event clear own rx busy 1052 *---------------------------------------------------------------------------*/ 1053 static void 1054 F_MF16(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1055 { 1056 NDBGL2(L2_F_MSG, "FSM function F_MF16 executing"); 1057 1058 if(l2sc->own_busy != 0) 1059 { 1060 l2sc->own_busy = 0; 1061 1062 i4b_tx_rr_response(l2sc, F0); /* wrong in Q.921 03/93 p 64 */ 1063 1064 l2sc->ack_pend = 0; 1065 } 1066 } 1067 1068 /*---------------------------------------------------------------------------* 1069 * FSM state ST_MULTIFR event rx'd RR 1070 *---------------------------------------------------------------------------*/ 1071 static void 1072 F_MF17(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1073 { 1074 NDBGL2(L2_F_MSG, "FSM function F_MF17 executing"); 1075 1076 l2sc->peer_busy = 0; 1077 1078 if(l2sc->rxd_CR == CR_CMD_FROM_NT) 1079 { 1080 if(l2sc->rxd_PF == 1) 1081 { 1082 i4b_enquiry_response(l2sc); 1083 } 1084 } 1085 else 1086 { 1087 if(l2sc->rxd_PF == 1) 1088 { 1089 i4b_mdl_error_ind(l2sc, "F_MF17", MDL_ERR_A); 1090 } 1091 } 1092 1093 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1094 { 1095 if(l2sc->rxd_NR == l2sc->vs) 1096 { 1097 l2sc->va = l2sc->rxd_NR; 1098 i4b_T200_stop(l2sc); 1099 i4b_T203_restart(l2sc); 1100 } 1101 else if(l2sc->rxd_NR != l2sc->va) 1102 { 1103 l2sc->va = l2sc->rxd_NR; 1104 i4b_T200_restart(l2sc); 1105 } 1106 l2sc->Q921_state = ST_MULTIFR; 1107 } 1108 else 1109 { 1110 i4b_nr_error_recovery(l2sc); 1111 l2sc->Q921_state = ST_AW_EST; 1112 } 1113 } 1114 1115 /*---------------------------------------------------------------------------* 1116 * FSM state ST_MULTIFR event rx'd REJ 1117 *---------------------------------------------------------------------------*/ 1118 static void 1119 F_MF18(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1120 { 1121 NDBGL2(L2_F_MSG, "FSM function F_MF18 executing"); 1122 1123 l2sc->peer_busy = 0; 1124 1125 if(l2sc->rxd_CR == CR_CMD_FROM_NT) 1126 { 1127 if(l2sc->rxd_PF == 1) 1128 { 1129 i4b_enquiry_response(l2sc); 1130 } 1131 } 1132 else 1133 { 1134 if(l2sc->rxd_PF == 1) 1135 { 1136 i4b_mdl_error_ind(l2sc, "F_MF18", MDL_ERR_A); 1137 } 1138 } 1139 1140 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1141 { 1142 l2sc->va = l2sc->rxd_NR; 1143 i4b_T200_stop(l2sc); 1144 i4b_T203_start(l2sc); 1145 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR); 1146 l2sc->Q921_state = ST_MULTIFR; 1147 } 1148 else 1149 { 1150 i4b_nr_error_recovery(l2sc); 1151 l2sc->Q921_state = ST_AW_EST; 1152 } 1153 } 1154 1155 /*---------------------------------------------------------------------------* 1156 * FSM state ST_MULTIFR event rx'd RNR 1157 *---------------------------------------------------------------------------*/ 1158 static void 1159 F_MF19(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1160 { 1161 NDBGL2(L2_F_MSG, "FSM function F_MF19 executing"); 1162 1163 l2sc->peer_busy = 1; 1164 1165 if(l2sc->rxd_CR == CR_CMD_FROM_NT) 1166 { 1167 if(l2sc->rxd_PF == 1) 1168 { 1169 i4b_enquiry_response(l2sc); 1170 } 1171 } 1172 else 1173 { 1174 if(l2sc->rxd_PF == 1) 1175 { 1176 i4b_mdl_error_ind(l2sc, "F_MF19", MDL_ERR_A); 1177 } 1178 } 1179 1180 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1181 { 1182 l2sc->va = l2sc->rxd_NR; 1183 i4b_T203_stop(l2sc); 1184 i4b_T200_restart(l2sc); 1185 l2sc->Q921_state = ST_MULTIFR; 1186 } 1187 else 1188 { 1189 i4b_nr_error_recovery(l2sc); 1190 l2sc->Q921_state = ST_AW_EST; 1191 } 1192 } 1193 1194 /*---------------------------------------------------------------------------* 1195 * FSM state ST_MULTIFR event rx'd FRMR 1196 *---------------------------------------------------------------------------*/ 1197 static void 1198 F_MF20(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1199 { 1200 NDBGL2(L2_F_MSG, "FSM function F_MF20 executing"); 1201 1202 i4b_mdl_error_ind(l2sc, "F_MF20", MDL_ERR_K); 1203 1204 i4b_establish_data_link(l2sc); 1205 1206 l2sc->l3initiated = 0; 1207 } 1208 1209 /*---------------------------------------------------------------------------* 1210 * FSM state ST_TIMREC event dl establish request 1211 *---------------------------------------------------------------------------*/ 1212 static void 1213 F_TR01(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1214 { 1215 NDBGL2(L2_F_MSG, "FSM function F_TR01 executing"); 1216 1217 i4b_Dcleanifq(&l2sc->i_queue); 1218 1219 i4b_establish_data_link(l2sc); 1220 1221 l2sc->l3initiated = 1; 1222 } 1223 1224 /*---------------------------------------------------------------------------* 1225 * FSM state ST_TIMREC event persistent deactivation 1226 *---------------------------------------------------------------------------*/ 1227 static void 1228 F_TR05(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1229 { 1230 NDBGL2(L2_F_MSG, "FSM function F_TR05 executing"); 1231 1232 i4b_Dcleanifq(&l2sc->i_queue); 1233 1234 l2sc->postfsmarg = l2sc->drv; 1235 l2sc->postfsmfunc = i4b_dl_release_ind; 1236 1237 i4b_T200_stop(l2sc); 1238 } 1239 1240 /*---------------------------------------------------------------------------* 1241 * FSM state ST_TIMREC event mdl remove request 1242 *---------------------------------------------------------------------------*/ 1243 static void 1244 F_TR06(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1245 { 1246 NDBGL2(L2_F_MSG, "FSM function F_TR06 executing"); 1247 1248 i4b_Dcleanifq(&l2sc->i_queue); 1249 1250 l2sc->postfsmarg = l2sc->drv; 1251 l2sc->postfsmfunc = i4b_dl_release_ind; 1252 1253 i4b_T200_stop(l2sc); 1254 1255 /*XXX*/ i4b_mdl_assign_ind(l2sc); 1256 } 1257 1258 /*---------------------------------------------------------------------------* 1259 * FSM state ST_TIMREC event rx'd SABME 1260 *---------------------------------------------------------------------------*/ 1261 static void 1262 F_TR07(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1263 { 1264 NDBGL2(L2_F_MSG, "FSM function F_TR07 executing"); 1265 1266 i4b_clear_exception_conditions(l2sc); 1267 1268 i4b_mdl_status_ind(l2sc->drv, STI_L2STAT, LAYER_ACTIVE); 1269 1270 i4b_tx_ua(l2sc, l2sc->rxd_PF); 1271 1272 i4b_mdl_error_ind(l2sc, "F_TR07", MDL_ERR_F); 1273 1274 if(l2sc->vs != l2sc->va) 1275 { 1276 i4b_Dcleanifq(&l2sc->i_queue); 1277 1278 l2sc->postfsmarg = l2sc->drv; 1279 l2sc->postfsmfunc = i4b_dl_establish_ind; 1280 } 1281 1282 i4b_T200_stop(l2sc); 1283 i4b_T203_start(l2sc); 1284 1285 l2sc->vs = 0; 1286 l2sc->va = 0; 1287 l2sc->vr = 0; 1288 } 1289 1290 /*---------------------------------------------------------------------------* 1291 * FSM state ST_TIMREC event rx'd DISC 1292 *---------------------------------------------------------------------------*/ 1293 static void 1294 F_TR08(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1295 { 1296 NDBGL2(L2_F_MSG, "FSM function F_TR08 executing"); 1297 1298 i4b_Dcleanifq(&l2sc->i_queue); 1299 i4b_mdl_status_ind(drv, STI_L2STAT, LAYER_IDLE); 1300 i4b_tx_ua(l2sc, l2sc->rxd_PF); 1301 1302 l2sc->postfsmarg = drv; 1303 l2sc->postfsmfunc = i4b_dl_release_ind; 1304 1305 i4b_T200_stop(l2sc); 1306 } 1307 1308 /*---------------------------------------------------------------------------* 1309 * FSM state ST_TIMREC event rx'd UA 1310 *---------------------------------------------------------------------------*/ 1311 static void 1312 F_TR09(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1313 { 1314 NDBGL2(L2_F_MSG, "FSM function F_TR09 executing"); 1315 if(l2sc->rxd_PF) 1316 i4b_mdl_error_ind(l2sc, "F_TR09", MDL_ERR_C); 1317 else 1318 i4b_mdl_error_ind(l2sc, "F_TR09", MDL_ERR_D); 1319 } 1320 1321 /*---------------------------------------------------------------------------* 1322 * FSM state ST_TIMREC event rx'd DM 1323 *---------------------------------------------------------------------------*/ 1324 static void 1325 F_TR10(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1326 { 1327 NDBGL2(L2_F_MSG, "FSM function F_TR10 executing"); 1328 1329 if(l2sc->rxd_PF) 1330 { 1331 i4b_mdl_error_ind(l2sc, "F_TR10", MDL_ERR_B); 1332 } 1333 else 1334 { 1335 i4b_mdl_error_ind(l2sc, "F_TR10", MDL_ERR_E); 1336 } 1337 1338 i4b_establish_data_link(l2sc); 1339 1340 l2sc->l3initiated = 0; 1341 } 1342 1343 /*---------------------------------------------------------------------------* 1344 * FSM state ST_TIMREC event T200 expiry 1345 *---------------------------------------------------------------------------*/ 1346 static void 1347 F_TR11(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1348 { 1349 NDBGL2(L2_F_MSG, "FSM function F_TR11 executing"); 1350 1351 if(l2sc->RC >= N200) 1352 { 1353 i4b_mdl_error_ind(l2sc, "F_TR11", MDL_ERR_I); 1354 1355 i4b_establish_data_link(l2sc); 1356 1357 l2sc->l3initiated = 0; 1358 1359 l2sc->Q921_state = ST_AW_EST; 1360 } 1361 else 1362 { 1363 i4b_transmit_enquire(l2sc); 1364 1365 l2sc->RC++; 1366 1367 l2sc->Q921_state = ST_TIMREC; 1368 } 1369 } 1370 1371 /*---------------------------------------------------------------------------* 1372 * FSM state ST_TIMREC event dl data request 1373 *---------------------------------------------------------------------------*/ 1374 static void 1375 F_TR12(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1376 { 1377 NDBGL2(L2_F_MSG, "FSM function F_TR12 executing"); 1378 1379 i4b_i_frame_queued_up(l2sc); 1380 } 1381 1382 /*---------------------------------------------------------------------------* 1383 * FSM state ST_TIMREC event dl release request 1384 *---------------------------------------------------------------------------*/ 1385 static void 1386 F_TR13(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1387 { 1388 NDBGL2(L2_F_MSG, "FSM function F_TR13 executing"); 1389 1390 i4b_Dcleanifq(&l2sc->i_queue); 1391 1392 l2sc->RC = 0; 1393 1394 i4b_tx_disc(l2sc, P1); 1395 1396 i4b_T200_restart(l2sc); 1397 } 1398 1399 /*---------------------------------------------------------------------------* 1400 * FSM state ST_TIMREC event set own rx busy 1401 *---------------------------------------------------------------------------*/ 1402 static void 1403 F_TR15(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1404 { 1405 NDBGL2(L2_F_MSG, "FSM function F_TR15 executing"); 1406 1407 if(l2sc->own_busy == 0) 1408 { 1409 l2sc->own_busy = 1; 1410 1411 i4b_tx_rnr_response(l2sc, F0); 1412 1413 l2sc->ack_pend = 0; 1414 } 1415 } 1416 1417 /*---------------------------------------------------------------------------* 1418 * FSM state ST_TIMREC event clear own rx busy 1419 *---------------------------------------------------------------------------*/ 1420 static void 1421 F_TR16(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1422 { 1423 NDBGL2(L2_F_MSG, "FSM function F_TR16 executing"); 1424 1425 if(l2sc->own_busy != 0) 1426 { 1427 l2sc->own_busy = 0; 1428 1429 i4b_tx_rr_response(l2sc, F0); /* this is wrong */ 1430 /* in Q.921 03/93 p 74 ! */ 1431 l2sc->ack_pend = 0; 1432 } 1433 } 1434 1435 /*---------------------------------------------------------------------------* 1436 * FSM state ST_TIMREC event rx'd RR 1437 *---------------------------------------------------------------------------*/ 1438 static void 1439 F_TR17(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1440 { 1441 NDBGL2(L2_F_MSG, "FSM function F_TR17 executing"); 1442 1443 l2sc->peer_busy = 0; 1444 1445 if(l2sc->rxd_CR == CR_CMD_FROM_NT) 1446 { 1447 if(l2sc->rxd_PF == 1) 1448 { 1449 i4b_enquiry_response(l2sc); 1450 } 1451 } 1452 else 1453 { 1454 if(l2sc->rxd_PF == 1) 1455 { 1456 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1457 { 1458 l2sc->va = l2sc->rxd_NR; 1459 i4b_T200_stop(l2sc); 1460 i4b_T203_start(l2sc); 1461 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR); 1462 l2sc->Q921_state = ST_MULTIFR; 1463 return; 1464 } 1465 else 1466 { 1467 i4b_nr_error_recovery(l2sc); 1468 l2sc->Q921_state = ST_AW_EST; 1469 return; 1470 } 1471 } 1472 } 1473 1474 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1475 { 1476 l2sc->va = l2sc->rxd_NR; 1477 l2sc->Q921_state = ST_TIMREC; 1478 } 1479 else 1480 { 1481 i4b_nr_error_recovery(l2sc); 1482 l2sc->Q921_state = ST_AW_EST; 1483 } 1484 } 1485 1486 /*---------------------------------------------------------------------------* 1487 * FSM state ST_TIMREC event 1488 *---------------------------------------------------------------------------*/ 1489 static void 1490 F_TR18(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1491 { 1492 NDBGL2(L2_F_MSG, "FSM function F_TR18 executing"); 1493 1494 l2sc->peer_busy = 0; 1495 1496 if(l2sc->rxd_CR == CR_CMD_FROM_NT) 1497 { 1498 if(l2sc->rxd_PF == 1) 1499 { 1500 i4b_enquiry_response(l2sc); 1501 } 1502 } 1503 else 1504 { 1505 if(l2sc->rxd_PF == 1) 1506 { 1507 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1508 { 1509 l2sc->va = l2sc->rxd_NR; 1510 i4b_T200_stop(l2sc); 1511 i4b_T203_start(l2sc); 1512 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR); 1513 l2sc->Q921_state = ST_MULTIFR; 1514 return; 1515 } 1516 else 1517 { 1518 i4b_nr_error_recovery(l2sc); 1519 l2sc->Q921_state = ST_AW_EST; 1520 return; 1521 } 1522 } 1523 } 1524 1525 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1526 { 1527 l2sc->va = l2sc->rxd_NR; 1528 l2sc->Q921_state = ST_TIMREC; 1529 } 1530 else 1531 { 1532 i4b_nr_error_recovery(l2sc); 1533 l2sc->Q921_state = ST_AW_EST; 1534 } 1535 } 1536 1537 /*---------------------------------------------------------------------------* 1538 * FSM state ST_TIMREC event rx'd RNR 1539 *---------------------------------------------------------------------------*/ 1540 static void 1541 F_TR19(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1542 { 1543 NDBGL2(L2_F_MSG, "FSM function F_TR19 executing"); 1544 1545 l2sc->peer_busy = 0; 1546 1547 if(l2sc->rxd_CR == CR_CMD_FROM_NT) 1548 { 1549 if(l2sc->rxd_PF == 1) 1550 { 1551 i4b_enquiry_response(l2sc); 1552 } 1553 } 1554 else 1555 { 1556 if(l2sc->rxd_PF == 1) 1557 { 1558 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1559 { 1560 l2sc->va = l2sc->rxd_NR; 1561 i4b_T200_restart(l2sc); 1562 i4b_invoke_retransmission(l2sc, l2sc->rxd_NR); 1563 l2sc->Q921_state = ST_MULTIFR; 1564 return; 1565 } 1566 else 1567 { 1568 i4b_nr_error_recovery(l2sc); 1569 l2sc->Q921_state = ST_AW_EST; 1570 return; 1571 } 1572 } 1573 } 1574 1575 if(i4b_l2_nr_ok(l2sc->rxd_NR, l2sc->va, l2sc->vs)) 1576 { 1577 l2sc->va = l2sc->rxd_NR; 1578 l2sc->Q921_state = ST_TIMREC; 1579 } 1580 else 1581 { 1582 i4b_nr_error_recovery(l2sc); 1583 l2sc->Q921_state = ST_AW_EST; 1584 } 1585 } 1586 1587 /*---------------------------------------------------------------------------* 1588 * FSM state ST_TIMREC event rx'd FRMR 1589 *---------------------------------------------------------------------------*/ 1590 static void 1591 F_TR20(l2_softc_t *l2sc, struct isdn_l3_driver *drv) 1592 { 1593 NDBGL2(L2_F_MSG, "FSM function F_TR20 executing"); 1594 1595 i4b_mdl_error_ind(l2sc, "F_TR20", MDL_ERR_K); 1596 1597 i4b_establish_data_link(l2sc); 1598 1599 l2sc->l3initiated = 0; 1600 } 1601 1602 #endif /* NI4BQ921 > 0 */
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