Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/osfmk/ppc/Diagnostics.c
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1 /* 2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved. 3 * 4 * @APPLE_LICENSE_HEADER_START@ 5 * 6 * Copyright (c) 1999-2003 Apple Computer, Inc. All Rights Reserved. 7 * 8 * This file contains Original Code and/or Modifications of Original Code 9 * as defined in and that are subject to the Apple Public Source License 10 * Version 2.0 (the 'License'). You may not use this file except in 11 * compliance with the License. Please obtain a copy of the License at 12 * http://www.opensource.apple.com/apsl/ and read it before using this 13 * file. 14 * 15 * The Original Code and all software distributed under the License are 16 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER 17 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 18 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT. 20 * Please see the License for the specific language governing rights and 21 * limitations under the License. 22 * 23 * @APPLE_LICENSE_HEADER_END@ 24 */ 25 /* 26 * @OSF_FREE_COPYRIGHT@ 27 */ 28 /* 29 * @APPLE_FREE_COPYRIGHT@ 30 */ 31 32 /* 33 * Author: Bill Angell, Apple 34 * Date: 9/auht-aught 35 * 36 * Random diagnostics 37 */ 38 39 40 #include <kern/machine.h> 41 #include <kern/processor.h> 42 #include <mach/machine.h> 43 #include <mach/processor_info.h> 44 #include <mach/mach_types.h> 45 #include <mach/boolean.h> 46 #include <kern/thread.h> 47 #include <kern/task.h> 48 #include <mach/vm_param.h> 49 #include <vm/vm_kern.h> 50 #include <vm/vm_map.h> 51 #include <vm/vm_page.h> 52 #include <vm/pmap.h> 53 #include <ppc/exception.h> 54 #include <ppc/Firmware.h> 55 #include <ppc/low_trace.h> 56 #include <ppc/db_low_trace.h> 57 #include <ppc/mappings.h> 58 #include <ppc/pmap.h> 59 #include <ppc/mem.h> 60 #include <ppc/savearea.h> 61 #include <ppc/Diagnostics.h> 62 #include <ppc/machine_cpu.h> 63 #include <pexpert/pexpert.h> 64 #include <console/video_console.h> 65 #include <ppc/trap.h> 66 67 extern struct vc_info vinfo; 68 69 kern_return_t testPerfTrap(int trapno, struct savearea *ss, 70 unsigned int dsisr, addr64_t dar); 71 72 int diagCall(struct savearea *save) { 73 74 union { 75 unsigned long long tbase; 76 unsigned int tb[2]; 77 } ttt, adj; 78 natural_t tbu, tbu2, tbl; 79 struct per_proc_info *per_proc; /* Area for my per_proc address */ 80 int cpu, ret; 81 unsigned int tstrt, tend, temp, temp2; 82 addr64_t src, snk; 83 uint64_t scom, hid1, hid4, srrwrk, stat; 84 scomcomm sarea; 85 86 if(!(dgWork.dgFlags & enaDiagSCs)) return 0; /* If not enabled, cause an exception */ 87 88 switch(save->save_r3) { /* Select the routine */ 89 90 /* 91 * Adjust the timebase for drift recovery testing 92 */ 93 case dgAdjTB: /* Adjust the timebase */ 94 95 adj.tb[0] = 0; /* Clear high part */ 96 adj.tb[1] = save->save_r4; /* Set low order */ 97 if(adj.tb[1] & 0x80000000) adj.tb[0] = 0xFFFFFFFF; /* Propagate sign bit */ 98 99 do { /* Read current time */ 100 asm volatile(" mftbu %0" : "=r" (tbu)); 101 asm volatile(" mftb %0" : "=r" (tbl)); 102 asm volatile(" mftbu %0" : "=r" (tbu2)); 103 } while (tbu != tbu2); 104 105 ttt.tb[0] = tbu; /* Set high */ 106 ttt.tb[1] = tbl; /* Set low */ 107 108 ttt.tbase = ttt.tbase + adj.tbase; /* Increment or decrement the TB */ 109 110 tbu = ttt.tb[0]; /* Save in regular variable */ 111 tbl = ttt.tb[1]; /* Save in regular variable */ 112 113 mttb(0); /* Set low to keep from ticking */ 114 mttbu(tbu); /* Set adjusted high */ 115 mttb(tbl); /* Set adjusted low */ 116 117 return -1; /* Return no AST checking... */ 118 119 /* 120 * Return physical address of a page 121 */ 122 case dgLRA: 123 124 save->save_r3 = pmap_find_phys(current_act()->map->pmap, save->save_r4); /* Get read address */ 125 126 return -1; /* Return no AST checking... */ 127 128 /* 129 * Copy physical to virtual 130 */ 131 case dgpcpy: 132 133 134 #if 1 135 src = (save->save_r4 << 32) | (0x00000000FFFFFFFFULL & save->save_r5); /* Merge into 64-bit */ 136 snk = (save->save_r6 << 32) | (0x00000000FFFFFFFFULL & save->save_r7); /* Merge into 64-bit */ 137 save->save_r3 = copypv(src, snk, save->save_r8, save->save_r9); /* Copy the physical page */ 138 #endif 139 return 1; /* Return and check for ASTs... */ 140 141 /* 142 * Read/Write physical memory 143 */ 144 case dgprw: 145 146 src = (save->save_r5 << 32) | (0x00000000FFFFFFFFULL & save->save_r6); /* Merge into 64-bit */ 147 148 switch(save->save_r4) { /* Select the actual function */ 149 150 case 0: 151 save->save_r3 = (uint64_t)ml_phys_read_byte((unsigned int)src); 152 break; 153 154 case 1: 155 save->save_r3 = (uint64_t)ml_phys_read_byte_64(src); 156 break; 157 158 case 2: 159 save->save_r3 = (uint64_t)ml_phys_read((unsigned int)src); 160 break; 161 162 case 3: 163 save->save_r3 = (uint64_t)ml_phys_read_64(src); 164 break; 165 166 case 4: 167 ml_phys_write_byte((unsigned int)src, (unsigned int)save->save_r7); 168 break; 169 170 case 5: 171 ml_phys_write_byte_64(src, (unsigned int)save->save_r7); 172 break; 173 174 case 6: 175 ml_phys_write((unsigned int)src, (unsigned int)save->save_r7); 176 break; 177 178 case 7: 179 ml_phys_write_64(src, (unsigned int)save->save_r7); 180 break; 181 } 182 183 return 1; /* Return and check for ASTs... */ 184 185 186 /* 187 * Soft reset processor 188 */ 189 case dgreset: 190 191 cpu = save->save_r4; /* Get the requested CPU number */ 192 193 if(cpu >= NCPUS) { /* Check for bogus cpu */ 194 save->save_r3 = KERN_FAILURE; /* Set failure */ 195 return 1; 196 } 197 198 if(!machine_slot[cpu].running) return KERN_FAILURE; /* It is not running */ 199 200 per_proc = &per_proc_info[cpu]; /* Point to the processor */ 201 202 (void)PE_cpu_start(per_proc->cpu_id, 203 per_proc->start_paddr, (vm_offset_t)per_proc); 204 205 save->save_r3 = KERN_SUCCESS; /* Set scuuess */ 206 207 return 1; /* Return and check for ASTs... */ 208 209 /* 210 * Force cache flush 211 */ 212 case dgFlush: 213 214 cacheInit(); /* Blow cache */ 215 return 1; /* Return and check for ASTs... */ 216 217 /* 218 * various hack tests 219 */ 220 case dgtest: 221 222 if(save->save_r4) perfTrapHook = testPerfTrap; 223 else perfTrapHook = 0; 224 225 return 1; /* Return and check for ASTs... */ 226 227 228 229 /* 230 * Create a physical block map into the current task 231 * Don't bother to check for any errors. 232 * parms - vaddr, paddr, size, prot, attributes 233 */ 234 case dgBMphys: 235 236 pmap_map_block(current_act()->map->pmap, (addr64_t)save->save_r4, /* Map in the block */ 237 save->save_r5, save->save_r6, save->save_r7, save->save_r8, 0); 238 239 return 1; /* Return and check for ASTs... */ 240 241 242 /* 243 * Remove any mapping from the current task 244 * Don't bother to check for any errors. 245 * parms - vaddr 246 */ 247 case dgUnMap: 248 249 (void)mapping_remove(current_act()->map->pmap, save->save_r4); /* Remove mapping */ 250 return 1; /* Return and check for ASTs... */ 251 252 253 /* 254 * Allows direct control of alignment handling. 255 * 256 * The bottom bit of the parameter is used to set the control bit, enaNotifyEM. 257 */ 258 case dgAlign: 259 260 temp = dgWork.dgFlags; /* Save the old values */ 261 262 temp2 = (save->save_r4 & 1) << (31 - enaNotifyEMb); /* Move parms into flag format */ 263 dgWork.dgFlags = (temp & ~enaNotifyEM) | temp2; /* Set the flag */ 264 265 save->save_r3 = (temp >> (31 - enaNotifyEMb)) & 1; /* Return the original */ 266 267 return 1; /* Return and check for ASTs... */ 268 269 /* 270 * Return info for boot screen 271 */ 272 case dgBootScreen: 273 274 ml_set_interrupts_enabled(1); 275 (void)copyout((char *)&vinfo, CAST_DOWN(char *, save->save_r4), sizeof(struct vc_info)); /* Copy out the video info */ 276 ml_set_interrupts_enabled(0); 277 return 1; /* Return and check for ASTs... */ 278 279 /* 280 * Don't return info for boot screen 281 */ 282 case dgCPNull: 283 284 ml_set_interrupts_enabled(1); 285 (void)copyout((char *)&vinfo, CAST_DOWN(char *, save->save_r4), 0); /* Copy out nothing */ 286 ml_set_interrupts_enabled(0); 287 return 1; /* Return and check for ASTs... */ 288 289 /* 290 * Test machine check handler - only on 64-bit machines 291 */ 292 case dgmck: 293 if(!(per_proc_info[0].pf.Available & pf64Bit)) return 0; /* Leave if not correct machine */ 294 295 fwEmMck(save->save_r4, save->save_r5, save->save_r6, save->save_r7, save->save_r8, save->save_r9); /* Start injecting */ 296 297 return -1; /* Return and don't check for ASTs... */ 298 299 /* 300 * Set 64-bit on or off - only on 64-bit machines 301 */ 302 case dg64: 303 if(!(per_proc_info[0].pf.Available & pf64Bit)) return 0; /* Leave if not correct machine */ 304 305 srrwrk = save->save_srr1 >> 63; /* Save the old 64-bit bit */ 306 307 save->save_srr1 = (save->save_srr1 & 0x7FFFFFFFFFFFFFFFULL) | (save->save_r4 << 63); /* Set the requested mode */ 308 save->save_r3 = srrwrk; /* Return the old value */ 309 310 return -1; /* Return and don't check for ASTs... */ 311 312 /* 313 * Test the probe read function 314 */ 315 316 case dgProbeRead: 317 318 src = (save->save_r4 << 32) | (0x00000000FFFFFFFFULL & save->save_r5); /* Merge into 64-bit */ 319 save->save_r3 = ml_probe_read_64(src, &temp); /* Try the address */ 320 save->save_r4 = temp; /* Return the data */ 321 return -1; /* Regurn and don't check for ASTs */ 322 323 /* 324 * Do perf monitor stuff 325 */ 326 327 case dgPerfMon: 328 329 setPmon(save->save_r4, save->save_r5); /* Go load up MMCR0 and MMCR1 */ 330 return -1; /* Regurn and don't check for ASTs */ 331 332 /* 333 * Map a page 334 * Don't bother to check for any errors. 335 * parms - vaddr, paddr, prot, attributes 336 */ 337 case dgMapPage: 338 339 (void)mapping_map(current_act()->map->pmap, /* Map in the page */ 340 (addr64_t)(((save->save_r5 & 0xFFFFFFFF) << 32) | (save->save_r5 & 0xFFFFFFFF)), save->save_r6, 0, 1, VM_PROT_READ|VM_PROT_WRITE); 341 342 return -1; /* Return and check for ASTs... */ 343 344 /* 345 * SCOM interface 346 * parms - pointer to scomcomm 347 */ 348 case dgScom: 349 350 ret = copyin((unsigned int)(save->save_r4), &sarea, sizeof(scomcomm)); /* Get the data */ 351 if(ret) return 0; /* Copyin failed - return an exception */ 352 353 sarea.scomstat = 0xFFFFFFFFFFFFFFFFULL; /* Clear status */ 354 cpu = cpu_number(); /* Get us */ 355 356 if((sarea.scomcpu < NCPUS) && machine_slot[sarea.scomcpu].running) { 357 if(sarea.scomcpu == cpu) fwSCOM(&sarea); /* Do it if it is us */ 358 else { /* Otherwise, tell the other processor */ 359 (void)cpu_signal(sarea.scomcpu, SIGPcpureq, CPRQscom ,(unsigned int)&sarea); /* Ask him to do this */ 360 (void)hw_cpu_sync((unsigned long)&sarea.scomstat, LockTimeOut); /* Wait for the other processor to get its temperature */ 361 } 362 } 363 364 ret = copyout(&sarea, (unsigned int)(save->save_r4), sizeof(scomcomm)); /* Get the data */ 365 if(ret) return 0; /* Copyin failed - return an exception */ 366 367 return -1; /* Return and check for ASTs... */ 368 369 370 default: /* Handle invalid ones */ 371 return 0; /* Return an exception */ 372 373 } 374 375 }; 376 377 kern_return_t testPerfTrap(int trapno, struct savearea *ss, 378 unsigned int dsisr, addr64_t dar) { 379 380 if(trapno != T_ALIGNMENT) return KERN_FAILURE; 381 382 kprintf("alignment exception at %08X, srr1 = %08X, dsisr = %08X, dar = %08X\n", ss->save_srr0, 383 ss->save_srr1, dsisr, dar); 384 385 return KERN_SUCCESS; 386 387 }
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