Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/osfmk/ppc/misc_asm.s
Version:
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1 /* 2 * Copyright (c) 2000-2005 Apple Computer, Inc. All rights reserved. 3 * 4 * @APPLE_LICENSE_HEADER_START@ 5 * 6 * The contents of this file constitute Original Code as defined in and 7 * are subject to the Apple Public Source License Version 1.1 (the 8 * "License"). You may not use this file except in compliance with the 9 * License. Please obtain a copy of the License at 10 * http://www.apple.com/publicsource and read it before using this file. 11 * 12 * This Original Code and all software distributed under the License are 13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER 14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, 15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the 17 * License for the specific language governing rights and limitations 18 * under the License. 19 * 20 * @APPLE_LICENSE_HEADER_END@ 21 */ 22 /* 23 * @OSF_COPYRIGHT@ 24 */ 25 26 #include <mach_kdb.h> 27 #include <mach_kgdb.h> 28 #include <mach_debug.h> 29 #include <assym.s> 30 #include <ppc/asm.h> 31 #include <ppc/proc_reg.h> 32 #include <mach/ppc/vm_param.h> 33 34 /* 35 * vm_offset_t getrpc(void) - Return address of the function 36 * that called the current function 37 */ 38 39 /* By using this function, we force the caller to save its LR in a known 40 * location, which we can pick up and return. See PowerPC ELF specs. 41 */ 42 ENTRY(getrpc, TAG_NO_FRAME_USED) 43 lwz ARG0, FM_BACKPTR(r1) /* Load our backchain ptr */ 44 lwz ARG0, FM_LR_SAVE(ARG0) /* Load previously saved LR */ 45 blr /* And return */ 46 47 48 /* 49 * General entry for all debuggers. This gets us onto the debug stack and 50 * then back off at exit. We need to pass back R3 to caller. 51 */ 52 53 ENTRY(Call_Debugger, TAG_NO_FRAME_USED) 54 55 56 lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag 57 mfmsr r7 ; Get the current MSR 58 ori r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP)) ; Add the FP flag 59 mflr r0 ; Save the return 60 andc r7,r7,r8 ; Clear VEC and FP 61 mtmsr r7 ; Do it 62 isync 63 mfsprg r8,1 ; Get the current activation 64 lwz r8,ACT_PER_PROC(r8) ; Get the per_proc block 65 stw r0,FM_LR_SAVE(r1) ; Save return on current stack 66 67 lwz r9,PP_DEBSTACKPTR(r8) ; Get the debug stack 68 cmpwi r9,0 ; Are we already on it? 69 bne cdNewDeb ; No... 70 71 mr r9,r1 ; We are already on the stack, so use the current value 72 subi r9,r9,FM_REDZONE+FM_SIZE ; Carve some extra space here 73 74 cdNewDeb: li r0,0 ; Clear this out 75 stw r1,FM_ARG0(r9) ; Save the old stack pointer as if it were the first arg 76 77 stw r0,PP_DEBSTACKPTR(r8) ; Mark debug stack as busy 78 79 subi r1,r9,FM_SIZE ; Carve a new frame 80 stw r0,FM_BACKPTR(r1) ; Chain back 81 82 bl EXT(Call_DebuggerC) ; Call the "C" phase of this 83 84 lis r8,hi16(MASK(MSR_VEC)) ; Get the vector flag 85 mfmsr r0 ; Get the current MSR 86 ori r8,r8,lo16(MASK(MSR_EE)|MASK(MSR_FP)) ; Add the FP flag 87 addi r1,r1,FM_SIZE ; Pop off first stack frame 88 andc r0,r0,r8 ; Turn off all the interesting stuff 89 mtmsr r0 90 91 mfsprg r8,1 ; Get the current activation 92 lwz r8,ACT_PER_PROC(r8) ; Get the per_proc block 93 94 lwz r9,PP_DEBSTACK_TOP_SS(r8) ; Get the top of the stack 95 cmplw r1,r9 ; Have we hit the bottom of the debug stack? 96 lwz r1,FM_ARG0(r1) ; Get previous stack frame 97 lwz r0,FM_LR_SAVE(r1) ; Get return address 98 mtlr r0 ; Set the return point 99 bnelr ; Return if still on debug stack 100 101 stw r9,PP_DEBSTACKPTR(r8) ; Mark debug stack as free 102 blr 103 104 105 /* The following routines are for C-support. They are usually 106 * inlined into the C using the specifications in proc_reg.h, 107 * but if optimisation is switched off, the inlining doesn't work 108 */ 109 110 ENTRY(get_got, TAG_NO_FRAME_USED) 111 mr ARG0, r2 112 blr 113 114 ENTRY(mflr, TAG_NO_FRAME_USED) 115 mflr ARG0 116 blr 117 118 ENTRY(mfpvr, TAG_NO_FRAME_USED) 119 mfpvr ARG0 120 blr 121 122 ENTRY(mtmsr, TAG_NO_FRAME_USED) 123 mtmsr ARG0 124 isync 125 blr 126 127 ENTRY(mfmsr, TAG_NO_FRAME_USED) 128 mfmsr ARG0 129 blr 130 131 ENTRY(mtsrin, TAG_NO_FRAME_USED) 132 isync 133 mtsrin ARG0, ARG1 134 isync 135 blr 136 137 ENTRY(mfsrin, TAG_NO_FRAME_USED) 138 mfsrin ARG0, ARG0 139 blr 140 141 ENTRY(mtsdr1, TAG_NO_FRAME_USED) 142 mtsdr1 ARG0 143 blr 144 145 ENTRY(mtdar, TAG_NO_FRAME_USED) 146 mtdar ARG0 147 blr 148 149 ENTRY(mfdar, TAG_NO_FRAME_USED) 150 mfdar ARG0 151 blr 152 153 ENTRY(mtdec, TAG_NO_FRAME_USED) 154 mtdec ARG0 155 blr 156 157 ENTRY(cntlzw, TAG_NO_FRAME_USED) 158 cntlzw r3,r3 159 blr 160 161 /* Decrementer frequency and realtime|timebase processor registers 162 * are different between ppc601 and ppc603/4, we define them all. 163 */ 164 165 ENTRY(isync_mfdec, TAG_NO_FRAME_USED) 166 isync 167 mfdec ARG0 168 blr 169 170 171 ENTRY(mftb, TAG_NO_FRAME_USED) 172 mftb ARG0 173 blr 174 175 ENTRY(mftbu, TAG_NO_FRAME_USED) 176 mftbu ARG0 177 blr 178 179 ENTRY(mfrtcl, TAG_NO_FRAME_USED) 180 mfspr ARG0, 5 181 blr 182 183 ENTRY(mfrtcu, TAG_NO_FRAME_USED) 184 mfspr ARG0, 4 185 blr 186 187 ENTRY(tlbie, TAG_NO_FRAME_USED) 188 tlbie ARG0 189 blr 190 191 192 /* 193 * Performance Monitor Register Support 194 */ 195 196 ENTRY(mfmmcr0, TAG_NO_FRAME_USED) 197 mfspr r3,mmcr0 198 blr 199 200 ENTRY(mtmmcr0, TAG_NO_FRAME_USED) 201 mtspr mmcr0,r3 202 blr 203 204 ENTRY(mfmmcr1, TAG_NO_FRAME_USED) 205 mfspr r3,mmcr1 206 blr 207 208 ENTRY(mtmmcr1, TAG_NO_FRAME_USED) 209 mtspr mmcr1,r3 210 blr 211 212 ENTRY(mfmmcr2, TAG_NO_FRAME_USED) 213 mfspr r3,mmcr2 214 blr 215 216 ENTRY(mtmmcr2, TAG_NO_FRAME_USED) 217 mtspr mmcr2,r3 218 blr 219 220 ENTRY(mfpmc1, TAG_NO_FRAME_USED) 221 mfspr r3,pmc1 222 blr 223 224 ENTRY(mtpmc1, TAG_NO_FRAME_USED) 225 mtspr pmc1,r3 226 blr 227 228 ENTRY(mfpmc2, TAG_NO_FRAME_USED) 229 mfspr r3,pmc2 230 blr 231 232 ENTRY(mtpmc2, TAG_NO_FRAME_USED) 233 mtspr pmc2,r3 234 blr 235 236 ENTRY(mfpmc3, TAG_NO_FRAME_USED) 237 mfspr r3,pmc3 238 blr 239 240 ENTRY(mtpmc3, TAG_NO_FRAME_USED) 241 mtspr pmc3,r3 242 blr 243 244 ENTRY(mfpmc4, TAG_NO_FRAME_USED) 245 mfspr r3,pmc4 246 blr 247 248 ENTRY(mtpmc4, TAG_NO_FRAME_USED) 249 mtspr pmc4,r3 250 blr 251 252 ENTRY(mfsia, TAG_NO_FRAME_USED) 253 mfspr r3,sia 254 blr 255 256 ENTRY(mfsda, TAG_NO_FRAME_USED) 257 mfspr r3,sda 258 blr 259 260 .globl EXT(hid1get) 261 LEXT(hid1get) 262 263 mfspr r3,hid1 ; Get the HID1 264 blr 265 266 .globl EXT(hid0get64) 267 LEXT(hid0get64) 268 269 mfspr r4,hid0 ; Get the HID0 270 srdi r3,r4,32 ; Move top down 271 rlwinm r4,r4,0,0,31 ; Clean top 272 blr 273 274 .globl EXT(hid5set64) 275 LEXT(hid5set64) 276 277 rlwinm r3,r3,0,1,0 ; Copy low 32 int high 32 278 rlwimi r3,r4,0,0,31 ; Inser the low part behind top 279 mtspr hid5,r3 ; Set it 280 isync ; Wait for it 281 blr
Cache object: 35d8176ada3d4ae182d61cdfb767e48c
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