The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/pc/dat.h

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    1 typedef struct BIOS32si BIOS32si;
    2 typedef struct BIOS32ci BIOS32ci;
    3 typedef struct Conf     Conf;
    4 typedef struct Confmem  Confmem;
    5 typedef struct FPsave   FPsave;
    6 typedef struct ISAConf  ISAConf;
    7 typedef struct Label    Label;
    8 typedef struct Lock     Lock;
    9 typedef struct MMU      MMU;
   10 typedef struct Mach     Mach;
   11 typedef struct Notsave  Notsave;
   12 typedef struct PCArch   PCArch;
   13 typedef struct Pcidev   Pcidev;
   14 typedef struct PCMmap   PCMmap;
   15 typedef struct PCMslot  PCMslot;
   16 typedef struct Page     Page;
   17 typedef struct PMMU     PMMU;
   18 typedef struct Proc     Proc;
   19 typedef struct Segdesc  Segdesc;
   20 typedef vlong           Tval;
   21 typedef struct Ureg     Ureg;
   22 typedef struct Vctl     Vctl;
   23 
   24 #pragma incomplete BIOS32si
   25 #pragma incomplete Pcidev
   26 #pragma incomplete Ureg
   27 
   28 #define MAXSYSARG       5       /* for mount(fd, afd, mpt, flag, arg) */
   29 
   30 /*
   31  *  parameters for sysproc.c
   32  */
   33 #define AOUT_MAGIC      (I_MAGIC)
   34 
   35 struct Lock
   36 {
   37         ulong   key;
   38         ulong   sr;
   39         ulong   pc;
   40         Proc    *p;
   41         Mach    *m;
   42         ushort  isilock;
   43         long    lockcycles;
   44 };
   45 
   46 struct Label
   47 {
   48         ulong   sp;
   49         ulong   pc;
   50 };
   51 
   52 
   53 /*
   54  * FPsave.status
   55  */
   56 enum
   57 {
   58         /* this is a state */
   59         FPinit=         0,
   60         FPactive=       1,
   61         FPinactive=     2,
   62 
   63         /* the following is a bit that can be or'd into the state */
   64         FPillegal=      0x100,
   65 };
   66 
   67 struct  FPsave
   68 {
   69         ushort  control;
   70         ushort  r1;
   71         ushort  status;
   72         ushort  r2;
   73         ushort  tag;
   74         ushort  r3;
   75         ulong   pc;
   76         ushort  selector;
   77         ushort  r4;
   78         ulong   operand;
   79         ushort  oselector;
   80         ushort  r5;
   81         uchar   regs[80];       /* floating point registers */
   82 };
   83 
   84 struct Confmem
   85 {
   86         ulong   base;
   87         ulong   npage;
   88         ulong   kbase;
   89         ulong   klimit;
   90 };
   91 
   92 struct Conf
   93 {
   94         ulong   nmach;          /* processors */
   95         ulong   nproc;          /* processes */
   96         ulong   monitor;        /* has monitor? */
   97         Confmem mem[4];         /* physical memory */
   98         ulong   npage;          /* total physical pages of memory */
   99         ulong   upages;         /* user page pool */
  100         ulong   nimage;         /* number of page cache image headers */
  101         ulong   nswap;          /* number of swap pages */
  102         int     nswppo;         /* max # of pageouts per segment pass */
  103         ulong   base0;          /* base of bank 0 */
  104         ulong   base1;          /* base of bank 1 */
  105         ulong   copymode;       /* 0 is copy on write, 1 is copy on reference */
  106         ulong   ialloc;         /* max interrupt time allocation in bytes */
  107         ulong   pipeqsize;      /* size in bytes of pipe queues */
  108         int     nuart;          /* number of uart devices */
  109 };
  110 
  111 /*
  112  *  MMU stuff in proc
  113  */
  114 #define NCOLOR 1
  115 struct PMMU
  116 {
  117         Page*   mmupdb;                 /* page directory base */
  118         Page*   mmufree;                /* unused page table pages */
  119         Page*   mmuused;                /* used page table pages */
  120         Page*   kmaptable;              /* page table used by kmap */
  121         uint    lastkmap;               /* last entry used by kmap */
  122         int     nkmap;                  /* number of current kmaps */
  123 };
  124 
  125 /*
  126  *  things saved in the Proc structure during a notify
  127  */
  128 struct Notsave
  129 {
  130         ulong   svflags;
  131         ulong   svcs;
  132         ulong   svss;
  133 };
  134 
  135 #include "../port/portdat.h"
  136 
  137 typedef struct {
  138         ulong   link;                   /* link (old TSS selector) */
  139         ulong   esp0;                   /* privilege level 0 stack pointer */
  140         ulong   ss0;                    /* privilege level 0 stack selector */
  141         ulong   esp1;                   /* privilege level 1 stack pointer */
  142         ulong   ss1;                    /* privilege level 1 stack selector */
  143         ulong   esp2;                   /* privilege level 2 stack pointer */
  144         ulong   ss2;                    /* privilege level 2 stack selector */
  145         ulong   xcr3;                   /* page directory base register - not used because we don't use trap gates */
  146         ulong   eip;                    /* instruction pointer */
  147         ulong   eflags;                 /* flags register */
  148         ulong   eax;                    /* general registers */
  149         ulong   ecx;
  150         ulong   edx;
  151         ulong   ebx;
  152         ulong   esp;
  153         ulong   ebp;
  154         ulong   esi;
  155         ulong   edi;
  156         ulong   es;                     /* segment selectors */
  157         ulong   cs;
  158         ulong   ss;
  159         ulong   ds;
  160         ulong   fs;
  161         ulong   gs;
  162         ulong   ldt;                    /* selector for task's LDT */
  163         ulong   iomap;                  /* I/O map base address + T-bit */
  164 } Tss;
  165 
  166 struct Segdesc
  167 {
  168         ulong   d0;
  169         ulong   d1;
  170 };
  171 
  172 struct Mach
  173 {
  174         int     machno;                 /* physical id of processor (KNOWN TO ASSEMBLY) */
  175         ulong   splpc;                  /* pc of last caller to splhi */
  176 
  177         ulong*  pdb;                    /* page directory base for this processor (va) */
  178         Tss*    tss;                    /* tss for this processor */
  179         Segdesc *gdt;                   /* gdt for this processor */
  180 
  181         Proc*   proc;                   /* current process on this processor */
  182         Proc*   externup;               /* extern register Proc *up */
  183 
  184         Page*   pdbpool;
  185         int     pdbcnt;
  186 
  187         ulong   ticks;                  /* of the clock since boot time */
  188         Label   sched;                  /* scheduler wakeup */
  189         Lock    alarmlock;              /* access to alarm list */
  190         void*   alarm;                  /* alarms bound to this clock */
  191         int     inclockintr;
  192 
  193         Proc*   readied;                /* for runproc */
  194         ulong   schedticks;             /* next forced context switch */
  195 
  196         int     tlbfault;
  197         int     tlbpurge;
  198         int     pfault;
  199         int     cs;
  200         int     syscall;
  201         int     load;
  202         int     intr;
  203         int     flushmmu;               /* make current proc flush it's mmu state */
  204         int     ilockdepth;
  205         Perf    perf;                   /* performance counters */
  206 
  207         ulong   spuriousintr;
  208         int     lastintr;
  209 
  210         int     loopconst;
  211 
  212         Lock    apictimerlock;
  213         int     cpumhz;
  214         uvlong  cyclefreq;              /* Frequency of user readable cycle counter */
  215         uvlong  cpuhz;
  216         int     cpuidax;
  217         int     cpuiddx;
  218         char    cpuidid[16];
  219         char*   cpuidtype;
  220         int     havetsc;
  221         int     havepge;
  222         uvlong  tscticks;
  223         int     pdballoc;
  224         int     pdbfree;
  225 
  226         vlong   mtrrcap;
  227         vlong   mtrrdef;
  228         vlong   mtrrfix[11];
  229         vlong   mtrrvar[32];            /* 256 max. */
  230 
  231         int     stack[1];
  232 };
  233 
  234 /*
  235  * KMap the structure doesn't exist, but the functions do.
  236  */
  237 typedef struct KMap             KMap;
  238 #define VA(k)           ((void*)(k))
  239 KMap*   kmap(Page*);
  240 void    kunmap(KMap*);
  241 
  242 struct
  243 {
  244         Lock;
  245         int     machs;                  /* bitmap of active CPUs */
  246         int     exiting;                /* shutdown */
  247         int     ispanic;                /* shutdown in response to a panic */
  248         int     thunderbirdsarego;      /* lets the added processors continue to schedinit */
  249 }active;
  250 
  251 /*
  252  *  routines for things outside the PC model, like power management
  253  */
  254 struct PCArch
  255 {
  256         char*   id;
  257         int     (*ident)(void);         /* this should be in the model */
  258         void    (*reset)(void);         /* this should be in the model */
  259         int     (*serialpower)(int);    /* 1 == on, 0 == off */
  260         int     (*modempower)(int);     /* 1 == on, 0 == off */
  261 
  262         void    (*intrinit)(void);
  263         int     (*intrenable)(Vctl*);
  264         int     (*intrvecno)(int);
  265         int     (*intrdisable)(int);
  266         void    (*introff)(void);
  267         void    (*intron)(void);
  268 
  269         void    (*clockenable)(void);
  270         uvlong  (*fastclock)(uvlong*);
  271         void    (*timerset)(uvlong);
  272 };
  273 
  274 /* cpuid instruction result register bits */
  275 enum {
  276         /* dx */
  277         Fpuonchip = 1<<0,
  278 //      Pse     = 1<<3,         /* page size extensions */
  279         Tsc     = 1<<4,         /* time-stamp counter */
  280         Cpumsr  = 1<<5,         /* model-specific registers, rdmsr/wrmsr */
  281         Pae     = 1<<6,         /* physical-addr extensions */
  282         Mce     = 1<<7,         /* machine-check exception */
  283         Cmpxchg8b = 1<<8,
  284         Cpuapic = 1<<9,
  285         Mtrr    = 1<<12,        /* memory-type range regs.  */
  286         Pge     = 1<<13,        /* page global extension */
  287 //      Pse2    = 1<<17,        /* more page size extensions */
  288         Clflush = 1<<19,
  289         Mmx     = 1<<23,
  290         Sse     = 1<<25,        /* thus sfence instr. */
  291         Sse2    = 1<<26,        /* thus mfence & lfence instr.s */
  292 };
  293 
  294 /*
  295  *  a parsed plan9.ini line
  296  */
  297 #define NISAOPT         8
  298 
  299 struct ISAConf {
  300         char    *type;
  301         ulong   port;
  302         int     irq;
  303         ulong   dma;
  304         ulong   mem;
  305         ulong   size;
  306         ulong   freq;
  307 
  308         int     nopt;
  309         char    *opt[NISAOPT];
  310 };
  311 
  312 extern PCArch   *arch;                  /* PC architecture */
  313 
  314 /*
  315  * Each processor sees its own Mach structure at address MACHADDR.
  316  * However, the Mach structures must also be available via the per-processor
  317  * MMU information array machp, mainly for disambiguation and access to
  318  * the clock which is only maintained by the bootstrap processor (0).
  319  */
  320 Mach* machp[MAXMACH];
  321         
  322 #define MACHP(n)        (machp[n])
  323 
  324 extern Mach     *m;
  325 #define up      (((Mach*)MACHADDR)->externup)
  326 
  327 /*
  328  *  hardware info about a device
  329  */
  330 typedef struct {
  331         ulong   port;   
  332         int     size;
  333 } Devport;
  334 
  335 struct DevConf
  336 {
  337         ulong   intnum;                 /* interrupt number */
  338         char    *type;                  /* card type, malloced */
  339         int     nports;                 /* Number of ports */
  340         Devport *ports;                 /* The ports themselves */
  341 };
  342 
  343 typedef struct BIOS32ci {               /* BIOS32 Calling Interface */
  344         u32int  eax;
  345         u32int  ebx;
  346         u32int  ecx;
  347         u32int  edx;
  348         u32int  esi;
  349         u32int  edi;
  350 } BIOS32ci;

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