ethermii.h

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    1 typedef struct Mii Mii;
    2 typedef struct MiiPhy MiiPhy;
    3 
    4 enum {                                  /* registers */
    5         Bmcr            = 0x00,         /* Basic Mode Control */
    6         Bmsr            = 0x01,         /* Basic Mode Status */
    7         Phyidr1         = 0x02,         /* PHY Identifier #1 */
    8         Phyidr2         = 0x03,         /* PHY Identifier #2 */
    9         Anar            = 0x04,         /* Auto-Negotiation Advertisement */
   10         Anlpar          = 0x05,         /* AN Link Partner Ability */
   11         Aner            = 0x06,         /* AN Expansion */
   12         Annptr          = 0x07,         /* AN Next Page TX */
   13         Annprr          = 0x08,         /* AN Next Page RX */
   14         Mscr            = 0x09,         /* MASTER-SLAVE Control */
   15         Mssr            = 0x0A,         /* MASTER-SLAVE Status */
   16         Esr             = 0x0F,         /* Extended Status */
   17 
   18         NMiiPhyr        = 32,
   19         NMiiPhy         = 32,
   20 };
   21 
   22 enum {                                  /* Bmcr */
   23         BmcrSs1         = 0x0040,       /* Speed Select[1] */
   24         BmcrCte         = 0x0080,       /* Collision Test Enable */
   25         BmcrDm          = 0x0100,       /* Duplex Mode */
   26         BmcrRan         = 0x0200,       /* Restart Auto-Negotiation */
   27         BmcrI           = 0x0400,       /* Isolate */
   28         BmcrPd          = 0x0800,       /* Power Down */
   29         BmcrAne         = 0x1000,       /* Auto-Negotiation Enable */
   30         BmcrSs0         = 0x2000,       /* Speed Select[0] */
   31         BmcrLe          = 0x4000,       /* Loopback Enable */
   32         BmcrR           = 0x8000,       /* Reset */
   33 };
   34 
   35 enum {                                  /* Bmsr */
   36         BmsrEc          = 0x0001,       /* Extended Capability */
   37         BmsrJd          = 0x0002,       /* Jabber Detect */
   38         BmsrLs          = 0x0004,       /* Link Status */
   39         BmsrAna         = 0x0008,       /* Auto-Negotiation Ability */
   40         BmsrRf          = 0x0010,       /* Remote Fault */
   41         BmsrAnc         = 0x0020,       /* Auto-Negotiation Complete */
   42         BmsrPs          = 0x0040,       /* Preamble Suppression Capable */
   43         BmsrEs          = 0x0100,       /* Extended Status */
   44         Bmsr100T2HD     = 0x0200,       /* 100BASE-T2 HD Capable */
   45         Bmsr100T2FD     = 0x0400,       /* 100BASE-T2 FD Capable */
   46         Bmsr10THD       = 0x0800,       /* 10BASE-T HD Capable */
   47         Bmsr10TFD       = 0x1000,       /* 10BASE-T FD Capable */
   48         Bmsr100TXHD     = 0x2000,       /* 100BASE-TX HD Capable */
   49         Bmsr100TXFD     = 0x4000,       /* 100BASE-TX FD Capable */
   50         Bmsr100T4       = 0x8000,       /* 100BASE-T4 Capable */
   51 };
   52 
   53 enum {                                  /* Anar/Anlpar */
   54         Ana10HD         = 0x0020,       /* Advertise 10BASE-T */
   55         Ana10FD         = 0x0040,       /* Advertise 10BASE-T FD */
   56         AnaTXHD         = 0x0080,       /* Advertise 100BASE-TX */
   57         AnaTXFD         = 0x0100,       /* Advertise 100BASE-TX FD */
   58         AnaT4           = 0x0200,       /* Advertise 100BASE-T4 */
   59         AnaP            = 0x0400,       /* Pause */
   60         AnaAP           = 0x0800,       /* Asymmetrical Pause */
   61         AnaRf           = 0x2000,       /* Remote Fault */
   62         AnaAck          = 0x4000,       /* Acknowledge */
   63         AnaNp           = 0x8000,       /* Next Page Indication */
   64 };
   65 
   66 enum {                                  /* Mscr */
   67         Mscr1000THD     = 0x0100,       /* Advertise 1000BASE-T HD */
   68         Mscr1000TFD     = 0x0200,       /* Advertise 1000BASE-T FD */
   69 };
   70 
   71 enum {                                  /* Mssr */
   72         Mssr1000THD     = 0x0400,       /* Link Partner 1000BASE-T HD able */
   73         Mssr1000TFD     = 0x0800,       /* Link Partner 1000BASE-T FD able */
   74 };
   75 
   76 enum {                                  /* Esr */
   77         Esr1000THD      = 0x1000,       /* 1000BASE-T HD Capable */
   78         Esr1000TFD      = 0x2000,       /* 1000BASE-T FD Capable */
   79         Esr1000XHD      = 0x4000,       /* 1000BASE-X HD Capable */
   80         Esr1000XFD      = 0x8000,       /* 1000BASE-X FD Capable */
   81 };
   82 
   83 typedef struct Mii {
   84         Lock;
   85         int     nphy;
   86         int     mask;
   87         MiiPhy* phy[NMiiPhy];
   88         MiiPhy* curphy;
   89 
   90         void*   ctlr;
   91         int     (*mir)(Mii*, int, int);
   92         int     (*miw)(Mii*, int, int, int);
   93 } Mii;
   94 
   95 typedef struct MiiPhy {
   96         Mii*    mii;
   97         int     oui;
   98         int     phyno;
   99 
  100         int     anar;
  101         int     fc;
  102         int     mscr;
  103 
  104         int     link;
  105         int     speed;
  106         int     fd;
  107         int     rfc;
  108         int     tfc;
  109 };
  110 
  111 extern int mii(Mii*, int);
  112 extern int miiane(Mii*, int, int, int);
  113 extern int miimir(Mii*, int);
  114 extern int miimiw(Mii*, int, int);
  115 extern int miireset(Mii*);
  116 extern int miistatus(Mii*);

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FreeBSD/Linux Kernel Cross Reference sys/pc/ethermii.h

FreeBSD/Linux Kernel Cross Reference
sys/pc/ethermii.h