FreeBSD/Linux Kernel Cross Reference
sys/pc/usbuhci.c
1 /*
2 * USB Universal Host Controller Interface (sic) driver.
3 *
4 * BUGS:
5 * - Too many delays and ilocks.
6 * - bandwidth admission control must be done per-frame.
7 * - interrupt endpoints should go on a tree like [oe]hci.
8 * - must warn of power overruns.
9 */
10
11 #include "u.h"
12 #include "../port/lib.h"
13 #include "mem.h"
14 #include "dat.h"
15 #include "fns.h"
16 #include "io.h"
17 #include "../port/error.h"
18 #include "usb.h"
19
20 typedef struct Ctlio Ctlio;
21 typedef struct Ctlr Ctlr;
22 typedef struct Isoio Isoio;
23 typedef struct Qh Qh;
24 typedef struct Qhpool Qhpool;
25 typedef struct Qio Qio;
26 typedef struct Td Td;
27 typedef struct Tdpool Tdpool;
28
29 enum
30 {
31 Resetdelay = 100, /* delay after a controller reset (ms) */
32 Enabledelay = 100, /* waiting for a port to enable */
33 Abortdelay = 5, /* delay after cancelling Tds (ms) */
34 Incr = 64, /* for Td and Qh pools */
35 Ctltmout = 2000, /* timeout for a ctl. request (ms) */
36 Bulktmout = 4000, /* timeout for a bulk xfer. (ms) */
37 Isotmout = 2000, /* timeout for an iso. request (ms) */
38
39 Tdatomic = 8, /* max nb. of Tds per bulk I/O op. */
40
41 /* Queue states (software) */
42 Qidle = 0,
43 Qinstall,
44 Qrun,
45 Qdone,
46 Qclose,
47 Qfree,
48
49 /*
50 * HW constants
51 */
52
53 Nframes = 1024, /* 2ⁿ for xspanalloc; max 1024 */
54 Align = 16, /* for data structures */
55
56 /* Size of small buffer kept within Tds. (software) */
57 /* Keep as a multiple of Align to maintain alignment of Tds in pool */
58 Tdndata = 1*Align,
59
60 /* i/o space
61 * Some ports are short, some are long, some are byte.
62 * We use ins[bsl] and not vmap.
63 */
64 Cmd = 0,
65 Crun = 0x01,
66 Chcreset = 0x02, /* host controller reset */
67 Cgreset = 0x04, /* global reset */
68 Cegsm = 0x08, /* enter global suspend */
69 Cfgr = 0x10, /* forge global resume */
70 Cdbg = 0x20, /* single step, debug */
71 Cmaxp = 0x80, /* max packet */
72
73 Status = 2,
74 Susbintr = 0x01, /* interrupt */
75 Seintr = 0x02, /* error interrupt */
76 Sresume = 0x04, /* resume detect */
77 Shserr = 0x08, /* host system error */
78 Shcerr = 0x10, /* host controller error */
79 Shalted = 0x20, /* controller halted */
80 Sall = 0x3F,
81
82 Usbintr = 4,
83 Itmout = 0x01, /* timeout or crc */
84 Iresume = 0x02, /* resume interrupt enable */
85 Ioc = 0x04, /* interrupt on complete */
86 Ishort = 0x08, /* short packet interrupt */
87 Iall = 0x0F,
88 Frnum = 6,
89 Flbaseadd = 8,
90 SOFmod = 0xC, /* start of frame modifier register */
91
92 Portsc0 = 0x10,
93 PSpresent = 0x0001, /* device present */
94 PSstatuschg = 0x0002, /* PSpresent changed */
95 PSenable = 0x0004, /* device enabled */
96 PSchange = 0x0008, /* PSenable changed */
97 PSresume = 0x0040, /* resume detected */
98 PSreserved1 = 0x0080, /* always read as 1; reserved */
99 PSslow = 0x0100, /* device has low speed */
100 PSreset = 0x0200, /* port reset */
101 PSsuspend = 0x1000, /* port suspended */
102
103 /* Transfer descriptor link */
104 Tdterm = 0x1, /* nil (terminate) */
105 Tdlinkqh = 0x2, /* link refers to a QH */
106 Tdvf = 0x4, /* run linked Tds first (depth-first)*/
107
108 /* Transfer status bits */
109 Tdbitstuff = 0x00020000, /* bit stuffing error */
110 Tdcrcto = 0x00040000, /* crc or timeout error */
111 Tdnak = 0x00080000, /* nak packet received */
112 Tdbabble = 0x00100000, /* babble detected */
113 Tddberr = 0x00200000, /* data buf. error */
114 Tdstalled = 0x00400000, /* serious error to ep. */
115 Tdactive = 0x00800000, /* enabled/in use by hw */
116 /* Transfer control bits */
117 Tdioc = 0x01000000, /* interrupt on complete */
118 Tdiso = 0x02000000, /* isochronous select */
119 Tdlow = 0x04000000, /* low speed device */
120 Tderr1 = 0x08000000, /* bit 0 of error counter */
121 Tderr2 = 0x10000000, /* bit 1 of error counter */
122 Tdspd = 0x20000000, /* short packet detect */
123
124 Tdlen = 0x000003FF, /* actual length field */
125
126 Tdfatalerr = Tdnak|Tdbabble|Tdstalled, /* hw retries others */
127 Tderrors = Tdfatalerr|Tdbitstuff|Tdcrcto|Tddberr,
128
129 /* Transfer descriptor token bits */
130 Tddata0 = 0,
131 Tddata1 = 0x80000, /* data toggle (1==DATA1) */
132 Tdtokin = 0x69,
133 Tdtokout = 0xE1,
134 Tdtoksetup = 0x2D,
135
136 Tdmaxpkt = 0x800, /* max packet size */
137
138 /* Queue head bits */
139 QHterm = 1<<0, /* nil (terminate) */
140 QHlinkqh = 1<<1, /* link refers to a QH */
141 QHvf = 1<<2, /* vertical first (depth first) */
142 };
143
144 struct Ctlr
145 {
146 Lock; /* for ilock. qh lists and basic ctlr I/O */
147 QLock portlck; /* for port resets/enable... */
148 Pcidev* pcidev;
149 int active;
150 int port; /* I/O address */
151 Qh* qhs; /* list of Qhs for this controller */
152 Qh* qh[Tmax]; /* Dummy Qhs to insert Qhs after */
153 Isoio* iso; /* list of active iso I/O */
154 ulong* frames; /* frame list (used by hw) */
155 ulong load; /* max load for a single frame */
156 ulong isoload; /* max iso load for a single frame */
157 int nintr; /* number of interrupts attended */
158 int ntdintr; /* number of intrs. with something to do */
159 int nqhintr; /* number of intrs. for Qhs */
160 int nisointr; /* number of intrs. for iso transfers */
161 };
162
163 struct Qio
164 {
165 QLock; /* for the entire I/O process */
166 Rendez; /* wait for completion */
167 Qh* qh; /* Td list (field const after init) */
168 int usbid; /* usb address for endpoint/device */
169 int toggle; /* Tddata0/Tddata1 */
170 int tok; /* Tdtoksetup, Tdtokin, Tdtokout */
171 ulong iotime; /* time of last I/O */
172 int debug; /* debug flag from the endpoint */
173 char* err; /* error string */
174 };
175
176 struct Ctlio
177 {
178 Qio; /* a single Qio for each RPC */
179 uchar* data; /* read from last ctl req. */
180 int ndata; /* number of bytes read */
181 };
182
183 struct Isoio
184 {
185 QLock;
186 Rendez; /* wait for space/completion/errors */
187 int usbid; /* address used for device/endpoint */
188 int tok; /* Tdtokin or Tdtokout */
189 int state; /* Qrun -> Qdone -> Qrun... -> Qclose */
190 int nframes; /* Nframes/ep->pollival */
191 uchar* data; /* iso data buffers if not embedded */
192 int td0frno; /* frame number for first Td */
193 Td* tdu; /* next td for user I/O in tdps */
194 Td* tdi; /* next td processed by interrupt */
195 char* err; /* error string */
196 int nerrs; /* nb of consecutive I/O errors */
197 long nleft; /* number of bytes left from last write */
198 int debug; /* debug flag from the endpoint */
199 Isoio* next; /* in list of active Isoios */
200 Td* tdps[Nframes]; /* pointer to Td used for i-th frame or nil */
201 };
202
203 struct Tdpool
204 {
205 Lock;
206 Td* free;
207 int nalloc;
208 int ninuse;
209 int nfree;
210 };
211
212 struct Qhpool
213 {
214 Lock;
215 Qh* free;
216 int nalloc;
217 int ninuse;
218 int nfree;
219 };
220
221 /*
222 * HW data structures
223 */
224
225 /*
226 * Queue header (known by hw).
227 * 16-byte aligned. first two words used by hw.
228 * They are taken from the pool upon endpoint opening and
229 * queued after the dummy queue header for the endpoint type
230 * in the controller. Actual I/O happens as Tds are linked into it.
231 * The driver does I/O in lock-step.
232 * The user builds a list of Tds and links it into the Qh,
233 * then the Qh goes from Qidle to Qrun and nobody touches it until
234 * it becomes Qdone at interrupt time.
235 * At that point the user collects the Tds and it goes Qidle.
236 * A premature cancel may set the state to Qclose and abort I/O.
237 * The Ctlr lock protects change of state for Qhs in use.
238 */
239 struct Qh
240 {
241 ulong link; /* link to next horiz. item (eg. Qh) */
242 ulong elink; /* link to element (eg. Td; updated by hw) */
243
244 ulong state; /* Qidle -> Qinstall -> Qrun -> Qdone | Qclose */
245 Qio* io; /* for this queue */
246
247 Qh* next; /* in active or free list */
248 Td* tds; /* Td list in this Qh (initially, elink) */
249 char* tag; /* debug and align, mostly */
250 ulong align;
251 };
252
253 /*
254 * Transfer descriptor.
255 * 16-byte aligned. first two words used by hw. Next 4 by sw.
256 * We keep an embedded buffer for small I/O transfers.
257 * They are taken from the pool when buffers are needed for I/O
258 * and linked at the Qh/Isoio for the endpoint and direction requiring it.
259 * The block keeps actual data. They are protected from races by
260 * the queue or the pool keeping it. The owner of the link to the Td
261 * is free to use it and can be the only one using it.
262 */
263 struct Td
264 {
265 ulong link; /* Link to next Td or Qh */
266 ulong csw; /* control and status word (updated by hw) */
267 ulong token; /* endpt, device, pid */
268 ulong buffer; /* buffer pointer */
269
270 Td* next; /* in qh or Isoio or free list */
271 ulong ndata; /* bytes available/used at data */
272 uchar* data; /* pointer to actual data */
273 void* buff; /* allocated data, for large transfers */
274
275 uchar sbuff[Tdndata]; /* embedded buffer, for small transfers */
276 };
277
278 #define INB(x) inb(ctlr->port+(x))
279 #define INS(x) ins(ctlr->port+(x))
280 #define INL(x) inl(ctlr->port+(x))
281 #define OUTB(x, v) outb(ctlr->port+(x), (v))
282 #define OUTS(x, v) outs(ctlr->port+(x), (v))
283 #define OUTL(x, v) outl(ctlr->port+(x), (v))
284 #define TRUNC(x, sz) ((x) & ((sz)-1))
285 #define PTR(q) ((void*)KADDR((ulong)(q) & ~ (0xF|PCIWINDOW)))
286 #define QPTR(q) ((Qh*)PTR(q))
287 #define TPTR(q) ((Td*)PTR(q))
288 #define PORT(p) (Portsc0 + 2*(p))
289 #define diprint if(debug || iso->debug)print
290 #define ddiprint if(debug>1 || iso->debug>1)print
291 #define dqprint if(debug || (qh->io && qh->io->debug))print
292 #define ddqprint if(debug>1 || (qh->io && qh->io->debug>1))print
293
294 static Ctlr* ctlrs[Nhcis];
295
296 static Tdpool tdpool;
297 static Qhpool qhpool;
298 static int debug;
299
300 static char* qhsname[] = { "idle", "install", "run", "done", "close", "FREE" };
301
302 static void
303 uhcicmd(Ctlr *ctlr, int c)
304 {
305 OUTS(Cmd, c);
306 }
307
308 static void
309 uhcirun(Ctlr *ctlr, int on)
310 {
311 int i;
312
313 ddprint("uhci %#ux setting run to %d\n", ctlr->port, on);
314
315 if(on)
316 uhcicmd(ctlr, INS(Cmd)|Crun);
317 else
318 uhcicmd(ctlr, INS(Cmd) & ~Crun);
319 for(i = 0; i < 100; i++)
320 if(on == 0 && (INS(Status) & Shalted) != 0)
321 break;
322 else if(on != 0 && (INS(Status) & Shalted) == 0)
323 break;
324 else
325 delay(1);
326 if(i == 100)
327 dprint("uhci %#x run cmd timed out\n", ctlr->port);
328 ddprint("uhci %#ux cmd %#ux sts %#ux\n",
329 ctlr->port, INS(Cmd), INS(Status));
330 }
331
332 static int
333 tdlen(Td *td)
334 {
335 return (td->csw+1) & Tdlen;
336 }
337
338 static int
339 maxtdlen(Td *td)
340 {
341 return ((td->token>>21)+1) & (Tdmaxpkt-1);
342 }
343
344 static int
345 tdtok(Td *td)
346 {
347 return td->token & 0xFF;
348 }
349
350 static char*
351 seprinttd(char *s, char *se, Td *td)
352 {
353 s = seprint(s, se, "%#p link %#ulx", td, td->link);
354 if((td->link & Tdvf) != 0)
355 s = seprint(s, se, "V");
356 if((td->link & Tdterm) != 0)
357 s = seprint(s, se, "T");
358 if((td->link & Tdlinkqh) != 0)
359 s = seprint(s, se, "Q");
360 s = seprint(s, se, " csw %#ulx ", td->csw);
361 if(td->csw & Tdactive)
362 s = seprint(s, se, "a");
363 if(td->csw & Tdiso)
364 s = seprint(s, se, "I");
365 if(td->csw & Tdioc)
366 s = seprint(s, se, "i");
367 if(td->csw & Tdlow)
368 s = seprint(s, se, "l");
369 if((td->csw & (Tderr1|Tderr2)) == 0)
370 s = seprint(s, se, "z");
371 if(td->csw & Tderrors)
372 s = seprint(s, se, " err %#ulx", td->csw & Tderrors);
373 if(td->csw & Tdstalled)
374 s = seprint(s, se, "s");
375 if(td->csw & Tddberr)
376 s = seprint(s, se, "d");
377 if(td->csw & Tdbabble)
378 s = seprint(s, se, "b");
379 if(td->csw & Tdnak)
380 s = seprint(s, se, "n");
381 if(td->csw & Tdcrcto)
382 s = seprint(s, se, "c");
383 if(td->csw & Tdbitstuff)
384 s = seprint(s, se, "B");
385 s = seprint(s, se, " stslen %d", tdlen(td));
386
387 s = seprint(s, se, " token %#ulx", td->token);
388 if(td->token == 0) /* the BWS loopback Td, ignore rest */
389 return s;
390 s = seprint(s, se, " maxlen %d", maxtdlen(td));
391 if(td->token & Tddata1)
392 s = seprint(s, se, " d1");
393 else
394 s = seprint(s, se, " d0");
395 s = seprint(s, se, " id %#ulx:", (td->token>>15) & Epmax);
396 s = seprint(s, se, "%#ulx", (td->token>>8) & Devmax);
397 switch(tdtok(td)){
398 case Tdtokin:
399 s = seprint(s, se, " in");
400 break;
401 case Tdtokout:
402 s = seprint(s, se, " out");
403 break;
404 case Tdtoksetup:
405 s = seprint(s, se, " setup");
406 break;
407 default:
408 s = seprint(s, se, " BADPID");
409 }
410 s = seprint(s, se, "\n\t buffer %#ulx data %#p", td->buffer, td->data);
411 s = seprint(s, se, " ndata %uld sbuff %#p buff %#p",
412 td->ndata, td->sbuff, td->buff);
413 if(td->ndata > 0)
414 s = seprintdata(s, se, td->data, td->ndata);
415 return s;
416 }
417
418 static void
419 isodump(Isoio *iso, int all)
420 {
421 char buf[256];
422 Td *td;
423 int i;
424
425 print("iso %#p %s state %d nframes %d"
426 " td0 %#p tdu %#p tdi %#p data %#p\n",
427 iso, iso->tok == Tdtokin ? "in" : "out",
428 iso->state, iso->nframes, iso->tdps[iso->td0frno],
429 iso->tdu, iso->tdi, iso->data);
430 if(iso->err != nil)
431 print("\terr='%s'\n", iso->err);
432 if(all == 0){
433 seprinttd(buf, buf+sizeof(buf), iso->tdu);
434 print("\ttdu %s\n", buf);
435 seprinttd(buf, buf+sizeof(buf), iso->tdi);
436 print("\ttdi %s\n", buf);
437 }else{
438 td = iso->tdps[iso->td0frno];
439 for(i = 0; i < iso->nframes; i++){
440 seprinttd(buf, buf+sizeof(buf), td);
441 if(td == iso->tdi)
442 print("i->");
443 if(td == iso->tdu)
444 print("u->");
445 print("\t%s\n", buf);
446 td = td->next;
447 }
448 }
449 }
450
451 static int
452 sameptr(void *p, ulong l)
453 {
454 if(l & QHterm)
455 return p == nil;
456 return PTR(l) == p;
457 }
458
459 static void
460 dumptd(Td *td, char *pref)
461 {
462 char buf[256];
463 char *s;
464 char *se;
465 int i;
466
467 i = 0;
468 se = buf+sizeof(buf);
469 for(; td != nil; td = td->next){
470 s = seprinttd(buf, se, td);
471 if(!sameptr(td->next, td->link))
472 seprint(s, se, " next %#p != link %#ulx %#p",
473 td->next, td->link, TPTR(td->link));
474 print("%std %s\n", pref, buf);
475 if(i++ > 20){
476 print("...more tds...\n");
477 break;
478 }
479 }
480 }
481
482 static void
483 qhdump(Qh *qh, char *pref)
484 {
485 char buf[256];
486 char *s;
487 char *se;
488 ulong td;
489 int i;
490
491 s = buf;
492 se = buf+sizeof(buf);
493 s = seprint(s, se, "%sqh %s %#p state %s link %#ulx", pref,
494 qh->tag, qh, qhsname[qh->state], qh->link);
495 if(!sameptr(qh->tds, qh->elink))
496 s = seprint(s, se, " [tds %#p != elink %#ulx %#p]",
497 qh->tds, qh->elink, TPTR(qh->elink));
498 if(!sameptr(qh->next, qh->link))
499 s = seprint(s, se, " [next %#p != link %#ulx %#p]",
500 qh->next, qh->link, QPTR(qh->link));
501 if((qh->link & Tdterm) != 0)
502 s = seprint(s, se, "T");
503 if((qh->link & Tdlinkqh) != 0)
504 s = seprint(s, se, "Q");
505 s = seprint(s, se, " elink %#ulx", qh->elink);
506 if((qh->elink & Tdterm) != 0)
507 s = seprint(s, se, "T");
508 if((qh->elink & Tdlinkqh) != 0)
509 s = seprint(s, se, "Q");
510 s = seprint(s, se, " io %#p", qh->io);
511 if(qh->io != nil && qh->io->err != nil)
512 seprint(s, se, " err='%s'", qh->io->err);
513 print("%s\n", buf);
514 dumptd(qh->tds, "\t");
515 if((qh->elink & QHterm) == 0){
516 print("\thw tds:");
517 i = 0;
518 for(td = qh->elink; (td & Tdterm) == 0; td = TPTR(td)->link){
519 print(" %#ulx", td);
520 if(td == TPTR(td)->link) /* BWS Td */
521 break;
522 if(i++ > 40){
523 print("...");
524 break;
525 }
526 }
527 print("\n");
528 }
529 }
530
531 static void
532 xdump(Ctlr *ctlr, int doilock)
533 {
534 Isoio *iso;
535 Qh *qh;
536 int i;
537
538 if(doilock){
539 if(ctlr == ctlrs[0]){
540 lock(&tdpool);
541 print("tds: alloc %d = inuse %d + free %d\n",
542 tdpool.nalloc, tdpool.ninuse, tdpool.nfree);
543 unlock(&tdpool);
544 lock(&qhpool);
545 print("qhs: alloc %d = inuse %d + free %d\n",
546 qhpool.nalloc, qhpool.ninuse, qhpool.nfree);
547 unlock(&qhpool);
548 }
549 ilock(ctlr);
550 }
551 print("uhci port %#x frames %#p nintr %d ntdintr %d",
552 ctlr->port, ctlr->frames, ctlr->nintr, ctlr->ntdintr);
553 print(" nqhintr %d nisointr %d\n", ctlr->nqhintr, ctlr->nisointr);
554 print("cmd %#ux sts %#ux fl %#ulx ps1 %#ux ps2 %#ux frames[0] %#ulx\n",
555 INS(Cmd), INS(Status),
556 INL(Flbaseadd), INS(PORT(0)), INS(PORT(1)),
557 ctlr->frames[0]);
558 for(iso = ctlr->iso; iso != nil; iso = iso->next)
559 isodump(iso, 1);
560 i = 0;
561 for(qh = ctlr->qhs; qh != nil; qh = qh->next){
562 qhdump(qh, "");
563 if(i++ > 20){
564 print("qhloop\n");
565 break;
566 }
567 }
568 print("\n");
569 if(doilock)
570 iunlock(ctlr);
571 }
572
573 static void
574 dump(Hci *hp)
575 {
576 xdump(hp->aux, 1);
577 }
578
579 static Td*
580 tdalloc(void)
581 {
582 int i;
583 Td *td;
584 Td *pool;
585
586 lock(&tdpool);
587 if(tdpool.free == nil){
588 ddprint("uhci: tdalloc %d Tds\n", Incr);
589 pool = xspanalloc(Incr*sizeof(Td), Align, 0);
590 if(pool == nil)
591 panic("tdalloc");
592 for(i=Incr; --i>=0;){
593 pool[i].next = tdpool.free;
594 tdpool.free = &pool[i];
595 }
596 tdpool.nalloc += Incr;
597 tdpool.nfree += Incr;
598 }
599 td = tdpool.free;
600 tdpool.free = td->next;
601 tdpool.ninuse++;
602 tdpool.nfree--;
603 unlock(&tdpool);
604
605 memset(td, 0, sizeof(Td));
606 td->link = Tdterm;
607 assert(((ulong)td & 0xF) == 0);
608 return td;
609 }
610
611 static void
612 tdfree(Td *td)
613 {
614 if(td == nil)
615 return;
616 free(td->buff);
617 td->buff = nil;
618 lock(&tdpool);
619 td->next = tdpool.free;
620 tdpool.free = td;
621 tdpool.ninuse--;
622 tdpool.nfree++;
623 unlock(&tdpool);
624 }
625
626 static void
627 qhlinkqh(Qh* qh, Qh* next)
628 {
629 if(next == nil)
630 qh->link = QHterm;
631 else{
632 next->link = qh->link;
633 next->next = qh->next;
634 qh->link = PCIWADDR(next)|QHlinkqh;
635 }
636 qh->next = next;
637 }
638
639 static void
640 qhlinktd(Qh *qh, Td *td)
641 {
642 qh->tds = td;
643 if(td == nil)
644 qh->elink = QHvf|QHterm;
645 else
646 qh->elink = PCIWADDR(td);
647 }
648
649 static void
650 tdlinktd(Td *td, Td *next)
651 {
652 td->next = next;
653 if(next == nil)
654 td->link = Tdterm;
655 else
656 td->link = PCIWADDR(next)|Tdvf;
657 }
658
659 static Qh*
660 qhalloc(Ctlr *ctlr, Qh *prev, Qio *io, char *tag)
661 {
662 int i;
663 Qh *qh;
664 Qh *pool;
665
666 lock(&qhpool);
667 if(qhpool.free == nil){
668 ddprint("uhci: qhalloc %d Qhs\n", Incr);
669 pool = xspanalloc(Incr*sizeof(Qh), Align, 0);
670 if(pool == nil)
671 panic("qhalloc");
672 for(i=Incr; --i>=0;){
673 pool[i].next = qhpool.free;
674 qhpool.free = &pool[i];
675 }
676 qhpool.nalloc += Incr;
677 qhpool.nfree += Incr;
678 }
679 qh = qhpool.free;
680 qhpool.free = qh->next;
681 qh->next = nil;
682 qh->link = QHterm;
683 qhpool.ninuse++;
684 qhpool.nfree--;
685 unlock(&qhpool);
686
687 qh->tds = nil;
688 qh->elink = QHterm;
689 qh->state = Qidle;
690 qh->io = io;
691 qh->tag = nil;
692 kstrdup(&qh->tag, tag);
693
694 if(prev != nil){
695 coherence();
696 ilock(ctlr);
697 qhlinkqh(prev, qh);
698 iunlock(ctlr);
699 }
700
701 assert(((ulong)qh & 0xF) == 0);
702 return qh;
703 }
704
705 static void
706 qhfree(Ctlr *ctlr, Qh *qh)
707 {
708 Td *td;
709 Td *ltd;
710 Qh *q;
711
712 if(qh == nil)
713 return;
714
715 ilock(ctlr);
716 for(q = ctlr->qhs; q != nil; q = q->next)
717 if(q->next == qh)
718 break;
719 if(q == nil)
720 panic("qhfree: nil q");
721 q->next = qh->next;
722 q->link = qh->link;
723 iunlock(ctlr);
724
725 for(td = qh->tds; td != nil; td = ltd){
726 ltd = td->next;
727 tdfree(td);
728 }
729 lock(&qhpool);
730 qh->state = Qfree; /* paranoia */
731 qh->next = qhpool.free;
732 qh->tag = nil;
733 qh->io = nil;
734 qhpool.free = qh;
735 qhpool.ninuse--;
736 qhpool.nfree++;
737 unlock(&qhpool);
738 ddprint("qhfree: qh %#p\n", qh);
739 }
740
741 static char*
742 errmsg(int err)
743 {
744 if(err == 0)
745 return "ok";
746 if(err & Tdcrcto)
747 return "crc/timeout error";
748 if(err & Tdbabble)
749 return "babble detected";
750 if(err & Tddberr)
751 return "db error";
752 if(err & Tdbitstuff)
753 return "bit stuffing error";
754 if(err & Tdstalled)
755 return Estalled;
756 return Eio;
757 }
758
759 static int
760 isocanread(void *a)
761 {
762 Isoio *iso;
763
764 iso = a;
765 return iso->state == Qclose ||
766 (iso->state == Qrun &&
767 iso->tok == Tdtokin && iso->tdi != iso->tdu);
768 }
769
770 static int
771 isocanwrite(void *a)
772 {
773 Isoio *iso;
774
775 iso = a;
776 return iso->state == Qclose ||
777 (iso->state == Qrun &&
778 iso->tok == Tdtokout && iso->tdu->next != iso->tdi);
779 }
780
781 static void
782 tdisoinit(Isoio *iso, Td *td, long count)
783 {
784 td->ndata = count;
785 td->token = ((count-1)<<21)| ((iso->usbid & 0x7FF)<<8) | iso->tok;
786 td->csw = Tderr1|Tdiso|Tdactive|Tdioc;
787 }
788
789 /*
790 * Process Iso i/o on interrupt. For writes update just error status.
791 * For reads update tds to reflect data and also error status.
792 * When tdi aproaches tdu, advance tdu; data may be lost.
793 * (If nframes is << Nframes tdu might be far away but this avoids
794 * races regarding frno.)
795 * If we suffer errors for more than half the frames we stall.
796 */
797 static void
798 isointerrupt(Ctlr *ctlr, Isoio* iso)
799 {
800 Td *tdi;
801 int err;
802 int i;
803 int nframes;
804
805 tdi = iso->tdi;
806 if((tdi->csw & Tdactive) != 0) /* nothing new done */
807 return;
808 ctlr->nisointr++;
809 ddiprint("isointr: iso %#p: tdi %#p tdu %#p\n", iso, tdi, iso->tdu);
810 if(iso->state != Qrun && iso->state != Qdone)
811 panic("isointr: iso state");
812 if(debug > 1 || iso->debug > 1)
813 isodump(iso, 0);
814
815 nframes = iso->nframes / 2; /* limit how many we look */
816 if(nframes > 64)
817 nframes = 64;
818
819 for(i = 0; i < nframes && (tdi->csw & Tdactive) == 0; i++){
820 tdi->csw &= ~Tdioc;
821 err = tdi->csw & Tderrors;
822 if(err == 0)
823 iso->nerrs = 0;
824 else if(iso->nerrs++ > iso->nframes/2)
825 tdi->csw |= Tdstalled;
826 if((tdi->csw & Tdstalled) != 0){
827 if(iso->err == nil){
828 iso->err = errmsg(err);
829 diprint("isointerrupt: tdi %#p error %#ux %s\n",
830 tdi, err, iso->err);
831 diprint("ctlr load %uld\n", ctlr->load);
832 }
833 tdi->ndata = 0;
834 }else
835 tdi->ndata = tdlen(tdi);
836
837 if(tdi->next == iso->tdu || tdi->next->next == iso->tdu){
838 memset(iso->tdu->data, 0, maxtdlen(iso->tdu));
839 tdisoinit(iso, iso->tdu, maxtdlen(iso->tdu));
840 iso->tdu = iso->tdu->next;
841 iso->nleft = 0;
842 }
843 tdi = tdi->next;
844 }
845 ddiprint("isointr: %d frames processed\n", nframes);
846 if(i == nframes)
847 tdi->csw |= Tdioc;
848 iso->tdi = tdi;
849 if(isocanwrite(iso) || isocanread(iso)){
850 diprint("wakeup iso %#p tdi %#p tdu %#p\n", iso,
851 iso->tdi, iso->tdu);
852 wakeup(iso);
853 }
854
855 }
856
857 /*
858 * Process a Qh upon interrupt. There's one per ongoing user I/O.
859 * User process releases resources later, that is not done here.
860 * We may find in this order one or more Tds:
861 * - none/many non active and completed Tds
862 * - none/one (usually(!) not active) and failed Td
863 * - none/many active Tds.
864 * Upon errors the entire transfer is aborted and error reported.
865 * Otherwise, the transfer is complete only when all Tds are done or
866 * when a read with less than maxpkt is found.
867 * Use the software list and not qh->elink to avoid races.
868 * We could use qh->elink to see if there's something new or not.
869 */
870 static void
871 qhinterrupt(Ctlr *ctlr, Qh *qh)
872 {
873 Td *td;
874 int err;
875
876 ctlr->nqhintr++;
877 if(qh->state != Qrun)
878 panic("qhinterrupt: qh state");
879 if(qh->tds == nil)
880 panic("qhinterrupt: no tds");
881 if((qh->tds->csw & Tdactive) == 0)
882 ddqprint("qhinterrupt port %#ux qh %#p p0 %#x p1 %#x\n",
883 ctlr->port, qh, INS(PORT(0)), INS(PORT(1)));
884 for(td = qh->tds; td != nil; td = td->next){
885 if(td->csw & Tdactive)
886 return;
887 td->csw &= ~Tdioc;
888 if((td->csw & Tdstalled) != 0){
889 err = td->csw & Tderrors;
890 /* just stalled is end of xfer but not an error */
891 if(err != Tdstalled && qh->io->err == nil){
892 qh->io->err = errmsg(td->csw & Tderrors);
893 dqprint("qhinterrupt: td %#p error %#ux %s\n",
894 td, err, qh->io->err);
895 dqprint("ctlr load %uld\n", ctlr->load);
896 }
897 break;
898 }
899 if((td->csw & Tdnak) != 0){ /* retransmit; not serious */
900 td->csw &= ~Tdnak;
901 if(td->next == nil)
902 td->csw |= Tdioc;
903 }
904 td->ndata = tdlen(td);
905 if(td->ndata < maxtdlen(td)){ /* EOT */
906 td = td->next;
907 break;
908 }
909 }
910
911 /*
912 * Done. Make void the Tds not used (errors or EOT) and wakeup epio.
913 */
914 qh->elink = QHterm;
915 for(; td != nil; td = td->next)
916 td->ndata = 0;
917 qh->state = Qdone;
918 wakeup(qh->io);
919 }
920
921 static void
922 interrupt(Ureg*, void *a)
923 {
924 Hci *hp;
925 Ctlr *ctlr;
926 int frptr;
927 int frno;
928 Qh *qh;
929 Isoio *iso;
930 int sts;
931 int cmd;
932
933 hp = a;
934 ctlr = hp->aux;
935 ilock(ctlr);
936 ctlr->nintr++;
937 sts = INS(Status);
938 if((sts & Sall) == 0){ /* not for us; sharing irq */
939 iunlock(ctlr);
940 return;
941 }
942 OUTS(Status, sts & Sall);
943 cmd = INS(Cmd);
944 if(cmd & Crun == 0){
945 print("uhci %#ux: not running: uhci bug?\n", ctlr->port);
946 /* BUG: should abort everything in this case */
947 }
948 if(debug > 1){
949 frptr = INL(Flbaseadd);
950 frno = INL(Frnum);
951 frno = TRUNC(frno, Nframes);
952 print("cmd %#ux sts %#ux frptr %#ux frno %d\n",
953 cmd, sts, frptr, frno);
954 }
955 ctlr->ntdintr++;
956 /*
957 * Will we know in USB 3.0 who the interrupt was for?.
958 * Do they still teach indexing in CS?
959 * This is Intel's doing.
960 */
961 for(iso = ctlr->iso; iso != nil; iso = iso->next)
962 if(iso->state == Qrun || iso->state == Qdone)
963 isointerrupt(ctlr, iso);
964 for(qh = ctlr->qhs; qh != nil; qh = qh->next)
965 if(qh->state == Qrun)
966 qhinterrupt(ctlr, qh);
967 else if(qh->state == Qclose)
968 qhlinktd(qh, nil);
969 iunlock(ctlr);
970
971 }
972
973 /*
974 * iso->tdu is the next place to put data. When it gets full
975 * it is activated and tdu advanced.
976 */
977 static long
978 putsamples(Isoio *iso, uchar *b, long count)
979 {
980 long tot;
981 long n;
982
983 for(tot = 0; isocanwrite(iso) && tot < count; tot += n){
984 n = count-tot;
985 if(n > maxtdlen(iso->tdu) - iso->nleft)
986 n = maxtdlen(iso->tdu) - iso->nleft;
987 memmove(iso->tdu->data+iso->nleft, b+tot, n);
988 iso->nleft += n;
989 if(iso->nleft == maxtdlen(iso->tdu)){
990 tdisoinit(iso, iso->tdu, iso->nleft);
991 iso->nleft = 0;
992 iso->tdu = iso->tdu->next;
993 }
994 }
995 return tot;
996 }
997
998 /*
999 * Queue data for writing and return error status from
1000 * last writes done, to maintain buffered data.
1001 */
1002 static long
1003 episowrite(Ep *ep, Isoio *iso, void *a, long count)
1004 {
1005 Ctlr *ctlr;
1006 uchar *b;
1007 int tot;
1008 int nw;
1009 char *err;
1010
1011 iso->debug = ep->debug;
1012 diprint("uhci: episowrite: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
1013
1014 ctlr = ep->hp->aux;
1015 qlock(iso);
1016 if(waserror()){
1017 qunlock(iso);
1018 nexterror();
1019 }
1020 ilock(ctlr);
1021 if(iso->state == Qclose){
1022 iunlock(ctlr);
1023 error(iso->err ? iso->err : Eio);
1024 }
1025 iso->state = Qrun;
1026 b = a;
1027 for(tot = 0; tot < count; tot += nw){
1028 while(isocanwrite(iso) == 0){
1029 iunlock(ctlr);
1030 diprint("uhci: episowrite: %#p sleep\n", iso);
1031 if(waserror()){
1032 if(iso->err == nil)
1033 iso->err = "I/O timed out";
1034 ilock(ctlr);
1035 break;
1036 }
1037 tsleep(iso, isocanwrite, iso, Isotmout);
1038 poperror();
1039 ilock(ctlr);
1040 }
1041 err = iso->err;
1042 iso->err = nil;
1043 if(iso->state == Qclose || err != nil){
1044 iunlock(ctlr);
1045 error(err ? err : Eio);
1046 }
1047 if(iso->state != Qrun)
1048 panic("episowrite: iso not running");
1049 iunlock(ctlr); /* We could page fault here */
1050 nw = putsamples(iso, b+tot, count-tot);
1051 ilock(ctlr);
1052 }
1053 if(iso->state != Qclose)
1054 iso->state = Qdone;
1055 iunlock(ctlr);
1056 err = iso->err; /* in case it failed early */
1057 iso->err = nil;
1058 qunlock(iso);
1059 poperror();
1060 if(err != nil)
1061 error(err);
1062 diprint("uhci: episowrite: %#p %d bytes\n", iso, tot);
1063 return tot;
1064 }
1065
1066 /*
1067 * Available data is kept at tdu and following tds, up to tdi (excluded).
1068 */
1069 static long
1070 episoread(Ep *ep, Isoio *iso, void *a, int count)
1071 {
1072 Ctlr *ctlr;
1073 uchar *b;
1074 int nr;
1075 int tot;
1076 Td *tdu;
1077
1078 iso->debug = ep->debug;
1079 diprint("uhci: episoread: %#p ep%d.%d\n", iso, ep->dev->nb, ep->nb);
1080
1081 b = a;
1082 ctlr = ep->hp->aux;
1083 qlock(iso);
1084 if(waserror()){
1085 qunlock(iso);
1086 nexterror();
1087 }
1088 iso->err = nil;
1089 iso->nerrs = 0;
1090 ilock(ctlr);
1091 if(iso->state == Qclose){
1092 iunlock(ctlr);
1093 error(iso->err ? iso->err : Eio);
1094 }
1095 iso->state = Qrun;
1096 while(isocanread(iso) == 0){
1097 iunlock(ctlr);
1098 diprint("uhci: episoread: %#p sleep\n", iso);
1099 if(waserror()){
1100 if(iso->err == nil)
1101 iso->err = "I/O timed out";
1102 ilock(ctlr);
1103 break;
1104 }
1105 tsleep(iso, isocanread, iso, Isotmout);
1106 poperror();
1107 ilock(ctlr);
1108 }
1109 if(iso->state == Qclose){
1110 iunlock(ctlr);
1111 error(iso->err ? iso->err : Eio);
1112 }
1113 iso->state = Qdone;
1114 assert(iso->tdu != iso->tdi);
1115
1116 for(tot = 0; iso->tdi != iso->tdu && tot < count; tot += nr){
1117 tdu = iso->tdu;
1118 if(tdu->csw & Tdactive){
1119 diprint("uhci: episoread: %#p tdu active\n", iso);
1120 break;
1121 }
1122 nr = tdu->ndata;
1123 if(tot + nr > count)
1124 nr = count - tot;
1125 if(nr == 0)
1126 print("uhci: ep%d.%d: too many polls\n",
1127 ep->dev->nb, ep->nb);
1128 else{
1129 iunlock(ctlr); /* We could page fault here */
1130 memmove(b+tot, tdu->data, nr);
1131 ilock(ctlr);
1132 if(nr < tdu->ndata)
1133 memmove(tdu->data, tdu->data+nr, tdu->ndata - nr);
1134 tdu->ndata -= nr;
1135 }
1136 if(tdu->ndata == 0){
1137 tdisoinit(iso, tdu, ep->maxpkt);
1138 iso->tdu = tdu->next;
1139 }
1140 }
1141 iunlock(ctlr);
1142 qunlock(iso);
1143 poperror();
1144 diprint("uhci: episoread: %#p %d bytes err '%s'\n", iso, tot, iso->err);
1145 if(iso->err != nil)
1146 error(iso->err);
1147 return tot;
1148 }
1149
1150 static int
1151 nexttoggle(int tog)
1152 {
1153 if(tog == Tddata0)
1154 return Tddata1;
1155 else
1156 return Tddata0;
1157 }
1158
1159 static Td*
1160 epgettd(Ep *ep, Qio *io, int flags, void *a, int count)
1161 {
1162 Td *td;
1163 int tok;
1164
1165 if(ep->maxpkt < count)
1166 error("maxpkt too short");
1167 td = tdalloc();
1168 if(count <= Tdndata)
1169 td->data = td->sbuff;
1170 else
1171 td->data = td->buff = smalloc(ep->maxpkt);
1172 td->buffer = PCIWADDR(td->data);
1173 td->ndata = count;
1174 if(a != nil && count > 0)
1175 memmove(td->data, a, count);
1176 td->csw = Tderr2|Tderr1|flags;
1177 if(ep->dev->speed == Lowspeed)
1178 td->csw |= Tdlow;
1179 tok = io->tok | io->toggle;
1180 io->toggle = nexttoggle(io->toggle);
1181 td->token = ((count-1)<<21) | ((io->usbid&0x7FF)<<8) | tok;
1182
1183 return td;
1184 }
1185
1186 /*
1187 * Try to get them idle
1188 */
1189 static void
1190 aborttds(Qh *qh)
1191 {
1192 Td *td;
1193
1194 qh->state = Qdone;
1195 qh->elink = QHterm;
1196 for(td = qh->tds; td != nil; td = td->next){
1197 if(td->csw & Tdactive)
1198 td->ndata = 0;
1199 td->csw &= ~(Tdactive|Tdioc);
1200 }
1201 }
1202
1203 static int
1204 epiodone(void *a)
1205 {
1206 Qh *qh;
1207
1208 qh = a;
1209 return qh->state != Qrun;
1210 }
1211
1212 static void
1213 epiowait(Ctlr *ctlr, Qio *io, int tmout, ulong load)
1214 {
1215 Qh *qh;
1216 int timedout;
1217
1218 qh = io->qh;
1219 ddqprint("uhci io %#p sleep on qh %#p state %uld\n", io, qh, qh->state);
1220 timedout = 0;
1221 if(waserror()){
1222 dqprint("uhci io %#p qh %#p timed out\n", io, qh);
1223 timedout++;
1224 }else{
1225 if(tmout == 0)
1226 sleep(io, epiodone, qh);
1227 else
1228 tsleep(io, epiodone, qh, tmout);
1229 poperror();
1230 }
1231 ilock(ctlr);
1232 if(qh->state == Qrun)
1233 timedout = 1;
1234 else if(qh->state != Qdone && qh->state != Qclose)
1235 panic("epio: queue not done and not closed");
1236 if(timedout){
1237 aborttds(io->qh);
1238 io->err = "request timed out";
1239 iunlock(ctlr);
1240 if(!waserror()){
1241 tsleep(&up->sleep, return0, 0, Abortdelay);
1242 poperror();
1243 }
1244 ilock(ctlr);
1245 }
1246 if(qh->state != Qclose)
1247 qh->state = Qidle;
1248 qhlinktd(qh, nil);
1249 ctlr->load -= load;
1250 iunlock(ctlr);
1251 }
1252
1253 /*
1254 * Non iso I/O.
1255 * To make it work for control transfers, the caller may
1256 * lock the Qio for the entire control transfer.
1257 * If tmout is not 0 it is a timeout value in ms.
1258 *
1259 */
1260 static long
1261 epio(Ep *ep, Qio *io, void *a, long count, int tmout, int mustlock)
1262 {
1263 Td *td;
1264 Td *ltd;
1265 Td *td0;
1266 Td *ntd;
1267 Ctlr *ctlr;
1268 Qh* qh;
1269 long n;
1270 long tot;
1271 char buf[128];
1272 uchar *c;
1273 int saved;
1274 int ntds;
1275 ulong load;
1276 char *err;
1277
1278 qh = io->qh;
1279 ctlr = ep->hp->aux;
1280 io->debug = ep->debug;
1281 ddeprint("epio: %s ep%d.%d io %#p count %ld load %uld\n",
1282 io->tok == Tdtokin ? "in" : "out",
1283 ep->dev->nb, ep->nb, io, count, ctlr->load);
1284 if((debug > 1 || ep->debug > 1) && io->tok != Tdtokin){
1285 seprintdata(buf, buf+sizeof(buf), a, count);
1286 print("uchi epio: user data: %s\n", buf);
1287 }
1288 if(mustlock){
1289 qlock(io);
1290 if(waserror()){
1291 qunlock(io);
1292 nexterror();
1293 }
1294 }
1295 io->err = nil;
1296 ilock(ctlr);
1297 if(qh->state == Qclose){ /* Tds released by cancelio */
1298 iunlock(ctlr);
1299 error(io->err ? io->err : Eio);
1300 }
1301 if(qh->state != Qidle)
1302 panic("epio: qh not idle");
1303 qh->state = Qinstall;
1304 iunlock(ctlr);
1305
1306 c = a;
1307 td0 = ltd = nil;
1308 load = tot = 0;
1309 do{
1310 n = ep->maxpkt;
1311 if(count-tot < n)
1312 n = count-tot;
1313 if(io->tok != Tdtokin)
1314 td = epgettd(ep, io, Tdactive, c+tot, n);
1315 else
1316 td = epgettd(ep, io, Tdactive|Tdspd, nil, n);
1317 if(td0 == nil)
1318 td0 = td;
1319 else
1320 tdlinktd(ltd, td);
1321 ltd = td;
1322 tot += n;
1323 load += ep->load;
1324 }while(tot < count);
1325 if(td0 == nil || ltd == nil)
1326 panic("epio: no td");
1327
1328 ltd->csw |= Tdioc; /* the last one interrupts */
1329 ddeprint("uhci: load %uld ctlr load %uld\n", load, ctlr->load);
1330 ilock(ctlr);
1331 if(qh->state != Qclose){
1332 io->iotime = TK2MS(MACHP(0)->ticks);
1333 qh->state = Qrun;
1334 coherence();
1335 qhlinktd(qh, td0);
1336 ctlr->load += load;
1337 }
1338 iunlock(ctlr);
1339
1340 epiowait(ctlr, io, tmout, load);
1341 if(debug > 1 || ep->debug > 1)
1342 dumptd(td0, "epio: got tds: ");
1343
1344 tot = 0;
1345 c = a;
1346 saved = 0;
1347 ntds = 0;
1348 for(td = td0; td != nil; td = ntd){
1349 ntds++;
1350 /*
1351 * Use td tok, not io tok, because of setup packets.
1352 * Also, if the Td was stalled or active (previous Td
1353 * was a short packet), we must save the toggle as it is.
1354 */
1355 if(td->csw & (Tdstalled|Tdactive)){
1356 if(saved++ == 0)
1357 io->toggle = td->token & Tddata1;
1358 }else{
1359 tot += td->ndata;
1360 if(tdtok(td) == Tdtokin && td->ndata > 0){
1361 memmove(c, td->data, td->ndata);
1362 c += td->ndata;
1363 }
1364 }
1365 ntd = td->next;
1366 tdfree(td);
1367 }
1368 err = io->err;
1369 if(mustlock){
1370 qunlock(io);
1371 poperror();
1372 }
1373 ddeprint("epio: io %#p: %d tds: return %ld err '%s'\n",
1374 io, ntds, tot, err);
1375 if(err != nil)
1376 error(err);
1377 if(tot < 0)
1378 error(Eio);
1379 return tot;
1380 }
1381
1382 /*
1383 * halt condition was cleared on the endpoint. update our toggles.
1384 */
1385 static void
1386 clrhalt(Ep *ep)
1387 {
1388 Qio *io;
1389
1390 ep->clrhalt = 0;
1391 switch(ep->ttype){
1392 case Tbulk:
1393 case Tintr:
1394 io = ep->aux;
1395 if(ep->mode != OREAD){
1396 qlock(&io[OWRITE]);
1397 io[OWRITE].toggle = Tddata0;
1398 deprint("ep clrhalt for io %#p\n", io+OWRITE);
1399 qunlock(&io[OWRITE]);
1400 }
1401 if(ep->mode != OWRITE){
1402 qlock(&io[OREAD]);
1403 io[OREAD].toggle = Tddata0;
1404 deprint("ep clrhalt for io %#p\n", io+OREAD);
1405 qunlock(&io[OREAD]);
1406 }
1407 break;
1408 }
1409 }
1410
1411 static long
1412 epread(Ep *ep, void *a, long count)
1413 {
1414 Ctlio *cio;
1415 Qio *io;
1416 Isoio *iso;
1417 char buf[160];
1418 ulong delta;
1419
1420 ddeprint("uhci: epread\n");
1421 if(ep->aux == nil)
1422 panic("epread: not open");
1423
1424 switch(ep->ttype){
1425 case Tctl:
1426 cio = ep->aux;
1427 qlock(cio);
1428 if(waserror()){
1429 qunlock(cio);
1430 nexterror();
1431 }
1432 ddeprint("epread ctl ndata %d\n", cio->ndata);
1433 if(cio->ndata < 0)
1434 error("request expected");
1435 else if(cio->ndata == 0){
1436 cio->ndata = -1;
1437 count = 0;
1438 }else{
1439 if(count > cio->ndata)
1440 count = cio->ndata;
1441 if(count > 0)
1442 memmove(a, cio->data, count);
1443 /* BUG for big transfers */
1444 free(cio->data);
1445 cio->data = nil;
1446 cio->ndata = 0; /* signal EOF next time */
1447 }
1448 qunlock(cio);
1449 poperror();
1450 if(debug>1 || ep->debug){
1451 seprintdata(buf, buf+sizeof(buf), a, count);
1452 print("epread: %s\n", buf);
1453 }
1454 return count;
1455 case Tbulk:
1456 io = ep->aux;
1457 if(ep->clrhalt)
1458 clrhalt(ep);
1459 return epio(ep, &io[OREAD], a, count, Bulktmout, 1);
1460 case Tintr:
1461 io = ep->aux;
1462 delta = TK2MS(MACHP(0)->ticks) - io[OREAD].iotime + 1;
1463 if(delta < ep->pollival / 2)
1464 tsleep(&up->sleep, return0, 0, ep->pollival/2 - delta);
1465 if(ep->clrhalt)
1466 clrhalt(ep);
1467 return epio(ep, &io[OREAD], a, count, 0, 1);
1468 case Tiso:
1469 iso = ep->aux;
1470 return episoread(ep, iso, a, count);
1471 default:
1472 panic("epread: bad ep ttype %d", ep->ttype);
1473 }
1474 return -1;
1475 }
1476
1477 /*
1478 * Control transfers are one setup write (data0)
1479 * plus zero or more reads/writes (data1, data0, ...)
1480 * plus a final write/read with data1 to ack.
1481 * For both host to device and device to host we perform
1482 * the entire transfer when the user writes the request,
1483 * and keep any data read from the device for a later read.
1484 * We call epio three times instead of placing all Tds at
1485 * the same time because doing so leads to crc/tmout errors
1486 * for some devices.
1487 * Upon errors on the data phase we must still run the status
1488 * phase or the device may cease responding in the future.
1489 */
1490 static long
1491 epctlio(Ep *ep, Ctlio *cio, void *a, long count)
1492 {
1493 uchar *c;
1494 long len;
1495
1496 ddeprint("epctlio: cio %#p ep%d.%d count %ld\n",
1497 cio, ep->dev->nb, ep->nb, count);
1498 if(count < Rsetuplen)
1499 error("short usb comand");
1500 qlock(cio);
1501 free(cio->data);
1502 cio->data = nil;
1503 cio->ndata = 0;
1504 if(waserror()){
1505 qunlock(cio);
1506 free(cio->data);
1507 cio->data = nil;
1508 cio->ndata = 0;
1509 nexterror();
1510 }
1511
1512 /* set the address if unset and out of configuration state */
1513 if(ep->dev->state != Dconfig && cio->usbid == 0)
1514 cio->usbid = ((ep->nb&Epmax)<<7)|(ep->dev->nb&Devmax);
1515 c = a;
1516 cio->tok = Tdtoksetup;
1517 cio->toggle = Tddata0;
1518 if(epio(ep, cio, a, Rsetuplen, Ctltmout, 0) < Rsetuplen)
1519 error(Eio);
1520 a = c + Rsetuplen;
1521 count -= Rsetuplen;
1522
1523 cio->toggle = Tddata1;
1524 if(c[Rtype] & Rd2h){
1525 cio->tok = Tdtokin;
1526 len = GET2(c+Rcount);
1527 if(len <= 0)
1528 error("bad length in d2h request");
1529 if(len > Maxctllen)
1530 error("d2h data too large to fit in uhci");
1531 a = cio->data = smalloc(len+1);
1532 }else{
1533 cio->tok = Tdtokout;
1534 len = count;
1535 }
1536 if(len > 0)
1537 if(waserror())
1538 len = -1;
1539 else{
1540 len = epio(ep, cio, a, len, Ctltmout, 0);
1541 poperror();
1542 }
1543 if(c[Rtype] & Rd2h){
1544 count = Rsetuplen;
1545 cio->ndata = len;
1546 cio->tok = Tdtokout;
1547 }else{
1548 if(len < 0)
1549 count = -1;
1550 else
1551 count = Rsetuplen + len;
1552 cio->tok = Tdtokin;
1553 }
1554 cio->toggle = Tddata1;
1555 epio(ep, cio, nil, 0, Ctltmout, 0);
1556 qunlock(cio);
1557 poperror();
1558 ddeprint("epctlio cio %#p return %ld\n", cio, count);
1559 return count;
1560 }
1561
1562 static long
1563 epwrite(Ep *ep, void *a, long count)
1564 {
1565 Ctlio *cio;
1566 Isoio *iso;
1567 Qio *io;
1568 ulong delta;
1569 char *b;
1570 int tot;
1571 int nw;
1572
1573 ddeprint("uhci: epwrite ep%d.%d\n", ep->dev->nb, ep->nb);
1574 if(ep->aux == nil)
1575 panic("uhci: epwrite: not open");
1576 switch(ep->ttype){
1577 case Tctl:
1578 cio = ep->aux;
1579 return epctlio(ep, cio, a, count);
1580 case Tbulk:
1581 io = ep->aux;
1582 if(ep->clrhalt)
1583 clrhalt(ep);
1584 /*
1585 * Put at most Tdatomic Tds (512 bytes) at a time.
1586 * Otherwise some devices produce babble errors.
1587 */
1588 b = a;
1589 for(tot = 0; tot < count ; tot += nw){
1590 nw = count - tot;
1591 if(nw > Tdatomic * ep->maxpkt)
1592 nw = Tdatomic * ep->maxpkt;
1593 nw = epio(ep, &io[OWRITE], b+tot, nw, Bulktmout, 1);
1594 }
1595 return tot;
1596 case Tintr:
1597 io = ep->aux;
1598 delta = TK2MS(MACHP(0)->ticks) - io[OWRITE].iotime + 1;
1599 if(delta < ep->pollival)
1600 tsleep(&up->sleep, return0, 0, ep->pollival - delta);
1601 if(ep->clrhalt)
1602 clrhalt(ep);
1603 return epio(ep, &io[OWRITE], a, count, 0, 1);
1604 case Tiso:
1605 iso = ep->aux;
1606 return episowrite(ep, iso, a, count);
1607 default:
1608 panic("uhci: epwrite: bad ep ttype %d", ep->ttype);
1609 }
1610 return -1;
1611 }
1612
1613 static void
1614 isoopen(Ep *ep)
1615 {
1616 Ctlr *ctlr;
1617 Isoio *iso;
1618 int frno;
1619 int i;
1620 Td* td;
1621 Td* ltd;
1622 int size;
1623 int left;
1624
1625 if(ep->mode == ORDWR)
1626 error("iso i/o is half-duplex");
1627 ctlr = ep->hp->aux;
1628 iso = ep->aux;
1629 iso->debug = ep->debug;
1630 iso->next = nil; /* paranoia */
1631 if(ep->mode == OREAD)
1632 iso->tok = Tdtokin;
1633 else
1634 iso->tok = Tdtokout;
1635 iso->usbid = ((ep->nb & Epmax)<<7)|(ep->dev->nb & Devmax);
1636 iso->state = Qidle;
1637 iso->nframes = Nframes/ep->pollival;
1638 if(iso->nframes < 3)
1639 error("uhci isoopen bug"); /* we need at least 3 tds */
1640
1641 ilock(ctlr);
1642 if(ctlr->load + ep->load > 800){
1643 iunlock(ctlr);
1644 error("bandwidth exceeded");
1645 }
1646 ctlr->load += ep->load;
1647 ctlr->isoload += ep->load;
1648 dprint("uhci: load %uld isoload %uld\n", ctlr->load, ctlr->isoload);
1649 iunlock(ctlr);
1650
1651 /*
1652 * From here on this cannot raise errors
1653 * unless we catch them and release here all memory allocated.
1654 */
1655 if(ep->maxpkt > Tdndata)
1656 iso->data = smalloc(iso->nframes*ep->maxpkt);
1657 ilock(ctlr);
1658 frno = INS(Frnum) + 10; /* start 10ms ahead */
1659 frno = TRUNC(frno, Nframes);
1660 iunlock(ctlr);
1661 iso->td0frno = frno;
1662 ltd = nil;
1663 left = 0;
1664 for(i = 0; i < iso->nframes; i++){
1665 td = iso->tdps[frno] = tdalloc();
1666 if(ep->mode == OREAD)
1667 size = ep->maxpkt;
1668 else{
1669 size = (ep->hz+left) * ep->pollival / 1000;
1670 size *= ep->samplesz;
1671 left = (ep->hz+left) * ep->pollival % 1000;
1672 if(size > ep->maxpkt){
1673 print("uhci: ep%d.%d: size > maxpkt\n",
1674 ep->dev->nb, ep->nb);
1675 print("size = %d max = %ld\n", size, ep->maxpkt);
1676 size = ep->maxpkt;
1677 }
1678 }
1679 if(size > Tdndata)
1680 td->data = iso->data + i * ep->maxpkt;
1681 else
1682 td->data = td->sbuff;
1683 td->buffer = PCIWADDR(td->data);
1684 tdisoinit(iso, td, size);
1685 if(ltd != nil)
1686 ltd->next = td;
1687 ltd = td;
1688 frno = TRUNC(frno+ep->pollival, Nframes);
1689 }
1690 ltd->next = iso->tdps[iso->td0frno];
1691 iso->tdi = iso->tdps[iso->td0frno];
1692 iso->tdu = iso->tdi; /* read: right now; write: 1s ahead */
1693 ilock(ctlr);
1694 frno = iso->td0frno;
1695 for(i = 0; i < iso->nframes; i++){
1696 iso->tdps[frno]->link = ctlr->frames[frno];
1697 frno = TRUNC(frno+ep->pollival, Nframes);
1698 }
1699 coherence();
1700 frno = iso->td0frno;
1701 for(i = 0; i < iso->nframes; i++){
1702 ctlr->frames[frno] = PCIWADDR(iso->tdps[frno]);
1703 frno = TRUNC(frno+ep->pollival, Nframes);
1704 }
1705 iso->next = ctlr->iso;
1706 ctlr->iso = iso;
1707 iso->state = Qdone;
1708 iunlock(ctlr);
1709 if(debug > 1 || iso->debug >1)
1710 isodump(iso, 0);
1711 }
1712
1713 /*
1714 * Allocate the endpoint and set it up for I/O
1715 * in the controller. This must follow what's said
1716 * in Ep regarding configuration, including perhaps
1717 * the saved toggles (saved on a previous close of
1718 * the endpoint data file by epclose).
1719 */
1720 static void
1721 epopen(Ep *ep)
1722 {
1723 Ctlr *ctlr;
1724 Qh *cqh;
1725 Qio *io;
1726 Ctlio *cio;
1727 int usbid;
1728
1729 ctlr = ep->hp->aux;
1730 deprint("uhci: epopen ep%d.%d\n", ep->dev->nb, ep->nb);
1731 if(ep->aux != nil)
1732 panic("uhci: epopen called with open ep");
1733 if(waserror()){
1734 free(ep->aux);
1735 ep->aux = nil;
1736 nexterror();
1737 }
1738 if(ep->maxpkt > Tdmaxpkt){
1739 print("uhci: maxkpkt too large: using %d\n", Tdmaxpkt);
1740 ep->maxpkt = Tdmaxpkt;
1741 }
1742 cqh = ctlr->qh[ep->ttype];
1743 switch(ep->ttype){
1744 case Tnone:
1745 error("endpoint not configured");
1746 case Tiso:
1747 ep->aux = smalloc(sizeof(Isoio));
1748 isoopen(ep);
1749 break;
1750 case Tctl:
1751 cio = ep->aux = smalloc(sizeof(Ctlio));
1752 cio->debug = ep->debug;
1753 cio->ndata = -1;
1754 cio->data = nil;
1755 if(ep->dev->isroot != 0 && ep->nb == 0) /* root hub */
1756 break;
1757 cio->qh = qhalloc(ctlr, cqh, cio, "epc");
1758 break;
1759 case Tbulk:
1760 case Tintr:
1761 io = ep->aux = smalloc(sizeof(Qio)*2);
1762 io[OREAD].debug = io[OWRITE].debug = ep->debug;
1763 usbid = ((ep->nb&Epmax)<<7)|(ep->dev->nb &Devmax);
1764 if(ep->mode != OREAD){
1765 if(ep->toggle[OWRITE] != 0)
1766 io[OWRITE].toggle = Tddata1;
1767 else
1768 io[OWRITE].toggle = Tddata0;
1769 io[OWRITE].tok = Tdtokout;
1770 io[OWRITE].qh = qhalloc(ctlr, cqh, io+OWRITE, "epw");
1771 io[OWRITE].usbid = usbid;
1772 }
1773 if(ep->mode != OWRITE){
1774 if(ep->toggle[OREAD] != 0)
1775 io[OREAD].toggle = Tddata1;
1776 else
1777 io[OREAD].toggle = Tddata0;
1778 io[OREAD].tok = Tdtokin;
1779 io[OREAD].qh = qhalloc(ctlr, cqh, io+OREAD, "epr");
1780 io[OREAD].usbid = usbid;
1781 }
1782 break;
1783 }
1784 if(debug>1 || ep->debug)
1785 dump(ep->hp);
1786 deprint("uhci: epopen done\n");
1787 poperror();
1788 }
1789
1790 static void
1791 cancelio(Ctlr *ctlr, Qio *io)
1792 {
1793 Qh *qh;
1794
1795 ilock(ctlr);
1796 qh = io->qh;
1797 if(io == nil || io->qh == nil || io->qh->state == Qclose){
1798 iunlock(ctlr);
1799 return;
1800 }
1801 dqprint("uhci: cancelio for qh %#p state %s\n",
1802 qh, qhsname[qh->state]);
1803 aborttds(qh);
1804 qh->state = Qclose;
1805 iunlock(ctlr);
1806 if(!waserror()){
1807 tsleep(&up->sleep, return0, 0, Abortdelay);
1808 poperror();
1809 }
1810
1811 wakeup(io);
1812 qlock(io);
1813 /* wait for epio if running */
1814 qunlock(io);
1815
1816 qhfree(ctlr, qh);
1817 io->qh = nil;
1818 }
1819
1820 static void
1821 cancelisoio(Ctlr *ctlr, Isoio *iso, int pollival, ulong load)
1822 {
1823 Isoio **il;
1824 ulong *lp;
1825 int i;
1826 int frno;
1827 Td *td;
1828
1829 ilock(ctlr);
1830 if(iso->state == Qclose){
1831 iunlock(ctlr);
1832 return;
1833 }
1834 if(iso->state != Qrun && iso->state != Qdone)
1835 panic("bad iso state");
1836 iso->state = Qclose;
1837 if(ctlr->isoload < load)
1838 panic("uhci: low isoload");
1839 ctlr->isoload -= load;
1840 ctlr->load -= load;
1841 for(il = &ctlr->iso; *il != nil; il = &(*il)->next)
1842 if(*il == iso)
1843 break;
1844 if(*il == nil)
1845 panic("isocancel: not found");
1846 *il = iso->next;
1847 frno = iso->td0frno;
1848 for(i = 0; i < iso->nframes; i++){
1849 td = iso->tdps[frno];
1850 td->csw &= ~(Tdioc|Tdactive);
1851 for(lp=&ctlr->frames[frno]; !(*lp & Tdterm);
1852 lp = &TPTR(*lp)->link)
1853 if(TPTR(*lp) == td)
1854 break;
1855 if(*lp & Tdterm)
1856 panic("cancelisoio: td not found");
1857 *lp = td->link;
1858 frno = TRUNC(frno+pollival, Nframes);
1859 }
1860 iunlock(ctlr);
1861
1862 /*
1863 * wakeup anyone waiting for I/O and
1864 * wait to be sure no I/O is in progress in the controller.
1865 * and then wait to be sure episo-io is no longer running.
1866 */
1867 wakeup(iso);
1868 diprint("cancelisoio iso %#p waiting for I/O to cease\n", iso);
1869 tsleep(&up->sleep, return0, 0, 5);
1870 qlock(iso);
1871 qunlock(iso);
1872 diprint("cancelisoio iso %#p releasing iso\n", iso);
1873
1874 frno = iso->td0frno;
1875 for(i = 0; i < iso->nframes; i++){
1876 tdfree(iso->tdps[frno]);
1877 iso->tdps[frno] = nil;
1878 frno = TRUNC(frno+pollival, Nframes);
1879 }
1880 free(iso->data);
1881 iso->data = nil;
1882
1883 }
1884
1885 static void
1886 epclose(Ep *ep)
1887 {
1888 Ctlr *ctlr;
1889 Ctlio *cio;
1890 Isoio *iso;
1891 Qio *io;
1892
1893 ctlr = ep->hp->aux;
1894 deprint("uhci: epclose ep%d.%d\n", ep->dev->nb, ep->nb);
1895
1896 if(ep->aux == nil)
1897 panic("uhci: epclose called with closed ep");
1898 switch(ep->ttype){
1899 case Tctl:
1900 cio = ep->aux;
1901 cancelio(ctlr, cio);
1902 free(cio->data);
1903 cio->data = nil;
1904 break;
1905 case Tbulk:
1906 case Tintr:
1907 io = ep->aux;
1908 ep->toggle[OREAD] = ep->toggle[OWRITE] = 0;
1909 if(ep->mode != OWRITE){
1910 cancelio(ctlr, &io[OREAD]);
1911 if(io[OREAD].toggle == Tddata1)
1912 ep->toggle[OREAD] = 1;
1913 }
1914 if(ep->mode != OREAD){
1915 cancelio(ctlr, &io[OWRITE]);
1916 if(io[OWRITE].toggle == Tddata1)
1917 ep->toggle[OWRITE] = 1;
1918 }
1919 break;
1920 case Tiso:
1921 iso = ep->aux;
1922 cancelisoio(ctlr, iso, ep->pollival, ep->load);
1923 break;
1924 default:
1925 panic("epclose: bad ttype %d", ep->ttype);
1926 }
1927
1928 free(ep->aux);
1929 ep->aux = nil;
1930
1931 }
1932
1933 static char*
1934 seprintep(char *s, char *e, Ep *ep)
1935 {
1936 Ctlio *cio;
1937 Qio *io;
1938 Isoio *iso;
1939 Ctlr *ctlr;
1940
1941 ctlr = ep->hp->aux;
1942 ilock(ctlr);
1943 if(ep->aux == nil){
1944 *s = 0;
1945 iunlock(ctlr);
1946 return s;
1947 }
1948 switch(ep->ttype){
1949 case Tctl:
1950 cio = ep->aux;
1951 s = seprint(s,e,"cio %#p qh %#p"
1952 " id %#x tog %#x tok %#x err %s\n",
1953 cio, cio->qh, cio->usbid, cio->toggle,
1954 cio->tok, cio->err);
1955 break;
1956 case Tbulk:
1957 case Tintr:
1958 io = ep->aux;
1959 if(ep->mode != OWRITE)
1960 s = seprint(s,e,"r: qh %#p id %#x tog %#x tok %#x err %s\n",
1961 io[OREAD].qh, io[OREAD].usbid, io[OREAD].toggle,
1962 io[OREAD].tok, io[OREAD].err);
1963 if(ep->mode != OREAD)
1964 s = seprint(s,e,"w: qh %#p id %#x tog %#x tok %#x err %s\n",
1965 io[OWRITE].qh, io[OWRITE].usbid, io[OWRITE].toggle,
1966 io[OWRITE].tok, io[OWRITE].err);
1967 break;
1968 case Tiso:
1969 iso = ep->aux;
1970 s = seprint(s,e,"iso %#p id %#x tok %#x tdu %#p tdi %#p err %s\n",
1971 iso, iso->usbid, iso->tok, iso->tdu, iso->tdi, iso->err);
1972 break;
1973 }
1974 iunlock(ctlr);
1975 return s;
1976 }
1977
1978 static int
1979 portenable(Hci *hp, int port, int on)
1980 {
1981 int s;
1982 int ioport;
1983 Ctlr *ctlr;
1984
1985 ctlr = hp->aux;
1986 dprint("uhci: %#x port %d enable=%d\n", ctlr->port, port, on);
1987 ioport = PORT(port-1);
1988 qlock(&ctlr->portlck);
1989 if(waserror()){
1990 qunlock(&ctlr->portlck);
1991 nexterror();
1992 }
1993 ilock(ctlr);
1994 s = INS(ioport);
1995 if(on)
1996 OUTS(ioport, s | PSenable);
1997 else
1998 OUTS(ioport, s & ~PSenable);
1999 microdelay(64);
2000 iunlock(ctlr);
2001 tsleep(&up->sleep, return0, 0, Enabledelay);
2002 dprint("uhci %#ux port %d enable=%d: sts %#x\n",
2003 ctlr->port, port, on, INS(ioport));
2004 qunlock(&ctlr->portlck);
2005 poperror();
2006 return 0;
2007 }
2008
2009 static int
2010 portreset(Hci *hp, int port, int on)
2011 {
2012 int i, p;
2013 Ctlr *ctlr;
2014
2015 if(on == 0)
2016 return 0;
2017 ctlr = hp->aux;
2018 dprint("uhci: %#ux port %d reset\n", ctlr->port, port);
2019 p = PORT(port-1);
2020 ilock(ctlr);
2021 OUTS(p, PSreset);
2022 delay(50);
2023 OUTS(p, INS(p) & ~PSreset);
2024 OUTS(p, INS(p) | PSenable);
2025 microdelay(64);
2026 for(i=0; i<1000 && (INS(p) & PSenable) == 0; i++)
2027 ;
2028 OUTS(p, (INS(p) & ~PSreset)|PSenable);
2029 iunlock(ctlr);
2030 dprint("uhci %#ux after port %d reset: sts %#x\n",
2031 ctlr->port, port, INS(p));
2032 return 0;
2033 }
2034
2035 static int
2036 portstatus(Hci *hp, int port)
2037 {
2038 int s;
2039 int r;
2040 int ioport;
2041 Ctlr *ctlr;
2042
2043 ctlr = hp->aux;
2044 ioport = PORT(port-1);
2045 qlock(&ctlr->portlck);
2046 if(waserror()){
2047 iunlock(ctlr);
2048 qunlock(&ctlr->portlck);
2049 nexterror();
2050 }
2051 ilock(ctlr);
2052 s = INS(ioport);
2053 if(s & (PSstatuschg | PSchange)){
2054 OUTS(ioport, s);
2055 ddprint("uhci %#ux port %d status %#x\n", ctlr->port, port, s);
2056 }
2057 iunlock(ctlr);
2058 qunlock(&ctlr->portlck);
2059 poperror();
2060
2061 /*
2062 * We must return status bits as a
2063 * get port status hub request would do.
2064 */
2065 r = 0;
2066 if(s & PSpresent)
2067 r |= HPpresent;
2068 if(s & PSenable)
2069 r |= HPenable;
2070 if(s & PSsuspend)
2071 r |= HPsuspend;
2072 if(s & PSreset)
2073 r |= HPreset;
2074 if(s & PSslow)
2075 r |= HPslow;
2076 if(s & PSstatuschg)
2077 r |= HPstatuschg;
2078 if(s & PSchange)
2079 r |= HPchange;
2080 return r;
2081 }
2082
2083 static void
2084 scanpci(void)
2085 {
2086 static int already = 0;
2087 int io;
2088 int i;
2089 Ctlr *ctlr;
2090 Pcidev *p;
2091
2092 if(already)
2093 return;
2094 already = 1;
2095 p = nil;
2096 while(p = pcimatch(p, 0, 0)){
2097 /*
2098 * Find UHCI controllers (Programming Interface = 0).
2099 */
2100 if(p->ccrb != Pcibcserial || p->ccru != Pciscusb)
2101 continue;
2102 switch(p->ccrp){
2103 case 0:
2104 io = p->mem[4].bar & ~0x0F;
2105 break;
2106 default:
2107 continue;
2108 }
2109 if(io == 0){
2110 print("usbuhci: %#x %#x: failed to map registers\n",
2111 p->vid, p->did);
2112 continue;
2113 }
2114 if(ioalloc(io, p->mem[4].size, 0, "usbuhci") < 0){
2115 print("usbuhci: port %#ux in use\n", io);
2116 continue;
2117 }
2118 if(p->intl == 0xFF || p->intl == 0){
2119 print("usbuhci: no irq assigned for port %#ux\n", io);
2120 continue;
2121 }
2122
2123 dprint("uhci: %#x %#x: port %#ux size %#x irq %d\n",
2124 p->vid, p->did, io, p->mem[4].size, p->intl);
2125
2126 ctlr = mallocz(sizeof(Ctlr), 1);
2127 ctlr->pcidev = p;
2128 ctlr->port = io;
2129 for(i = 0; i < Nhcis; i++)
2130 if(ctlrs[i] == nil){
2131 ctlrs[i] = ctlr;
2132 break;
2133 }
2134 if(i == Nhcis)
2135 print("uhci: bug: no more controllers\n");
2136 }
2137 }
2138
2139 static void
2140 uhcimeminit(Ctlr *ctlr)
2141 {
2142 Td* td;
2143 Qh *qh;
2144 int frsize;
2145 int i;
2146
2147 ctlr->qhs = ctlr->qh[Tctl] = qhalloc(ctlr, nil, nil, "CTL");
2148 ctlr->qh[Tintr] = qhalloc(ctlr, ctlr->qh[Tctl], nil, "INT");
2149 ctlr->qh[Tbulk] = qhalloc(ctlr, ctlr->qh[Tintr], nil, "BLK");
2150
2151 /* idle Td from dummy Qh at the end. looped back to itself */
2152 /* This is a workaround for PIIX4 errata 29773804.pdf */
2153 qh = qhalloc(ctlr, ctlr->qh[Tbulk], nil, "BWS");
2154 td = tdalloc();
2155 td->link = PCIWADDR(td);
2156 qhlinktd(qh, td);
2157
2158 /* loop (hw only) from the last qh back to control xfers.
2159 * this may be done only for some of them. Disable until ehci comes.
2160 */
2161 if(0)
2162 qh->link = PCIWADDR(ctlr->qhs);
2163
2164 frsize = Nframes*sizeof(ulong);
2165 ctlr->frames = xspanalloc(frsize, frsize, 0);
2166 if(ctlr->frames == nil)
2167 panic("uhci reset: no memory");
2168
2169 ctlr->iso = nil;
2170 for(i = 0; i < Nframes; i++)
2171 ctlr->frames[i] = PCIWADDR(ctlr->qhs)|QHlinkqh;
2172 OUTL(Flbaseadd, PCIWADDR(ctlr->frames));
2173 OUTS(Frnum, 0);
2174 dprint("uhci %#ux flb %#ulx frno %#ux\n", ctlr->port,
2175 INL(Flbaseadd), INS(Frnum));
2176 }
2177
2178 static void
2179 init(Hci *hp)
2180 {
2181 Ctlr *ctlr;
2182 int sts;
2183 int i;
2184
2185 ctlr = hp->aux;
2186 dprint("uhci %#ux init\n", ctlr->port);
2187 coherence();
2188 ilock(ctlr);
2189 OUTS(Usbintr, Itmout|Iresume|Ioc|Ishort);
2190 uhcirun(ctlr, 1);
2191 dprint("uhci: init: cmd %#ux sts %#ux sof %#ux",
2192 INS(Cmd), INS(Status), INS(SOFmod));
2193 dprint(" flb %#ulx frno %#ux psc0 %#ux psc1 %#ux",
2194 INL(Flbaseadd), INS(Frnum), INS(PORT(0)), INS(PORT(1)));
2195 /* guess other ports */
2196 for(i = 2; i < 6; i++){
2197 sts = INS(PORT(i));
2198 if(sts != 0xFFFF && (sts & PSreserved1) == 1){
2199 dprint(" psc%d %#ux", i, sts);
2200 hp->nports++;
2201 }else
2202 break;
2203 }
2204 for(i = 0; i < hp->nports; i++)
2205 OUTS(PORT(i), 0);
2206 iunlock(ctlr);
2207 }
2208
2209 static void
2210 uhcireset(Ctlr *ctlr)
2211 {
2212 int i;
2213 int sof;
2214
2215 ilock(ctlr);
2216 dprint("uhci %#ux reset\n", ctlr->port);
2217
2218 /*
2219 * Turn off legacy mode. Some controllers won't
2220 * interrupt us as expected otherwise.
2221 */
2222 uhcirun(ctlr, 0);
2223 pcicfgw16(ctlr->pcidev, 0xc0, 0x2000);
2224
2225 OUTS(Usbintr, 0);
2226 sof = INB(SOFmod);
2227 uhcicmd(ctlr, Cgreset); /* global reset */
2228 delay(Resetdelay);
2229 uhcicmd(ctlr, 0); /* all halt */
2230 uhcicmd(ctlr, Chcreset); /* controller reset */
2231 for(i = 0; i < 100; i++){
2232 if((INS(Cmd) & Chcreset) == 0)
2233 break;
2234 delay(1);
2235 }
2236 if(i == 100)
2237 print("uhci %#x controller reset timed out\n", ctlr->port);
2238 OUTB(SOFmod, sof);
2239 iunlock(ctlr);
2240 }
2241
2242 static void
2243 setdebug(Hci*, int d)
2244 {
2245 debug = d;
2246 }
2247
2248 static int
2249 reset(Hci *hp)
2250 {
2251 static Lock resetlck;
2252 int i;
2253 Ctlr *ctlr;
2254 Pcidev *p;
2255
2256 if(getconf("*nousbuhci"))
2257 return -1;
2258
2259 ilock(&resetlck);
2260 scanpci();
2261
2262 /*
2263 * Any adapter matches if no hp->port is supplied,
2264 * otherwise the ports must match.
2265 */
2266 ctlr = nil;
2267 for(i = 0; i < Nhcis && ctlrs[i] != nil; i++){
2268 ctlr = ctlrs[i];
2269 if(ctlr->active == 0)
2270 if(hp->port == 0 || hp->port == ctlr->port){
2271 ctlr->active = 1;
2272 break;
2273 }
2274 }
2275 iunlock(&resetlck);
2276 if(ctlrs[i] == nil || i == Nhcis)
2277 return -1;
2278
2279 p = ctlr->pcidev;
2280 hp->aux = ctlr;
2281 hp->port = ctlr->port;
2282 hp->irq = p->intl;
2283 hp->tbdf = p->tbdf;
2284 hp->nports = 2; /* default */
2285
2286 uhcireset(ctlr);
2287 uhcimeminit(ctlr);
2288
2289 /*
2290 * Linkage to the generic HCI driver.
2291 */
2292 hp->init = init;
2293 hp->dump = dump;
2294 hp->interrupt = interrupt;
2295 hp->epopen = epopen;
2296 hp->epclose = epclose;
2297 hp->epread = epread;
2298 hp->epwrite = epwrite;
2299 hp->seprintep = seprintep;
2300 hp->portenable = portenable;
2301 hp->portreset = portreset;
2302 hp->portstatus = portstatus;
2303 hp->debug = setdebug;
2304 hp->type = "uhci";
2305 return 0;
2306 }
2307
2308 void
2309 usbuhcilink(void)
2310 {
2311 addhcitype("uhci", reset);
2312 }
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