Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/pc98/cbus/cbus_dmareg.h
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1 /*- 2 * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #ifndef _PC98_CBUS_CBUS_DMAREG_H_ 29 #define _PC98_CBUS_CBUS_DMAREG_H_ 30 31 #include <dev/ic/i8237.h> 32 33 #define IO_DMA 0x01 /* 8237A DMA Controller */ 34 35 /* 36 * Register definitions for DMA controller 1 (channels 0..3): 37 */ 38 #define DMA1_CHN(c) (IO_DMA + (4*(c))) /* addr reg for channel c */ 39 #define DMA1_STATUS (IO_DMA + 0x10) /* status register */ 40 #define DMA1_SMSK (IO_DMA + 0x14) /* single mask register */ 41 #define DMA1_MODE (IO_DMA + 0x16) /* mode register */ 42 #define DMA1_FFC (IO_DMA + 0x18) /* clear first/last FF */ 43 44 #endif /* _PC98_CBUS_CBUS_DMAREG_H_ */
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