FreeBSD/Linux Kernel Cross Reference
sys/pc98/cbus/fdcreg.h
1 /*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 4. Neither the name of the University nor the names of its contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * from: @(#)fdreg.h 7.1 (Berkeley) 5/9/91
30 * $FreeBSD$
31 */
32
33 /*
34 * AT floppy controller registers and bitfields
35 */
36
37 /* uses NEC765 controller */
38 #include <dev/ic/nec765.h>
39
40 #ifdef PC98
41 /* registers */
42 #define FDSTS 0 /* NEC 765 Main Status Register (R) */
43 #define FDDATA 1 /* NEC 765 Data Register (R/W) */
44 #define FDCTL 2 /* FD Control Register */
45 #define FDC_RST 0x80 /* FDC RESET */
46 #define FDC_RDY 0x40 /* force READY */
47 #define FDC_DD 0x20 /* FDD Mode Exchange 0:1M 1:640K */
48 #define FDC_DMAE 0x10 /* enable floppy DMA */
49 #define FDC_MTON 0x08 /* MOTOR ON (when EMTON=1)*/
50 #define FDC_TMSK 0x04 /* TIMER MASK */
51 #define FDC_TTRG 0x01 /* TIMER TRIGER */
52
53 #define FDP_EMTON 0x04 /* enable MTON */
54 #define FDP_FDDEXC 0x02 /* FDD Mode Exchange 1:1M 0:640K */
55 #define FDP_PORTEXC 0x01 /* PORT Exchane 1:1M 0:640K */
56
57 #else
58 /* registers */
59 #define FDOUT 2 /* Digital Output Register (W) */
60 #define FDO_FDSEL 0x03 /* floppy device select */
61 #define FDO_FRST 0x04 /* floppy controller reset */
62 #define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */
63 #define FDO_MOEN0 0x10 /* motor enable drive 0 */
64 #define FDO_MOEN1 0x20 /* motor enable drive 1 */
65 #define FDO_MOEN2 0x40 /* motor enable drive 2 */
66 #define FDO_MOEN3 0x80 /* motor enable drive 3 */
67
68 #define FDSTS 4 /* NEC 765 Main Status Register (R) */
69 #define FDDATA 5 /* NEC 765 Data Register (R/W) */
70 #define FDCTL 7 /* Control Register (W) */
71 #endif /* PC98 */
72
73 /*
74 * The definitions for FDC_500KBPS etc. have been moved out to <sys/fdcio.h>
75 * since they need to be visible in userland. They cover the lower two bits
76 * of FDCTL when used for output.
77 */
78 /*
79 * this is the secret PIO data port (offset from base)
80 */
81 #define FDC_YE_DATAPORT 6
82
83 #ifndef PC98
84 #define FDIN 7 /* Digital Input Register (R) */
85 #define FDI_DCHG 0x80 /* diskette has been changed */
86 /* requires drive and motor being selected */
87 /* is cleared by any step pulse to drive */
88 #endif
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