Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pc98/pc98/busio.s
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1 /* $FreeBSD: releng/6.4/sys/pc98/pc98/busio.s 139825 2005-01-07 02:29:27Z imp $ */ 2 /* $NecBSD: busio.s,v 1.16.4.1 1999/08/16 09:06:08 kmatsuda Exp $ */ 3 /* $NetBSD$ */ 4 5 /*- 6 * [NetBSD for NEC PC-98 series] 7 * Copyright (c) 1996, 1997, 1998 8 * NetBSD/pc98 porting staff. All rights reserved. 9 * 10 * [Ported for FreeBSD] 11 * Copyright (c) 2001 12 * TAKAHASHI Yoshihiro. All rights reserved. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 27 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 28 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 33 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 34 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Copyright (c) 1997, 1998 40 * Naofumi HONDA. All rights reserved. 41 */ 42 43 #include <machine/asmacros.h> 44 45 #include "assym.s" 46 47 /*********************************************************** 48 * Bus IO access methods (Direct Access) 49 ***********************************************************/ 50 #define BUS_ACCESS_ADDR(BSHREG,ADDRREG) \ 51 addl BUS_SPACE_HANDLE_BASE/**/(%/**/BSHREG/**/),%/**/ADDRREG 52 53 /* 54 * read_N 55 * IN: edx port 56 * OUT: eax data 57 */ 58 ENTRY(SBUS_DA_io_space_read_1) 59 BUS_ACCESS_ADDR(ebx,edx) 60 inb %dx,%al 61 ret 62 63 ENTRY(SBUS_DA_io_space_read_2) 64 BUS_ACCESS_ADDR(ebx,edx) 65 inw %dx,%ax 66 ret 67 68 ENTRY(SBUS_DA_io_space_read_4) 69 BUS_ACCESS_ADDR(ebx,edx) 70 inl %dx,%eax 71 ret 72 73 /* 74 * write_N 75 * IN:eax DATA 76 * edx PORT 77 */ 78 ENTRY(SBUS_DA_io_space_write_1) 79 BUS_ACCESS_ADDR(ebx,edx) 80 outb %al,%dx 81 ret 82 83 ENTRY(SBUS_DA_io_space_write_2) 84 BUS_ACCESS_ADDR(ebx,edx) 85 outw %ax,%dx 86 ret 87 88 ENTRY(SBUS_DA_io_space_write_4) 89 BUS_ACCESS_ADDR(ebx,edx) 90 outl %eax,%dx 91 ret 92 93 /* 94 * read_multi_N 95 * IN: ecx COUNT 96 * edx PORT 97 * edi BUFP 98 */ 99 ENTRY(SBUS_DA_io_space_read_multi_1) 100 BUS_ACCESS_ADDR(ebx,edx) 101 cld 102 rep 103 insb 104 ret 105 106 ENTRY(SBUS_DA_io_space_read_multi_2) 107 BUS_ACCESS_ADDR(ebx,edx) 108 cld 109 rep 110 insw 111 ret 112 113 ENTRY(SBUS_DA_io_space_read_multi_4) 114 BUS_ACCESS_ADDR(ebx,edx) 115 cld 116 rep 117 insl 118 ret 119 120 /* 121 * write_multi_N 122 * IN: ecx COUNT 123 * edx PORT 124 * esi BUFP 125 */ 126 ENTRY(SBUS_DA_io_space_write_multi_1) 127 BUS_ACCESS_ADDR(ebx,edx) 128 cld 129 rep 130 outsb 131 ret 132 133 ENTRY(SBUS_DA_io_space_write_multi_2) 134 BUS_ACCESS_ADDR(ebx,edx) 135 cld 136 rep 137 outsw 138 ret 139 140 ENTRY(SBUS_DA_io_space_write_multi_4) 141 BUS_ACCESS_ADDR(ebx,edx) 142 cld 143 rep 144 outsl 145 ret 146 147 /* 148 * read_region_N 149 * IN: ecx COUNT 150 * edx PORT 151 * edi BUFP 152 */ 153 ENTRY(SBUS_DA_io_space_read_region_1) 154 BUS_ACCESS_ADDR(ebx,edx) 155 cld 156 pushl %eax 157 orl %ecx,%ecx 158 jz 2f 159 1: 160 inb %dx,%al 161 stosb 162 incl %edx 163 decl %ecx 164 jnz 1b 165 2: 166 popl %eax 167 ret 168 169 ENTRY(SBUS_DA_io_space_read_region_2) 170 BUS_ACCESS_ADDR(ebx,edx) 171 cld 172 pushl %eax 173 orl %ecx,%ecx 174 jz 2f 175 1: 176 inw %dx,%ax 177 stosw 178 addl $2,%edx 179 decl %ecx 180 jnz 1b 181 2: 182 popl %eax 183 ret 184 185 ENTRY(SBUS_DA_io_space_read_region_4) 186 BUS_ACCESS_ADDR(ebx,edx) 187 cld 188 pushl %eax 189 orl %ecx,%ecx 190 jz 2f 191 1: 192 inl %dx,%eax 193 stosl 194 addl $4,%edx 195 decl %ecx 196 jnz 1b 197 2: 198 popl %eax 199 ret 200 201 /* 202 * write_region_N 203 * IN: ecx COUNT 204 * edx PORT 205 * esi BUFP 206 */ 207 ENTRY(SBUS_DA_io_space_write_region_1) 208 BUS_ACCESS_ADDR(ebx,edx) 209 cld 210 pushl %eax 211 orl %ecx,%ecx 212 jz 2f 213 1: 214 lodsb 215 outb %al,%dx 216 incl %edx 217 decl %ecx 218 jnz 1b 219 2: 220 popl %eax 221 ret 222 223 ENTRY(SBUS_DA_io_space_write_region_2) 224 BUS_ACCESS_ADDR(ebx,edx) 225 cld 226 pushl %eax 227 orl %ecx,%ecx 228 jz 2f 229 1: 230 lodsw 231 outw %ax,%dx 232 addl $2,%edx 233 decl %ecx 234 jnz 1b 235 2: 236 popl %eax 237 ret 238 239 ENTRY(SBUS_DA_io_space_write_region_4) 240 BUS_ACCESS_ADDR(ebx,edx) 241 cld 242 pushl %eax 243 orl %ecx,%ecx 244 jz 2f 245 1: 246 lodsl 247 outl %eax,%dx 248 addl $4,%edx 249 decl %ecx 250 jnz 1b 251 2: 252 popl %eax 253 ret 254 255 /* 256 * set_multi_N 257 * IN: eax DATA 258 * ecx COUNT 259 * edx PORT 260 */ 261 ENTRY(SBUS_DA_io_space_set_multi_1) 262 BUS_ACCESS_ADDR(ebx,edx) 263 orl %ecx,%ecx 264 jz 2f 265 1: 266 outb %al,%dx 267 decl %ecx 268 jnz 1b 269 2: 270 ret 271 272 ENTRY(SBUS_DA_io_space_set_multi_2) 273 BUS_ACCESS_ADDR(ebx,edx) 274 orl %ecx,%ecx 275 jz 2f 276 1: 277 outw %ax,%dx 278 decl %ecx 279 jnz 1b 280 2: 281 ret 282 283 ENTRY(SBUS_DA_io_space_set_multi_4) 284 BUS_ACCESS_ADDR(ebx,edx) 285 orl %ecx,%ecx 286 jz 2f 287 1: 288 outl %eax,%dx 289 decl %ecx 290 jnz 1b 291 2: 292 ret 293 294 /* 295 * set_region_N 296 * IN: eax DATA 297 * ecx COUNT 298 * edx PORT 299 */ 300 ENTRY(SBUS_DA_io_space_set_region_1) 301 BUS_ACCESS_ADDR(ebx,edx) 302 orl %ecx,%ecx 303 jz 2f 304 1: 305 outb %al,%dx 306 incl %edx 307 decl %ecx 308 jnz 1b 309 2: 310 ret 311 312 ENTRY(SBUS_DA_io_space_set_region_2) 313 BUS_ACCESS_ADDR(ebx,edx) 314 orl %ecx,%ecx 315 jz 2f 316 1: 317 outw %ax,%dx 318 addl $2,%edx 319 decl %ecx 320 jnz 1b 321 2: 322 ret 323 324 ENTRY(SBUS_DA_io_space_set_region_4) 325 BUS_ACCESS_ADDR(ebx,edx) 326 orl %ecx,%ecx 327 jz 2f 328 1: 329 outl %eax,%dx 330 addl $4,%edx 331 decl %ecx 332 jnz 1b 333 2: 334 ret 335 336 /* 337 * copy_region_N 338 * IN: ecx COUNT 339 * esi SPORT 340 * edi DPORT 341 */ 342 ENTRY(SBUS_DA_io_space_copy_region_1) 343 BUS_ACCESS_ADDR(eax,esi) 344 BUS_ACCESS_ADDR(ebx,edi) 345 pushl %eax 346 pushl %edx 347 orl %ecx,%ecx 348 jz 2f 349 1: 350 movl %esi,%edx 351 inb %dx,%al 352 incl %esi 353 354 movl %edi,%edx 355 outb %al,%dx 356 incl %edi 357 358 decl %ecx 359 jnz 1b 360 2: 361 popl %edx 362 popl %eax 363 ret 364 365 ENTRY(SBUS_DA_io_space_copy_region_2) 366 BUS_ACCESS_ADDR(eax,esi) 367 BUS_ACCESS_ADDR(ebx,edi) 368 pushl %eax 369 pushl %edx 370 orl %ecx,%ecx 371 jz 2f 372 1: 373 movl %esi,%edx 374 inw %dx,%ax 375 addl $2,%esi 376 377 movl %edi,%edx 378 outw %ax,%dx 379 addl $2,%edi 380 381 decl %ecx 382 jnz 1b 383 2: 384 popl %edx 385 popl %eax 386 ret 387 388 ENTRY(SBUS_DA_io_space_copy_region_4) 389 BUS_ACCESS_ADDR(eax,esi) 390 BUS_ACCESS_ADDR(ebx,edi) 391 pushl %eax 392 pushl %edx 393 orl %ecx,%ecx 394 jz 2f 395 1: 396 movl %esi,%edx 397 inl %dx,%eax 398 addl $4,%esi 399 400 movl %edi,%edx 401 outl %eax,%dx 402 addl $4,%edi 403 404 decl %ecx 405 jnz 1b 406 2: 407 popl %edx 408 popl %eax 409 ret 410 411 /*********************************************************** 412 * Bus Memory access methods (Direct Access) 413 ***********************************************************/ 414 /* 415 * read_N 416 */ 417 ENTRY(SBUS_DA_mem_space_read_1) 418 BUS_ACCESS_ADDR(ebx,edx) 419 movb (%edx),%al 420 ret 421 422 ENTRY(SBUS_DA_mem_space_read_2) 423 BUS_ACCESS_ADDR(ebx,edx) 424 movw (%edx),%ax 425 ret 426 427 ENTRY(SBUS_DA_mem_space_read_4) 428 BUS_ACCESS_ADDR(ebx,edx) 429 movl (%edx),%eax 430 ret 431 432 /* 433 * write_N 434 */ 435 ENTRY(SBUS_DA_mem_space_write_1) 436 BUS_ACCESS_ADDR(ebx,edx) 437 movb %al,(%edx) 438 ret 439 440 ENTRY(SBUS_DA_mem_space_write_2) 441 BUS_ACCESS_ADDR(ebx,edx) 442 movw %ax,(%edx) 443 ret 444 445 ENTRY(SBUS_DA_mem_space_write_4) 446 BUS_ACCESS_ADDR(ebx,edx) 447 movl %eax,(%edx) 448 ret 449 450 /* 451 * read_multi_N 452 */ 453 ENTRY(SBUS_DA_mem_space_read_multi_1) 454 BUS_ACCESS_ADDR(ebx,edx) 455 cld 456 pushl %eax 457 orl %ecx,%ecx 458 jz 2f 459 1: 460 movb (%edx),%al 461 stosb 462 decl %ecx 463 jnz 1b 464 2: 465 popl %eax 466 ret 467 468 ENTRY(SBUS_DA_mem_space_read_multi_2) 469 BUS_ACCESS_ADDR(ebx,edx) 470 cld 471 pushl %eax 472 orl %ecx,%ecx 473 jz 2f 474 1: 475 movw (%edx),%ax 476 stosw 477 decl %ecx 478 jnz 1b 479 2: 480 popl %eax 481 ret 482 483 ENTRY(SBUS_DA_mem_space_read_multi_4) 484 BUS_ACCESS_ADDR(ebx,edx) 485 cld 486 pushl %eax 487 orl %ecx,%ecx 488 jz 2f 489 1: 490 movl (%edx),%eax 491 stosl 492 decl %ecx 493 jnz 1b 494 2: 495 popl %eax 496 ret 497 498 /* 499 * write_multi_N 500 */ 501 ENTRY(SBUS_DA_mem_space_write_multi_1) 502 BUS_ACCESS_ADDR(ebx,edx) 503 cld 504 pushl %eax 505 orl %ecx,%ecx 506 jz 2f 507 1: 508 lodsb 509 movb %al,(%edx) 510 decl %ecx 511 jnz 1b 512 2: 513 popl %eax 514 ret 515 516 ENTRY(SBUS_DA_mem_space_write_multi_2) 517 BUS_ACCESS_ADDR(ebx,edx) 518 cld 519 pushl %eax 520 orl %ecx,%ecx 521 jz 2f 522 1: 523 lodsw 524 movw %ax,(%edx) 525 decl %ecx 526 jnz 1b 527 2: 528 popl %eax 529 ret 530 531 ENTRY(SBUS_DA_mem_space_write_multi_4) 532 BUS_ACCESS_ADDR(ebx,edx) 533 cld 534 pushl %eax 535 orl %ecx,%ecx 536 jz 2f 537 1: 538 lodsl 539 movl %eax,(%edx) 540 decl %ecx 541 jnz 1b 542 2: 543 popl %eax 544 ret 545 546 /* 547 * read_region_N 548 */ 549 ENTRY(SBUS_DA_mem_space_read_region_1) 550 BUS_ACCESS_ADDR(ebx,edx) 551 cld 552 pushl %esi 553 movl %edx,%esi 554 rep 555 movsb 556 popl %esi 557 ret 558 559 ENTRY(SBUS_DA_mem_space_read_region_2) 560 BUS_ACCESS_ADDR(ebx,edx) 561 cld 562 pushl %esi 563 movl %edx,%esi 564 rep 565 movsw 566 popl %esi 567 ret 568 569 ENTRY(SBUS_DA_mem_space_read_region_4) 570 BUS_ACCESS_ADDR(ebx,edx) 571 cld 572 pushl %esi 573 movl %edx,%esi 574 rep 575 movsl 576 popl %esi 577 ret 578 579 /* 580 * write_region_N 581 */ 582 ENTRY(SBUS_DA_mem_space_write_region_1) 583 BUS_ACCESS_ADDR(ebx,edx) 584 cld 585 pushl %edi 586 movl %edx,%edi 587 rep 588 movsb 589 popl %edi 590 ret 591 592 ENTRY(SBUS_DA_mem_space_write_region_2) 593 BUS_ACCESS_ADDR(ebx,edx) 594 cld 595 pushl %edi 596 movl %edx,%edi 597 rep 598 movsw 599 popl %edi 600 ret 601 602 ENTRY(SBUS_DA_mem_space_write_region_4) 603 BUS_ACCESS_ADDR(ebx,edx) 604 cld 605 pushl %edi 606 movl %edx,%edi 607 rep 608 movsl 609 popl %edi 610 ret 611 612 /* 613 * set_multi_N 614 */ 615 ENTRY(SBUS_DA_mem_space_set_multi_1) 616 BUS_ACCESS_ADDR(ebx,edx) 617 orl %ecx,%ecx 618 jz 2f 619 1: 620 movb %al,(%edx) 621 decl %ecx 622 jnz 1b 623 2: 624 ret 625 626 ENTRY(SBUS_DA_mem_space_set_multi_2) 627 BUS_ACCESS_ADDR(ebx,edx) 628 orl %ecx,%ecx 629 jz 2f 630 1: 631 movw %ax,(%edx) 632 decl %ecx 633 jnz 1b 634 2: 635 ret 636 637 ENTRY(SBUS_DA_mem_space_set_multi_4) 638 BUS_ACCESS_ADDR(ebx,edx) 639 orl %ecx,%ecx 640 jz 2f 641 1: 642 movl %eax,(%edx) 643 decl %ecx 644 jnz 1b 645 2: 646 ret 647 648 /* 649 * set_region_N 650 */ 651 ENTRY(SBUS_DA_mem_space_set_region_1) 652 BUS_ACCESS_ADDR(ebx,edx) 653 cld 654 pushl %edi 655 movl %edx,%edi 656 rep 657 stosb 658 popl %edi 659 ret 660 661 ENTRY(SBUS_DA_mem_space_set_region_2) 662 BUS_ACCESS_ADDR(ebx,edx) 663 cld 664 pushl %edi 665 movl %edx,%edi 666 rep 667 stosw 668 popl %edi 669 ret 670 671 ENTRY(SBUS_DA_mem_space_set_region_4) 672 BUS_ACCESS_ADDR(ebx,edx) 673 cld 674 pushl %edi 675 movl %edx,%edi 676 rep 677 stosl 678 popl %edi 679 ret 680 681 /* 682 * copy_region_N 683 */ 684 ENTRY(SBUS_DA_mem_space_copy_region_1) 685 BUS_ACCESS_ADDR(eax,esi) 686 BUS_ACCESS_ADDR(ebx,edi) 687 cld 688 rep 689 movsb 690 ret 691 692 ENTRY(SBUS_DA_mem_space_copy_region_2) 693 BUS_ACCESS_ADDR(eax,esi) 694 BUS_ACCESS_ADDR(ebx,edi) 695 cld 696 rep 697 movsw 698 ret 699 700 ENTRY(SBUS_DA_mem_space_copy_region_4) 701 BUS_ACCESS_ADDR(eax,esi) 702 BUS_ACCESS_ADDR(ebx,edi) 703 cld 704 rep 705 movsl 706 ret 707 708 #undef BUS_ACCESS_ADDR 709 710 /*********************************************************** 711 * Bus IO access methods (Relocate Access) 712 ***********************************************************/ 713 #define BUS_ACCESS_ADDR(BSHREG,ADDRREG) \ 714 movl BUS_SPACE_HANDLE_IAT/**/(%/**/BSHREG/**/, %/**/ADDRREG/**/, 4), \ 715 %/**/ADDRREG 716 #define BUS_ACCESS_ADDR2(BSHREG,ADDRREG,DSTREG) \ 717 movl BUS_SPACE_HANDLE_IAT/**/(%/**/BSHREG/**/, %/**/ADDRREG/**/, 4), \ 718 %/**/DSTREG 719 /* 720 * read_N 721 * IN: edx port 722 * OUT: eax data 723 */ 724 ENTRY(SBUS_RA_io_space_read_1) 725 BUS_ACCESS_ADDR(ebx,edx) 726 inb %dx,%al 727 ret 728 729 ENTRY(SBUS_RA_io_space_read_2) 730 BUS_ACCESS_ADDR(ebx,edx) 731 inw %dx,%ax 732 ret 733 734 ENTRY(SBUS_RA_io_space_read_4) 735 BUS_ACCESS_ADDR(ebx,edx) 736 inl %dx,%eax 737 ret 738 739 /* 740 * write_N 741 * IN:eax DATA 742 * edx PORT 743 */ 744 ENTRY(SBUS_RA_io_space_write_1) 745 BUS_ACCESS_ADDR(ebx,edx) 746 outb %al,%dx 747 ret 748 749 ENTRY(SBUS_RA_io_space_write_2) 750 BUS_ACCESS_ADDR(ebx,edx) 751 outw %ax,%dx 752 ret 753 754 ENTRY(SBUS_RA_io_space_write_4) 755 BUS_ACCESS_ADDR(ebx,edx) 756 outl %eax,%dx 757 ret 758 759 /* 760 * read_multi_N 761 * IN: ecx COUNT 762 * edx PORT 763 * edi BUFP 764 */ 765 ENTRY(SBUS_RA_io_space_read_multi_1) 766 BUS_ACCESS_ADDR(ebx,edx) 767 cld 768 rep 769 insb 770 ret 771 772 ENTRY(SBUS_RA_io_space_read_multi_2) 773 BUS_ACCESS_ADDR(ebx,edx) 774 cld 775 rep 776 insw 777 ret 778 779 ENTRY(SBUS_RA_io_space_read_multi_4) 780 BUS_ACCESS_ADDR(ebx,edx) 781 cld 782 rep 783 insl 784 ret 785 786 /* 787 * write_multi_N 788 * IN: ecx COUNT 789 * edx PORT 790 * esi BUFP 791 */ 792 ENTRY(SBUS_RA_io_space_write_multi_1) 793 BUS_ACCESS_ADDR(ebx,edx) 794 cld 795 rep 796 outsb 797 ret 798 799 ENTRY(SBUS_RA_io_space_write_multi_2) 800 BUS_ACCESS_ADDR(ebx,edx) 801 cld 802 rep 803 outsw 804 ret 805 806 ENTRY(SBUS_RA_io_space_write_multi_4) 807 BUS_ACCESS_ADDR(ebx,edx) 808 cld 809 rep 810 outsl 811 ret 812 813 /* 814 * read_region_N 815 * IN: ecx COUNT 816 * edx PORT 817 * edi BUFP 818 */ 819 ENTRY(SBUS_RA_io_space_read_region_1) 820 cld 821 pushl %eax 822 pushl %esi 823 orl %ecx,%ecx 824 jz 2f 825 movl %edx,%esi 826 1: 827 BUS_ACCESS_ADDR2(ebx,esi,edx) 828 inb %dx,%al 829 stosb 830 incl %esi 831 decl %ecx 832 jnz 1b 833 2: 834 popl %esi 835 popl %eax 836 ret 837 838 ENTRY(SBUS_RA_io_space_read_region_2) 839 cld 840 pushl %eax 841 pushl %esi 842 orl %ecx,%ecx 843 jz 2f 844 movl %edx,%esi 845 1: 846 BUS_ACCESS_ADDR2(ebx,esi,edx) 847 inw %dx,%ax 848 stosw 849 addl $2,%esi 850 decl %ecx 851 jnz 1b 852 2: 853 popl %esi 854 popl %eax 855 ret 856 857 ENTRY(SBUS_RA_io_space_read_region_4) 858 cld 859 pushl %eax 860 pushl %esi 861 orl %ecx,%ecx 862 jz 2f 863 movl %edx,%esi 864 1: 865 BUS_ACCESS_ADDR2(ebx,esi,edx) 866 inl %dx,%eax 867 stosl 868 addl $4,%esi 869 decl %ecx 870 jnz 1b 871 2: 872 popl %esi 873 popl %eax 874 ret 875 876 /* 877 * write_region_N 878 * IN: ecx COUNT 879 * edx PORT 880 * esi BUFP 881 */ 882 ENTRY(SBUS_RA_io_space_write_region_1) 883 cld 884 pushl %eax 885 pushl %edi 886 orl %ecx,%ecx 887 jz 2f 888 movl %edx,%edi 889 1: 890 BUS_ACCESS_ADDR2(ebx,edi,edx) 891 lodsb 892 outb %al,%dx 893 incl %edi 894 decl %ecx 895 jnz 1b 896 2: 897 popl %edi 898 popl %eax 899 ret 900 901 ENTRY(SBUS_RA_io_space_write_region_2) 902 cld 903 pushl %eax 904 pushl %edi 905 orl %ecx,%ecx 906 jz 2f 907 movl %edx,%edi 908 1: 909 BUS_ACCESS_ADDR2(ebx,edi,edx) 910 lodsw 911 outw %ax,%dx 912 addl $2,%edi 913 decl %ecx 914 jnz 1b 915 2: 916 popl %edi 917 popl %eax 918 ret 919 920 ENTRY(SBUS_RA_io_space_write_region_4) 921 cld 922 pushl %eax 923 pushl %edi 924 orl %ecx,%ecx 925 jz 2f 926 movl %edx,%edi 927 1: 928 BUS_ACCESS_ADDR2(ebx,edi,edx) 929 lodsl 930 outl %eax,%dx 931 addl $4,%edi 932 decl %ecx 933 jnz 1b 934 2: 935 popl %edi 936 popl %eax 937 ret 938 939 /* 940 * set_multi_N 941 * IN: eax DATA 942 * ecx COUNT 943 * edx PORT 944 */ 945 ENTRY(SBUS_RA_io_space_set_multi_1) 946 BUS_ACCESS_ADDR(ebx,edx) 947 orl %ecx,%ecx 948 jz 2f 949 1: 950 outb %al,%dx 951 decl %ecx 952 jnz 1b 953 2: 954 ret 955 956 ENTRY(SBUS_RA_io_space_set_multi_2) 957 BUS_ACCESS_ADDR(ebx,edx) 958 orl %ecx,%ecx 959 jz 2f 960 1: 961 outw %ax,%dx 962 decl %ecx 963 jnz 1b 964 2: 965 ret 966 967 ENTRY(SBUS_RA_io_space_set_multi_4) 968 BUS_ACCESS_ADDR(ebx,edx) 969 orl %ecx,%ecx 970 jz 2f 971 1: 972 outl %eax,%dx 973 decl %ecx 974 jnz 1b 975 2: 976 ret 977 978 /* 979 * set_region_N 980 * IN: eax DATA 981 * ecx COUNT 982 * edx PORT 983 */ 984 ENTRY(SBUS_RA_io_space_set_region_1) 985 pushl %edi 986 orl %ecx,%ecx 987 jz 2f 988 movl %edx,%edi 989 1: 990 BUS_ACCESS_ADDR2(ebx,edi,edx) 991 outb %al,%dx 992 incl %edi 993 decl %ecx 994 jnz 1b 995 2: 996 popl %edi 997 ret 998 999 ENTRY(SBUS_RA_io_space_set_region_2) 1000 pushl %edi 1001 orl %ecx,%ecx 1002 jz 2f 1003 movl %edx,%edi 1004 1: 1005 BUS_ACCESS_ADDR2(ebx,edi,edx) 1006 outw %ax,%dx 1007 addl $2,%edi 1008 decl %ecx 1009 jnz 1b 1010 2: 1011 popl %edi 1012 ret 1013 1014 ENTRY(SBUS_RA_io_space_set_region_4) 1015 pushl %edi 1016 orl %ecx,%ecx 1017 jz 2f 1018 movl %edx,%edi 1019 1: 1020 BUS_ACCESS_ADDR2(ebx,edi,edx) 1021 outl %eax,%dx 1022 addl $4,%edi 1023 decl %ecx 1024 jnz 1b 1025 2: 1026 popl %edi 1027 ret 1028 1029 /* 1030 * copy_region_N 1031 * IN: ecx COUNT 1032 * esi SPORT 1033 * edi DPORT 1034 */ 1035 ENTRY(SBUS_RA_io_space_copy_region_1) 1036 pushl %eax 1037 pushl %edx 1038 orl %ecx,%ecx 1039 jz 2f 1040 1: 1041 BUS_ACCESS_ADDR2(ebx,esi,edx) 1042 inb %dx,%al 1043 incl %esi 1044 1045 BUS_ACCESS_ADDR2(ebx,edi,edx) 1046 outb %al,%dx 1047 incl %edi 1048 1049 decl %ecx 1050 jnz 1b 1051 2: 1052 popl %edx 1053 popl %eax 1054 ret 1055 1056 ENTRY(SBUS_RA_io_space_copy_region_2) 1057 pushl %eax 1058 pushl %edx 1059 orl %ecx,%ecx 1060 jz 2f 1061 1: 1062 BUS_ACCESS_ADDR2(ebx,esi,edx) 1063 inw %dx,%ax 1064 addl $2,%esi 1065 1066 BUS_ACCESS_ADDR2(ebx,edi,edx) 1067 outw %ax,%dx 1068 addl $2,%edi 1069 1070 decl %ecx 1071 jnz 1b 1072 2: 1073 popl %edx 1074 popl %eax 1075 ret 1076 1077 ENTRY(SBUS_RA_io_space_copy_region_4) 1078 pushl %eax 1079 pushl %edx 1080 orl %ecx,%ecx 1081 jz 2f 1082 1: 1083 BUS_ACCESS_ADDR2(ebx,esi,edx) 1084 inl %dx,%eax 1085 addl $4,%esi 1086 1087 BUS_ACCESS_ADDR2(ebx,edi,edx) 1088 outl %eax,%dx 1089 addl $4,%edi 1090 1091 decl %ecx 1092 jnz 1b 1093 2: 1094 popl %edx 1095 popl %eax 1096 ret 1097 1098 /*********************************************************** 1099 * Bus Memory access methods 1100 ***********************************************************/ 1101 /* 1102 * read_N 1103 */ 1104 ENTRY(SBUS_RA_mem_space_read_1) 1105 BUS_ACCESS_ADDR(ebx,edx) 1106 movb (%edx),%al 1107 ret 1108 1109 ENTRY(SBUS_RA_mem_space_read_2) 1110 BUS_ACCESS_ADDR(ebx,edx) 1111 movw (%edx),%ax 1112 ret 1113 1114 ENTRY(SBUS_RA_mem_space_read_4) 1115 BUS_ACCESS_ADDR(ebx,edx) 1116 movl (%edx),%eax 1117 ret 1118 1119 /* 1120 * write_N 1121 */ 1122 ENTRY(SBUS_RA_mem_space_write_1) 1123 BUS_ACCESS_ADDR(ebx,edx) 1124 movb %al,(%edx) 1125 ret 1126 1127 ENTRY(SBUS_RA_mem_space_write_2) 1128 BUS_ACCESS_ADDR(ebx,edx) 1129 movw %ax,(%edx) 1130 ret 1131 1132 ENTRY(SBUS_RA_mem_space_write_4) 1133 BUS_ACCESS_ADDR(ebx,edx) 1134 movl %eax,(%edx) 1135 ret 1136 1137 /* 1138 * read_multi_N 1139 */ 1140 ENTRY(SBUS_RA_mem_space_read_multi_1) 1141 BUS_ACCESS_ADDR(ebx,edx) 1142 cld 1143 pushl %eax 1144 orl %ecx,%ecx 1145 jz 2f 1146 1: 1147 movb (%edx),%al 1148 stosb 1149 decl %ecx 1150 jnz 1b 1151 2: 1152 popl %eax 1153 ret 1154 1155 ENTRY(SBUS_RA_mem_space_read_multi_2) 1156 BUS_ACCESS_ADDR(ebx,edx) 1157 cld 1158 pushl %eax 1159 orl %ecx,%ecx 1160 jz 2f 1161 1: 1162 movw (%edx),%ax 1163 stosw 1164 decl %ecx 1165 jnz 1b 1166 2: 1167 popl %eax 1168 ret 1169 1170 ENTRY(SBUS_RA_mem_space_read_multi_4) 1171 BUS_ACCESS_ADDR(ebx,edx) 1172 cld 1173 pushl %eax 1174 orl %ecx,%ecx 1175 jz 2f 1176 1: 1177 movl (%edx),%eax 1178 stosl 1179 decl %ecx 1180 jnz 1b 1181 2: 1182 popl %eax 1183 ret 1184 1185 /* 1186 * write_multi_N 1187 */ 1188 ENTRY(SBUS_RA_mem_space_write_multi_1) 1189 BUS_ACCESS_ADDR(ebx,edx) 1190 cld 1191 pushl %eax 1192 orl %ecx,%ecx 1193 jz 2f 1194 1: 1195 lodsb 1196 movb %al,(%edx) 1197 decl %ecx 1198 jnz 1b 1199 2: 1200 popl %eax 1201 ret 1202 1203 ENTRY(SBUS_RA_mem_space_write_multi_2) 1204 BUS_ACCESS_ADDR(ebx,edx) 1205 cld 1206 pushl %eax 1207 orl %ecx,%ecx 1208 jz 2f 1209 1: 1210 lodsw 1211 movw %ax,(%edx) 1212 decl %ecx 1213 jnz 1b 1214 2: 1215 popl %eax 1216 ret 1217 1218 ENTRY(SBUS_RA_mem_space_write_multi_4) 1219 BUS_ACCESS_ADDR(ebx,edx) 1220 cld 1221 pushl %eax 1222 orl %ecx,%ecx 1223 jz 2f 1224 1: 1225 lodsl 1226 movl %eax,(%edx) 1227 decl %ecx 1228 jnz 1b 1229 2: 1230 popl %eax 1231 ret 1232 1233 /* 1234 * read_region_N 1235 */ 1236 ENTRY(SBUS_RA_mem_space_read_region_1) 1237 cld 1238 pushl %esi 1239 orl %ecx,%ecx 1240 jz 2f 1241 1: 1242 BUS_ACCESS_ADDR2(ebx,edx,esi) 1243 movsb 1244 incl %edx 1245 decl %ecx 1246 jnz 1b 1247 2: 1248 popl %esi 1249 ret 1250 1251 ENTRY(SBUS_RA_mem_space_read_region_2) 1252 cld 1253 pushl %esi 1254 orl %ecx,%ecx 1255 jz 2f 1256 1: 1257 BUS_ACCESS_ADDR2(ebx,edx,esi) 1258 movsw 1259 addl $2,%edx 1260 decl %ecx 1261 jnz 1b 1262 2: 1263 popl %esi 1264 ret 1265 1266 ENTRY(SBUS_RA_mem_space_read_region_4) 1267 cld 1268 pushl %esi 1269 orl %ecx,%ecx 1270 jz 2f 1271 1: 1272 BUS_ACCESS_ADDR2(ebx,edx,esi) 1273 movsl 1274 addl $4,%edx 1275 decl %ecx 1276 jnz 1b 1277 2: 1278 popl %esi 1279 ret 1280 1281 /* 1282 * write_region_N 1283 */ 1284 ENTRY(SBUS_RA_mem_space_write_region_1) 1285 cld 1286 pushl %edi 1287 orl %ecx,%ecx 1288 jz 2f 1289 1: 1290 BUS_ACCESS_ADDR2(ebx,edx,edi) 1291 movsb 1292 incl %edx 1293 decl %ecx 1294 jnz 1b 1295 2: 1296 popl %edi 1297 ret 1298 1299 ENTRY(SBUS_RA_mem_space_write_region_2) 1300 cld 1301 pushl %edi 1302 orl %ecx,%ecx 1303 jz 2f 1304 1: 1305 BUS_ACCESS_ADDR2(ebx,edx,edi) 1306 movsw 1307 addl $2,%edx 1308 decl %ecx 1309 jnz 1b 1310 2: 1311 popl %edi 1312 ret 1313 1314 ENTRY(SBUS_RA_mem_space_write_region_4) 1315 cld 1316 pushl %edi 1317 orl %ecx,%ecx 1318 jz 2f 1319 1: 1320 BUS_ACCESS_ADDR2(ebx,edx,edi) 1321 movsl 1322 addl $4,%edx 1323 decl %ecx 1324 jnz 1b 1325 2: 1326 popl %edi 1327 ret 1328 1329 /* 1330 * set_multi_N 1331 */ 1332 ENTRY(SBUS_RA_mem_space_set_multi_1) 1333 BUS_ACCESS_ADDR(ebx,edx) 1334 orl %ecx,%ecx 1335 jz 2f 1336 1: 1337 movb %al,(%edx) 1338 decl %ecx 1339 jnz 1b 1340 2: 1341 ret 1342 1343 ENTRY(SBUS_RA_mem_space_set_multi_2) 1344 BUS_ACCESS_ADDR(ebx,edx) 1345 orl %ecx,%ecx 1346 jz 2f 1347 1: 1348 movw %ax,(%edx) 1349 decl %ecx 1350 jnz 1b 1351 2: 1352 ret 1353 1354 ENTRY(SBUS_RA_mem_space_set_multi_4) 1355 BUS_ACCESS_ADDR(ebx,edx) 1356 orl %ecx,%ecx 1357 jz 2f 1358 1: 1359 movl %eax,(%edx) 1360 decl %ecx 1361 jnz 1b 1362 2: 1363 ret 1364 1365 /* 1366 * set_region_N 1367 */ 1368 ENTRY(SBUS_RA_mem_space_set_region_1) 1369 cld 1370 pushl %edi 1371 orl %ecx,%ecx 1372 jz 2f 1373 1: 1374 BUS_ACCESS_ADDR2(ebx,edx,edi) 1375 stosb 1376 incl %edx 1377 decl %ecx 1378 jnz 1b 1379 2: 1380 popl %edi 1381 ret 1382 1383 ENTRY(SBUS_RA_mem_space_set_region_2) 1384 cld 1385 pushl %edi 1386 orl %ecx,%ecx 1387 jz 2f 1388 1: 1389 BUS_ACCESS_ADDR2(ebx,edx,edi) 1390 stosw 1391 addl $2,%edx 1392 decl %ecx 1393 jnz 1b 1394 2: 1395 popl %edi 1396 ret 1397 1398 ENTRY(SBUS_RA_mem_space_set_region_4) 1399 cld 1400 pushl %edi 1401 orl %ecx,%ecx 1402 jz 2f 1403 1: 1404 BUS_ACCESS_ADDR2(ebx,edx,edi) 1405 stosl 1406 addl $4,%edx 1407 decl %ecx 1408 jnz 1b 1409 2: 1410 popl %edi 1411 ret 1412 1413 /* 1414 * copy_region_N 1415 */ 1416 ENTRY(SBUS_RA_mem_space_copy_region_1) 1417 cld 1418 orl %ecx,%ecx 1419 jz 2f 1420 1: 1421 pushl %esi 1422 pushl %edi 1423 BUS_ACCESS_ADDR(eax,esi) 1424 BUS_ACCESS_ADDR(ebx,edi) 1425 movsb 1426 popl %edi 1427 popl %esi 1428 incl %esi 1429 incl %edi 1430 decl %ecx 1431 jnz 1b 1432 2: 1433 ret 1434 1435 ENTRY(SBUS_RA_mem_space_copy_region_2) 1436 cld 1437 orl %ecx,%ecx 1438 jz 2f 1439 1: 1440 pushl %esi 1441 pushl %edi 1442 BUS_ACCESS_ADDR(eax,esi) 1443 BUS_ACCESS_ADDR(ebx,edi) 1444 movsw 1445 popl %edi 1446 popl %esi 1447 addl $2,%esi 1448 addl $2,%edi 1449 decl %ecx 1450 jnz 1b 1451 2: 1452 ret 1453 1454 ENTRY(SBUS_RA_mem_space_copy_region_4) 1455 cld 1456 orl %ecx,%ecx 1457 jz 2f 1458 1: 1459 pushl %esi 1460 pushl %edi 1461 BUS_ACCESS_ADDR(eax,esi) 1462 BUS_ACCESS_ADDR(ebx,edi) 1463 movsl 1464 popl %edi 1465 popl %esi 1466 addl $4,%esi 1467 addl $4,%edi 1468 decl %ecx 1469 jnz 1b 1470 2: 1471 ret 1472 1473 #undef BUS_ACCESS_ADDR 1474 #undef BUS_ACCESS_ADDR2 1475 1476 1477 #include "opt_mecia.h" 1478 #ifdef DEV_MECIA 1479 1480 /*********************************************************** 1481 * NEPC pcmcia 16 bits bus access 1482 ***********************************************************/ 1483 #define NEPC_SWITCH_BUS16 \ 1484 pushl %ebp ;\ 1485 pushl %eax ;\ 1486 pushl %edx ;\ 1487 movl $0x2a8e,%edx ;\ 1488 inb %dx,%al ;\ 1489 movl %eax,%ebp ;\ 1490 andl $~0x20,%eax ;\ 1491 outb %al,%dx ;\ 1492 popl %edx ;\ 1493 popl %eax 1494 1495 #define NEPC_BUS_RESTORE \ 1496 pushl %eax ;\ 1497 movl %ebp,%eax ;\ 1498 xchgl %edx,%ebp ;\ 1499 movl $0x2a8e,%edx ;\ 1500 outb %al,%dx ;\ 1501 xchgl %ebp,%edx ;\ 1502 popl %eax ;\ 1503 popl %ebp 1504 1505 /*********************************************************** 1506 * NEPC pcmcia 16 bits bus acces (Direct Access) 1507 ***********************************************************/ 1508 #define BUS_ACCESS_ADDR(BSHREG,ADDRREG) \ 1509 addl BUS_SPACE_HANDLE_BASE/**/(%/**/BSHREG/**/),%/**/ADDRREG 1510 1511 ENTRY(NEPC_DA_io_space_read_2) 1512 BUS_ACCESS_ADDR(ebx,edx) 1513 NEPC_SWITCH_BUS16 1514 inw %dx,%ax 1515 NEPC_BUS_RESTORE 1516 ret 1517 1518 1519 ENTRY(NEPC_DA_io_space_write_2) 1520 BUS_ACCESS_ADDR(ebx,edx) 1521 NEPC_SWITCH_BUS16 1522 outw %ax,%dx 1523 NEPC_BUS_RESTORE 1524 ret 1525 1526 ENTRY(NEPC_DA_io_space_read_multi_2) 1527 BUS_ACCESS_ADDR(ebx,edx) 1528 NEPC_SWITCH_BUS16 1529 cld 1530 rep 1531 insw 1532 NEPC_BUS_RESTORE 1533 ret 1534 1535 ENTRY(NEPC_DA_io_space_write_multi_2) 1536 BUS_ACCESS_ADDR(ebx,edx) 1537 NEPC_SWITCH_BUS16 1538 cld 1539 rep 1540 outsw 1541 NEPC_BUS_RESTORE 1542 ret 1543 1544 ENTRY(NEPC_DA_io_space_read_region_2) 1545 NEPC_SWITCH_BUS16 1546 call SBUS_DA_io_space_read_region_2 1547 NEPC_BUS_RESTORE 1548 ret 1549 1550 ENTRY(NEPC_DA_io_space_write_region_2) 1551 NEPC_SWITCH_BUS16 1552 call SBUS_DA_io_space_write_region_2 1553 NEPC_BUS_RESTORE 1554 ret 1555 1556 ENTRY(NEPC_DA_io_space_set_multi_2) 1557 NEPC_SWITCH_BUS16 1558 call SBUS_DA_io_space_set_multi_2 1559 NEPC_BUS_RESTORE 1560 ret 1561 1562 1563 ENTRY(NEPC_DA_io_space_set_region_2) 1564 NEPC_SWITCH_BUS16 1565 call SBUS_DA_io_space_set_region_2 1566 NEPC_BUS_RESTORE 1567 ret 1568 1569 ENTRY(NEPC_DA_io_space_copy_region_2) 1570 NEPC_SWITCH_BUS16 1571 call SBUS_DA_io_space_copy_region_2 1572 NEPC_BUS_RESTORE 1573 ret 1574 1575 ENTRY(NEPC_DA_io_space_read_4) 1576 BUS_ACCESS_ADDR(ebx,edx) 1577 NEPC_SWITCH_BUS16 1578 inl %dx,%eax 1579 NEPC_BUS_RESTORE 1580 ret 1581 1582 ENTRY(NEPC_DA_io_space_write_4) 1583 BUS_ACCESS_ADDR(ebx,edx) 1584 NEPC_SWITCH_BUS16 1585 outl %eax,%dx 1586 NEPC_BUS_RESTORE 1587 ret 1588 1589 ENTRY(NEPC_DA_io_space_read_multi_4) 1590 BUS_ACCESS_ADDR(ebx,edx) 1591 NEPC_SWITCH_BUS16 1592 cld 1593 rep 1594 insl 1595 NEPC_BUS_RESTORE 1596 ret 1597 1598 ENTRY(NEPC_DA_io_space_write_multi_4) 1599 BUS_ACCESS_ADDR(ebx,edx) 1600 NEPC_SWITCH_BUS16 1601 cld 1602 rep 1603 outsl 1604 NEPC_BUS_RESTORE 1605 ret 1606 1607 ENTRY(NEPC_DA_io_space_read_region_4) 1608 NEPC_SWITCH_BUS16 1609 call SBUS_DA_io_space_read_region_4 1610 NEPC_BUS_RESTORE 1611 ret 1612 1613 ENTRY(NEPC_DA_io_space_write_region_4) 1614 NEPC_SWITCH_BUS16 1615 call SBUS_DA_io_space_write_region_4 1616 NEPC_BUS_RESTORE 1617 ret 1618 1619 ENTRY(NEPC_DA_io_space_set_multi_4) 1620 NEPC_SWITCH_BUS16 1621 call SBUS_DA_io_space_set_multi_4 1622 NEPC_BUS_RESTORE 1623 ret 1624 1625 1626 ENTRY(NEPC_DA_io_space_set_region_4) 1627 NEPC_SWITCH_BUS16 1628 call SBUS_DA_io_space_set_region_4 1629 NEPC_BUS_RESTORE 1630 ret 1631 1632 ENTRY(NEPC_DA_io_space_copy_region_4) 1633 NEPC_SWITCH_BUS16 1634 call SBUS_DA_io_space_copy_region_4 1635 NEPC_BUS_RESTORE 1636 ret 1637 1638 #undef BUS_ACCESS_ADDR 1639 1640 /*********************************************************** 1641 * NEPC pcmcia 16 bits bus acces (Relocate Access) 1642 ***********************************************************/ 1643 #define BUS_ACCESS_ADDR(BSHREG,ADDRREG) \ 1644 movl BUS_SPACE_HANDLE_IAT/**/(%/**/BSHREG/**/, %/**/ADDRREG/**/, 4), \ 1645 %/**/ADDRREG 1646 1647 ENTRY(NEPC_RA_io_space_read_2) 1648 BUS_ACCESS_ADDR(ebx,edx) 1649 NEPC_SWITCH_BUS16 1650 inw %dx,%ax 1651 NEPC_BUS_RESTORE 1652 ret 1653 1654 1655 ENTRY(NEPC_RA_io_space_write_2) 1656 BUS_ACCESS_ADDR(ebx,edx) 1657 NEPC_SWITCH_BUS16 1658 outw %ax,%dx 1659 NEPC_BUS_RESTORE 1660 ret 1661 1662 ENTRY(NEPC_RA_io_space_read_multi_2) 1663 BUS_ACCESS_ADDR(ebx,edx) 1664 NEPC_SWITCH_BUS16 1665 cld 1666 rep 1667 insw 1668 NEPC_BUS_RESTORE 1669 ret 1670 1671 ENTRY(NEPC_RA_io_space_write_multi_2) 1672 BUS_ACCESS_ADDR(ebx,edx) 1673 NEPC_SWITCH_BUS16 1674 cld 1675 rep 1676 outsw 1677 NEPC_BUS_RESTORE 1678 ret 1679 1680 ENTRY(NEPC_RA_io_space_read_region_2) 1681 NEPC_SWITCH_BUS16 1682 call SBUS_RA_io_space_read_region_2 1683 NEPC_BUS_RESTORE 1684 ret 1685 1686 ENTRY(NEPC_RA_io_space_write_region_2) 1687 NEPC_SWITCH_BUS16 1688 call SBUS_RA_io_space_write_region_2 1689 NEPC_BUS_RESTORE 1690 ret 1691 1692 ENTRY(NEPC_RA_io_space_set_multi_2) 1693 NEPC_SWITCH_BUS16 1694 call SBUS_RA_io_space_set_multi_2 1695 NEPC_BUS_RESTORE 1696 ret 1697 1698 1699 ENTRY(NEPC_RA_io_space_set_region_2) 1700 NEPC_SWITCH_BUS16 1701 call SBUS_RA_io_space_set_region_2 1702 NEPC_BUS_RESTORE 1703 ret 1704 1705 ENTRY(NEPC_RA_io_space_copy_region_2) 1706 NEPC_SWITCH_BUS16 1707 call SBUS_RA_io_space_copy_region_2 1708 NEPC_BUS_RESTORE 1709 ret 1710 1711 ENTRY(NEPC_RA_io_space_read_4) 1712 BUS_ACCESS_ADDR(ebx,edx) 1713 NEPC_SWITCH_BUS16 1714 inl %dx,%eax 1715 NEPC_BUS_RESTORE 1716 ret 1717 1718 ENTRY(NEPC_RA_io_space_write_4) 1719 BUS_ACCESS_ADDR(ebx,edx) 1720 NEPC_SWITCH_BUS16 1721 outl %eax,%dx 1722 NEPC_BUS_RESTORE 1723 ret 1724 1725 ENTRY(NEPC_RA_io_space_read_multi_4) 1726 BUS_ACCESS_ADDR(ebx,edx) 1727 NEPC_SWITCH_BUS16 1728 cld 1729 rep 1730 insl 1731 NEPC_BUS_RESTORE 1732 ret 1733 1734 ENTRY(NEPC_RA_io_space_write_multi_4) 1735 BUS_ACCESS_ADDR(ebx,edx) 1736 NEPC_SWITCH_BUS16 1737 cld 1738 rep 1739 outsl 1740 NEPC_BUS_RESTORE 1741 ret 1742 1743 ENTRY(NEPC_RA_io_space_read_region_4) 1744 NEPC_SWITCH_BUS16 1745 call SBUS_RA_io_space_read_region_4 1746 NEPC_BUS_RESTORE 1747 ret 1748 1749 ENTRY(NEPC_RA_io_space_write_region_4) 1750 NEPC_SWITCH_BUS16 1751 call SBUS_RA_io_space_write_region_4 1752 NEPC_BUS_RESTORE 1753 ret 1754 1755 ENTRY(NEPC_RA_io_space_set_multi_4) 1756 NEPC_SWITCH_BUS16 1757 call SBUS_RA_io_space_set_multi_4 1758 NEPC_BUS_RESTORE 1759 ret 1760 1761 1762 ENTRY(NEPC_RA_io_space_set_region_4) 1763 NEPC_SWITCH_BUS16 1764 call SBUS_RA_io_space_set_region_4 1765 NEPC_BUS_RESTORE 1766 ret 1767 1768 ENTRY(NEPC_RA_io_space_copy_region_4) 1769 NEPC_SWITCH_BUS16 1770 call SBUS_RA_io_space_copy_region_4 1771 NEPC_BUS_RESTORE 1772 ret 1773 1774 #endif /* DEV_MECIA */
Cache object: 4a97568c7fbd0aa32ed2dc618549384d
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