The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/pc98/pc98/machdep.c

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    1 /*-
    2  * Copyright (c) 1992 Terrence R. Lambert.
    3  * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
    4  * All rights reserved.
    5  *
    6  * This code is derived from software contributed to Berkeley by
    7  * William Jolitz.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed by the University of
   20  *      California, Berkeley and its contributors.
   21  * 4. Neither the name of the University nor the names of its contributors
   22  *    may be used to endorse or promote products derived from this software
   23  *    without specific prior written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
   29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   35  * SUCH DAMAGE.
   36  *
   37  *      from: @(#)machdep.c     7.4 (Berkeley) 6/3/91
   38  */
   39 
   40 #include <sys/cdefs.h>
   41 __FBSDID("$FreeBSD: releng/10.1/sys/pc98/pc98/machdep.c 267964 2014-06-27 17:22:18Z jhb $");
   42 
   43 #include "opt_apic.h"
   44 #include "opt_atalk.h"
   45 #include "opt_atpic.h"
   46 #include "opt_compat.h"
   47 #include "opt_cpu.h"
   48 #include "opt_ddb.h"
   49 #include "opt_inet.h"
   50 #include "opt_ipx.h"
   51 #include "opt_isa.h"
   52 #include "opt_kstack_pages.h"
   53 #include "opt_maxmem.h"
   54 #include "opt_mp_watchdog.h"
   55 #include "opt_npx.h"
   56 #include "opt_perfmon.h"
   57 #include "opt_kdtrace.h"
   58 
   59 #include <sys/param.h>
   60 #include <sys/proc.h>
   61 #include <sys/systm.h>
   62 #include <sys/bio.h>
   63 #include <sys/buf.h>
   64 #include <sys/bus.h>
   65 #include <sys/callout.h>
   66 #include <sys/cons.h>
   67 #include <sys/cpu.h>
   68 #include <sys/eventhandler.h>
   69 #include <sys/exec.h>
   70 #include <sys/imgact.h>
   71 #include <sys/kdb.h>
   72 #include <sys/kernel.h>
   73 #include <sys/ktr.h>
   74 #include <sys/linker.h>
   75 #include <sys/lock.h>
   76 #include <sys/malloc.h>
   77 #include <sys/memrange.h>
   78 #include <sys/msgbuf.h>
   79 #include <sys/mutex.h>
   80 #include <sys/pcpu.h>
   81 #include <sys/ptrace.h>
   82 #include <sys/reboot.h>
   83 #include <sys/rwlock.h>
   84 #include <sys/sched.h>
   85 #include <sys/signalvar.h>
   86 #ifdef SMP
   87 #include <sys/smp.h>
   88 #endif
   89 #include <sys/syscallsubr.h>
   90 #include <sys/sysctl.h>
   91 #include <sys/sysent.h>
   92 #include <sys/sysproto.h>
   93 #include <sys/ucontext.h>
   94 #include <sys/vmmeter.h>
   95 
   96 #include <vm/vm.h>
   97 #include <vm/vm_extern.h>
   98 #include <vm/vm_kern.h>
   99 #include <vm/vm_page.h>
  100 #include <vm/vm_map.h>
  101 #include <vm/vm_object.h>
  102 #include <vm/vm_pager.h>
  103 #include <vm/vm_param.h>
  104 
  105 #ifdef DDB
  106 #ifndef KDB
  107 #error KDB must be enabled in order for DDB to work!
  108 #endif
  109 #include <ddb/ddb.h>
  110 #include <ddb/db_sym.h>
  111 #endif
  112 
  113 #include <pc98/pc98/pc98_machdep.h>
  114 
  115 #include <net/netisr.h>
  116 
  117 #include <machine/bootinfo.h>
  118 #include <machine/clock.h>
  119 #include <machine/cpu.h>
  120 #include <machine/cputypes.h>
  121 #include <machine/intr_machdep.h>
  122 #include <x86/mca.h>
  123 #include <machine/md_var.h>
  124 #include <machine/mp_watchdog.h>
  125 #include <machine/pc/bios.h>
  126 #include <machine/pcb.h>
  127 #include <machine/pcb_ext.h>
  128 #include <machine/proc.h>
  129 #include <machine/reg.h>
  130 #include <machine/sigframe.h>
  131 #include <machine/specialreg.h>
  132 #include <machine/vm86.h>
  133 #ifdef PERFMON
  134 #include <machine/perfmon.h>
  135 #endif
  136 #ifdef SMP
  137 #include <machine/smp.h>
  138 #endif
  139 
  140 #ifdef DEV_APIC
  141 #include <machine/apicvar.h>
  142 #endif
  143 
  144 #ifdef DEV_ISA
  145 #include <x86/isa/icu.h>
  146 #endif
  147 
  148 /* Sanity check for __curthread() */
  149 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
  150 
  151 extern void init386(int first);
  152 extern void dblfault_handler(void);
  153 
  154 extern void printcpuinfo(void); /* XXX header file */
  155 extern void finishidentcpu(void);
  156 extern void panicifcpuunsupported(void);
  157 
  158 #define CS_SECURE(cs)           (ISPL(cs) == SEL_UPL)
  159 #define EFL_SECURE(ef, oef)     ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
  160 
  161 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
  162 #define CPU_ENABLE_SSE
  163 #endif
  164 
  165 static void cpu_startup(void *);
  166 static void fpstate_drop(struct thread *td);
  167 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
  168 static int  set_fpcontext(struct thread *td, const mcontext_t *mcp);
  169 #ifdef CPU_ENABLE_SSE
  170 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
  171 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
  172 #endif /* CPU_ENABLE_SSE */
  173 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
  174 
  175 int     need_pre_dma_flush;     /* If 1, use wbinvd befor DMA transfer. */
  176 int     need_post_dma_flush;    /* If 1, use invd after DMA transfer. */
  177 
  178 #ifdef DDB
  179 extern vm_offset_t ksym_start, ksym_end;
  180 #endif
  181 
  182 int     _udatasel, _ucodesel;
  183 u_int   basemem;
  184 
  185 static int      ispc98 = 1;
  186 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
  187 
  188 int cold = 1;
  189 
  190 #ifdef COMPAT_43
  191 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
  192 #endif
  193 #ifdef COMPAT_FREEBSD4
  194 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
  195 #endif
  196 
  197 long Maxmem = 0;
  198 long realmem = 0;
  199 
  200 /*
  201  * The number of PHYSMAP entries must be one less than the number of
  202  * PHYSSEG entries because the PHYSMAP entry that spans the largest
  203  * physical address that is accessible by ISA DMA is split into two
  204  * PHYSSEG entries.
  205  */
  206 #define PHYSMAP_SIZE    (2 * (VM_PHYSSEG_MAX - 1))
  207 
  208 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
  209 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
  210 
  211 /* must be 2 less so 0 0 can signal end of chunks */
  212 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
  213 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
  214 
  215 struct kva_md_info kmi;
  216 
  217 static struct trapframe proc0_tf;
  218 struct pcpu __pcpu[MAXCPU];
  219 
  220 struct mtx icu_lock;
  221 
  222 struct mem_range_softc mem_range_softc;
  223 
  224 static void
  225 cpu_startup(dummy)
  226         void *dummy;
  227 {
  228         uintmax_t memsize;
  229 
  230         /*
  231          * Good {morning,afternoon,evening,night}.
  232          */
  233         startrtclock();
  234         printcpuinfo();
  235         panicifcpuunsupported();
  236 #ifdef PERFMON
  237         perfmon_init();
  238 #endif
  239         realmem = Maxmem;
  240 
  241         /*
  242          * Display physical memory.
  243          */
  244         memsize = ptoa((uintmax_t)Maxmem);
  245         printf("real memory  = %ju (%ju MB)\n", memsize, memsize >> 20);
  246 
  247         /*
  248          * Display any holes after the first chunk of extended memory.
  249          */
  250         if (bootverbose) {
  251                 int indx;
  252 
  253                 printf("Physical memory chunk(s):\n");
  254                 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
  255                         vm_paddr_t size;
  256 
  257                         size = phys_avail[indx + 1] - phys_avail[indx];
  258                         printf(
  259                             "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
  260                             (uintmax_t)phys_avail[indx],
  261                             (uintmax_t)phys_avail[indx + 1] - 1,
  262                             (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
  263                 }
  264         }
  265 
  266         vm_ksubmap_init(&kmi);
  267 
  268         printf("avail memory = %ju (%ju MB)\n",
  269             ptoa((uintmax_t)cnt.v_free_count),
  270             ptoa((uintmax_t)cnt.v_free_count) / 1048576);
  271 
  272         /*
  273          * Set up buffers, so they can be used to read disk labels.
  274          */
  275         bufinit();
  276         vm_pager_bufferinit();
  277         cpu_setregs();
  278 }
  279 
  280 /*
  281  * Send an interrupt to process.
  282  *
  283  * Stack is set up to allow sigcode stored
  284  * at top to call routine, followed by kcall
  285  * to sigreturn routine below.  After sigreturn
  286  * resets the signal mask, the stack, and the
  287  * frame pointer, it returns to the user
  288  * specified pc, psl.
  289  */
  290 #ifdef COMPAT_43
  291 static void
  292 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
  293 {
  294         struct osigframe sf, *fp;
  295         struct proc *p;
  296         struct thread *td;
  297         struct sigacts *psp;
  298         struct trapframe *regs;
  299         int sig;
  300         int oonstack;
  301 
  302         td = curthread;
  303         p = td->td_proc;
  304         PROC_LOCK_ASSERT(p, MA_OWNED);
  305         sig = ksi->ksi_signo;
  306         psp = p->p_sigacts;
  307         mtx_assert(&psp->ps_mtx, MA_OWNED);
  308         regs = td->td_frame;
  309         oonstack = sigonstack(regs->tf_esp);
  310 
  311         /* Allocate space for the signal handler context. */
  312         if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
  313             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  314                 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
  315                     td->td_sigstk.ss_size - sizeof(struct osigframe));
  316 #if defined(COMPAT_43)
  317                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  318 #endif
  319         } else
  320                 fp = (struct osigframe *)regs->tf_esp - 1;
  321 
  322         /* Translate the signal if appropriate. */
  323         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  324                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  325 
  326         /* Build the argument list for the signal handler. */
  327         sf.sf_signum = sig;
  328         sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
  329         bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
  330         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  331                 /* Signal handler installed with SA_SIGINFO. */
  332                 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
  333                 sf.sf_siginfo.si_signo = sig;
  334                 sf.sf_siginfo.si_code = ksi->ksi_code;
  335                 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
  336                 sf.sf_addr = 0;
  337         } else {
  338                 /* Old FreeBSD-style arguments. */
  339                 sf.sf_arg2 = ksi->ksi_code;
  340                 sf.sf_addr = (register_t)ksi->ksi_addr;
  341                 sf.sf_ahu.sf_handler = catcher;
  342         }
  343         mtx_unlock(&psp->ps_mtx);
  344         PROC_UNLOCK(p);
  345 
  346         /* Save most if not all of trap frame. */
  347         sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
  348         sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
  349         sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
  350         sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
  351         sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
  352         sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
  353         sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
  354         sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
  355         sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
  356         sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
  357         sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
  358         sf.sf_siginfo.si_sc.sc_gs = rgs();
  359         sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
  360 
  361         /* Build the signal context to be used by osigreturn(). */
  362         sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
  363         SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
  364         sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
  365         sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
  366         sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
  367         sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
  368         sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
  369         sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
  370 
  371         /*
  372          * If we're a vm86 process, we want to save the segment registers.
  373          * We also change eflags to be our emulated eflags, not the actual
  374          * eflags.
  375          */
  376         if (regs->tf_eflags & PSL_VM) {
  377                 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
  378                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  379                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  380 
  381                 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
  382                 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
  383                 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
  384                 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
  385 
  386                 if (vm86->vm86_has_vme == 0)
  387                         sf.sf_siginfo.si_sc.sc_ps =
  388                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  389                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  390 
  391                 /* See sendsig() for comments. */
  392                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  393         }
  394 
  395         /*
  396          * Copy the sigframe out to the user's stack.
  397          */
  398         if (copyout(&sf, fp, sizeof(*fp)) != 0) {
  399 #ifdef DEBUG
  400                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  401 #endif
  402                 PROC_LOCK(p);
  403                 sigexit(td, SIGILL);
  404         }
  405 
  406         regs->tf_esp = (int)fp;
  407         if (p->p_sysent->sv_sigcode_base != 0) {
  408                 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
  409                     szosigcode;
  410         } else {
  411                 /* a.out sysentvec does not use shared page */
  412                 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
  413         }
  414         regs->tf_eflags &= ~(PSL_T | PSL_D);
  415         regs->tf_cs = _ucodesel;
  416         regs->tf_ds = _udatasel;
  417         regs->tf_es = _udatasel;
  418         regs->tf_fs = _udatasel;
  419         load_gs(_udatasel);
  420         regs->tf_ss = _udatasel;
  421         PROC_LOCK(p);
  422         mtx_lock(&psp->ps_mtx);
  423 }
  424 #endif /* COMPAT_43 */
  425 
  426 #ifdef COMPAT_FREEBSD4
  427 static void
  428 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
  429 {
  430         struct sigframe4 sf, *sfp;
  431         struct proc *p;
  432         struct thread *td;
  433         struct sigacts *psp;
  434         struct trapframe *regs;
  435         int sig;
  436         int oonstack;
  437 
  438         td = curthread;
  439         p = td->td_proc;
  440         PROC_LOCK_ASSERT(p, MA_OWNED);
  441         sig = ksi->ksi_signo;
  442         psp = p->p_sigacts;
  443         mtx_assert(&psp->ps_mtx, MA_OWNED);
  444         regs = td->td_frame;
  445         oonstack = sigonstack(regs->tf_esp);
  446 
  447         /* Save user context. */
  448         bzero(&sf, sizeof(sf));
  449         sf.sf_uc.uc_sigmask = *mask;
  450         sf.sf_uc.uc_stack = td->td_sigstk;
  451         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
  452             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  453         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  454         sf.sf_uc.uc_mcontext.mc_gs = rgs();
  455         bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
  456         bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
  457             sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
  458         bzero(sf.sf_uc.uc_mcontext.__spare__,
  459             sizeof(sf.sf_uc.uc_mcontext.__spare__));
  460         bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
  461 
  462         /* Allocate space for the signal handler context. */
  463         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  464             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  465                 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
  466                     td->td_sigstk.ss_size - sizeof(struct sigframe4));
  467 #if defined(COMPAT_43)
  468                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  469 #endif
  470         } else
  471                 sfp = (struct sigframe4 *)regs->tf_esp - 1;
  472 
  473         /* Translate the signal if appropriate. */
  474         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  475                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  476 
  477         /* Build the argument list for the signal handler. */
  478         sf.sf_signum = sig;
  479         sf.sf_ucontext = (register_t)&sfp->sf_uc;
  480         bzero(&sf.sf_si, sizeof(sf.sf_si));
  481         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  482                 /* Signal handler installed with SA_SIGINFO. */
  483                 sf.sf_siginfo = (register_t)&sfp->sf_si;
  484                 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
  485 
  486                 /* Fill in POSIX parts */
  487                 sf.sf_si.si_signo = sig;
  488                 sf.sf_si.si_code = ksi->ksi_code;
  489                 sf.sf_si.si_addr = ksi->ksi_addr;
  490         } else {
  491                 /* Old FreeBSD-style arguments. */
  492                 sf.sf_siginfo = ksi->ksi_code;
  493                 sf.sf_addr = (register_t)ksi->ksi_addr;
  494                 sf.sf_ahu.sf_handler = catcher;
  495         }
  496         mtx_unlock(&psp->ps_mtx);
  497         PROC_UNLOCK(p);
  498 
  499         /*
  500          * If we're a vm86 process, we want to save the segment registers.
  501          * We also change eflags to be our emulated eflags, not the actual
  502          * eflags.
  503          */
  504         if (regs->tf_eflags & PSL_VM) {
  505                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  506                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  507 
  508                 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
  509                 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
  510                 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
  511                 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
  512 
  513                 if (vm86->vm86_has_vme == 0)
  514                         sf.sf_uc.uc_mcontext.mc_eflags =
  515                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  516                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  517 
  518                 /*
  519                  * Clear PSL_NT to inhibit T_TSSFLT faults on return from
  520                  * syscalls made by the signal handler.  This just avoids
  521                  * wasting time for our lazy fixup of such faults.  PSL_NT
  522                  * does nothing in vm86 mode, but vm86 programs can set it
  523                  * almost legitimately in probes for old cpu types.
  524                  */
  525                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  526         }
  527 
  528         /*
  529          * Copy the sigframe out to the user's stack.
  530          */
  531         if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
  532 #ifdef DEBUG
  533                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  534 #endif
  535                 PROC_LOCK(p);
  536                 sigexit(td, SIGILL);
  537         }
  538 
  539         regs->tf_esp = (int)sfp;
  540         regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
  541             szfreebsd4_sigcode;
  542         regs->tf_eflags &= ~(PSL_T | PSL_D);
  543         regs->tf_cs = _ucodesel;
  544         regs->tf_ds = _udatasel;
  545         regs->tf_es = _udatasel;
  546         regs->tf_fs = _udatasel;
  547         regs->tf_ss = _udatasel;
  548         PROC_LOCK(p);
  549         mtx_lock(&psp->ps_mtx);
  550 }
  551 #endif  /* COMPAT_FREEBSD4 */
  552 
  553 void
  554 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
  555 {
  556         struct sigframe sf, *sfp;
  557         struct proc *p;
  558         struct thread *td;
  559         struct sigacts *psp;
  560         char *sp;
  561         struct trapframe *regs;
  562         struct segment_descriptor *sdp;
  563         int sig;
  564         int oonstack;
  565 
  566         td = curthread;
  567         p = td->td_proc;
  568         PROC_LOCK_ASSERT(p, MA_OWNED);
  569         sig = ksi->ksi_signo;
  570         psp = p->p_sigacts;
  571         mtx_assert(&psp->ps_mtx, MA_OWNED);
  572 #ifdef COMPAT_FREEBSD4
  573         if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
  574                 freebsd4_sendsig(catcher, ksi, mask);
  575                 return;
  576         }
  577 #endif
  578 #ifdef COMPAT_43
  579         if (SIGISMEMBER(psp->ps_osigset, sig)) {
  580                 osendsig(catcher, ksi, mask);
  581                 return;
  582         }
  583 #endif
  584         regs = td->td_frame;
  585         oonstack = sigonstack(regs->tf_esp);
  586 
  587         /* Save user context. */
  588         bzero(&sf, sizeof(sf));
  589         sf.sf_uc.uc_sigmask = *mask;
  590         sf.sf_uc.uc_stack = td->td_sigstk;
  591         sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
  592             ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
  593         sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
  594         sf.sf_uc.uc_mcontext.mc_gs = rgs();
  595         bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
  596         sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
  597         get_fpcontext(td, &sf.sf_uc.uc_mcontext);
  598         fpstate_drop(td);
  599         /*
  600          * Unconditionally fill the fsbase and gsbase into the mcontext.
  601          */
  602         sdp = &td->td_pcb->pcb_fsd;
  603         sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
  604             sdp->sd_lobase;
  605         sdp = &td->td_pcb->pcb_gsd;
  606         sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
  607             sdp->sd_lobase;
  608         sf.sf_uc.uc_mcontext.mc_flags = 0;
  609         bzero(sf.sf_uc.uc_mcontext.mc_spare2,
  610             sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
  611         bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
  612 
  613         /* Allocate space for the signal handler context. */
  614         if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
  615             SIGISMEMBER(psp->ps_sigonstack, sig)) {
  616                 sp = td->td_sigstk.ss_sp +
  617                     td->td_sigstk.ss_size - sizeof(struct sigframe);
  618 #if defined(COMPAT_43)
  619                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  620 #endif
  621         } else
  622                 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
  623         /* Align to 16 bytes. */
  624         sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
  625 
  626         /* Translate the signal if appropriate. */
  627         if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
  628                 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
  629 
  630         /* Build the argument list for the signal handler. */
  631         sf.sf_signum = sig;
  632         sf.sf_ucontext = (register_t)&sfp->sf_uc;
  633         bzero(&sf.sf_si, sizeof(sf.sf_si));
  634         if (SIGISMEMBER(psp->ps_siginfo, sig)) {
  635                 /* Signal handler installed with SA_SIGINFO. */
  636                 sf.sf_siginfo = (register_t)&sfp->sf_si;
  637                 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
  638 
  639                 /* Fill in POSIX parts */
  640                 sf.sf_si = ksi->ksi_info;
  641                 sf.sf_si.si_signo = sig; /* maybe a translated signal */
  642         } else {
  643                 /* Old FreeBSD-style arguments. */
  644                 sf.sf_siginfo = ksi->ksi_code;
  645                 sf.sf_addr = (register_t)ksi->ksi_addr;
  646                 sf.sf_ahu.sf_handler = catcher;
  647         }
  648         mtx_unlock(&psp->ps_mtx);
  649         PROC_UNLOCK(p);
  650 
  651         /*
  652          * If we're a vm86 process, we want to save the segment registers.
  653          * We also change eflags to be our emulated eflags, not the actual
  654          * eflags.
  655          */
  656         if (regs->tf_eflags & PSL_VM) {
  657                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  658                 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  659 
  660                 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
  661                 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
  662                 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
  663                 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
  664 
  665                 if (vm86->vm86_has_vme == 0)
  666                         sf.sf_uc.uc_mcontext.mc_eflags =
  667                             (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
  668                             (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
  669 
  670                 /*
  671                  * Clear PSL_NT to inhibit T_TSSFLT faults on return from
  672                  * syscalls made by the signal handler.  This just avoids
  673                  * wasting time for our lazy fixup of such faults.  PSL_NT
  674                  * does nothing in vm86 mode, but vm86 programs can set it
  675                  * almost legitimately in probes for old cpu types.
  676                  */
  677                 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
  678         }
  679 
  680         /*
  681          * Copy the sigframe out to the user's stack.
  682          */
  683         if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
  684 #ifdef DEBUG
  685                 printf("process %ld has trashed its stack\n", (long)p->p_pid);
  686 #endif
  687                 PROC_LOCK(p);
  688                 sigexit(td, SIGILL);
  689         }
  690 
  691         regs->tf_esp = (int)sfp;
  692         regs->tf_eip = p->p_sysent->sv_sigcode_base;
  693         regs->tf_eflags &= ~(PSL_T | PSL_D);
  694         regs->tf_cs = _ucodesel;
  695         regs->tf_ds = _udatasel;
  696         regs->tf_es = _udatasel;
  697         regs->tf_fs = _udatasel;
  698         regs->tf_ss = _udatasel;
  699         PROC_LOCK(p);
  700         mtx_lock(&psp->ps_mtx);
  701 }
  702 
  703 /*
  704  * System call to cleanup state after a signal
  705  * has been taken.  Reset signal mask and
  706  * stack state from context left by sendsig (above).
  707  * Return to previous pc and psl as specified by
  708  * context left by sendsig. Check carefully to
  709  * make sure that the user has not modified the
  710  * state to gain improper privileges.
  711  *
  712  * MPSAFE
  713  */
  714 #ifdef COMPAT_43
  715 int
  716 osigreturn(td, uap)
  717         struct thread *td;
  718         struct osigreturn_args /* {
  719                 struct osigcontext *sigcntxp;
  720         } */ *uap;
  721 {
  722         struct osigcontext sc;
  723         struct trapframe *regs;
  724         struct osigcontext *scp;
  725         int eflags, error;
  726         ksiginfo_t ksi;
  727 
  728         regs = td->td_frame;
  729         error = copyin(uap->sigcntxp, &sc, sizeof(sc));
  730         if (error != 0)
  731                 return (error);
  732         scp = &sc;
  733         eflags = scp->sc_ps;
  734         if (eflags & PSL_VM) {
  735                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  736                 struct vm86_kernel *vm86;
  737 
  738                 /*
  739                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  740                  * set up the vm86 area, and we can't enter vm86 mode.
  741                  */
  742                 if (td->td_pcb->pcb_ext == 0)
  743                         return (EINVAL);
  744                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  745                 if (vm86->vm86_inited == 0)
  746                         return (EINVAL);
  747 
  748                 /* Go back to user mode if both flags are set. */
  749                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
  750                         ksiginfo_init_trap(&ksi);
  751                         ksi.ksi_signo = SIGBUS;
  752                         ksi.ksi_code = BUS_OBJERR;
  753                         ksi.ksi_addr = (void *)regs->tf_eip;
  754                         trapsignal(td, &ksi);
  755                 }
  756 
  757                 if (vm86->vm86_has_vme) {
  758                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  759                             (eflags & VME_USERCHANGE) | PSL_VM;
  760                 } else {
  761                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  762                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  763                             (eflags & VM_USERCHANGE) | PSL_VM;
  764                 }
  765                 tf->tf_vm86_ds = scp->sc_ds;
  766                 tf->tf_vm86_es = scp->sc_es;
  767                 tf->tf_vm86_fs = scp->sc_fs;
  768                 tf->tf_vm86_gs = scp->sc_gs;
  769                 tf->tf_ds = _udatasel;
  770                 tf->tf_es = _udatasel;
  771                 tf->tf_fs = _udatasel;
  772         } else {
  773                 /*
  774                  * Don't allow users to change privileged or reserved flags.
  775                  */
  776                 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
  777                         return (EINVAL);
  778                 }
  779 
  780                 /*
  781                  * Don't allow users to load a valid privileged %cs.  Let the
  782                  * hardware check for invalid selectors, excess privilege in
  783                  * other selectors, invalid %eip's and invalid %esp's.
  784                  */
  785                 if (!CS_SECURE(scp->sc_cs)) {
  786                         ksiginfo_init_trap(&ksi);
  787                         ksi.ksi_signo = SIGBUS;
  788                         ksi.ksi_code = BUS_OBJERR;
  789                         ksi.ksi_trapno = T_PROTFLT;
  790                         ksi.ksi_addr = (void *)regs->tf_eip;
  791                         trapsignal(td, &ksi);
  792                         return (EINVAL);
  793                 }
  794                 regs->tf_ds = scp->sc_ds;
  795                 regs->tf_es = scp->sc_es;
  796                 regs->tf_fs = scp->sc_fs;
  797         }
  798 
  799         /* Restore remaining registers. */
  800         regs->tf_eax = scp->sc_eax;
  801         regs->tf_ebx = scp->sc_ebx;
  802         regs->tf_ecx = scp->sc_ecx;
  803         regs->tf_edx = scp->sc_edx;
  804         regs->tf_esi = scp->sc_esi;
  805         regs->tf_edi = scp->sc_edi;
  806         regs->tf_cs = scp->sc_cs;
  807         regs->tf_ss = scp->sc_ss;
  808         regs->tf_isp = scp->sc_isp;
  809         regs->tf_ebp = scp->sc_fp;
  810         regs->tf_esp = scp->sc_sp;
  811         regs->tf_eip = scp->sc_pc;
  812         regs->tf_eflags = eflags;
  813 
  814 #if defined(COMPAT_43)
  815         if (scp->sc_onstack & 1)
  816                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  817         else
  818                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
  819 #endif
  820         kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
  821             SIGPROCMASK_OLD);
  822         return (EJUSTRETURN);
  823 }
  824 #endif /* COMPAT_43 */
  825 
  826 #ifdef COMPAT_FREEBSD4
  827 /*
  828  * MPSAFE
  829  */
  830 int
  831 freebsd4_sigreturn(td, uap)
  832         struct thread *td;
  833         struct freebsd4_sigreturn_args /* {
  834                 const ucontext4 *sigcntxp;
  835         } */ *uap;
  836 {
  837         struct ucontext4 uc;
  838         struct trapframe *regs;
  839         struct ucontext4 *ucp;
  840         int cs, eflags, error;
  841         ksiginfo_t ksi;
  842 
  843         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  844         if (error != 0)
  845                 return (error);
  846         ucp = &uc;
  847         regs = td->td_frame;
  848         eflags = ucp->uc_mcontext.mc_eflags;
  849         if (eflags & PSL_VM) {
  850                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  851                 struct vm86_kernel *vm86;
  852 
  853                 /*
  854                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  855                  * set up the vm86 area, and we can't enter vm86 mode.
  856                  */
  857                 if (td->td_pcb->pcb_ext == 0)
  858                         return (EINVAL);
  859                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  860                 if (vm86->vm86_inited == 0)
  861                         return (EINVAL);
  862 
  863                 /* Go back to user mode if both flags are set. */
  864                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
  865                         ksiginfo_init_trap(&ksi);
  866                         ksi.ksi_signo = SIGBUS;
  867                         ksi.ksi_code = BUS_OBJERR;
  868                         ksi.ksi_addr = (void *)regs->tf_eip;
  869                         trapsignal(td, &ksi);
  870                 }
  871                 if (vm86->vm86_has_vme) {
  872                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  873                             (eflags & VME_USERCHANGE) | PSL_VM;
  874                 } else {
  875                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  876                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  877                             (eflags & VM_USERCHANGE) | PSL_VM;
  878                 }
  879                 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
  880                 tf->tf_eflags = eflags;
  881                 tf->tf_vm86_ds = tf->tf_ds;
  882                 tf->tf_vm86_es = tf->tf_es;
  883                 tf->tf_vm86_fs = tf->tf_fs;
  884                 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
  885                 tf->tf_ds = _udatasel;
  886                 tf->tf_es = _udatasel;
  887                 tf->tf_fs = _udatasel;
  888         } else {
  889                 /*
  890                  * Don't allow users to change privileged or reserved flags.
  891                  */
  892                 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
  893                         uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
  894                             td->td_proc->p_pid, td->td_name, eflags);
  895                         return (EINVAL);
  896                 }
  897 
  898                 /*
  899                  * Don't allow users to load a valid privileged %cs.  Let the
  900                  * hardware check for invalid selectors, excess privilege in
  901                  * other selectors, invalid %eip's and invalid %esp's.
  902                  */
  903                 cs = ucp->uc_mcontext.mc_cs;
  904                 if (!CS_SECURE(cs)) {
  905                         uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
  906                             td->td_proc->p_pid, td->td_name, cs);
  907                         ksiginfo_init_trap(&ksi);
  908                         ksi.ksi_signo = SIGBUS;
  909                         ksi.ksi_code = BUS_OBJERR;
  910                         ksi.ksi_trapno = T_PROTFLT;
  911                         ksi.ksi_addr = (void *)regs->tf_eip;
  912                         trapsignal(td, &ksi);
  913                         return (EINVAL);
  914                 }
  915 
  916                 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
  917         }
  918 
  919 #if defined(COMPAT_43)
  920         if (ucp->uc_mcontext.mc_onstack & 1)
  921                 td->td_sigstk.ss_flags |= SS_ONSTACK;
  922         else
  923                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
  924 #endif
  925         kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
  926         return (EJUSTRETURN);
  927 }
  928 #endif  /* COMPAT_FREEBSD4 */
  929 
  930 /*
  931  * MPSAFE
  932  */
  933 int
  934 sys_sigreturn(td, uap)
  935         struct thread *td;
  936         struct sigreturn_args /* {
  937                 const struct __ucontext *sigcntxp;
  938         } */ *uap;
  939 {
  940         ucontext_t uc;
  941         struct trapframe *regs;
  942         ucontext_t *ucp;
  943         int cs, eflags, error, ret;
  944         ksiginfo_t ksi;
  945 
  946         error = copyin(uap->sigcntxp, &uc, sizeof(uc));
  947         if (error != 0)
  948                 return (error);
  949         ucp = &uc;
  950         regs = td->td_frame;
  951         eflags = ucp->uc_mcontext.mc_eflags;
  952         if (eflags & PSL_VM) {
  953                 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
  954                 struct vm86_kernel *vm86;
  955 
  956                 /*
  957                  * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
  958                  * set up the vm86 area, and we can't enter vm86 mode.
  959                  */
  960                 if (td->td_pcb->pcb_ext == 0)
  961                         return (EINVAL);
  962                 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
  963                 if (vm86->vm86_inited == 0)
  964                         return (EINVAL);
  965 
  966                 /* Go back to user mode if both flags are set. */
  967                 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
  968                         ksiginfo_init_trap(&ksi);
  969                         ksi.ksi_signo = SIGBUS;
  970                         ksi.ksi_code = BUS_OBJERR;
  971                         ksi.ksi_addr = (void *)regs->tf_eip;
  972                         trapsignal(td, &ksi);
  973                 }
  974 
  975                 if (vm86->vm86_has_vme) {
  976                         eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
  977                             (eflags & VME_USERCHANGE) | PSL_VM;
  978                 } else {
  979                         vm86->vm86_eflags = eflags;     /* save VIF, VIP */
  980                         eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
  981                             (eflags & VM_USERCHANGE) | PSL_VM;
  982                 }
  983                 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
  984                 tf->tf_eflags = eflags;
  985                 tf->tf_vm86_ds = tf->tf_ds;
  986                 tf->tf_vm86_es = tf->tf_es;
  987                 tf->tf_vm86_fs = tf->tf_fs;
  988                 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
  989                 tf->tf_ds = _udatasel;
  990                 tf->tf_es = _udatasel;
  991                 tf->tf_fs = _udatasel;
  992         } else {
  993                 /*
  994                  * Don't allow users to change privileged or reserved flags.
  995                  */
  996                 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
  997                         uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
  998                             td->td_proc->p_pid, td->td_name, eflags);
  999                         return (EINVAL);
 1000                 }
 1001 
 1002                 /*
 1003                  * Don't allow users to load a valid privileged %cs.  Let the
 1004                  * hardware check for invalid selectors, excess privilege in
 1005                  * other selectors, invalid %eip's and invalid %esp's.
 1006                  */
 1007                 cs = ucp->uc_mcontext.mc_cs;
 1008                 if (!CS_SECURE(cs)) {
 1009                         uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
 1010                             td->td_proc->p_pid, td->td_name, cs);
 1011                         ksiginfo_init_trap(&ksi);
 1012                         ksi.ksi_signo = SIGBUS;
 1013                         ksi.ksi_code = BUS_OBJERR;
 1014                         ksi.ksi_trapno = T_PROTFLT;
 1015                         ksi.ksi_addr = (void *)regs->tf_eip;
 1016                         trapsignal(td, &ksi);
 1017                         return (EINVAL);
 1018                 }
 1019 
 1020                 ret = set_fpcontext(td, &ucp->uc_mcontext);
 1021                 if (ret != 0)
 1022                         return (ret);
 1023                 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
 1024         }
 1025 
 1026 #if defined(COMPAT_43)
 1027         if (ucp->uc_mcontext.mc_onstack & 1)
 1028                 td->td_sigstk.ss_flags |= SS_ONSTACK;
 1029         else
 1030                 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
 1031 #endif
 1032 
 1033         kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
 1034         return (EJUSTRETURN);
 1035 }
 1036 
 1037 /*
 1038  * Machine dependent boot() routine
 1039  *
 1040  * I haven't seen anything to put here yet
 1041  * Possibly some stuff might be grafted back here from boot()
 1042  */
 1043 void
 1044 cpu_boot(int howto)
 1045 {
 1046 }
 1047 
 1048 /*
 1049  * Flush the D-cache for non-DMA I/O so that the I-cache can
 1050  * be made coherent later.
 1051  */
 1052 void
 1053 cpu_flush_dcache(void *ptr, size_t len)
 1054 {
 1055         /* Not applicable */
 1056 }
 1057 
 1058 /* Get current clock frequency for the given cpu id. */
 1059 int
 1060 cpu_est_clockrate(int cpu_id, uint64_t *rate)
 1061 {
 1062         uint64_t tsc1, tsc2;
 1063         register_t reg;
 1064 
 1065         if (pcpu_find(cpu_id) == NULL || rate == NULL)
 1066                 return (EINVAL);
 1067         if ((cpu_feature & CPUID_TSC) == 0)
 1068                 return (EOPNOTSUPP);
 1069 
 1070 #ifdef SMP
 1071         if (smp_cpus > 1) {
 1072                 /* Schedule ourselves on the indicated cpu. */
 1073                 thread_lock(curthread);
 1074                 sched_bind(curthread, cpu_id);
 1075                 thread_unlock(curthread);
 1076         }
 1077 #endif
 1078 
 1079         /* Calibrate by measuring a short delay. */
 1080         reg = intr_disable();
 1081         tsc1 = rdtsc();
 1082         DELAY(1000);
 1083         tsc2 = rdtsc();
 1084         intr_restore(reg);
 1085         *rate = (tsc2 - tsc1) * 1000;
 1086 
 1087 #ifdef SMP
 1088         if (smp_cpus > 1) {
 1089                 thread_lock(curthread);
 1090                 sched_unbind(curthread);
 1091                 thread_unlock(curthread);
 1092         }
 1093 #endif
 1094 
 1095         return (0);
 1096 }
 1097 
 1098 
 1099 /*
 1100  * Shutdown the CPU as much as possible
 1101  */
 1102 void
 1103 cpu_halt(void)
 1104 {
 1105         for (;;)
 1106                 halt();
 1107 }
 1108 
 1109 static int      idle_mwait = 1;         /* Use MONITOR/MWAIT for short idle. */
 1110 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
 1111 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
 1112     0, "Use MONITOR/MWAIT for short idle");
 1113 
 1114 #define STATE_RUNNING   0x0
 1115 #define STATE_MWAIT     0x1
 1116 #define STATE_SLEEPING  0x2
 1117 
 1118 static void
 1119 cpu_idle_hlt(sbintime_t sbt)
 1120 {
 1121         int *state;
 1122 
 1123         state = (int *)PCPU_PTR(monitorbuf);
 1124         *state = STATE_SLEEPING;
 1125 
 1126         /*
 1127          * Since we may be in a critical section from cpu_idle(), if
 1128          * an interrupt fires during that critical section we may have
 1129          * a pending preemption.  If the CPU halts, then that thread
 1130          * may not execute until a later interrupt awakens the CPU.
 1131          * To handle this race, check for a runnable thread after
 1132          * disabling interrupts and immediately return if one is
 1133          * found.  Also, we must absolutely guarentee that hlt is
 1134          * the next instruction after sti.  This ensures that any
 1135          * interrupt that fires after the call to disable_intr() will
 1136          * immediately awaken the CPU from hlt.  Finally, please note
 1137          * that on x86 this works fine because of interrupts enabled only
 1138          * after the instruction following sti takes place, while IF is set
 1139          * to 1 immediately, allowing hlt instruction to acknowledge the
 1140          * interrupt.
 1141          */
 1142         disable_intr();
 1143         if (sched_runnable())
 1144                 enable_intr();
 1145         else
 1146                 __asm __volatile("sti; hlt");
 1147         *state = STATE_RUNNING;
 1148 }
 1149 
 1150 /*
 1151  * MWAIT cpu power states.  Lower 4 bits are sub-states.
 1152  */
 1153 #define MWAIT_C0        0xf0
 1154 #define MWAIT_C1        0x00
 1155 #define MWAIT_C2        0x10
 1156 #define MWAIT_C3        0x20
 1157 #define MWAIT_C4        0x30
 1158 
 1159 static void
 1160 cpu_idle_mwait(sbintime_t sbt)
 1161 {
 1162         int *state;
 1163 
 1164         state = (int *)PCPU_PTR(monitorbuf);
 1165         *state = STATE_MWAIT;
 1166 
 1167         /* See comments in cpu_idle_hlt(). */
 1168         disable_intr();
 1169         if (sched_runnable()) {
 1170                 enable_intr();
 1171                 *state = STATE_RUNNING;
 1172                 return;
 1173         }
 1174         cpu_monitor(state, 0, 0);
 1175         if (*state == STATE_MWAIT)
 1176                 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
 1177         else
 1178                 enable_intr();
 1179         *state = STATE_RUNNING;
 1180 }
 1181 
 1182 static void
 1183 cpu_idle_spin(sbintime_t sbt)
 1184 {
 1185         int *state;
 1186         int i;
 1187 
 1188         state = (int *)PCPU_PTR(monitorbuf);
 1189         *state = STATE_RUNNING;
 1190 
 1191         /*
 1192          * The sched_runnable() call is racy but as long as there is
 1193          * a loop missing it one time will have just a little impact if any 
 1194          * (and it is much better than missing the check at all).
 1195          */
 1196         for (i = 0; i < 1000; i++) {
 1197                 if (sched_runnable())
 1198                         return;
 1199                 cpu_spinwait();
 1200         }
 1201 }
 1202 
 1203 void (*cpu_idle_fn)(sbintime_t) = cpu_idle_hlt;
 1204 
 1205 void
 1206 cpu_idle(int busy)
 1207 {
 1208         sbintime_t sbt = -1;
 1209 
 1210         CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
 1211             busy, curcpu);
 1212 #if defined(MP_WATCHDOG)
 1213         ap_watchdog(PCPU_GET(cpuid));
 1214 #endif
 1215         /* If we are busy - try to use fast methods. */
 1216         if (busy) {
 1217                 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
 1218                         cpu_idle_mwait(busy);
 1219                         goto out;
 1220                 }
 1221         }
 1222 
 1223         /* If we have time - switch timers into idle mode. */
 1224         if (!busy) {
 1225                 critical_enter();
 1226                 sbt = cpu_idleclock();
 1227         }
 1228 
 1229         /* Call main idle method. */
 1230         cpu_idle_fn(sbt);
 1231 
 1232         /* Switch timers mack into active mode. */
 1233         if (!busy) {
 1234                 cpu_activeclock();
 1235                 critical_exit();
 1236         }
 1237 out:
 1238         CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
 1239             busy, curcpu);
 1240 }
 1241 
 1242 int
 1243 cpu_idle_wakeup(int cpu)
 1244 {
 1245         struct pcpu *pcpu;
 1246         int *state;
 1247 
 1248         pcpu = pcpu_find(cpu);
 1249         state = (int *)pcpu->pc_monitorbuf;
 1250         /*
 1251          * This doesn't need to be atomic since missing the race will
 1252          * simply result in unnecessary IPIs.
 1253          */
 1254         if (*state == STATE_SLEEPING)
 1255                 return (0);
 1256         if (*state == STATE_MWAIT)
 1257                 *state = STATE_RUNNING;
 1258         return (1);
 1259 }
 1260 
 1261 /*
 1262  * Ordered by speed/power consumption.
 1263  */
 1264 struct {
 1265         void    *id_fn;
 1266         char    *id_name;
 1267 } idle_tbl[] = {
 1268         { cpu_idle_spin, "spin" },
 1269         { cpu_idle_mwait, "mwait" },
 1270         { cpu_idle_hlt, "hlt" },
 1271         { NULL, NULL }
 1272 };
 1273 
 1274 static int
 1275 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
 1276 {
 1277         char *avail, *p;
 1278         int error;
 1279         int i;
 1280 
 1281         avail = malloc(256, M_TEMP, M_WAITOK);
 1282         p = avail;
 1283         for (i = 0; idle_tbl[i].id_name != NULL; i++) {
 1284                 if (strstr(idle_tbl[i].id_name, "mwait") &&
 1285                     (cpu_feature2 & CPUID2_MON) == 0)
 1286                         continue;
 1287                 p += sprintf(p, "%s%s", p != avail ? ", " : "",
 1288                     idle_tbl[i].id_name);
 1289         }
 1290         error = sysctl_handle_string(oidp, avail, 0, req);
 1291         free(avail, M_TEMP);
 1292         return (error);
 1293 }
 1294 
 1295 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
 1296     0, 0, idle_sysctl_available, "A", "list of available idle functions");
 1297 
 1298 static int
 1299 idle_sysctl(SYSCTL_HANDLER_ARGS)
 1300 {
 1301         char buf[16];
 1302         int error;
 1303         char *p;
 1304         int i;
 1305 
 1306         p = "unknown";
 1307         for (i = 0; idle_tbl[i].id_name != NULL; i++) {
 1308                 if (idle_tbl[i].id_fn == cpu_idle_fn) {
 1309                         p = idle_tbl[i].id_name;
 1310                         break;
 1311                 }
 1312         }
 1313         strncpy(buf, p, sizeof(buf));
 1314         error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
 1315         if (error != 0 || req->newptr == NULL)
 1316                 return (error);
 1317         for (i = 0; idle_tbl[i].id_name != NULL; i++) {
 1318                 if (strstr(idle_tbl[i].id_name, "mwait") &&
 1319                     (cpu_feature2 & CPUID2_MON) == 0)
 1320                         continue;
 1321                 if (strcmp(idle_tbl[i].id_name, buf))
 1322                         continue;
 1323                 cpu_idle_fn = idle_tbl[i].id_fn;
 1324                 return (0);
 1325         }
 1326         return (EINVAL);
 1327 }
 1328 
 1329 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
 1330     idle_sysctl, "A", "currently selected idle function");
 1331 
 1332 /*
 1333  * Reset registers to default values on exec.
 1334  */
 1335 void
 1336 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
 1337 {
 1338         struct trapframe *regs = td->td_frame;
 1339         struct pcb *pcb = td->td_pcb;
 1340 
 1341         /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
 1342         pcb->pcb_gs = _udatasel;
 1343         load_gs(_udatasel);
 1344 
 1345         mtx_lock_spin(&dt_lock);
 1346         if (td->td_proc->p_md.md_ldt)
 1347                 user_ldt_free(td);
 1348         else
 1349                 mtx_unlock_spin(&dt_lock);
 1350   
 1351         bzero((char *)regs, sizeof(struct trapframe));
 1352         regs->tf_eip = imgp->entry_addr;
 1353         regs->tf_esp = stack;
 1354         regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
 1355         regs->tf_ss = _udatasel;
 1356         regs->tf_ds = _udatasel;
 1357         regs->tf_es = _udatasel;
 1358         regs->tf_fs = _udatasel;
 1359         regs->tf_cs = _ucodesel;
 1360 
 1361         /* PS_STRINGS value for BSD/OS binaries.  It is 0 for non-BSD/OS. */
 1362         regs->tf_ebx = imgp->ps_strings;
 1363 
 1364         /*
 1365          * Reset the hardware debug registers if they were in use.
 1366          * They won't have any meaning for the newly exec'd process.  
 1367          */
 1368         if (pcb->pcb_flags & PCB_DBREGS) {
 1369                 pcb->pcb_dr0 = 0;
 1370                 pcb->pcb_dr1 = 0;
 1371                 pcb->pcb_dr2 = 0;
 1372                 pcb->pcb_dr3 = 0;
 1373                 pcb->pcb_dr6 = 0;
 1374                 pcb->pcb_dr7 = 0;
 1375                 if (pcb == curpcb) {
 1376                         /*
 1377                          * Clear the debug registers on the running
 1378                          * CPU, otherwise they will end up affecting
 1379                          * the next process we switch to.
 1380                          */
 1381                         reset_dbregs();
 1382                 }
 1383                 pcb->pcb_flags &= ~PCB_DBREGS;
 1384         }
 1385 
 1386         /*
 1387          * Initialize the math emulator (if any) for the current process.
 1388          * Actually, just clear the bit that says that the emulator has
 1389          * been initialized.  Initialization is delayed until the process
 1390          * traps to the emulator (if it is done at all) mainly because
 1391          * emulators don't provide an entry point for initialization.
 1392          */
 1393         td->td_pcb->pcb_flags &= ~FP_SOFTFP;
 1394         pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
 1395 
 1396         /*
 1397          * Drop the FP state if we hold it, so that the process gets a
 1398          * clean FP state if it uses the FPU again.
 1399          */
 1400         fpstate_drop(td);
 1401 
 1402         /*
 1403          * XXX - Linux emulator
 1404          * Make sure sure edx is 0x0 on entry. Linux binaries depend
 1405          * on it.
 1406          */
 1407         td->td_retval[1] = 0;
 1408 }
 1409 
 1410 void
 1411 cpu_setregs(void)
 1412 {
 1413         unsigned int cr0;
 1414 
 1415         cr0 = rcr0();
 1416 
 1417         /*
 1418          * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
 1419          *
 1420          * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
 1421          * instructions.  We must set the CR0_MP bit and use the CR0_TS
 1422          * bit to control the trap, because setting the CR0_EM bit does
 1423          * not cause WAIT instructions to trap.  It's important to trap
 1424          * WAIT instructions - otherwise the "wait" variants of no-wait
 1425          * control instructions would degenerate to the "no-wait" variants
 1426          * after FP context switches but work correctly otherwise.  It's
 1427          * particularly important to trap WAITs when there is no NPX -
 1428          * otherwise the "wait" variants would always degenerate.
 1429          *
 1430          * Try setting CR0_NE to get correct error reporting on 486DX's.
 1431          * Setting it should fail or do nothing on lesser processors.
 1432          */
 1433         cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
 1434         load_cr0(cr0);
 1435         load_gs(_udatasel);
 1436 }
 1437 
 1438 u_long bootdev;         /* not a struct cdev *- encoding is different */
 1439 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
 1440         CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
 1441 
 1442 /*
 1443  * Initialize 386 and configure to run kernel
 1444  */
 1445 
 1446 /*
 1447  * Initialize segments & interrupt table
 1448  */
 1449 
 1450 int _default_ldt;
 1451 
 1452 union descriptor gdt[NGDT * MAXCPU];    /* global descriptor table */
 1453 union descriptor ldt[NLDT];             /* local descriptor table */
 1454 static struct gate_descriptor idt0[NIDT];
 1455 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
 1456 struct region_descriptor r_gdt, r_idt;  /* table descriptors */
 1457 struct mtx dt_lock;                     /* lock for GDT and LDT */
 1458 
 1459 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
 1460 extern int has_f00f_bug;
 1461 #endif
 1462 
 1463 static struct i386tss dblfault_tss;
 1464 static char dblfault_stack[PAGE_SIZE];
 1465 
 1466 extern  vm_offset_t     proc0kstack;
 1467 
 1468 
 1469 /*
 1470  * software prototypes -- in more palatable form.
 1471  *
 1472  * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
 1473  * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
 1474  */
 1475 struct soft_segment_descriptor gdt_segs[] = {
 1476 /* GNULL_SEL    0 Null Descriptor */
 1477 {       .ssd_base = 0x0,
 1478         .ssd_limit = 0x0,
 1479         .ssd_type = 0,
 1480         .ssd_dpl = SEL_KPL,
 1481         .ssd_p = 0,
 1482         .ssd_xx = 0, .ssd_xx1 = 0,
 1483         .ssd_def32 = 0,
 1484         .ssd_gran = 0           },
 1485 /* GPRIV_SEL    1 SMP Per-Processor Private Data Descriptor */
 1486 {       .ssd_base = 0x0,
 1487         .ssd_limit = 0xfffff,
 1488         .ssd_type = SDT_MEMRWA,
 1489         .ssd_dpl = SEL_KPL,
 1490         .ssd_p = 1,
 1491         .ssd_xx = 0, .ssd_xx1 = 0,
 1492         .ssd_def32 = 1,
 1493         .ssd_gran = 1           },
 1494 /* GUFS_SEL     2 %fs Descriptor for user */
 1495 {       .ssd_base = 0x0,
 1496         .ssd_limit = 0xfffff,
 1497         .ssd_type = SDT_MEMRWA,
 1498         .ssd_dpl = SEL_UPL,
 1499         .ssd_p = 1,
 1500         .ssd_xx = 0, .ssd_xx1 = 0,
 1501         .ssd_def32 = 1,
 1502         .ssd_gran = 1           },
 1503 /* GUGS_SEL     3 %gs Descriptor for user */
 1504 {       .ssd_base = 0x0,
 1505         .ssd_limit = 0xfffff,
 1506         .ssd_type = SDT_MEMRWA,
 1507         .ssd_dpl = SEL_UPL,
 1508         .ssd_p = 1,
 1509         .ssd_xx = 0, .ssd_xx1 = 0,
 1510         .ssd_def32 = 1,
 1511         .ssd_gran = 1           },
 1512 /* GCODE_SEL    4 Code Descriptor for kernel */
 1513 {       .ssd_base = 0x0,
 1514         .ssd_limit = 0xfffff,
 1515         .ssd_type = SDT_MEMERA,
 1516         .ssd_dpl = SEL_KPL,
 1517         .ssd_p = 1,
 1518         .ssd_xx = 0, .ssd_xx1 = 0,
 1519         .ssd_def32 = 1,
 1520         .ssd_gran = 1           },
 1521 /* GDATA_SEL    5 Data Descriptor for kernel */
 1522 {       .ssd_base = 0x0,
 1523         .ssd_limit = 0xfffff,
 1524         .ssd_type = SDT_MEMRWA,
 1525         .ssd_dpl = SEL_KPL,
 1526         .ssd_p = 1,
 1527         .ssd_xx = 0, .ssd_xx1 = 0,
 1528         .ssd_def32 = 1,
 1529         .ssd_gran = 1           },
 1530 /* GUCODE_SEL   6 Code Descriptor for user */
 1531 {       .ssd_base = 0x0,
 1532         .ssd_limit = 0xfffff,
 1533         .ssd_type = SDT_MEMERA,
 1534         .ssd_dpl = SEL_UPL,
 1535         .ssd_p = 1,
 1536         .ssd_xx = 0, .ssd_xx1 = 0,
 1537         .ssd_def32 = 1,
 1538         .ssd_gran = 1           },
 1539 /* GUDATA_SEL   7 Data Descriptor for user */
 1540 {       .ssd_base = 0x0,
 1541         .ssd_limit = 0xfffff,
 1542         .ssd_type = SDT_MEMRWA,
 1543         .ssd_dpl = SEL_UPL,
 1544         .ssd_p = 1,
 1545         .ssd_xx = 0, .ssd_xx1 = 0,
 1546         .ssd_def32 = 1,
 1547         .ssd_gran = 1           },
 1548 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
 1549 {       .ssd_base = 0x400,
 1550         .ssd_limit = 0xfffff,
 1551         .ssd_type = SDT_MEMRWA,
 1552         .ssd_dpl = SEL_KPL,
 1553         .ssd_p = 1,
 1554         .ssd_xx = 0, .ssd_xx1 = 0,
 1555         .ssd_def32 = 1,
 1556         .ssd_gran = 1           },
 1557 /* GPROC0_SEL   9 Proc 0 Tss Descriptor */
 1558 {
 1559         .ssd_base = 0x0,
 1560         .ssd_limit = sizeof(struct i386tss)-1,
 1561         .ssd_type = SDT_SYS386TSS,
 1562         .ssd_dpl = 0,
 1563         .ssd_p = 1,
 1564         .ssd_xx = 0, .ssd_xx1 = 0,
 1565         .ssd_def32 = 0,
 1566         .ssd_gran = 0           },
 1567 /* GLDT_SEL     10 LDT Descriptor */
 1568 {       .ssd_base = (int) ldt,
 1569         .ssd_limit = sizeof(ldt)-1,
 1570         .ssd_type = SDT_SYSLDT,
 1571         .ssd_dpl = SEL_UPL,
 1572         .ssd_p = 1,
 1573         .ssd_xx = 0, .ssd_xx1 = 0,
 1574         .ssd_def32 = 0,
 1575         .ssd_gran = 0           },
 1576 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
 1577 {       .ssd_base = (int) ldt,
 1578         .ssd_limit = (512 * sizeof(union descriptor)-1),
 1579         .ssd_type = SDT_SYSLDT,
 1580         .ssd_dpl = 0,
 1581         .ssd_p = 1,
 1582         .ssd_xx = 0, .ssd_xx1 = 0,
 1583         .ssd_def32 = 0,
 1584         .ssd_gran = 0           },
 1585 /* GPANIC_SEL   12 Panic Tss Descriptor */
 1586 {       .ssd_base = (int) &dblfault_tss,
 1587         .ssd_limit = sizeof(struct i386tss)-1,
 1588         .ssd_type = SDT_SYS386TSS,
 1589         .ssd_dpl = 0,
 1590         .ssd_p = 1,
 1591         .ssd_xx = 0, .ssd_xx1 = 0,
 1592         .ssd_def32 = 0,
 1593         .ssd_gran = 0           },
 1594 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
 1595 {       .ssd_base = 0,
 1596         .ssd_limit = 0xfffff,
 1597         .ssd_type = SDT_MEMERA,
 1598         .ssd_dpl = 0,
 1599         .ssd_p = 1,
 1600         .ssd_xx = 0, .ssd_xx1 = 0,
 1601         .ssd_def32 = 0,
 1602         .ssd_gran = 1           },
 1603 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
 1604 {       .ssd_base = 0,
 1605         .ssd_limit = 0xfffff,
 1606         .ssd_type = SDT_MEMERA,
 1607         .ssd_dpl = 0,
 1608         .ssd_p = 1,
 1609         .ssd_xx = 0, .ssd_xx1 = 0,
 1610         .ssd_def32 = 0,
 1611         .ssd_gran = 1           },
 1612 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
 1613 {       .ssd_base = 0,
 1614         .ssd_limit = 0xfffff,
 1615         .ssd_type = SDT_MEMRWA,
 1616         .ssd_dpl = 0,
 1617         .ssd_p = 1,
 1618         .ssd_xx = 0, .ssd_xx1 = 0,
 1619         .ssd_def32 = 1,
 1620         .ssd_gran = 1           },
 1621 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
 1622 {       .ssd_base = 0,
 1623         .ssd_limit = 0xfffff,
 1624         .ssd_type = SDT_MEMRWA,
 1625         .ssd_dpl = 0,
 1626         .ssd_p = 1,
 1627         .ssd_xx = 0, .ssd_xx1 = 0,
 1628         .ssd_def32 = 0,
 1629         .ssd_gran = 1           },
 1630 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
 1631 {       .ssd_base = 0,
 1632         .ssd_limit = 0xfffff,
 1633         .ssd_type = SDT_MEMRWA,
 1634         .ssd_dpl = 0,
 1635         .ssd_p = 1,
 1636         .ssd_xx = 0, .ssd_xx1 = 0,
 1637         .ssd_def32 = 0,
 1638         .ssd_gran = 1           },
 1639 /* GNDIS_SEL    18 NDIS Descriptor */
 1640 {       .ssd_base = 0x0,
 1641         .ssd_limit = 0x0,
 1642         .ssd_type = 0,
 1643         .ssd_dpl = 0,
 1644         .ssd_p = 0,
 1645         .ssd_xx = 0, .ssd_xx1 = 0,
 1646         .ssd_def32 = 0,
 1647         .ssd_gran = 0           },
 1648 };
 1649 
 1650 static struct soft_segment_descriptor ldt_segs[] = {
 1651         /* Null Descriptor - overwritten by call gate */
 1652 {       .ssd_base = 0x0,
 1653         .ssd_limit = 0x0,
 1654         .ssd_type = 0,
 1655         .ssd_dpl = 0,
 1656         .ssd_p = 0,
 1657         .ssd_xx = 0, .ssd_xx1 = 0,
 1658         .ssd_def32 = 0,
 1659         .ssd_gran = 0           },
 1660         /* Null Descriptor - overwritten by call gate */
 1661 {       .ssd_base = 0x0,
 1662         .ssd_limit = 0x0,
 1663         .ssd_type = 0,
 1664         .ssd_dpl = 0,
 1665         .ssd_p = 0,
 1666         .ssd_xx = 0, .ssd_xx1 = 0,
 1667         .ssd_def32 = 0,
 1668         .ssd_gran = 0           },
 1669         /* Null Descriptor - overwritten by call gate */
 1670 {       .ssd_base = 0x0,
 1671         .ssd_limit = 0x0,
 1672         .ssd_type = 0,
 1673         .ssd_dpl = 0,
 1674         .ssd_p = 0,
 1675         .ssd_xx = 0, .ssd_xx1 = 0,
 1676         .ssd_def32 = 0,
 1677         .ssd_gran = 0           },
 1678         /* Code Descriptor for user */
 1679 {       .ssd_base = 0x0,
 1680         .ssd_limit = 0xfffff,
 1681         .ssd_type = SDT_MEMERA,
 1682         .ssd_dpl = SEL_UPL,
 1683         .ssd_p = 1,
 1684         .ssd_xx = 0, .ssd_xx1 = 0,
 1685         .ssd_def32 = 1,
 1686         .ssd_gran = 1           },
 1687         /* Null Descriptor - overwritten by call gate */
 1688 {       .ssd_base = 0x0,
 1689         .ssd_limit = 0x0,
 1690         .ssd_type = 0,
 1691         .ssd_dpl = 0,
 1692         .ssd_p = 0,
 1693         .ssd_xx = 0, .ssd_xx1 = 0,
 1694         .ssd_def32 = 0,
 1695         .ssd_gran = 0           },
 1696         /* Data Descriptor for user */
 1697 {       .ssd_base = 0x0,
 1698         .ssd_limit = 0xfffff,
 1699         .ssd_type = SDT_MEMRWA,
 1700         .ssd_dpl = SEL_UPL,
 1701         .ssd_p = 1,
 1702         .ssd_xx = 0, .ssd_xx1 = 0,
 1703         .ssd_def32 = 1,
 1704         .ssd_gran = 1           },
 1705 };
 1706 
 1707 void
 1708 setidt(idx, func, typ, dpl, selec)
 1709         int idx;
 1710         inthand_t *func;
 1711         int typ;
 1712         int dpl;
 1713         int selec;
 1714 {
 1715         struct gate_descriptor *ip;
 1716 
 1717         ip = idt + idx;
 1718         ip->gd_looffset = (int)func;
 1719         ip->gd_selector = selec;
 1720         ip->gd_stkcpy = 0;
 1721         ip->gd_xx = 0;
 1722         ip->gd_type = typ;
 1723         ip->gd_dpl = dpl;
 1724         ip->gd_p = 1;
 1725         ip->gd_hioffset = ((int)func)>>16 ;
 1726 }
 1727 
 1728 extern inthand_t
 1729         IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
 1730         IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
 1731         IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
 1732         IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
 1733         IDTVEC(xmm),
 1734 #ifdef KDTRACE_HOOKS
 1735         IDTVEC(dtrace_ret),
 1736 #endif
 1737         IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
 1738 
 1739 #ifdef DDB
 1740 /*
 1741  * Display the index and function name of any IDT entries that don't use
 1742  * the default 'rsvd' entry point.
 1743  */
 1744 DB_SHOW_COMMAND(idt, db_show_idt)
 1745 {
 1746         struct gate_descriptor *ip;
 1747         int idx;
 1748         uintptr_t func;
 1749 
 1750         ip = idt;
 1751         for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
 1752                 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
 1753                 if (func != (uintptr_t)&IDTVEC(rsvd)) {
 1754                         db_printf("%3d\t", idx);
 1755                         db_printsym(func, DB_STGY_PROC);
 1756                         db_printf("\n");
 1757                 }
 1758                 ip++;
 1759         }
 1760 }
 1761 
 1762 /* Show privileged registers. */
 1763 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
 1764 {
 1765         uint64_t idtr, gdtr;
 1766 
 1767         idtr = ridt();
 1768         db_printf("idtr\t0x%08x/%04x\n",
 1769             (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
 1770         gdtr = rgdt();
 1771         db_printf("gdtr\t0x%08x/%04x\n",
 1772             (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
 1773         db_printf("ldtr\t0x%04x\n", rldt());
 1774         db_printf("tr\t0x%04x\n", rtr());
 1775         db_printf("cr0\t0x%08x\n", rcr0());
 1776         db_printf("cr2\t0x%08x\n", rcr2());
 1777         db_printf("cr3\t0x%08x\n", rcr3());
 1778         db_printf("cr4\t0x%08x\n", rcr4());
 1779 }
 1780 #endif
 1781 
 1782 void
 1783 sdtossd(sd, ssd)
 1784         struct segment_descriptor *sd;
 1785         struct soft_segment_descriptor *ssd;
 1786 {
 1787         ssd->ssd_base  = (sd->sd_hibase << 24) | sd->sd_lobase;
 1788         ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
 1789         ssd->ssd_type  = sd->sd_type;
 1790         ssd->ssd_dpl   = sd->sd_dpl;
 1791         ssd->ssd_p     = sd->sd_p;
 1792         ssd->ssd_def32 = sd->sd_def32;
 1793         ssd->ssd_gran  = sd->sd_gran;
 1794 }
 1795 
 1796 static void
 1797 basemem_setup(void)
 1798 {
 1799         vm_paddr_t pa;
 1800         pt_entry_t *pte;
 1801         int i;
 1802 
 1803         if (basemem > 640) {
 1804                 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
 1805                         basemem);
 1806                 basemem = 640;
 1807         }
 1808 
 1809         /*
 1810          * XXX if biosbasemem is now < 640, there is a `hole'
 1811          * between the end of base memory and the start of
 1812          * ISA memory.  The hole may be empty or it may
 1813          * contain BIOS code or data.  Map it read/write so
 1814          * that the BIOS can write to it.  (Memory from 0 to
 1815          * the physical end of the kernel is mapped read-only
 1816          * to begin with and then parts of it are remapped.
 1817          * The parts that aren't remapped form holes that
 1818          * remain read-only and are unused by the kernel.
 1819          * The base memory area is below the physical end of
 1820          * the kernel and right now forms a read-only hole.
 1821          * The part of it from PAGE_SIZE to
 1822          * (trunc_page(biosbasemem * 1024) - 1) will be
 1823          * remapped and used by the kernel later.)
 1824          *
 1825          * This code is similar to the code used in
 1826          * pmap_mapdev, but since no memory needs to be
 1827          * allocated we simply change the mapping.
 1828          */
 1829         for (pa = trunc_page(basemem * 1024);
 1830              pa < ISA_HOLE_START; pa += PAGE_SIZE)
 1831                 pmap_kenter(KERNBASE + pa, pa);
 1832 
 1833         /*
 1834          * Map pages between basemem and ISA_HOLE_START, if any, r/w into
 1835          * the vm86 page table so that vm86 can scribble on them using
 1836          * the vm86 map too.  XXX: why 2 ways for this and only 1 way for
 1837          * page 0, at least as initialized here?
 1838          */
 1839         pte = (pt_entry_t *)vm86paddr;
 1840         for (i = basemem / 4; i < 160; i++)
 1841                 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
 1842 }
 1843 
 1844 /*
 1845  * Populate the (physmap) array with base/bound pairs describing the
 1846  * available physical memory in the system, then test this memory and
 1847  * build the phys_avail array describing the actually-available memory.
 1848  *
 1849  * If we cannot accurately determine the physical memory map, then use
 1850  * value from the 0xE801 call, and failing that, the RTC.
 1851  *
 1852  * Total memory size may be set by the kernel environment variable
 1853  * hw.physmem or the compile-time define MAXMEM.
 1854  *
 1855  * XXX first should be vm_paddr_t.
 1856  */
 1857 static void
 1858 getmemsize(int first)
 1859 {
 1860         int off, physmap_idx, pa_indx, da_indx;
 1861         u_long physmem_tunable, memtest;
 1862         vm_paddr_t physmap[PHYSMAP_SIZE];
 1863         pt_entry_t *pte;
 1864         quad_t dcons_addr, dcons_size;
 1865         int i;
 1866         int pg_n;
 1867         u_int extmem;
 1868         u_int under16;
 1869         vm_paddr_t pa;
 1870 
 1871         bzero(physmap, sizeof(physmap));
 1872 
 1873         /* XXX - some of EPSON machines can't use PG_N */
 1874         pg_n = PG_N;
 1875         if (pc98_machine_type & M_EPSON_PC98) {
 1876                 switch (epson_machine_id) {
 1877 #ifdef WB_CACHE
 1878                 default:
 1879 #endif
 1880                 case EPSON_PC486_HX:
 1881                 case EPSON_PC486_HG:
 1882                 case EPSON_PC486_HA:
 1883                         pg_n = 0;
 1884                         break;
 1885                 }
 1886         }
 1887 
 1888         under16 = pc98_getmemsize(&basemem, &extmem);
 1889         basemem_setup();
 1890 
 1891         physmap[0] = 0;
 1892         physmap[1] = basemem * 1024;
 1893         physmap_idx = 2;
 1894         physmap[physmap_idx] = 0x100000;
 1895         physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
 1896 
 1897         /*
 1898          * Now, physmap contains a map of physical memory.
 1899          */
 1900 
 1901 #ifdef SMP
 1902         /* make hole for AP bootstrap code */
 1903         physmap[1] = mp_bootaddress(physmap[1]);
 1904 #endif
 1905 
 1906         /*
 1907          * Maxmem isn't the "maximum memory", it's one larger than the
 1908          * highest page of the physical address space.  It should be
 1909          * called something like "Maxphyspage".  We may adjust this 
 1910          * based on ``hw.physmem'' and the results of the memory test.
 1911          */
 1912         Maxmem = atop(physmap[physmap_idx + 1]);
 1913 
 1914 #ifdef MAXMEM
 1915         Maxmem = MAXMEM / 4;
 1916 #endif
 1917 
 1918         if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
 1919                 Maxmem = atop(physmem_tunable);
 1920 
 1921         /*
 1922          * By default keep the memtest enabled.  Use a general name so that
 1923          * one could eventually do more with the code than just disable it.
 1924          */
 1925         memtest = 1;
 1926         TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
 1927 
 1928         if (atop(physmap[physmap_idx + 1]) != Maxmem &&
 1929             (boothowto & RB_VERBOSE))
 1930                 printf("Physical memory use set to %ldK\n", Maxmem * 4);
 1931 
 1932         /*
 1933          * If Maxmem has been increased beyond what the system has detected,
 1934          * extend the last memory segment to the new limit.
 1935          */ 
 1936         if (atop(physmap[physmap_idx + 1]) < Maxmem)
 1937                 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
 1938 
 1939         /*
 1940          * We need to divide chunk if Maxmem is larger than 16MB and
 1941          * under 16MB area is not full of memory.
 1942          * (1) system area (15-16MB region) is cut off
 1943          * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
 1944          */
 1945         if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
 1946                 /* 15M - 16M region is cut off, so need to divide chunk */
 1947                 physmap[physmap_idx + 1] = under16 * 1024;
 1948                 physmap_idx += 2;
 1949                 physmap[physmap_idx] = 0x1000000;
 1950                 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
 1951         }
 1952 
 1953         /* call pmap initialization to make new kernel address space */
 1954         pmap_bootstrap(first);
 1955 
 1956         /*
 1957          * Size up each available chunk of physical memory.
 1958          */
 1959         physmap[0] = PAGE_SIZE;         /* mask off page 0 */
 1960         pa_indx = 0;
 1961         da_indx = 1;
 1962         phys_avail[pa_indx++] = physmap[0];
 1963         phys_avail[pa_indx] = physmap[0];
 1964         dump_avail[da_indx] = physmap[0];
 1965         pte = CMAP3;
 1966 
 1967         /*
 1968          * Get dcons buffer address
 1969          */
 1970         if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
 1971             getenv_quad("dcons.size", &dcons_size) == 0)
 1972                 dcons_addr = 0;
 1973 
 1974         /*
 1975          * physmap is in bytes, so when converting to page boundaries,
 1976          * round up the start address and round down the end address.
 1977          */
 1978         for (i = 0; i <= physmap_idx; i += 2) {
 1979                 vm_paddr_t end;
 1980 
 1981                 end = ptoa((vm_paddr_t)Maxmem);
 1982                 if (physmap[i + 1] < end)
 1983                         end = trunc_page(physmap[i + 1]);
 1984                 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
 1985                         int tmp, page_bad, full;
 1986                         int *ptr = (int *)CADDR3;
 1987 
 1988                         full = FALSE;
 1989                         /*
 1990                          * block out kernel memory as not available.
 1991                          */
 1992                         if (pa >= KERNLOAD && pa < first)
 1993                                 goto do_dump_avail;
 1994 
 1995                         /*
 1996                          * block out dcons buffer
 1997                          */
 1998                         if (dcons_addr > 0
 1999                             && pa >= trunc_page(dcons_addr)
 2000                             && pa < dcons_addr + dcons_size)
 2001                                 goto do_dump_avail;
 2002 
 2003                         page_bad = FALSE;
 2004                         if (memtest == 0)
 2005                                 goto skip_memtest;
 2006 
 2007                         /*
 2008                          * map page into kernel: valid, read/write,non-cacheable
 2009                          */
 2010                         *pte = pa | PG_V | PG_RW | pg_n;
 2011                         invltlb();
 2012 
 2013                         tmp = *(int *)ptr;
 2014                         /*
 2015                          * Test for alternating 1's and 0's
 2016                          */
 2017                         *(volatile int *)ptr = 0xaaaaaaaa;
 2018                         if (*(volatile int *)ptr != 0xaaaaaaaa)
 2019                                 page_bad = TRUE;
 2020                         /*
 2021                          * Test for alternating 0's and 1's
 2022                          */
 2023                         *(volatile int *)ptr = 0x55555555;
 2024                         if (*(volatile int *)ptr != 0x55555555)
 2025                                 page_bad = TRUE;
 2026                         /*
 2027                          * Test for all 1's
 2028                          */
 2029                         *(volatile int *)ptr = 0xffffffff;
 2030                         if (*(volatile int *)ptr != 0xffffffff)
 2031                                 page_bad = TRUE;
 2032                         /*
 2033                          * Test for all 0's
 2034                          */
 2035                         *(volatile int *)ptr = 0x0;
 2036                         if (*(volatile int *)ptr != 0x0)
 2037                                 page_bad = TRUE;
 2038                         /*
 2039                          * Restore original value.
 2040                          */
 2041                         *(int *)ptr = tmp;
 2042 
 2043 skip_memtest:
 2044                         /*
 2045                          * Adjust array of valid/good pages.
 2046                          */
 2047                         if (page_bad == TRUE)
 2048                                 continue;
 2049                         /*
 2050                          * If this good page is a continuation of the
 2051                          * previous set of good pages, then just increase
 2052                          * the end pointer. Otherwise start a new chunk.
 2053                          * Note that "end" points one higher than end,
 2054                          * making the range >= start and < end.
 2055                          * If we're also doing a speculative memory
 2056                          * test and we at or past the end, bump up Maxmem
 2057                          * so that we keep going. The first bad page
 2058                          * will terminate the loop.
 2059                          */
 2060                         if (phys_avail[pa_indx] == pa) {
 2061                                 phys_avail[pa_indx] += PAGE_SIZE;
 2062                         } else {
 2063                                 pa_indx++;
 2064                                 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
 2065                                         printf(
 2066                 "Too many holes in the physical address space, giving up\n");
 2067                                         pa_indx--;
 2068                                         full = TRUE;
 2069                                         goto do_dump_avail;
 2070                                 }
 2071                                 phys_avail[pa_indx++] = pa;     /* start */
 2072                                 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
 2073                         }
 2074                         physmem++;
 2075 do_dump_avail:
 2076                         if (dump_avail[da_indx] == pa) {
 2077                                 dump_avail[da_indx] += PAGE_SIZE;
 2078                         } else {
 2079                                 da_indx++;
 2080                                 if (da_indx == DUMP_AVAIL_ARRAY_END) {
 2081                                         da_indx--;
 2082                                         goto do_next;
 2083                                 }
 2084                                 dump_avail[da_indx++] = pa;     /* start */
 2085                                 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
 2086                         }
 2087 do_next:
 2088                         if (full)
 2089                                 break;
 2090                 }
 2091         }
 2092         *pte = 0;
 2093         invltlb();
 2094         
 2095         /*
 2096          * XXX
 2097          * The last chunk must contain at least one page plus the message
 2098          * buffer to avoid complicating other code (message buffer address
 2099          * calculation, etc.).
 2100          */
 2101         while (phys_avail[pa_indx - 1] + PAGE_SIZE +
 2102             round_page(msgbufsize) >= phys_avail[pa_indx]) {
 2103                 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
 2104                 phys_avail[pa_indx--] = 0;
 2105                 phys_avail[pa_indx--] = 0;
 2106         }
 2107 
 2108         Maxmem = atop(phys_avail[pa_indx]);
 2109 
 2110         /* Trim off space for the message buffer. */
 2111         phys_avail[pa_indx] -= round_page(msgbufsize);
 2112 
 2113         /* Map the message buffer. */
 2114         for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
 2115                 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
 2116                     off);
 2117 
 2118         PT_UPDATES_FLUSH();
 2119 }
 2120 
 2121 void
 2122 init386(first)
 2123         int first;
 2124 {
 2125         struct gate_descriptor *gdp;
 2126         int gsel_tss, metadata_missing, x, pa;
 2127         size_t kstack0_sz;
 2128         struct pcpu *pc;
 2129 
 2130         thread0.td_kstack = proc0kstack;
 2131         thread0.td_kstack_pages = KSTACK_PAGES;
 2132         kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
 2133         thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
 2134 
 2135         /*
 2136          * This may be done better later if it gets more high level
 2137          * components in it. If so just link td->td_proc here.
 2138          */
 2139         proc_linkup0(&proc0, &thread0);
 2140 
 2141         /*
 2142          * Initialize DMAC
 2143          */
 2144         pc98_init_dmac();
 2145 
 2146         metadata_missing = 0;
 2147         if (bootinfo.bi_modulep) {
 2148                 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
 2149                 preload_bootstrap_relocate(KERNBASE);
 2150         } else {
 2151                 metadata_missing = 1;
 2152         }
 2153         if (envmode == 1)
 2154                 kern_envp = static_env;
 2155         else if (bootinfo.bi_envp)
 2156                 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
 2157 
 2158         /* Init basic tunables, hz etc */
 2159         init_param1();
 2160 
 2161         /*
 2162          * Make gdt memory segments.  All segments cover the full 4GB
 2163          * of address space and permissions are enforced at page level.
 2164          */
 2165         gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
 2166         gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
 2167         gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
 2168         gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
 2169         gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
 2170         gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
 2171 
 2172         pc = &__pcpu[0];
 2173         gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
 2174         gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
 2175         gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
 2176 
 2177         for (x = 0; x < NGDT; x++)
 2178                 ssdtosd(&gdt_segs[x], &gdt[x].sd);
 2179 
 2180         r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
 2181         r_gdt.rd_base =  (int) gdt;
 2182         mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
 2183         lgdt(&r_gdt);
 2184 
 2185         pcpu_init(pc, 0, sizeof(struct pcpu));
 2186         for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
 2187                 pmap_kenter(pa + KERNBASE, pa);
 2188         dpcpu_init((void *)(first + KERNBASE), 0);
 2189         first += DPCPU_SIZE;
 2190         PCPU_SET(prvspace, pc);
 2191         PCPU_SET(curthread, &thread0);
 2192         PCPU_SET(curpcb, thread0.td_pcb);
 2193 
 2194         /*
 2195          * Initialize mutexes.
 2196          *
 2197          * icu_lock: in order to allow an interrupt to occur in a critical
 2198          *           section, to set pcpu->ipending (etc...) properly, we
 2199          *           must be able to get the icu lock, so it can't be
 2200          *           under witness.
 2201          */
 2202         mutex_init();
 2203         mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
 2204 
 2205         /* make ldt memory segments */
 2206         ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
 2207         ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
 2208         for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
 2209                 ssdtosd(&ldt_segs[x], &ldt[x].sd);
 2210 
 2211         _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
 2212         lldt(_default_ldt);
 2213         PCPU_SET(currentldt, _default_ldt);
 2214 
 2215         /* exceptions */
 2216         for (x = 0; x < NIDT; x++)
 2217                 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
 2218                     GSEL(GCODE_SEL, SEL_KPL));
 2219         setidt(IDT_DE, &IDTVEC(div),  SDT_SYS386TGT, SEL_KPL,
 2220             GSEL(GCODE_SEL, SEL_KPL));
 2221         setidt(IDT_DB, &IDTVEC(dbg),  SDT_SYS386IGT, SEL_KPL,
 2222             GSEL(GCODE_SEL, SEL_KPL));
 2223         setidt(IDT_NMI, &IDTVEC(nmi),  SDT_SYS386IGT, SEL_KPL,
 2224             GSEL(GCODE_SEL, SEL_KPL));
 2225         setidt(IDT_BP, &IDTVEC(bpt),  SDT_SYS386IGT, SEL_UPL,
 2226             GSEL(GCODE_SEL, SEL_KPL));
 2227         setidt(IDT_OF, &IDTVEC(ofl),  SDT_SYS386TGT, SEL_UPL,
 2228             GSEL(GCODE_SEL, SEL_KPL));
 2229         setidt(IDT_BR, &IDTVEC(bnd),  SDT_SYS386TGT, SEL_KPL,
 2230             GSEL(GCODE_SEL, SEL_KPL));
 2231         setidt(IDT_UD, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
 2232             GSEL(GCODE_SEL, SEL_KPL));
 2233         setidt(IDT_NM, &IDTVEC(dna),  SDT_SYS386TGT, SEL_KPL
 2234             , GSEL(GCODE_SEL, SEL_KPL));
 2235         setidt(IDT_DF, 0,  SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
 2236         setidt(IDT_FPUGP, &IDTVEC(fpusegm),  SDT_SYS386TGT, SEL_KPL,
 2237             GSEL(GCODE_SEL, SEL_KPL));
 2238         setidt(IDT_TS, &IDTVEC(tss),  SDT_SYS386TGT, SEL_KPL,
 2239             GSEL(GCODE_SEL, SEL_KPL));
 2240         setidt(IDT_NP, &IDTVEC(missing),  SDT_SYS386TGT, SEL_KPL,
 2241             GSEL(GCODE_SEL, SEL_KPL));
 2242         setidt(IDT_SS, &IDTVEC(stk),  SDT_SYS386TGT, SEL_KPL,
 2243             GSEL(GCODE_SEL, SEL_KPL));
 2244         setidt(IDT_GP, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
 2245             GSEL(GCODE_SEL, SEL_KPL));
 2246         setidt(IDT_PF, &IDTVEC(page),  SDT_SYS386IGT, SEL_KPL,
 2247             GSEL(GCODE_SEL, SEL_KPL));
 2248         setidt(IDT_MF, &IDTVEC(fpu),  SDT_SYS386TGT, SEL_KPL,
 2249             GSEL(GCODE_SEL, SEL_KPL));
 2250         setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
 2251             GSEL(GCODE_SEL, SEL_KPL));
 2252         setidt(IDT_MC, &IDTVEC(mchk),  SDT_SYS386TGT, SEL_KPL,
 2253             GSEL(GCODE_SEL, SEL_KPL));
 2254         setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
 2255             GSEL(GCODE_SEL, SEL_KPL));
 2256         setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
 2257             GSEL(GCODE_SEL, SEL_KPL));
 2258 #ifdef KDTRACE_HOOKS
 2259         setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
 2260             GSEL(GCODE_SEL, SEL_KPL));
 2261 #endif
 2262 
 2263         r_idt.rd_limit = sizeof(idt0) - 1;
 2264         r_idt.rd_base = (int) idt;
 2265         lidt(&r_idt);
 2266 
 2267         /*
 2268          * Initialize the i8254 before the console so that console
 2269          * initialization can use DELAY().
 2270          */
 2271         i8254_init();
 2272 
 2273         /*
 2274          * Initialize the console before we print anything out.
 2275          */
 2276         cninit();
 2277 
 2278         if (metadata_missing)
 2279                 printf("WARNING: loader(8) metadata is missing!\n");
 2280 
 2281 #ifdef DEV_ISA
 2282 #ifdef DEV_ATPIC
 2283         atpic_startup();
 2284 #else
 2285         /* Reset and mask the atpics and leave them shut down. */
 2286         atpic_reset();
 2287 
 2288         /*
 2289          * Point the ICU spurious interrupt vectors at the APIC spurious
 2290          * interrupt handler.
 2291          */
 2292         setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
 2293             GSEL(GCODE_SEL, SEL_KPL));
 2294         setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
 2295             GSEL(GCODE_SEL, SEL_KPL));
 2296 #endif
 2297 #endif
 2298 
 2299 #ifdef DDB
 2300         ksym_start = bootinfo.bi_symtab;
 2301         ksym_end = bootinfo.bi_esymtab;
 2302 #endif
 2303 
 2304         kdb_init();
 2305 
 2306 #ifdef KDB
 2307         if (boothowto & RB_KDB)
 2308                 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
 2309 #endif
 2310 
 2311         finishidentcpu();       /* Final stage of CPU initialization */
 2312         setidt(IDT_UD, &IDTVEC(ill),  SDT_SYS386TGT, SEL_KPL,
 2313             GSEL(GCODE_SEL, SEL_KPL));
 2314         setidt(IDT_GP, &IDTVEC(prot),  SDT_SYS386TGT, SEL_KPL,
 2315             GSEL(GCODE_SEL, SEL_KPL));
 2316         initializecpu();        /* Initialize CPU registers */
 2317 
 2318         /* make an initial tss so cpu can get interrupt stack on syscall! */
 2319         /* Note: -16 is so we can grow the trapframe if we came from vm86 */
 2320         PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
 2321             kstack0_sz - sizeof(struct pcb) - 16);
 2322         PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
 2323         gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
 2324         PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
 2325         PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
 2326         PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
 2327         ltr(gsel_tss);
 2328 
 2329         /* pointer to selector slot for %fs/%gs */
 2330         PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
 2331 
 2332         dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
 2333             dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
 2334         dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
 2335             dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
 2336         dblfault_tss.tss_cr3 = (int)IdlePTD;
 2337         dblfault_tss.tss_eip = (int)dblfault_handler;
 2338         dblfault_tss.tss_eflags = PSL_KERNEL;
 2339         dblfault_tss.tss_ds = dblfault_tss.tss_es =
 2340             dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
 2341         dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
 2342         dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
 2343         dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
 2344 
 2345         vm86_initialize();
 2346         getmemsize(first);
 2347         init_param2(physmem);
 2348 
 2349         /* now running on new page tables, configured,and u/iom is accessible */
 2350 
 2351         msgbufinit(msgbufp, msgbufsize);
 2352 
 2353         /* make a call gate to reenter kernel with */
 2354         gdp = &ldt[LSYS5CALLS_SEL].gd;
 2355 
 2356         x = (int) &IDTVEC(lcall_syscall);
 2357         gdp->gd_looffset = x;
 2358         gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
 2359         gdp->gd_stkcpy = 1;
 2360         gdp->gd_type = SDT_SYS386CGT;
 2361         gdp->gd_dpl = SEL_UPL;
 2362         gdp->gd_p = 1;
 2363         gdp->gd_hioffset = x >> 16;
 2364 
 2365         /* XXX does this work? */
 2366         /* XXX yes! */
 2367         ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
 2368         ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
 2369 
 2370         /* transfer to user mode */
 2371 
 2372         _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
 2373         _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
 2374 
 2375         /* setup proc 0's pcb */
 2376         thread0.td_pcb->pcb_flags = 0;
 2377         thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
 2378         thread0.td_pcb->pcb_ext = 0;
 2379         thread0.td_frame = &proc0_tf;
 2380 }
 2381 
 2382 void
 2383 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
 2384 {
 2385 
 2386 }
 2387 
 2388 void
 2389 spinlock_enter(void)
 2390 {
 2391         struct thread *td;
 2392         register_t flags;
 2393 
 2394         td = curthread;
 2395         if (td->td_md.md_spinlock_count == 0) {
 2396                 flags = intr_disable();
 2397                 td->td_md.md_spinlock_count = 1;
 2398                 td->td_md.md_saved_flags = flags;
 2399         } else
 2400                 td->td_md.md_spinlock_count++;
 2401         critical_enter();
 2402 }
 2403 
 2404 void
 2405 spinlock_exit(void)
 2406 {
 2407         struct thread *td;
 2408         register_t flags;
 2409 
 2410         td = curthread;
 2411         critical_exit();
 2412         flags = td->td_md.md_saved_flags;
 2413         td->td_md.md_spinlock_count--;
 2414         if (td->td_md.md_spinlock_count == 0)
 2415                 intr_restore(flags);
 2416 }
 2417 
 2418 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
 2419 static void f00f_hack(void *unused);
 2420 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
 2421 
 2422 static void
 2423 f00f_hack(void *unused)
 2424 {
 2425         struct gate_descriptor *new_idt;
 2426         vm_offset_t tmp;
 2427 
 2428         if (!has_f00f_bug)
 2429                 return;
 2430 
 2431         GIANT_REQUIRED;
 2432 
 2433         printf("Intel Pentium detected, installing workaround for F00F bug\n");
 2434 
 2435         tmp = kmem_malloc(kernel_arena, PAGE_SIZE * 2, M_WAITOK | M_ZERO);
 2436         if (tmp == 0)
 2437                 panic("kmem_alloc returned 0");
 2438 
 2439         /* Put the problematic entry (#6) at the end of the lower page. */
 2440         new_idt = (struct gate_descriptor*)
 2441             (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
 2442         bcopy(idt, new_idt, sizeof(idt0));
 2443         r_idt.rd_base = (u_int)new_idt;
 2444         lidt(&r_idt);
 2445         idt = new_idt;
 2446         pmap_protect(kernel_pmap, tmp, tmp + PAGE_SIZE, VM_PROT_READ);
 2447 }
 2448 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
 2449 
 2450 /*
 2451  * Construct a PCB from a trapframe. This is called from kdb_trap() where
 2452  * we want to start a backtrace from the function that caused us to enter
 2453  * the debugger. We have the context in the trapframe, but base the trace
 2454  * on the PCB. The PCB doesn't have to be perfect, as long as it contains
 2455  * enough for a backtrace.
 2456  */
 2457 void
 2458 makectx(struct trapframe *tf, struct pcb *pcb)
 2459 {
 2460 
 2461         pcb->pcb_edi = tf->tf_edi;
 2462         pcb->pcb_esi = tf->tf_esi;
 2463         pcb->pcb_ebp = tf->tf_ebp;
 2464         pcb->pcb_ebx = tf->tf_ebx;
 2465         pcb->pcb_eip = tf->tf_eip;
 2466         pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
 2467 }
 2468 
 2469 int
 2470 ptrace_set_pc(struct thread *td, u_long addr)
 2471 {
 2472 
 2473         td->td_frame->tf_eip = addr;
 2474         return (0);
 2475 }
 2476 
 2477 int
 2478 ptrace_single_step(struct thread *td)
 2479 {
 2480         td->td_frame->tf_eflags |= PSL_T;
 2481         return (0);
 2482 }
 2483 
 2484 int
 2485 ptrace_clear_single_step(struct thread *td)
 2486 {
 2487         td->td_frame->tf_eflags &= ~PSL_T;
 2488         return (0);
 2489 }
 2490 
 2491 int
 2492 fill_regs(struct thread *td, struct reg *regs)
 2493 {
 2494         struct pcb *pcb;
 2495         struct trapframe *tp;
 2496 
 2497         tp = td->td_frame;
 2498         pcb = td->td_pcb;
 2499         regs->r_gs = pcb->pcb_gs;
 2500         return (fill_frame_regs(tp, regs));
 2501 }
 2502 
 2503 int
 2504 fill_frame_regs(struct trapframe *tp, struct reg *regs)
 2505 {
 2506         regs->r_fs = tp->tf_fs;
 2507         regs->r_es = tp->tf_es;
 2508         regs->r_ds = tp->tf_ds;
 2509         regs->r_edi = tp->tf_edi;
 2510         regs->r_esi = tp->tf_esi;
 2511         regs->r_ebp = tp->tf_ebp;
 2512         regs->r_ebx = tp->tf_ebx;
 2513         regs->r_edx = tp->tf_edx;
 2514         regs->r_ecx = tp->tf_ecx;
 2515         regs->r_eax = tp->tf_eax;
 2516         regs->r_eip = tp->tf_eip;
 2517         regs->r_cs = tp->tf_cs;
 2518         regs->r_eflags = tp->tf_eflags;
 2519         regs->r_esp = tp->tf_esp;
 2520         regs->r_ss = tp->tf_ss;
 2521         return (0);
 2522 }
 2523 
 2524 int
 2525 set_regs(struct thread *td, struct reg *regs)
 2526 {
 2527         struct pcb *pcb;
 2528         struct trapframe *tp;
 2529 
 2530         tp = td->td_frame;
 2531         if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
 2532             !CS_SECURE(regs->r_cs))
 2533                 return (EINVAL);
 2534         pcb = td->td_pcb;
 2535         tp->tf_fs = regs->r_fs;
 2536         tp->tf_es = regs->r_es;
 2537         tp->tf_ds = regs->r_ds;
 2538         tp->tf_edi = regs->r_edi;
 2539         tp->tf_esi = regs->r_esi;
 2540         tp->tf_ebp = regs->r_ebp;
 2541         tp->tf_ebx = regs->r_ebx;
 2542         tp->tf_edx = regs->r_edx;
 2543         tp->tf_ecx = regs->r_ecx;
 2544         tp->tf_eax = regs->r_eax;
 2545         tp->tf_eip = regs->r_eip;
 2546         tp->tf_cs = regs->r_cs;
 2547         tp->tf_eflags = regs->r_eflags;
 2548         tp->tf_esp = regs->r_esp;
 2549         tp->tf_ss = regs->r_ss;
 2550         pcb->pcb_gs = regs->r_gs;
 2551         return (0);
 2552 }
 2553 
 2554 #ifdef CPU_ENABLE_SSE
 2555 static void
 2556 fill_fpregs_xmm(sv_xmm, sv_87)
 2557         struct savexmm *sv_xmm;
 2558         struct save87 *sv_87;
 2559 {
 2560         register struct env87 *penv_87 = &sv_87->sv_env;
 2561         register struct envxmm *penv_xmm = &sv_xmm->sv_env;
 2562         int i;
 2563 
 2564         bzero(sv_87, sizeof(*sv_87));
 2565 
 2566         /* FPU control/status */
 2567         penv_87->en_cw = penv_xmm->en_cw;
 2568         penv_87->en_sw = penv_xmm->en_sw;
 2569         penv_87->en_tw = penv_xmm->en_tw;
 2570         penv_87->en_fip = penv_xmm->en_fip;
 2571         penv_87->en_fcs = penv_xmm->en_fcs;
 2572         penv_87->en_opcode = penv_xmm->en_opcode;
 2573         penv_87->en_foo = penv_xmm->en_foo;
 2574         penv_87->en_fos = penv_xmm->en_fos;
 2575 
 2576         /* FPU registers */
 2577         for (i = 0; i < 8; ++i)
 2578                 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
 2579 }
 2580 
 2581 static void
 2582 set_fpregs_xmm(sv_87, sv_xmm)
 2583         struct save87 *sv_87;
 2584         struct savexmm *sv_xmm;
 2585 {
 2586         register struct env87 *penv_87 = &sv_87->sv_env;
 2587         register struct envxmm *penv_xmm = &sv_xmm->sv_env;
 2588         int i;
 2589 
 2590         /* FPU control/status */
 2591         penv_xmm->en_cw = penv_87->en_cw;
 2592         penv_xmm->en_sw = penv_87->en_sw;
 2593         penv_xmm->en_tw = penv_87->en_tw;
 2594         penv_xmm->en_fip = penv_87->en_fip;
 2595         penv_xmm->en_fcs = penv_87->en_fcs;
 2596         penv_xmm->en_opcode = penv_87->en_opcode;
 2597         penv_xmm->en_foo = penv_87->en_foo;
 2598         penv_xmm->en_fos = penv_87->en_fos;
 2599 
 2600         /* FPU registers */
 2601         for (i = 0; i < 8; ++i)
 2602                 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
 2603 }
 2604 #endif /* CPU_ENABLE_SSE */
 2605 
 2606 int
 2607 fill_fpregs(struct thread *td, struct fpreg *fpregs)
 2608 {
 2609 
 2610         KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
 2611             P_SHOULDSTOP(td->td_proc),
 2612             ("not suspended thread %p", td));
 2613 #ifdef DEV_NPX
 2614         npxgetregs(td);
 2615 #else
 2616         bzero(fpregs, sizeof(*fpregs));
 2617 #endif
 2618 #ifdef CPU_ENABLE_SSE
 2619         if (cpu_fxsr)
 2620                 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
 2621                     (struct save87 *)fpregs);
 2622         else
 2623 #endif /* CPU_ENABLE_SSE */
 2624                 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
 2625                     sizeof(*fpregs));
 2626         return (0);
 2627 }
 2628 
 2629 int
 2630 set_fpregs(struct thread *td, struct fpreg *fpregs)
 2631 {
 2632 
 2633 #ifdef CPU_ENABLE_SSE
 2634         if (cpu_fxsr)
 2635                 set_fpregs_xmm((struct save87 *)fpregs,
 2636                     &td->td_pcb->pcb_user_save.sv_xmm);
 2637         else
 2638 #endif /* CPU_ENABLE_SSE */
 2639                 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
 2640                     sizeof(*fpregs));
 2641 #ifdef DEV_NPX
 2642         npxuserinited(td);
 2643 #endif
 2644         return (0);
 2645 }
 2646 
 2647 /*
 2648  * Get machine context.
 2649  */
 2650 int
 2651 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
 2652 {
 2653         struct trapframe *tp;
 2654         struct segment_descriptor *sdp;
 2655 
 2656         tp = td->td_frame;
 2657 
 2658         PROC_LOCK(curthread->td_proc);
 2659         mcp->mc_onstack = sigonstack(tp->tf_esp);
 2660         PROC_UNLOCK(curthread->td_proc);
 2661         mcp->mc_gs = td->td_pcb->pcb_gs;
 2662         mcp->mc_fs = tp->tf_fs;
 2663         mcp->mc_es = tp->tf_es;
 2664         mcp->mc_ds = tp->tf_ds;
 2665         mcp->mc_edi = tp->tf_edi;
 2666         mcp->mc_esi = tp->tf_esi;
 2667         mcp->mc_ebp = tp->tf_ebp;
 2668         mcp->mc_isp = tp->tf_isp;
 2669         mcp->mc_eflags = tp->tf_eflags;
 2670         if (flags & GET_MC_CLEAR_RET) {
 2671                 mcp->mc_eax = 0;
 2672                 mcp->mc_edx = 0;
 2673                 mcp->mc_eflags &= ~PSL_C;
 2674         } else {
 2675                 mcp->mc_eax = tp->tf_eax;
 2676                 mcp->mc_edx = tp->tf_edx;
 2677         }
 2678         mcp->mc_ebx = tp->tf_ebx;
 2679         mcp->mc_ecx = tp->tf_ecx;
 2680         mcp->mc_eip = tp->tf_eip;
 2681         mcp->mc_cs = tp->tf_cs;
 2682         mcp->mc_esp = tp->tf_esp;
 2683         mcp->mc_ss = tp->tf_ss;
 2684         mcp->mc_len = sizeof(*mcp);
 2685         get_fpcontext(td, mcp);
 2686         sdp = &td->td_pcb->pcb_fsd;
 2687         mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
 2688         sdp = &td->td_pcb->pcb_gsd;
 2689         mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
 2690         mcp->mc_flags = 0;
 2691         bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
 2692         return (0);
 2693 }
 2694 
 2695 /*
 2696  * Set machine context.
 2697  *
 2698  * However, we don't set any but the user modifiable flags, and we won't
 2699  * touch the cs selector.
 2700  */
 2701 int
 2702 set_mcontext(struct thread *td, const mcontext_t *mcp)
 2703 {
 2704         struct trapframe *tp;
 2705         int eflags, ret;
 2706 
 2707         tp = td->td_frame;
 2708         if (mcp->mc_len != sizeof(*mcp))
 2709                 return (EINVAL);
 2710         eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
 2711             (tp->tf_eflags & ~PSL_USERCHANGE);
 2712         if ((ret = set_fpcontext(td, mcp)) == 0) {
 2713                 tp->tf_fs = mcp->mc_fs;
 2714                 tp->tf_es = mcp->mc_es;
 2715                 tp->tf_ds = mcp->mc_ds;
 2716                 tp->tf_edi = mcp->mc_edi;
 2717                 tp->tf_esi = mcp->mc_esi;
 2718                 tp->tf_ebp = mcp->mc_ebp;
 2719                 tp->tf_ebx = mcp->mc_ebx;
 2720                 tp->tf_edx = mcp->mc_edx;
 2721                 tp->tf_ecx = mcp->mc_ecx;
 2722                 tp->tf_eax = mcp->mc_eax;
 2723                 tp->tf_eip = mcp->mc_eip;
 2724                 tp->tf_eflags = eflags;
 2725                 tp->tf_esp = mcp->mc_esp;
 2726                 tp->tf_ss = mcp->mc_ss;
 2727                 td->td_pcb->pcb_gs = mcp->mc_gs;
 2728                 ret = 0;
 2729         }
 2730         return (ret);
 2731 }
 2732 
 2733 static void
 2734 get_fpcontext(struct thread *td, mcontext_t *mcp)
 2735 {
 2736 
 2737 #ifndef DEV_NPX
 2738         mcp->mc_fpformat = _MC_FPFMT_NODEV;
 2739         mcp->mc_ownedfp = _MC_FPOWNED_NONE;
 2740         bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
 2741 #else
 2742         mcp->mc_ownedfp = npxgetregs(td);
 2743         bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate[0],
 2744             sizeof(mcp->mc_fpstate));
 2745         mcp->mc_fpformat = npxformat();
 2746 #endif
 2747 }
 2748 
 2749 static int
 2750 set_fpcontext(struct thread *td, const mcontext_t *mcp)
 2751 {
 2752 
 2753         if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
 2754                 return (0);
 2755         else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
 2756             mcp->mc_fpformat != _MC_FPFMT_XMM)
 2757                 return (EINVAL);
 2758         else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
 2759                 /* We don't care what state is left in the FPU or PCB. */
 2760                 fpstate_drop(td);
 2761         else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
 2762             mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
 2763 #ifdef DEV_NPX
 2764 #ifdef CPU_ENABLE_SSE
 2765                 if (cpu_fxsr)
 2766                         ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
 2767                             en_mxcsr &= cpu_mxcsr_mask;
 2768 #endif
 2769                 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
 2770 #endif
 2771         } else
 2772                 return (EINVAL);
 2773         return (0);
 2774 }
 2775 
 2776 static void
 2777 fpstate_drop(struct thread *td)
 2778 {
 2779 
 2780         KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
 2781         critical_enter();
 2782 #ifdef DEV_NPX
 2783         if (PCPU_GET(fpcurthread) == td)
 2784                 npxdrop();
 2785 #endif
 2786         /*
 2787          * XXX force a full drop of the npx.  The above only drops it if we
 2788          * owned it.  npxgetregs() has the same bug in the !cpu_fxsr case.
 2789          *
 2790          * XXX I don't much like npxgetregs()'s semantics of doing a full
 2791          * drop.  Dropping only to the pcb matches fnsave's behaviour.
 2792          * We only need to drop to !PCB_INITDONE in sendsig().  But
 2793          * sendsig() is the only caller of npxgetregs()... perhaps we just
 2794          * have too many layers.
 2795          */
 2796         curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
 2797             PCB_NPXUSERINITDONE);
 2798         critical_exit();
 2799 }
 2800 
 2801 int
 2802 fill_dbregs(struct thread *td, struct dbreg *dbregs)
 2803 {
 2804         struct pcb *pcb;
 2805 
 2806         if (td == NULL) {
 2807                 dbregs->dr[0] = rdr0();
 2808                 dbregs->dr[1] = rdr1();
 2809                 dbregs->dr[2] = rdr2();
 2810                 dbregs->dr[3] = rdr3();
 2811                 dbregs->dr[4] = rdr4();
 2812                 dbregs->dr[5] = rdr5();
 2813                 dbregs->dr[6] = rdr6();
 2814                 dbregs->dr[7] = rdr7();
 2815         } else {
 2816                 pcb = td->td_pcb;
 2817                 dbregs->dr[0] = pcb->pcb_dr0;
 2818                 dbregs->dr[1] = pcb->pcb_dr1;
 2819                 dbregs->dr[2] = pcb->pcb_dr2;
 2820                 dbregs->dr[3] = pcb->pcb_dr3;
 2821                 dbregs->dr[4] = 0;
 2822                 dbregs->dr[5] = 0;
 2823                 dbregs->dr[6] = pcb->pcb_dr6;
 2824                 dbregs->dr[7] = pcb->pcb_dr7;
 2825         }
 2826         return (0);
 2827 }
 2828 
 2829 int
 2830 set_dbregs(struct thread *td, struct dbreg *dbregs)
 2831 {
 2832         struct pcb *pcb;
 2833         int i;
 2834 
 2835         if (td == NULL) {
 2836                 load_dr0(dbregs->dr[0]);
 2837                 load_dr1(dbregs->dr[1]);
 2838                 load_dr2(dbregs->dr[2]);
 2839                 load_dr3(dbregs->dr[3]);
 2840                 load_dr4(dbregs->dr[4]);
 2841                 load_dr5(dbregs->dr[5]);
 2842                 load_dr6(dbregs->dr[6]);
 2843                 load_dr7(dbregs->dr[7]);
 2844         } else {
 2845                 /*
 2846                  * Don't let an illegal value for dr7 get set.  Specifically,
 2847                  * check for undefined settings.  Setting these bit patterns
 2848                  * result in undefined behaviour and can lead to an unexpected
 2849                  * TRCTRAP.
 2850                  */
 2851                 for (i = 0; i < 4; i++) {
 2852                         if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
 2853                                 return (EINVAL);
 2854                         if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
 2855                                 return (EINVAL);
 2856                 }
 2857                 
 2858                 pcb = td->td_pcb;
 2859                 
 2860                 /*
 2861                  * Don't let a process set a breakpoint that is not within the
 2862                  * process's address space.  If a process could do this, it
 2863                  * could halt the system by setting a breakpoint in the kernel
 2864                  * (if ddb was enabled).  Thus, we need to check to make sure
 2865                  * that no breakpoints are being enabled for addresses outside
 2866                  * process's address space.
 2867                  *
 2868                  * XXX - what about when the watched area of the user's
 2869                  * address space is written into from within the kernel
 2870                  * ... wouldn't that still cause a breakpoint to be generated
 2871                  * from within kernel mode?
 2872                  */
 2873 
 2874                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
 2875                         /* dr0 is enabled */
 2876                         if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
 2877                                 return (EINVAL);
 2878                 }
 2879                         
 2880                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
 2881                         /* dr1 is enabled */
 2882                         if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
 2883                                 return (EINVAL);
 2884                 }
 2885                         
 2886                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
 2887                         /* dr2 is enabled */
 2888                         if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
 2889                                 return (EINVAL);
 2890                 }
 2891                         
 2892                 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
 2893                         /* dr3 is enabled */
 2894                         if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
 2895                                 return (EINVAL);
 2896                 }
 2897 
 2898                 pcb->pcb_dr0 = dbregs->dr[0];
 2899                 pcb->pcb_dr1 = dbregs->dr[1];
 2900                 pcb->pcb_dr2 = dbregs->dr[2];
 2901                 pcb->pcb_dr3 = dbregs->dr[3];
 2902                 pcb->pcb_dr6 = dbregs->dr[6];
 2903                 pcb->pcb_dr7 = dbregs->dr[7];
 2904 
 2905                 pcb->pcb_flags |= PCB_DBREGS;
 2906         }
 2907 
 2908         return (0);
 2909 }
 2910 
 2911 /*
 2912  * Return > 0 if a hardware breakpoint has been hit, and the
 2913  * breakpoint was in user space.  Return 0, otherwise.
 2914  */
 2915 int
 2916 user_dbreg_trap(void)
 2917 {
 2918         u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
 2919         u_int32_t bp;       /* breakpoint bits extracted from dr6 */
 2920         int nbp;            /* number of breakpoints that triggered */
 2921         caddr_t addr[4];    /* breakpoint addresses */
 2922         int i;
 2923         
 2924         dr7 = rdr7();
 2925         if ((dr7 & 0x000000ff) == 0) {
 2926                 /*
 2927                  * all GE and LE bits in the dr7 register are zero,
 2928                  * thus the trap couldn't have been caused by the
 2929                  * hardware debug registers
 2930                  */
 2931                 return 0;
 2932         }
 2933 
 2934         nbp = 0;
 2935         dr6 = rdr6();
 2936         bp = dr6 & 0x0000000f;
 2937 
 2938         if (!bp) {
 2939                 /*
 2940                  * None of the breakpoint bits are set meaning this
 2941                  * trap was not caused by any of the debug registers
 2942                  */
 2943                 return 0;
 2944         }
 2945 
 2946         /*
 2947          * at least one of the breakpoints were hit, check to see
 2948          * which ones and if any of them are user space addresses
 2949          */
 2950 
 2951         if (bp & 0x01) {
 2952                 addr[nbp++] = (caddr_t)rdr0();
 2953         }
 2954         if (bp & 0x02) {
 2955                 addr[nbp++] = (caddr_t)rdr1();
 2956         }
 2957         if (bp & 0x04) {
 2958                 addr[nbp++] = (caddr_t)rdr2();
 2959         }
 2960         if (bp & 0x08) {
 2961                 addr[nbp++] = (caddr_t)rdr3();
 2962         }
 2963 
 2964         for (i = 0; i < nbp; i++) {
 2965                 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
 2966                         /*
 2967                          * addr[i] is in user space
 2968                          */
 2969                         return nbp;
 2970                 }
 2971         }
 2972 
 2973         /*
 2974          * None of the breakpoints are in user space.
 2975          */
 2976         return 0;
 2977 }
 2978 
 2979 #ifdef KDB
 2980 
 2981 /*
 2982  * Provide inb() and outb() as functions.  They are normally only available as
 2983  * inline functions, thus cannot be called from the debugger.
 2984  */
 2985 
 2986 /* silence compiler warnings */
 2987 u_char inb_(u_short);
 2988 void outb_(u_short, u_char);
 2989 
 2990 u_char
 2991 inb_(u_short port)
 2992 {
 2993         return inb(port);
 2994 }
 2995 
 2996 void
 2997 outb_(u_short port, u_char data)
 2998 {
 2999         outb(port, data);
 3000 }
 3001 
 3002 #endif /* KDB */

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