Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pc98/pc98/machdep.c
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1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD: releng/6.3/sys/pc98/pc98/machdep.c 173221 2007-10-31 11:53:17Z nyan $"); 42 43 #include "opt_atalk.h" 44 #include "opt_compat.h" 45 #include "opt_cpu.h" 46 #include "opt_ddb.h" 47 #include "opt_inet.h" 48 #include "opt_ipx.h" 49 #include "opt_isa.h" 50 #include "opt_kstack_pages.h" 51 #include "opt_maxmem.h" 52 #include "opt_msgbuf.h" 53 #include "opt_npx.h" 54 #include "opt_perfmon.h" 55 56 #include <sys/param.h> 57 #include <sys/proc.h> 58 #include <sys/systm.h> 59 #include <sys/bio.h> 60 #include <sys/buf.h> 61 #include <sys/bus.h> 62 #include <sys/callout.h> 63 #include <sys/cons.h> 64 #include <sys/cpu.h> 65 #include <sys/eventhandler.h> 66 #include <sys/exec.h> 67 #include <sys/imgact.h> 68 #include <sys/kdb.h> 69 #include <sys/kernel.h> 70 #include <sys/ktr.h> 71 #include <sys/linker.h> 72 #include <sys/lock.h> 73 #include <sys/malloc.h> 74 #include <sys/memrange.h> 75 #include <sys/msgbuf.h> 76 #include <sys/mutex.h> 77 #include <sys/pcpu.h> 78 #include <sys/ptrace.h> 79 #include <sys/reboot.h> 80 #include <sys/sched.h> 81 #include <sys/signalvar.h> 82 #include <sys/sysctl.h> 83 #include <sys/sysent.h> 84 #include <sys/sysproto.h> 85 #include <sys/ucontext.h> 86 #include <sys/vmmeter.h> 87 88 #include <vm/vm.h> 89 #include <vm/vm_extern.h> 90 #include <vm/vm_kern.h> 91 #include <vm/vm_page.h> 92 #include <vm/vm_map.h> 93 #include <vm/vm_object.h> 94 #include <vm/vm_pager.h> 95 #include <vm/vm_param.h> 96 97 #ifdef DDB 98 #ifndef KDB 99 #error KDB must be enabled in order for DDB to work! 100 #endif 101 #include <ddb/ddb.h> 102 #include <ddb/db_sym.h> 103 #endif 104 105 #include <pc98/pc98/pc98_machdep.h> 106 107 #include <net/netisr.h> 108 109 #include <machine/bootinfo.h> 110 #include <machine/clock.h> 111 #include <machine/cpu.h> 112 #include <machine/cputypes.h> 113 #include <machine/intr_machdep.h> 114 #include <machine/md_var.h> 115 #include <machine/pc/bios.h> 116 #include <machine/pcb.h> 117 #include <machine/pcb_ext.h> 118 #include <machine/proc.h> 119 #include <machine/reg.h> 120 #include <machine/sigframe.h> 121 #include <machine/specialreg.h> 122 #include <machine/vm86.h> 123 #ifdef PERFMON 124 #include <machine/perfmon.h> 125 #endif 126 #ifdef SMP 127 #include <machine/privatespace.h> 128 #include <machine/smp.h> 129 #endif 130 131 #ifdef DEV_ISA 132 #include <i386/isa/icu.h> 133 #endif 134 135 /* Sanity check for __curthread() */ 136 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 137 138 extern void init386(int first); 139 extern void dblfault_handler(void); 140 141 extern void printcpuinfo(void); /* XXX header file */ 142 extern void finishidentcpu(void); 143 extern void panicifcpuunsupported(void); 144 extern void initializecpu(void); 145 146 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 147 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 148 149 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 150 #define CPU_ENABLE_SSE 151 #endif 152 153 static void cpu_startup(void *); 154 static void fpstate_drop(struct thread *td); 155 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 156 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 157 #ifdef CPU_ENABLE_SSE 158 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 159 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 160 #endif /* CPU_ENABLE_SSE */ 161 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 162 163 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */ 164 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */ 165 166 #ifdef DDB 167 extern vm_offset_t ksym_start, ksym_end; 168 #endif 169 170 int _udatasel, _ucodesel; 171 u_int basemem; 172 173 static int ispc98 = 1; 174 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 175 176 int cold = 1; 177 178 #ifdef COMPAT_43 179 static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code); 180 #endif 181 #ifdef COMPAT_FREEBSD4 182 static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask, 183 u_long code); 184 #endif 185 186 long Maxmem = 0; 187 long realmem = 0; 188 189 #define PHYSMAP_SIZE (2 * 16) 190 191 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 192 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 193 194 /* must be 2 less so 0 0 can signal end of chunks */ 195 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 196 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 197 198 struct kva_md_info kmi; 199 200 static struct trapframe proc0_tf; 201 #ifndef SMP 202 static struct pcpu __pcpu; 203 #endif 204 205 struct mtx icu_lock; 206 207 struct mem_range_softc mem_range_softc; 208 209 static void 210 cpu_startup(dummy) 211 void *dummy; 212 { 213 /* 214 * Good {morning,afternoon,evening,night}. 215 */ 216 startrtclock(); 217 printcpuinfo(); 218 panicifcpuunsupported(); 219 #ifdef PERFMON 220 perfmon_init(); 221 #endif 222 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 223 ptoa((uintmax_t)Maxmem) / 1048576); 224 realmem = Maxmem; 225 /* 226 * Display any holes after the first chunk of extended memory. 227 */ 228 if (bootverbose) { 229 int indx; 230 231 printf("Physical memory chunk(s):\n"); 232 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 233 vm_paddr_t size; 234 235 size = phys_avail[indx + 1] - phys_avail[indx]; 236 printf( 237 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 238 (uintmax_t)phys_avail[indx], 239 (uintmax_t)phys_avail[indx + 1] - 1, 240 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 241 } 242 } 243 244 vm_ksubmap_init(&kmi); 245 246 printf("avail memory = %ju (%ju MB)\n", 247 ptoa((uintmax_t)cnt.v_free_count), 248 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 249 250 /* 251 * Set up buffers, so they can be used to read disk labels. 252 */ 253 bufinit(); 254 vm_pager_bufferinit(); 255 256 cpu_setregs(); 257 } 258 259 /* 260 * Send an interrupt to process. 261 * 262 * Stack is set up to allow sigcode stored 263 * at top to call routine, followed by kcall 264 * to sigreturn routine below. After sigreturn 265 * resets the signal mask, the stack, and the 266 * frame pointer, it returns to the user 267 * specified pc, psl. 268 */ 269 #ifdef COMPAT_43 270 static void 271 osendsig(catcher, sig, mask, code) 272 sig_t catcher; 273 int sig; 274 sigset_t *mask; 275 u_long code; 276 { 277 struct osigframe sf, *fp; 278 struct proc *p; 279 struct thread *td; 280 struct sigacts *psp; 281 struct trapframe *regs; 282 int oonstack; 283 284 td = curthread; 285 p = td->td_proc; 286 PROC_LOCK_ASSERT(p, MA_OWNED); 287 psp = p->p_sigacts; 288 mtx_assert(&psp->ps_mtx, MA_OWNED); 289 regs = td->td_frame; 290 oonstack = sigonstack(regs->tf_esp); 291 292 /* Allocate space for the signal handler context. */ 293 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 294 SIGISMEMBER(psp->ps_sigonstack, sig)) { 295 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 296 td->td_sigstk.ss_size - sizeof(struct osigframe)); 297 #if defined(COMPAT_43) 298 td->td_sigstk.ss_flags |= SS_ONSTACK; 299 #endif 300 } else 301 fp = (struct osigframe *)regs->tf_esp - 1; 302 303 /* Translate the signal if appropriate. */ 304 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 305 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 306 307 /* Build the argument list for the signal handler. */ 308 sf.sf_signum = sig; 309 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 310 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 311 /* Signal handler installed with SA_SIGINFO. */ 312 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 313 sf.sf_siginfo.si_signo = sig; 314 sf.sf_siginfo.si_code = code; 315 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 316 } else { 317 /* Old FreeBSD-style arguments. */ 318 sf.sf_arg2 = code; 319 sf.sf_addr = td->td_md.md_fault_addr; 320 sf.sf_ahu.sf_handler = catcher; 321 } 322 mtx_unlock(&psp->ps_mtx); 323 PROC_UNLOCK(p); 324 325 /* Save most if not all of trap frame. */ 326 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 327 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 328 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 329 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 330 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 331 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 332 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 333 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 334 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 335 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 336 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 337 sf.sf_siginfo.si_sc.sc_gs = rgs(); 338 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 339 340 /* Build the signal context to be used by osigreturn(). */ 341 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 342 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 343 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 344 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 345 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 346 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 347 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 348 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 349 350 /* 351 * If we're a vm86 process, we want to save the segment registers. 352 * We also change eflags to be our emulated eflags, not the actual 353 * eflags. 354 */ 355 if (regs->tf_eflags & PSL_VM) { 356 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 357 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 358 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 359 360 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 361 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 362 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 363 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 364 365 if (vm86->vm86_has_vme == 0) 366 sf.sf_siginfo.si_sc.sc_ps = 367 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 368 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 369 370 /* See sendsig() for comments. */ 371 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 372 } 373 374 /* 375 * Copy the sigframe out to the user's stack. 376 */ 377 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 378 #ifdef DEBUG 379 printf("process %ld has trashed its stack\n", (long)p->p_pid); 380 #endif 381 PROC_LOCK(p); 382 sigexit(td, SIGILL); 383 } 384 385 regs->tf_esp = (int)fp; 386 regs->tf_eip = PS_STRINGS - szosigcode; 387 regs->tf_eflags &= ~PSL_T; 388 regs->tf_cs = _ucodesel; 389 regs->tf_ds = _udatasel; 390 regs->tf_es = _udatasel; 391 regs->tf_fs = _udatasel; 392 load_gs(_udatasel); 393 regs->tf_ss = _udatasel; 394 PROC_LOCK(p); 395 mtx_lock(&psp->ps_mtx); 396 } 397 #endif /* COMPAT_43 */ 398 399 #ifdef COMPAT_FREEBSD4 400 static void 401 freebsd4_sendsig(catcher, sig, mask, code) 402 sig_t catcher; 403 int sig; 404 sigset_t *mask; 405 u_long code; 406 { 407 struct sigframe4 sf, *sfp; 408 struct proc *p; 409 struct thread *td; 410 struct sigacts *psp; 411 struct trapframe *regs; 412 int oonstack; 413 414 td = curthread; 415 p = td->td_proc; 416 PROC_LOCK_ASSERT(p, MA_OWNED); 417 psp = p->p_sigacts; 418 mtx_assert(&psp->ps_mtx, MA_OWNED); 419 regs = td->td_frame; 420 oonstack = sigonstack(regs->tf_esp); 421 422 /* Save user context. */ 423 bzero(&sf, sizeof(sf)); 424 sf.sf_uc.uc_sigmask = *mask; 425 sf.sf_uc.uc_stack = td->td_sigstk; 426 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 427 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 428 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 429 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 430 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 431 432 /* Allocate space for the signal handler context. */ 433 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 434 SIGISMEMBER(psp->ps_sigonstack, sig)) { 435 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 436 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 437 #if defined(COMPAT_43) 438 td->td_sigstk.ss_flags |= SS_ONSTACK; 439 #endif 440 } else 441 sfp = (struct sigframe4 *)regs->tf_esp - 1; 442 443 /* Translate the signal if appropriate. */ 444 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 445 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 446 447 /* Build the argument list for the signal handler. */ 448 sf.sf_signum = sig; 449 sf.sf_ucontext = (register_t)&sfp->sf_uc; 450 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 451 /* Signal handler installed with SA_SIGINFO. */ 452 sf.sf_siginfo = (register_t)&sfp->sf_si; 453 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 454 455 /* Fill in POSIX parts */ 456 sf.sf_si.si_signo = sig; 457 sf.sf_si.si_code = code; 458 sf.sf_si.si_addr = (void *)td->td_md.md_fault_addr; 459 } else { 460 /* Old FreeBSD-style arguments. */ 461 sf.sf_siginfo = code; 462 sf.sf_addr = td->td_md.md_fault_addr; 463 sf.sf_ahu.sf_handler = catcher; 464 } 465 mtx_unlock(&psp->ps_mtx); 466 PROC_UNLOCK(p); 467 468 /* 469 * If we're a vm86 process, we want to save the segment registers. 470 * We also change eflags to be our emulated eflags, not the actual 471 * eflags. 472 */ 473 if (regs->tf_eflags & PSL_VM) { 474 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 475 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 476 477 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 478 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 479 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 480 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 481 482 if (vm86->vm86_has_vme == 0) 483 sf.sf_uc.uc_mcontext.mc_eflags = 484 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 485 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 486 487 /* 488 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 489 * syscalls made by the signal handler. This just avoids 490 * wasting time for our lazy fixup of such faults. PSL_NT 491 * does nothing in vm86 mode, but vm86 programs can set it 492 * almost legitimately in probes for old cpu types. 493 */ 494 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 495 } 496 497 /* 498 * Copy the sigframe out to the user's stack. 499 */ 500 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 501 #ifdef DEBUG 502 printf("process %ld has trashed its stack\n", (long)p->p_pid); 503 #endif 504 PROC_LOCK(p); 505 sigexit(td, SIGILL); 506 } 507 508 regs->tf_esp = (int)sfp; 509 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 510 regs->tf_eflags &= ~PSL_T; 511 regs->tf_cs = _ucodesel; 512 regs->tf_ds = _udatasel; 513 regs->tf_es = _udatasel; 514 regs->tf_fs = _udatasel; 515 regs->tf_ss = _udatasel; 516 PROC_LOCK(p); 517 mtx_lock(&psp->ps_mtx); 518 } 519 #endif /* COMPAT_FREEBSD4 */ 520 521 void 522 sendsig(catcher, sig, mask, code) 523 sig_t catcher; 524 int sig; 525 sigset_t *mask; 526 u_long code; 527 { 528 struct sigframe sf, *sfp; 529 struct proc *p; 530 struct thread *td; 531 struct sigacts *psp; 532 char *sp; 533 struct trapframe *regs; 534 int oonstack; 535 536 td = curthread; 537 p = td->td_proc; 538 PROC_LOCK_ASSERT(p, MA_OWNED); 539 psp = p->p_sigacts; 540 mtx_assert(&psp->ps_mtx, MA_OWNED); 541 #ifdef COMPAT_FREEBSD4 542 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 543 freebsd4_sendsig(catcher, sig, mask, code); 544 return; 545 } 546 #endif 547 #ifdef COMPAT_43 548 if (SIGISMEMBER(psp->ps_osigset, sig)) { 549 osendsig(catcher, sig, mask, code); 550 return; 551 } 552 #endif 553 regs = td->td_frame; 554 oonstack = sigonstack(regs->tf_esp); 555 556 /* Save user context. */ 557 bzero(&sf, sizeof(sf)); 558 sf.sf_uc.uc_sigmask = *mask; 559 sf.sf_uc.uc_stack = td->td_sigstk; 560 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 561 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 562 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 563 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 564 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 565 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 566 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 567 fpstate_drop(td); 568 569 /* Allocate space for the signal handler context. */ 570 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 571 SIGISMEMBER(psp->ps_sigonstack, sig)) { 572 sp = td->td_sigstk.ss_sp + 573 td->td_sigstk.ss_size - sizeof(struct sigframe); 574 #if defined(COMPAT_43) 575 td->td_sigstk.ss_flags |= SS_ONSTACK; 576 #endif 577 } else 578 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 579 /* Align to 16 bytes. */ 580 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 581 582 /* Translate the signal if appropriate. */ 583 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 584 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 585 586 /* Build the argument list for the signal handler. */ 587 sf.sf_signum = sig; 588 sf.sf_ucontext = (register_t)&sfp->sf_uc; 589 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 590 /* Signal handler installed with SA_SIGINFO. */ 591 sf.sf_siginfo = (register_t)&sfp->sf_si; 592 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 593 594 /* Fill in POSIX parts */ 595 sf.sf_si.si_signo = sig; 596 sf.sf_si.si_code = code; 597 sf.sf_si.si_addr = (void *)td->td_md.md_fault_addr; 598 } else { 599 /* Old FreeBSD-style arguments. */ 600 sf.sf_siginfo = code; 601 sf.sf_addr = td->td_md.md_fault_addr; 602 sf.sf_ahu.sf_handler = catcher; 603 } 604 mtx_unlock(&psp->ps_mtx); 605 PROC_UNLOCK(p); 606 607 /* 608 * If we're a vm86 process, we want to save the segment registers. 609 * We also change eflags to be our emulated eflags, not the actual 610 * eflags. 611 */ 612 if (regs->tf_eflags & PSL_VM) { 613 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 614 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 615 616 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 617 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 618 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 619 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 620 621 if (vm86->vm86_has_vme == 0) 622 sf.sf_uc.uc_mcontext.mc_eflags = 623 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 624 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 625 626 /* 627 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 628 * syscalls made by the signal handler. This just avoids 629 * wasting time for our lazy fixup of such faults. PSL_NT 630 * does nothing in vm86 mode, but vm86 programs can set it 631 * almost legitimately in probes for old cpu types. 632 */ 633 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 634 } 635 636 /* 637 * Copy the sigframe out to the user's stack. 638 */ 639 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 640 #ifdef DEBUG 641 printf("process %ld has trashed its stack\n", (long)p->p_pid); 642 #endif 643 PROC_LOCK(p); 644 sigexit(td, SIGILL); 645 } 646 647 regs->tf_esp = (int)sfp; 648 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 649 regs->tf_eflags &= ~PSL_T; 650 regs->tf_cs = _ucodesel; 651 regs->tf_ds = _udatasel; 652 regs->tf_es = _udatasel; 653 regs->tf_fs = _udatasel; 654 regs->tf_ss = _udatasel; 655 PROC_LOCK(p); 656 mtx_lock(&psp->ps_mtx); 657 } 658 659 /* 660 * Build siginfo_t for SA thread 661 */ 662 void 663 cpu_thread_siginfo(int sig, u_long code, siginfo_t *si) 664 { 665 struct proc *p; 666 struct thread *td; 667 668 td = curthread; 669 p = td->td_proc; 670 PROC_LOCK_ASSERT(p, MA_OWNED); 671 672 bzero(si, sizeof(*si)); 673 si->si_signo = sig; 674 si->si_code = code; 675 si->si_addr = (void *)td->td_md.md_fault_addr; 676 /* XXXKSE fill other fields */ 677 } 678 679 /* 680 * System call to cleanup state after a signal 681 * has been taken. Reset signal mask and 682 * stack state from context left by sendsig (above). 683 * Return to previous pc and psl as specified by 684 * context left by sendsig. Check carefully to 685 * make sure that the user has not modified the 686 * state to gain improper privileges. 687 * 688 * MPSAFE 689 */ 690 #ifdef COMPAT_43 691 int 692 osigreturn(td, uap) 693 struct thread *td; 694 struct osigreturn_args /* { 695 struct osigcontext *sigcntxp; 696 } */ *uap; 697 { 698 struct osigcontext sc; 699 struct trapframe *regs; 700 struct osigcontext *scp; 701 struct proc *p = td->td_proc; 702 int eflags, error; 703 704 regs = td->td_frame; 705 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 706 if (error != 0) 707 return (error); 708 scp = ≻ 709 eflags = scp->sc_ps; 710 if (eflags & PSL_VM) { 711 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 712 struct vm86_kernel *vm86; 713 714 /* 715 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 716 * set up the vm86 area, and we can't enter vm86 mode. 717 */ 718 if (td->td_pcb->pcb_ext == 0) 719 return (EINVAL); 720 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 721 if (vm86->vm86_inited == 0) 722 return (EINVAL); 723 724 /* Go back to user mode if both flags are set. */ 725 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 726 trapsignal(td, SIGBUS, 0); 727 728 if (vm86->vm86_has_vme) { 729 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 730 (eflags & VME_USERCHANGE) | PSL_VM; 731 } else { 732 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 733 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 734 (eflags & VM_USERCHANGE) | PSL_VM; 735 } 736 tf->tf_vm86_ds = scp->sc_ds; 737 tf->tf_vm86_es = scp->sc_es; 738 tf->tf_vm86_fs = scp->sc_fs; 739 tf->tf_vm86_gs = scp->sc_gs; 740 tf->tf_ds = _udatasel; 741 tf->tf_es = _udatasel; 742 tf->tf_fs = _udatasel; 743 } else { 744 /* 745 * Don't allow users to change privileged or reserved flags. 746 */ 747 /* 748 * XXX do allow users to change the privileged flag PSL_RF. 749 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 750 * should sometimes set it there too. tf_eflags is kept in 751 * the signal context during signal handling and there is no 752 * other place to remember it, so the PSL_RF bit may be 753 * corrupted by the signal handler without us knowing. 754 * Corruption of the PSL_RF bit at worst causes one more or 755 * one less debugger trap, so allowing it is fairly harmless. 756 */ 757 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 758 return (EINVAL); 759 } 760 761 /* 762 * Don't allow users to load a valid privileged %cs. Let the 763 * hardware check for invalid selectors, excess privilege in 764 * other selectors, invalid %eip's and invalid %esp's. 765 */ 766 if (!CS_SECURE(scp->sc_cs)) { 767 trapsignal(td, SIGBUS, T_PROTFLT); 768 return (EINVAL); 769 } 770 regs->tf_ds = scp->sc_ds; 771 regs->tf_es = scp->sc_es; 772 regs->tf_fs = scp->sc_fs; 773 } 774 775 /* Restore remaining registers. */ 776 regs->tf_eax = scp->sc_eax; 777 regs->tf_ebx = scp->sc_ebx; 778 regs->tf_ecx = scp->sc_ecx; 779 regs->tf_edx = scp->sc_edx; 780 regs->tf_esi = scp->sc_esi; 781 regs->tf_edi = scp->sc_edi; 782 regs->tf_cs = scp->sc_cs; 783 regs->tf_ss = scp->sc_ss; 784 regs->tf_isp = scp->sc_isp; 785 regs->tf_ebp = scp->sc_fp; 786 regs->tf_esp = scp->sc_sp; 787 regs->tf_eip = scp->sc_pc; 788 regs->tf_eflags = eflags; 789 790 PROC_LOCK(p); 791 #if defined(COMPAT_43) 792 if (scp->sc_onstack & 1) 793 td->td_sigstk.ss_flags |= SS_ONSTACK; 794 else 795 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 796 #endif 797 SIGSETOLD(td->td_sigmask, scp->sc_mask); 798 SIG_CANTMASK(td->td_sigmask); 799 signotify(td); 800 PROC_UNLOCK(p); 801 return (EJUSTRETURN); 802 } 803 #endif /* COMPAT_43 */ 804 805 #ifdef COMPAT_FREEBSD4 806 /* 807 * MPSAFE 808 */ 809 int 810 freebsd4_sigreturn(td, uap) 811 struct thread *td; 812 struct freebsd4_sigreturn_args /* { 813 const ucontext4 *sigcntxp; 814 } */ *uap; 815 { 816 struct ucontext4 uc; 817 struct proc *p = td->td_proc; 818 struct trapframe *regs; 819 const struct ucontext4 *ucp; 820 int cs, eflags, error; 821 822 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 823 if (error != 0) 824 return (error); 825 ucp = &uc; 826 regs = td->td_frame; 827 eflags = ucp->uc_mcontext.mc_eflags; 828 if (eflags & PSL_VM) { 829 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 830 struct vm86_kernel *vm86; 831 832 /* 833 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 834 * set up the vm86 area, and we can't enter vm86 mode. 835 */ 836 if (td->td_pcb->pcb_ext == 0) 837 return (EINVAL); 838 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 839 if (vm86->vm86_inited == 0) 840 return (EINVAL); 841 842 /* Go back to user mode if both flags are set. */ 843 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 844 trapsignal(td, SIGBUS, 0); 845 846 if (vm86->vm86_has_vme) { 847 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 848 (eflags & VME_USERCHANGE) | PSL_VM; 849 } else { 850 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 851 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 852 (eflags & VM_USERCHANGE) | PSL_VM; 853 } 854 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 855 tf->tf_eflags = eflags; 856 tf->tf_vm86_ds = tf->tf_ds; 857 tf->tf_vm86_es = tf->tf_es; 858 tf->tf_vm86_fs = tf->tf_fs; 859 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 860 tf->tf_ds = _udatasel; 861 tf->tf_es = _udatasel; 862 tf->tf_fs = _udatasel; 863 } else { 864 /* 865 * Don't allow users to change privileged or reserved flags. 866 */ 867 /* 868 * XXX do allow users to change the privileged flag PSL_RF. 869 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 870 * should sometimes set it there too. tf_eflags is kept in 871 * the signal context during signal handling and there is no 872 * other place to remember it, so the PSL_RF bit may be 873 * corrupted by the signal handler without us knowing. 874 * Corruption of the PSL_RF bit at worst causes one more or 875 * one less debugger trap, so allowing it is fairly harmless. 876 */ 877 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 878 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 879 return (EINVAL); 880 } 881 882 /* 883 * Don't allow users to load a valid privileged %cs. Let the 884 * hardware check for invalid selectors, excess privilege in 885 * other selectors, invalid %eip's and invalid %esp's. 886 */ 887 cs = ucp->uc_mcontext.mc_cs; 888 if (!CS_SECURE(cs)) { 889 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 890 trapsignal(td, SIGBUS, T_PROTFLT); 891 return (EINVAL); 892 } 893 894 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 895 } 896 897 PROC_LOCK(p); 898 #if defined(COMPAT_43) 899 if (ucp->uc_mcontext.mc_onstack & 1) 900 td->td_sigstk.ss_flags |= SS_ONSTACK; 901 else 902 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 903 #endif 904 905 td->td_sigmask = ucp->uc_sigmask; 906 SIG_CANTMASK(td->td_sigmask); 907 signotify(td); 908 PROC_UNLOCK(p); 909 return (EJUSTRETURN); 910 } 911 #endif /* COMPAT_FREEBSD4 */ 912 913 /* 914 * MPSAFE 915 */ 916 int 917 sigreturn(td, uap) 918 struct thread *td; 919 struct sigreturn_args /* { 920 const __ucontext *sigcntxp; 921 } */ *uap; 922 { 923 ucontext_t uc; 924 struct proc *p = td->td_proc; 925 struct trapframe *regs; 926 const ucontext_t *ucp; 927 int cs, eflags, error, ret; 928 929 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 930 if (error != 0) 931 return (error); 932 ucp = &uc; 933 regs = td->td_frame; 934 eflags = ucp->uc_mcontext.mc_eflags; 935 if (eflags & PSL_VM) { 936 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 937 struct vm86_kernel *vm86; 938 939 /* 940 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 941 * set up the vm86 area, and we can't enter vm86 mode. 942 */ 943 if (td->td_pcb->pcb_ext == 0) 944 return (EINVAL); 945 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 946 if (vm86->vm86_inited == 0) 947 return (EINVAL); 948 949 /* Go back to user mode if both flags are set. */ 950 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) 951 trapsignal(td, SIGBUS, 0); 952 953 if (vm86->vm86_has_vme) { 954 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 955 (eflags & VME_USERCHANGE) | PSL_VM; 956 } else { 957 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 958 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 959 (eflags & VM_USERCHANGE) | PSL_VM; 960 } 961 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 962 tf->tf_eflags = eflags; 963 tf->tf_vm86_ds = tf->tf_ds; 964 tf->tf_vm86_es = tf->tf_es; 965 tf->tf_vm86_fs = tf->tf_fs; 966 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 967 tf->tf_ds = _udatasel; 968 tf->tf_es = _udatasel; 969 tf->tf_fs = _udatasel; 970 } else { 971 /* 972 * Don't allow users to change privileged or reserved flags. 973 */ 974 /* 975 * XXX do allow users to change the privileged flag PSL_RF. 976 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 977 * should sometimes set it there too. tf_eflags is kept in 978 * the signal context during signal handling and there is no 979 * other place to remember it, so the PSL_RF bit may be 980 * corrupted by the signal handler without us knowing. 981 * Corruption of the PSL_RF bit at worst causes one more or 982 * one less debugger trap, so allowing it is fairly harmless. 983 */ 984 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 985 printf("sigreturn: eflags = 0x%x\n", eflags); 986 return (EINVAL); 987 } 988 989 /* 990 * Don't allow users to load a valid privileged %cs. Let the 991 * hardware check for invalid selectors, excess privilege in 992 * other selectors, invalid %eip's and invalid %esp's. 993 */ 994 cs = ucp->uc_mcontext.mc_cs; 995 if (!CS_SECURE(cs)) { 996 printf("sigreturn: cs = 0x%x\n", cs); 997 trapsignal(td, SIGBUS, T_PROTFLT); 998 return (EINVAL); 999 } 1000 1001 ret = set_fpcontext(td, &ucp->uc_mcontext); 1002 if (ret != 0) 1003 return (ret); 1004 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1005 } 1006 1007 PROC_LOCK(p); 1008 #if defined(COMPAT_43) 1009 if (ucp->uc_mcontext.mc_onstack & 1) 1010 td->td_sigstk.ss_flags |= SS_ONSTACK; 1011 else 1012 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1013 #endif 1014 1015 td->td_sigmask = ucp->uc_sigmask; 1016 SIG_CANTMASK(td->td_sigmask); 1017 signotify(td); 1018 PROC_UNLOCK(p); 1019 return (EJUSTRETURN); 1020 } 1021 1022 /* 1023 * Machine dependent boot() routine 1024 * 1025 * I haven't seen anything to put here yet 1026 * Possibly some stuff might be grafted back here from boot() 1027 */ 1028 void 1029 cpu_boot(int howto) 1030 { 1031 } 1032 1033 /* Get current clock frequency for the given cpu id. */ 1034 int 1035 cpu_est_clockrate(int cpu_id, uint64_t *rate) 1036 { 1037 register_t reg; 1038 uint64_t tsc1, tsc2; 1039 1040 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1041 return (EINVAL); 1042 if (!tsc_present) 1043 return (EOPNOTSUPP); 1044 1045 /* If we're booting, trust the rate calibrated moments ago. */ 1046 if (cold) { 1047 *rate = tsc_freq; 1048 return (0); 1049 } 1050 1051 #ifdef SMP 1052 /* Schedule ourselves on the indicated cpu. */ 1053 mtx_lock_spin(&sched_lock); 1054 sched_bind(curthread, cpu_id); 1055 mtx_unlock_spin(&sched_lock); 1056 #endif 1057 1058 /* Calibrate by measuring a short delay. */ 1059 reg = intr_disable(); 1060 tsc1 = rdtsc(); 1061 DELAY(1000); 1062 tsc2 = rdtsc(); 1063 intr_restore(reg); 1064 1065 #ifdef SMP 1066 mtx_lock_spin(&sched_lock); 1067 sched_unbind(curthread); 1068 mtx_unlock_spin(&sched_lock); 1069 #endif 1070 1071 /* 1072 * Calculate the difference in readings, convert to Mhz, and 1073 * subtract 0.5% of the total. Empirical testing has shown that 1074 * overhead in DELAY() works out to approximately this value. 1075 */ 1076 tsc2 -= tsc1; 1077 *rate = tsc2 * 1000 - tsc2 * 5; 1078 return (0); 1079 } 1080 1081 /* 1082 * Shutdown the CPU as much as possible 1083 */ 1084 void 1085 cpu_halt(void) 1086 { 1087 for (;;) 1088 __asm__ ("hlt"); 1089 } 1090 1091 /* 1092 * Hook to idle the CPU when possible. In the SMP case we default to 1093 * off because a halted cpu will not currently pick up a new thread in the 1094 * run queue until the next timer tick. If turned on this will result in 1095 * approximately a 4.2% loss in real time performance in buildworld tests 1096 * (but improves user and sys times oddly enough), and saves approximately 1097 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1098 * 1099 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1100 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1101 * Then we can have our cake and eat it too. 1102 * 1103 * XXX I'm turning it on for SMP as well by default for now. It seems to 1104 * help lock contention somewhat, and this is critical for HTT. -Peter 1105 */ 1106 static int cpu_idle_hlt = 1; 1107 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1108 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1109 1110 static void 1111 cpu_idle_default(void) 1112 { 1113 /* 1114 * we must absolutely guarentee that hlt is the 1115 * absolute next instruction after sti or we 1116 * introduce a timing window. 1117 */ 1118 __asm __volatile("sti; hlt"); 1119 } 1120 1121 /* 1122 * Note that we have to be careful here to avoid a race between checking 1123 * sched_runnable() and actually halting. If we don't do this, we may waste 1124 * the time between calling hlt and the next interrupt even though there 1125 * is a runnable process. 1126 */ 1127 void 1128 cpu_idle(void) 1129 { 1130 1131 #ifdef SMP 1132 if (mp_grab_cpu_hlt()) 1133 return; 1134 #endif 1135 1136 if (cpu_idle_hlt) { 1137 disable_intr(); 1138 if (sched_runnable()) 1139 enable_intr(); 1140 else 1141 (*cpu_idle_hook)(); 1142 } 1143 } 1144 1145 /* Other subsystems (e.g., ACPI) can hook this later. */ 1146 void (*cpu_idle_hook)(void) = cpu_idle_default; 1147 1148 /* 1149 * Clear registers on exec 1150 */ 1151 void 1152 exec_setregs(td, entry, stack, ps_strings) 1153 struct thread *td; 1154 u_long entry; 1155 u_long stack; 1156 u_long ps_strings; 1157 { 1158 struct trapframe *regs = td->td_frame; 1159 struct pcb *pcb = td->td_pcb; 1160 1161 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1162 pcb->pcb_gs = _udatasel; 1163 load_gs(_udatasel); 1164 1165 if (td->td_proc->p_md.md_ldt) 1166 user_ldt_free(td); 1167 1168 bzero((char *)regs, sizeof(struct trapframe)); 1169 regs->tf_eip = entry; 1170 regs->tf_esp = stack; 1171 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1172 regs->tf_ss = _udatasel; 1173 regs->tf_ds = _udatasel; 1174 regs->tf_es = _udatasel; 1175 regs->tf_fs = _udatasel; 1176 regs->tf_cs = _ucodesel; 1177 1178 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1179 regs->tf_ebx = ps_strings; 1180 1181 /* 1182 * Reset the hardware debug registers if they were in use. 1183 * They won't have any meaning for the newly exec'd process. 1184 */ 1185 if (pcb->pcb_flags & PCB_DBREGS) { 1186 pcb->pcb_dr0 = 0; 1187 pcb->pcb_dr1 = 0; 1188 pcb->pcb_dr2 = 0; 1189 pcb->pcb_dr3 = 0; 1190 pcb->pcb_dr6 = 0; 1191 pcb->pcb_dr7 = 0; 1192 if (pcb == PCPU_GET(curpcb)) { 1193 /* 1194 * Clear the debug registers on the running 1195 * CPU, otherwise they will end up affecting 1196 * the next process we switch to. 1197 */ 1198 reset_dbregs(); 1199 } 1200 pcb->pcb_flags &= ~PCB_DBREGS; 1201 } 1202 1203 /* 1204 * Initialize the math emulator (if any) for the current process. 1205 * Actually, just clear the bit that says that the emulator has 1206 * been initialized. Initialization is delayed until the process 1207 * traps to the emulator (if it is done at all) mainly because 1208 * emulators don't provide an entry point for initialization. 1209 */ 1210 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1211 1212 /* 1213 * Drop the FP state if we hold it, so that the process gets a 1214 * clean FP state if it uses the FPU again. 1215 */ 1216 fpstate_drop(td); 1217 1218 /* 1219 * XXX - Linux emulator 1220 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1221 * on it. 1222 */ 1223 td->td_retval[1] = 0; 1224 } 1225 1226 void 1227 cpu_setregs(void) 1228 { 1229 unsigned int cr0; 1230 1231 cr0 = rcr0(); 1232 1233 /* 1234 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1235 * 1236 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1237 * instructions. We must set the CR0_MP bit and use the CR0_TS 1238 * bit to control the trap, because setting the CR0_EM bit does 1239 * not cause WAIT instructions to trap. It's important to trap 1240 * WAIT instructions - otherwise the "wait" variants of no-wait 1241 * control instructions would degenerate to the "no-wait" variants 1242 * after FP context switches but work correctly otherwise. It's 1243 * particularly important to trap WAITs when there is no NPX - 1244 * otherwise the "wait" variants would always degenerate. 1245 * 1246 * Try setting CR0_NE to get correct error reporting on 486DX's. 1247 * Setting it should fail or do nothing on lesser processors. 1248 */ 1249 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1250 load_cr0(cr0); 1251 load_gs(_udatasel); 1252 } 1253 1254 static int 1255 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS) 1256 { 1257 int error; 1258 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2, 1259 req); 1260 if (!error && req->newptr) 1261 resettodr(); 1262 return (error); 1263 } 1264 1265 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW, 1266 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", ""); 1267 1268 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set, 1269 CTLFLAG_RW, &disable_rtc_set, 0, ""); 1270 1271 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo, 1272 CTLFLAG_RD, &bootinfo, bootinfo, ""); 1273 1274 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock, 1275 CTLFLAG_RW, &wall_cmos_clock, 0, ""); 1276 1277 u_long bootdev; /* not a struct cdev *- encoding is different */ 1278 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1279 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1280 1281 /* 1282 * Initialize 386 and configure to run kernel 1283 */ 1284 1285 /* 1286 * Initialize segments & interrupt table 1287 */ 1288 1289 int _default_ldt; 1290 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1291 static struct gate_descriptor idt0[NIDT]; 1292 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1293 union descriptor ldt[NLDT]; /* local descriptor table */ 1294 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1295 1296 int private_tss; /* flag indicating private tss */ 1297 1298 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1299 extern int has_f00f_bug; 1300 #endif 1301 1302 static struct i386tss dblfault_tss; 1303 static char dblfault_stack[PAGE_SIZE]; 1304 1305 extern vm_offset_t proc0kstack; 1306 1307 1308 /* 1309 * software prototypes -- in more palatable form. 1310 * 1311 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1312 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1313 */ 1314 struct soft_segment_descriptor gdt_segs[] = { 1315 /* GNULL_SEL 0 Null Descriptor */ 1316 { 0x0, /* segment base address */ 1317 0x0, /* length */ 1318 0, /* segment type */ 1319 0, /* segment descriptor priority level */ 1320 0, /* segment descriptor present */ 1321 0, 0, 1322 0, /* default 32 vs 16 bit size */ 1323 0 /* limit granularity (byte/page units)*/ }, 1324 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1325 { 0x0, /* segment base address */ 1326 0xfffff, /* length - all address space */ 1327 SDT_MEMRWA, /* segment type */ 1328 0, /* segment descriptor priority level */ 1329 1, /* segment descriptor present */ 1330 0, 0, 1331 1, /* default 32 vs 16 bit size */ 1332 1 /* limit granularity (byte/page units)*/ }, 1333 /* GUFS_SEL 2 %fs Descriptor for user */ 1334 { 0x0, /* segment base address */ 1335 0xfffff, /* length - all address space */ 1336 SDT_MEMRWA, /* segment type */ 1337 SEL_UPL, /* segment descriptor priority level */ 1338 1, /* segment descriptor present */ 1339 0, 0, 1340 1, /* default 32 vs 16 bit size */ 1341 1 /* limit granularity (byte/page units)*/ }, 1342 /* GUGS_SEL 3 %gs Descriptor for user */ 1343 { 0x0, /* segment base address */ 1344 0xfffff, /* length - all address space */ 1345 SDT_MEMRWA, /* segment type */ 1346 SEL_UPL, /* segment descriptor priority level */ 1347 1, /* segment descriptor present */ 1348 0, 0, 1349 1, /* default 32 vs 16 bit size */ 1350 1 /* limit granularity (byte/page units)*/ }, 1351 /* GCODE_SEL 4 Code Descriptor for kernel */ 1352 { 0x0, /* segment base address */ 1353 0xfffff, /* length - all address space */ 1354 SDT_MEMERA, /* segment type */ 1355 0, /* segment descriptor priority level */ 1356 1, /* segment descriptor present */ 1357 0, 0, 1358 1, /* default 32 vs 16 bit size */ 1359 1 /* limit granularity (byte/page units)*/ }, 1360 /* GDATA_SEL 5 Data Descriptor for kernel */ 1361 { 0x0, /* segment base address */ 1362 0xfffff, /* length - all address space */ 1363 SDT_MEMRWA, /* segment type */ 1364 0, /* segment descriptor priority level */ 1365 1, /* segment descriptor present */ 1366 0, 0, 1367 1, /* default 32 vs 16 bit size */ 1368 1 /* limit granularity (byte/page units)*/ }, 1369 /* GUCODE_SEL 6 Code Descriptor for user */ 1370 { 0x0, /* segment base address */ 1371 0xfffff, /* length - all address space */ 1372 SDT_MEMERA, /* segment type */ 1373 SEL_UPL, /* segment descriptor priority level */ 1374 1, /* segment descriptor present */ 1375 0, 0, 1376 1, /* default 32 vs 16 bit size */ 1377 1 /* limit granularity (byte/page units)*/ }, 1378 /* GUDATA_SEL 7 Data Descriptor for user */ 1379 { 0x0, /* segment base address */ 1380 0xfffff, /* length - all address space */ 1381 SDT_MEMRWA, /* segment type */ 1382 SEL_UPL, /* segment descriptor priority level */ 1383 1, /* segment descriptor present */ 1384 0, 0, 1385 1, /* default 32 vs 16 bit size */ 1386 1 /* limit granularity (byte/page units)*/ }, 1387 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1388 { 0x400, /* segment base address */ 1389 0xfffff, /* length */ 1390 SDT_MEMRWA, /* segment type */ 1391 0, /* segment descriptor priority level */ 1392 1, /* segment descriptor present */ 1393 0, 0, 1394 1, /* default 32 vs 16 bit size */ 1395 1 /* limit granularity (byte/page units)*/ }, 1396 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1397 { 1398 0x0, /* segment base address */ 1399 sizeof(struct i386tss)-1,/* length */ 1400 SDT_SYS386TSS, /* segment type */ 1401 0, /* segment descriptor priority level */ 1402 1, /* segment descriptor present */ 1403 0, 0, 1404 0, /* unused - default 32 vs 16 bit size */ 1405 0 /* limit granularity (byte/page units)*/ }, 1406 /* GLDT_SEL 10 LDT Descriptor */ 1407 { (int) ldt, /* segment base address */ 1408 sizeof(ldt)-1, /* length - all address space */ 1409 SDT_SYSLDT, /* segment type */ 1410 SEL_UPL, /* segment descriptor priority level */ 1411 1, /* segment descriptor present */ 1412 0, 0, 1413 0, /* unused - default 32 vs 16 bit size */ 1414 0 /* limit granularity (byte/page units)*/ }, 1415 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1416 { (int) ldt, /* segment base address */ 1417 (512 * sizeof(union descriptor)-1), /* length */ 1418 SDT_SYSLDT, /* segment type */ 1419 0, /* segment descriptor priority level */ 1420 1, /* segment descriptor present */ 1421 0, 0, 1422 0, /* unused - default 32 vs 16 bit size */ 1423 0 /* limit granularity (byte/page units)*/ }, 1424 /* GPANIC_SEL 12 Panic Tss Descriptor */ 1425 { (int) &dblfault_tss, /* segment base address */ 1426 sizeof(struct i386tss)-1,/* length - all address space */ 1427 SDT_SYS386TSS, /* segment type */ 1428 0, /* segment descriptor priority level */ 1429 1, /* segment descriptor present */ 1430 0, 0, 1431 0, /* unused - default 32 vs 16 bit size */ 1432 0 /* limit granularity (byte/page units)*/ }, 1433 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1434 { 0, /* segment base address (overwritten) */ 1435 0xfffff, /* length */ 1436 SDT_MEMERA, /* segment type */ 1437 0, /* segment descriptor priority level */ 1438 1, /* segment descriptor present */ 1439 0, 0, 1440 0, /* default 32 vs 16 bit size */ 1441 1 /* limit granularity (byte/page units)*/ }, 1442 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1443 { 0, /* segment base address (overwritten) */ 1444 0xfffff, /* length */ 1445 SDT_MEMERA, /* segment type */ 1446 0, /* segment descriptor priority level */ 1447 1, /* segment descriptor present */ 1448 0, 0, 1449 0, /* default 32 vs 16 bit size */ 1450 1 /* limit granularity (byte/page units)*/ }, 1451 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1452 { 0, /* segment base address (overwritten) */ 1453 0xfffff, /* length */ 1454 SDT_MEMRWA, /* segment type */ 1455 0, /* segment descriptor priority level */ 1456 1, /* segment descriptor present */ 1457 0, 0, 1458 1, /* default 32 vs 16 bit size */ 1459 1 /* limit granularity (byte/page units)*/ }, 1460 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1461 { 0, /* segment base address (overwritten) */ 1462 0xfffff, /* length */ 1463 SDT_MEMRWA, /* segment type */ 1464 0, /* segment descriptor priority level */ 1465 1, /* segment descriptor present */ 1466 0, 0, 1467 0, /* default 32 vs 16 bit size */ 1468 1 /* limit granularity (byte/page units)*/ }, 1469 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1470 { 0, /* segment base address (overwritten) */ 1471 0xfffff, /* length */ 1472 SDT_MEMRWA, /* segment type */ 1473 0, /* segment descriptor priority level */ 1474 1, /* segment descriptor present */ 1475 0, 0, 1476 0, /* default 32 vs 16 bit size */ 1477 1 /* limit granularity (byte/page units)*/ }, 1478 /* GNDIS_SEL 18 NDIS Descriptor */ 1479 { 0x0, /* segment base address */ 1480 0x0, /* length */ 1481 0, /* segment type */ 1482 0, /* segment descriptor priority level */ 1483 0, /* segment descriptor present */ 1484 0, 0, 1485 0, /* default 32 vs 16 bit size */ 1486 0 /* limit granularity (byte/page units)*/ }, 1487 }; 1488 1489 static struct soft_segment_descriptor ldt_segs[] = { 1490 /* Null Descriptor - overwritten by call gate */ 1491 { 0x0, /* segment base address */ 1492 0x0, /* length - all address space */ 1493 0, /* segment type */ 1494 0, /* segment descriptor priority level */ 1495 0, /* segment descriptor present */ 1496 0, 0, 1497 0, /* default 32 vs 16 bit size */ 1498 0 /* limit granularity (byte/page units)*/ }, 1499 /* Null Descriptor - overwritten by call gate */ 1500 { 0x0, /* segment base address */ 1501 0x0, /* length - all address space */ 1502 0, /* segment type */ 1503 0, /* segment descriptor priority level */ 1504 0, /* segment descriptor present */ 1505 0, 0, 1506 0, /* default 32 vs 16 bit size */ 1507 0 /* limit granularity (byte/page units)*/ }, 1508 /* Null Descriptor - overwritten by call gate */ 1509 { 0x0, /* segment base address */ 1510 0x0, /* length - all address space */ 1511 0, /* segment type */ 1512 0, /* segment descriptor priority level */ 1513 0, /* segment descriptor present */ 1514 0, 0, 1515 0, /* default 32 vs 16 bit size */ 1516 0 /* limit granularity (byte/page units)*/ }, 1517 /* Code Descriptor for user */ 1518 { 0x0, /* segment base address */ 1519 0xfffff, /* length - all address space */ 1520 SDT_MEMERA, /* segment type */ 1521 SEL_UPL, /* segment descriptor priority level */ 1522 1, /* segment descriptor present */ 1523 0, 0, 1524 1, /* default 32 vs 16 bit size */ 1525 1 /* limit granularity (byte/page units)*/ }, 1526 /* Null Descriptor - overwritten by call gate */ 1527 { 0x0, /* segment base address */ 1528 0x0, /* length - all address space */ 1529 0, /* segment type */ 1530 0, /* segment descriptor priority level */ 1531 0, /* segment descriptor present */ 1532 0, 0, 1533 0, /* default 32 vs 16 bit size */ 1534 0 /* limit granularity (byte/page units)*/ }, 1535 /* Data Descriptor for user */ 1536 { 0x0, /* segment base address */ 1537 0xfffff, /* length - all address space */ 1538 SDT_MEMRWA, /* segment type */ 1539 SEL_UPL, /* segment descriptor priority level */ 1540 1, /* segment descriptor present */ 1541 0, 0, 1542 1, /* default 32 vs 16 bit size */ 1543 1 /* limit granularity (byte/page units)*/ }, 1544 }; 1545 1546 void 1547 setidt(idx, func, typ, dpl, selec) 1548 int idx; 1549 inthand_t *func; 1550 int typ; 1551 int dpl; 1552 int selec; 1553 { 1554 struct gate_descriptor *ip; 1555 1556 ip = idt + idx; 1557 ip->gd_looffset = (int)func; 1558 ip->gd_selector = selec; 1559 ip->gd_stkcpy = 0; 1560 ip->gd_xx = 0; 1561 ip->gd_type = typ; 1562 ip->gd_dpl = dpl; 1563 ip->gd_p = 1; 1564 ip->gd_hioffset = ((int)func)>>16 ; 1565 } 1566 1567 #define IDTVEC(name) __CONCAT(X,name) 1568 1569 extern inthand_t 1570 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1571 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1572 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1573 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1574 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1575 1576 #ifdef DDB 1577 /* 1578 * Display the index and function name of any IDT entries that don't use 1579 * the default 'rsvd' entry point. 1580 */ 1581 DB_SHOW_COMMAND(idt, db_show_idt) 1582 { 1583 struct gate_descriptor *ip; 1584 int idx, quit; 1585 uintptr_t func; 1586 1587 ip = idt; 1588 db_setup_paging(db_simple_pager, &quit, db_lines_per_page); 1589 for (idx = 0, quit = 0; idx < NIDT; idx++) { 1590 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1591 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1592 db_printf("%3d\t", idx); 1593 db_printsym(func, DB_STGY_PROC); 1594 db_printf("\n"); 1595 } 1596 ip++; 1597 } 1598 } 1599 #endif 1600 1601 void 1602 sdtossd(sd, ssd) 1603 struct segment_descriptor *sd; 1604 struct soft_segment_descriptor *ssd; 1605 { 1606 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1607 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1608 ssd->ssd_type = sd->sd_type; 1609 ssd->ssd_dpl = sd->sd_dpl; 1610 ssd->ssd_p = sd->sd_p; 1611 ssd->ssd_def32 = sd->sd_def32; 1612 ssd->ssd_gran = sd->sd_gran; 1613 } 1614 1615 /* 1616 * Populate the (physmap) array with base/bound pairs describing the 1617 * available physical memory in the system, then test this memory and 1618 * build the phys_avail array describing the actually-available memory. 1619 * 1620 * If we cannot accurately determine the physical memory map, then use 1621 * value from the 0xE801 call, and failing that, the RTC. 1622 * 1623 * Total memory size may be set by the kernel environment variable 1624 * hw.physmem or the compile-time define MAXMEM. 1625 * 1626 * XXX first should be vm_paddr_t. 1627 */ 1628 static void 1629 getmemsize(int first) 1630 { 1631 int i, physmap_idx, pa_indx, da_indx; 1632 int pg_n; 1633 u_long physmem_tunable; 1634 u_int extmem, under16; 1635 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1636 pt_entry_t *pte; 1637 quad_t dcons_addr, dcons_size; 1638 1639 bzero(physmap, sizeof(physmap)); 1640 1641 /* XXX - some of EPSON machines can't use PG_N */ 1642 pg_n = PG_N; 1643 if (pc98_machine_type & M_EPSON_PC98) { 1644 switch (epson_machine_id) { 1645 #ifdef WB_CACHE 1646 default: 1647 #endif 1648 case EPSON_PC486_HX: 1649 case EPSON_PC486_HG: 1650 case EPSON_PC486_HA: 1651 pg_n = 0; 1652 break; 1653 } 1654 } 1655 1656 /* 1657 * Perform "base memory" related probes & setup 1658 */ 1659 under16 = pc98_getmemsize(&basemem, &extmem); 1660 if (basemem > 640) { 1661 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1662 basemem); 1663 basemem = 640; 1664 } 1665 1666 /* 1667 * XXX if biosbasemem is now < 640, there is a `hole' 1668 * between the end of base memory and the start of 1669 * ISA memory. The hole may be empty or it may 1670 * contain BIOS code or data. Map it read/write so 1671 * that the BIOS can write to it. (Memory from 0 to 1672 * the physical end of the kernel is mapped read-only 1673 * to begin with and then parts of it are remapped. 1674 * The parts that aren't remapped form holes that 1675 * remain read-only and are unused by the kernel. 1676 * The base memory area is below the physical end of 1677 * the kernel and right now forms a read-only hole. 1678 * The part of it from PAGE_SIZE to 1679 * (trunc_page(biosbasemem * 1024) - 1) will be 1680 * remapped and used by the kernel later.) 1681 * 1682 * This code is similar to the code used in 1683 * pmap_mapdev, but since no memory needs to be 1684 * allocated we simply change the mapping. 1685 */ 1686 for (pa = trunc_page(basemem * 1024); 1687 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1688 pmap_kenter(KERNBASE + pa, pa); 1689 1690 /* 1691 * if basemem != 640, map pages r/w into vm86 page table so 1692 * that the bios can scribble on it. 1693 */ 1694 pte = (pt_entry_t *)vm86paddr; 1695 for (i = basemem / 4; i < 160; i++) 1696 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1697 1698 physmap[0] = 0; 1699 physmap[1] = basemem * 1024; 1700 physmap_idx = 2; 1701 physmap[physmap_idx] = 0x100000; 1702 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1703 1704 /* 1705 * Now, physmap contains a map of physical memory. 1706 */ 1707 1708 #ifdef SMP 1709 /* make hole for AP bootstrap code */ 1710 physmap[1] = mp_bootaddress(physmap[1]); 1711 #endif 1712 1713 /* 1714 * Maxmem isn't the "maximum memory", it's one larger than the 1715 * highest page of the physical address space. It should be 1716 * called something like "Maxphyspage". We may adjust this 1717 * based on ``hw.physmem'' and the results of the memory test. 1718 */ 1719 Maxmem = atop(physmap[physmap_idx + 1]); 1720 1721 #ifdef MAXMEM 1722 Maxmem = MAXMEM / 4; 1723 #endif 1724 1725 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1726 Maxmem = atop(physmem_tunable); 1727 1728 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1729 (boothowto & RB_VERBOSE)) 1730 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1731 1732 /* 1733 * If Maxmem has been increased beyond what the system has detected, 1734 * extend the last memory segment to the new limit. 1735 */ 1736 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1737 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1738 1739 /* 1740 * We need to divide chunk if Maxmem is larger than 16MB and 1741 * under 16MB area is not full of memory. 1742 * (1) system area (15-16MB region) is cut off 1743 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY") 1744 */ 1745 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) { 1746 /* 15M - 16M region is cut off, so need to divide chunk */ 1747 physmap[physmap_idx + 1] = under16 * 1024; 1748 physmap_idx += 2; 1749 physmap[physmap_idx] = 0x1000000; 1750 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024; 1751 } 1752 1753 /* call pmap initialization to make new kernel address space */ 1754 pmap_bootstrap(first, 0); 1755 1756 /* 1757 * Size up each available chunk of physical memory. 1758 */ 1759 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1760 pa_indx = 0; 1761 da_indx = 1; 1762 phys_avail[pa_indx++] = physmap[0]; 1763 phys_avail[pa_indx] = physmap[0]; 1764 dump_avail[da_indx] = physmap[0]; 1765 pte = CMAP1; 1766 1767 /* 1768 * Get dcons buffer address 1769 */ 1770 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1771 getenv_quad("dcons.size", &dcons_size) == 0) 1772 dcons_addr = 0; 1773 1774 /* 1775 * physmap is in bytes, so when converting to page boundaries, 1776 * round up the start address and round down the end address. 1777 */ 1778 for (i = 0; i <= physmap_idx; i += 2) { 1779 vm_paddr_t end; 1780 1781 end = ptoa((vm_paddr_t)Maxmem); 1782 if (physmap[i + 1] < end) 1783 end = trunc_page(physmap[i + 1]); 1784 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1785 int tmp, page_bad, full; 1786 int *ptr = (int *)CADDR1; 1787 1788 full = FALSE; 1789 /* 1790 * block out kernel memory as not available. 1791 */ 1792 if (pa >= KERNLOAD && pa < first) 1793 goto do_dump_avail; 1794 1795 /* 1796 * block out dcons buffer 1797 */ 1798 if (dcons_addr > 0 1799 && pa >= trunc_page(dcons_addr) 1800 && pa < dcons_addr + dcons_size) 1801 goto do_dump_avail; 1802 1803 page_bad = FALSE; 1804 1805 /* 1806 * map page into kernel: valid, read/write,non-cacheable 1807 */ 1808 *pte = pa | PG_V | PG_RW | pg_n; 1809 invltlb(); 1810 1811 tmp = *(int *)ptr; 1812 /* 1813 * Test for alternating 1's and 0's 1814 */ 1815 *(volatile int *)ptr = 0xaaaaaaaa; 1816 if (*(volatile int *)ptr != 0xaaaaaaaa) 1817 page_bad = TRUE; 1818 /* 1819 * Test for alternating 0's and 1's 1820 */ 1821 *(volatile int *)ptr = 0x55555555; 1822 if (*(volatile int *)ptr != 0x55555555) 1823 page_bad = TRUE; 1824 /* 1825 * Test for all 1's 1826 */ 1827 *(volatile int *)ptr = 0xffffffff; 1828 if (*(volatile int *)ptr != 0xffffffff) 1829 page_bad = TRUE; 1830 /* 1831 * Test for all 0's 1832 */ 1833 *(volatile int *)ptr = 0x0; 1834 if (*(volatile int *)ptr != 0x0) 1835 page_bad = TRUE; 1836 /* 1837 * Restore original value. 1838 */ 1839 *(int *)ptr = tmp; 1840 1841 /* 1842 * Adjust array of valid/good pages. 1843 */ 1844 if (page_bad == TRUE) 1845 continue; 1846 /* 1847 * If this good page is a continuation of the 1848 * previous set of good pages, then just increase 1849 * the end pointer. Otherwise start a new chunk. 1850 * Note that "end" points one higher than end, 1851 * making the range >= start and < end. 1852 * If we're also doing a speculative memory 1853 * test and we at or past the end, bump up Maxmem 1854 * so that we keep going. The first bad page 1855 * will terminate the loop. 1856 */ 1857 if (phys_avail[pa_indx] == pa) { 1858 phys_avail[pa_indx] += PAGE_SIZE; 1859 } else { 1860 pa_indx++; 1861 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1862 printf( 1863 "Too many holes in the physical address space, giving up\n"); 1864 pa_indx--; 1865 full = TRUE; 1866 goto do_dump_avail; 1867 } 1868 phys_avail[pa_indx++] = pa; /* start */ 1869 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1870 } 1871 physmem++; 1872 do_dump_avail: 1873 if (dump_avail[da_indx] == pa) { 1874 dump_avail[da_indx] += PAGE_SIZE; 1875 } else { 1876 da_indx++; 1877 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1878 da_indx--; 1879 goto do_next; 1880 } 1881 dump_avail[da_indx++] = pa; /* start */ 1882 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1883 } 1884 do_next: 1885 if (full) 1886 break; 1887 } 1888 } 1889 *pte = 0; 1890 invltlb(); 1891 1892 /* 1893 * XXX 1894 * The last chunk must contain at least one page plus the message 1895 * buffer to avoid complicating other code (message buffer address 1896 * calculation, etc.). 1897 */ 1898 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1899 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1900 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1901 phys_avail[pa_indx--] = 0; 1902 phys_avail[pa_indx--] = 0; 1903 } 1904 1905 Maxmem = atop(phys_avail[pa_indx]); 1906 1907 /* Trim off space for the message buffer. */ 1908 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1909 1910 avail_end = phys_avail[pa_indx]; 1911 } 1912 1913 void 1914 init386(first) 1915 int first; 1916 { 1917 struct gate_descriptor *gdp; 1918 int gsel_tss, metadata_missing, off, x; 1919 struct pcpu *pc; 1920 1921 thread0.td_kstack = proc0kstack; 1922 thread0.td_pcb = (struct pcb *) 1923 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1924 1925 /* 1926 * This may be done better later if it gets more high level 1927 * components in it. If so just link td->td_proc here. 1928 */ 1929 proc_linkup(&proc0, &ksegrp0, &thread0); 1930 1931 /* 1932 * Initialize DMAC 1933 */ 1934 pc98_init_dmac(); 1935 1936 metadata_missing = 0; 1937 if (bootinfo.bi_modulep) { 1938 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1939 preload_bootstrap_relocate(KERNBASE); 1940 } else { 1941 metadata_missing = 1; 1942 } 1943 if (envmode == 1) 1944 kern_envp = static_env; 1945 else if (bootinfo.bi_envp) 1946 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1947 1948 /* Init basic tunables, hz etc */ 1949 init_param1(); 1950 1951 /* 1952 * Make gdt memory segments. All segments cover the full 4GB 1953 * of address space and permissions are enforced at page level. 1954 */ 1955 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1956 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1957 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 1958 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 1959 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 1960 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 1961 1962 #ifdef SMP 1963 pc = &SMP_prvspace[0].pcpu; 1964 #else 1965 pc = &__pcpu; 1966 #endif 1967 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 1968 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 1969 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 1970 1971 for (x = 0; x < NGDT; x++) 1972 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1973 1974 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1975 r_gdt.rd_base = (int) gdt; 1976 lgdt(&r_gdt); 1977 1978 pcpu_init(pc, 0, sizeof(struct pcpu)); 1979 PCPU_SET(prvspace, pc); 1980 PCPU_SET(curthread, &thread0); 1981 PCPU_SET(curpcb, thread0.td_pcb); 1982 1983 /* 1984 * Initialize mutexes. 1985 * 1986 * icu_lock: in order to allow an interrupt to occur in a critical 1987 * section, to set pcpu->ipending (etc...) properly, we 1988 * must be able to get the icu lock, so it can't be 1989 * under witness. 1990 */ 1991 mutex_init(); 1992 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN); 1993 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS); 1994 1995 /* make ldt memory segments */ 1996 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 1997 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 1998 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1999 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2000 2001 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2002 lldt(_default_ldt); 2003 PCPU_SET(currentldt, _default_ldt); 2004 2005 /* exceptions */ 2006 for (x = 0; x < NIDT; x++) 2007 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2008 GSEL(GCODE_SEL, SEL_KPL)); 2009 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2010 GSEL(GCODE_SEL, SEL_KPL)); 2011 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2012 GSEL(GCODE_SEL, SEL_KPL)); 2013 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2014 GSEL(GCODE_SEL, SEL_KPL)); 2015 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2016 GSEL(GCODE_SEL, SEL_KPL)); 2017 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2018 GSEL(GCODE_SEL, SEL_KPL)); 2019 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2020 GSEL(GCODE_SEL, SEL_KPL)); 2021 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2022 GSEL(GCODE_SEL, SEL_KPL)); 2023 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2024 , GSEL(GCODE_SEL, SEL_KPL)); 2025 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2026 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2027 GSEL(GCODE_SEL, SEL_KPL)); 2028 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2029 GSEL(GCODE_SEL, SEL_KPL)); 2030 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2031 GSEL(GCODE_SEL, SEL_KPL)); 2032 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2033 GSEL(GCODE_SEL, SEL_KPL)); 2034 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2035 GSEL(GCODE_SEL, SEL_KPL)); 2036 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2037 GSEL(GCODE_SEL, SEL_KPL)); 2038 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2039 GSEL(GCODE_SEL, SEL_KPL)); 2040 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2041 GSEL(GCODE_SEL, SEL_KPL)); 2042 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2043 GSEL(GCODE_SEL, SEL_KPL)); 2044 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2045 GSEL(GCODE_SEL, SEL_KPL)); 2046 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2047 GSEL(GCODE_SEL, SEL_KPL)); 2048 2049 r_idt.rd_limit = sizeof(idt0) - 1; 2050 r_idt.rd_base = (int) idt; 2051 lidt(&r_idt); 2052 2053 /* 2054 * Initialize the console before we print anything out. 2055 */ 2056 cninit(); 2057 2058 if (metadata_missing) 2059 printf("WARNING: loader(8) metadata is missing!\n"); 2060 2061 #ifdef DEV_ISA 2062 atpic_startup(); 2063 #endif 2064 2065 #ifdef DDB 2066 ksym_start = bootinfo.bi_symtab; 2067 ksym_end = bootinfo.bi_esymtab; 2068 #endif 2069 2070 kdb_init(); 2071 2072 #ifdef KDB 2073 if (boothowto & RB_KDB) 2074 kdb_enter("Boot flags requested debugger"); 2075 #endif 2076 2077 finishidentcpu(); /* Final stage of CPU initialization */ 2078 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2079 GSEL(GCODE_SEL, SEL_KPL)); 2080 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2081 GSEL(GCODE_SEL, SEL_KPL)); 2082 initializecpu(); /* Initialize CPU registers */ 2083 2084 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2085 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2086 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2087 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2088 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2089 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2090 private_tss = 0; 2091 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2092 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2093 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2094 ltr(gsel_tss); 2095 2096 /* pointer to selector slot for %fs/%gs */ 2097 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2098 2099 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2100 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2101 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2102 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2103 dblfault_tss.tss_cr3 = (int)IdlePTD; 2104 dblfault_tss.tss_eip = (int)dblfault_handler; 2105 dblfault_tss.tss_eflags = PSL_KERNEL; 2106 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2107 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2108 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2109 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2110 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2111 2112 vm86_initialize(); 2113 getmemsize(first); 2114 init_param2(physmem); 2115 2116 /* now running on new page tables, configured,and u/iom is accessible */ 2117 2118 /* Map the message buffer. */ 2119 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 2120 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off); 2121 2122 msgbufinit(msgbufp, MSGBUF_SIZE); 2123 2124 /* make a call gate to reenter kernel with */ 2125 gdp = &ldt[LSYS5CALLS_SEL].gd; 2126 2127 x = (int) &IDTVEC(lcall_syscall); 2128 gdp->gd_looffset = x; 2129 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2130 gdp->gd_stkcpy = 1; 2131 gdp->gd_type = SDT_SYS386CGT; 2132 gdp->gd_dpl = SEL_UPL; 2133 gdp->gd_p = 1; 2134 gdp->gd_hioffset = x >> 16; 2135 2136 /* XXX does this work? */ 2137 /* XXX yes! */ 2138 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2139 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2140 2141 /* transfer to user mode */ 2142 2143 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2144 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2145 2146 /* setup proc 0's pcb */ 2147 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 2148 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2149 thread0.td_pcb->pcb_ext = 0; 2150 thread0.td_frame = &proc0_tf; 2151 } 2152 2153 void 2154 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2155 { 2156 2157 } 2158 2159 void 2160 spinlock_enter(void) 2161 { 2162 struct thread *td; 2163 2164 td = curthread; 2165 if (td->td_md.md_spinlock_count == 0) 2166 td->td_md.md_saved_flags = intr_disable(); 2167 td->td_md.md_spinlock_count++; 2168 critical_enter(); 2169 } 2170 2171 void 2172 spinlock_exit(void) 2173 { 2174 struct thread *td; 2175 2176 td = curthread; 2177 critical_exit(); 2178 td->td_md.md_spinlock_count--; 2179 if (td->td_md.md_spinlock_count == 0) 2180 intr_restore(td->td_md.md_saved_flags); 2181 } 2182 2183 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2184 static void f00f_hack(void *unused); 2185 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL) 2186 2187 static void 2188 f00f_hack(void *unused) 2189 { 2190 struct gate_descriptor *new_idt; 2191 vm_offset_t tmp; 2192 2193 if (!has_f00f_bug) 2194 return; 2195 2196 GIANT_REQUIRED; 2197 2198 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2199 2200 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2201 if (tmp == 0) 2202 panic("kmem_alloc returned 0"); 2203 2204 /* Put the problematic entry (#6) at the end of the lower page. */ 2205 new_idt = (struct gate_descriptor*) 2206 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2207 bcopy(idt, new_idt, sizeof(idt0)); 2208 r_idt.rd_base = (u_int)new_idt; 2209 lidt(&r_idt); 2210 idt = new_idt; 2211 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2212 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2213 panic("vm_map_protect failed"); 2214 } 2215 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2216 2217 /* 2218 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2219 * we want to start a backtrace from the function that caused us to enter 2220 * the debugger. We have the context in the trapframe, but base the trace 2221 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2222 * enough for a backtrace. 2223 */ 2224 void 2225 makectx(struct trapframe *tf, struct pcb *pcb) 2226 { 2227 2228 pcb->pcb_edi = tf->tf_edi; 2229 pcb->pcb_esi = tf->tf_esi; 2230 pcb->pcb_ebp = tf->tf_ebp; 2231 pcb->pcb_ebx = tf->tf_ebx; 2232 pcb->pcb_eip = tf->tf_eip; 2233 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2234 } 2235 2236 int 2237 ptrace_set_pc(struct thread *td, u_long addr) 2238 { 2239 2240 td->td_frame->tf_eip = addr; 2241 return (0); 2242 } 2243 2244 int 2245 ptrace_single_step(struct thread *td) 2246 { 2247 td->td_frame->tf_eflags |= PSL_T; 2248 return (0); 2249 } 2250 2251 int 2252 ptrace_clear_single_step(struct thread *td) 2253 { 2254 td->td_frame->tf_eflags &= ~PSL_T; 2255 return (0); 2256 } 2257 2258 int 2259 fill_regs(struct thread *td, struct reg *regs) 2260 { 2261 struct pcb *pcb; 2262 struct trapframe *tp; 2263 2264 tp = td->td_frame; 2265 pcb = td->td_pcb; 2266 regs->r_fs = tp->tf_fs; 2267 regs->r_es = tp->tf_es; 2268 regs->r_ds = tp->tf_ds; 2269 regs->r_edi = tp->tf_edi; 2270 regs->r_esi = tp->tf_esi; 2271 regs->r_ebp = tp->tf_ebp; 2272 regs->r_ebx = tp->tf_ebx; 2273 regs->r_edx = tp->tf_edx; 2274 regs->r_ecx = tp->tf_ecx; 2275 regs->r_eax = tp->tf_eax; 2276 regs->r_eip = tp->tf_eip; 2277 regs->r_cs = tp->tf_cs; 2278 regs->r_eflags = tp->tf_eflags; 2279 regs->r_esp = tp->tf_esp; 2280 regs->r_ss = tp->tf_ss; 2281 regs->r_gs = pcb->pcb_gs; 2282 return (0); 2283 } 2284 2285 int 2286 set_regs(struct thread *td, struct reg *regs) 2287 { 2288 struct pcb *pcb; 2289 struct trapframe *tp; 2290 2291 tp = td->td_frame; 2292 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2293 !CS_SECURE(regs->r_cs)) 2294 return (EINVAL); 2295 pcb = td->td_pcb; 2296 tp->tf_fs = regs->r_fs; 2297 tp->tf_es = regs->r_es; 2298 tp->tf_ds = regs->r_ds; 2299 tp->tf_edi = regs->r_edi; 2300 tp->tf_esi = regs->r_esi; 2301 tp->tf_ebp = regs->r_ebp; 2302 tp->tf_ebx = regs->r_ebx; 2303 tp->tf_edx = regs->r_edx; 2304 tp->tf_ecx = regs->r_ecx; 2305 tp->tf_eax = regs->r_eax; 2306 tp->tf_eip = regs->r_eip; 2307 tp->tf_cs = regs->r_cs; 2308 tp->tf_eflags = regs->r_eflags; 2309 tp->tf_esp = regs->r_esp; 2310 tp->tf_ss = regs->r_ss; 2311 pcb->pcb_gs = regs->r_gs; 2312 return (0); 2313 } 2314 2315 #ifdef CPU_ENABLE_SSE 2316 static void 2317 fill_fpregs_xmm(sv_xmm, sv_87) 2318 struct savexmm *sv_xmm; 2319 struct save87 *sv_87; 2320 { 2321 register struct env87 *penv_87 = &sv_87->sv_env; 2322 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2323 int i; 2324 2325 bzero(sv_87, sizeof(*sv_87)); 2326 2327 /* FPU control/status */ 2328 penv_87->en_cw = penv_xmm->en_cw; 2329 penv_87->en_sw = penv_xmm->en_sw; 2330 penv_87->en_tw = penv_xmm->en_tw; 2331 penv_87->en_fip = penv_xmm->en_fip; 2332 penv_87->en_fcs = penv_xmm->en_fcs; 2333 penv_87->en_opcode = penv_xmm->en_opcode; 2334 penv_87->en_foo = penv_xmm->en_foo; 2335 penv_87->en_fos = penv_xmm->en_fos; 2336 2337 /* FPU registers */ 2338 for (i = 0; i < 8; ++i) 2339 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2340 } 2341 2342 static void 2343 set_fpregs_xmm(sv_87, sv_xmm) 2344 struct save87 *sv_87; 2345 struct savexmm *sv_xmm; 2346 { 2347 register struct env87 *penv_87 = &sv_87->sv_env; 2348 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2349 int i; 2350 2351 /* FPU control/status */ 2352 penv_xmm->en_cw = penv_87->en_cw; 2353 penv_xmm->en_sw = penv_87->en_sw; 2354 penv_xmm->en_tw = penv_87->en_tw; 2355 penv_xmm->en_fip = penv_87->en_fip; 2356 penv_xmm->en_fcs = penv_87->en_fcs; 2357 penv_xmm->en_opcode = penv_87->en_opcode; 2358 penv_xmm->en_foo = penv_87->en_foo; 2359 penv_xmm->en_fos = penv_87->en_fos; 2360 2361 /* FPU registers */ 2362 for (i = 0; i < 8; ++i) 2363 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2364 } 2365 #endif /* CPU_ENABLE_SSE */ 2366 2367 int 2368 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2369 { 2370 #ifdef CPU_ENABLE_SSE 2371 if (cpu_fxsr) { 2372 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2373 (struct save87 *)fpregs); 2374 return (0); 2375 } 2376 #endif /* CPU_ENABLE_SSE */ 2377 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2378 return (0); 2379 } 2380 2381 int 2382 set_fpregs(struct thread *td, struct fpreg *fpregs) 2383 { 2384 #ifdef CPU_ENABLE_SSE 2385 if (cpu_fxsr) { 2386 set_fpregs_xmm((struct save87 *)fpregs, 2387 &td->td_pcb->pcb_save.sv_xmm); 2388 return (0); 2389 } 2390 #endif /* CPU_ENABLE_SSE */ 2391 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2392 return (0); 2393 } 2394 2395 /* 2396 * Get machine context. 2397 */ 2398 int 2399 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2400 { 2401 struct trapframe *tp; 2402 2403 tp = td->td_frame; 2404 2405 PROC_LOCK(curthread->td_proc); 2406 mcp->mc_onstack = sigonstack(tp->tf_esp); 2407 PROC_UNLOCK(curthread->td_proc); 2408 mcp->mc_gs = td->td_pcb->pcb_gs; 2409 mcp->mc_fs = tp->tf_fs; 2410 mcp->mc_es = tp->tf_es; 2411 mcp->mc_ds = tp->tf_ds; 2412 mcp->mc_edi = tp->tf_edi; 2413 mcp->mc_esi = tp->tf_esi; 2414 mcp->mc_ebp = tp->tf_ebp; 2415 mcp->mc_isp = tp->tf_isp; 2416 mcp->mc_eflags = tp->tf_eflags; 2417 if (flags & GET_MC_CLEAR_RET) { 2418 mcp->mc_eax = 0; 2419 mcp->mc_edx = 0; 2420 mcp->mc_eflags &= ~PSL_C; 2421 } else { 2422 mcp->mc_eax = tp->tf_eax; 2423 mcp->mc_edx = tp->tf_edx; 2424 } 2425 mcp->mc_ebx = tp->tf_ebx; 2426 mcp->mc_ecx = tp->tf_ecx; 2427 mcp->mc_eip = tp->tf_eip; 2428 mcp->mc_cs = tp->tf_cs; 2429 mcp->mc_esp = tp->tf_esp; 2430 mcp->mc_ss = tp->tf_ss; 2431 mcp->mc_len = sizeof(*mcp); 2432 get_fpcontext(td, mcp); 2433 return (0); 2434 } 2435 2436 /* 2437 * Set machine context. 2438 * 2439 * However, we don't set any but the user modifiable flags, and we won't 2440 * touch the cs selector. 2441 */ 2442 int 2443 set_mcontext(struct thread *td, const mcontext_t *mcp) 2444 { 2445 struct trapframe *tp; 2446 int eflags, ret; 2447 2448 tp = td->td_frame; 2449 if (mcp->mc_len != sizeof(*mcp)) 2450 return (EINVAL); 2451 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2452 (tp->tf_eflags & ~PSL_USERCHANGE); 2453 if ((ret = set_fpcontext(td, mcp)) == 0) { 2454 tp->tf_fs = mcp->mc_fs; 2455 tp->tf_es = mcp->mc_es; 2456 tp->tf_ds = mcp->mc_ds; 2457 tp->tf_edi = mcp->mc_edi; 2458 tp->tf_esi = mcp->mc_esi; 2459 tp->tf_ebp = mcp->mc_ebp; 2460 tp->tf_ebx = mcp->mc_ebx; 2461 tp->tf_edx = mcp->mc_edx; 2462 tp->tf_ecx = mcp->mc_ecx; 2463 tp->tf_eax = mcp->mc_eax; 2464 tp->tf_eip = mcp->mc_eip; 2465 tp->tf_eflags = eflags; 2466 tp->tf_esp = mcp->mc_esp; 2467 tp->tf_ss = mcp->mc_ss; 2468 td->td_pcb->pcb_gs = mcp->mc_gs; 2469 ret = 0; 2470 } 2471 return (ret); 2472 } 2473 2474 static void 2475 get_fpcontext(struct thread *td, mcontext_t *mcp) 2476 { 2477 #ifndef DEV_NPX 2478 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2479 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2480 #else 2481 union savefpu *addr; 2482 2483 /* 2484 * XXX mc_fpstate might be misaligned, since its declaration is not 2485 * unportabilized using __attribute__((aligned(16))) like the 2486 * declaration of struct savemm, and anyway, alignment doesn't work 2487 * for auto variables since we don't use gcc's pessimal stack 2488 * alignment. Work around this by abusing the spare fields after 2489 * mcp->mc_fpstate. 2490 * 2491 * XXX unpessimize most cases by only aligning when fxsave might be 2492 * called, although this requires knowing too much about 2493 * npxgetregs()'s internals. 2494 */ 2495 addr = (union savefpu *)&mcp->mc_fpstate; 2496 if (td == PCPU_GET(fpcurthread) && 2497 #ifdef CPU_ENABLE_SSE 2498 cpu_fxsr && 2499 #endif 2500 ((uintptr_t)(void *)addr & 0xF)) { 2501 do 2502 addr = (void *)((char *)addr + 4); 2503 while ((uintptr_t)(void *)addr & 0xF); 2504 } 2505 mcp->mc_ownedfp = npxgetregs(td, addr); 2506 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2507 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2508 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2509 } 2510 mcp->mc_fpformat = npxformat(); 2511 #endif 2512 } 2513 2514 static int 2515 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2516 { 2517 union savefpu *addr; 2518 2519 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2520 return (0); 2521 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2522 mcp->mc_fpformat != _MC_FPFMT_XMM) 2523 return (EINVAL); 2524 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2525 /* We don't care what state is left in the FPU or PCB. */ 2526 fpstate_drop(td); 2527 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2528 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2529 /* XXX align as above. */ 2530 addr = (union savefpu *)&mcp->mc_fpstate; 2531 if (td == PCPU_GET(fpcurthread) && 2532 #ifdef CPU_ENABLE_SSE 2533 cpu_fxsr && 2534 #endif 2535 ((uintptr_t)(void *)addr & 0xF)) { 2536 do 2537 addr = (void *)((char *)addr + 4); 2538 while ((uintptr_t)(void *)addr & 0xF); 2539 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2540 } 2541 #ifdef DEV_NPX 2542 /* 2543 * XXX we violate the dubious requirement that npxsetregs() 2544 * be called with interrupts disabled. 2545 */ 2546 npxsetregs(td, addr); 2547 #endif 2548 /* 2549 * Don't bother putting things back where they were in the 2550 * misaligned case, since we know that the caller won't use 2551 * them again. 2552 */ 2553 } else 2554 return (EINVAL); 2555 return (0); 2556 } 2557 2558 static void 2559 fpstate_drop(struct thread *td) 2560 { 2561 register_t s; 2562 2563 s = intr_disable(); 2564 #ifdef DEV_NPX 2565 if (PCPU_GET(fpcurthread) == td) 2566 npxdrop(); 2567 #endif 2568 /* 2569 * XXX force a full drop of the npx. The above only drops it if we 2570 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2571 * 2572 * XXX I don't much like npxgetregs()'s semantics of doing a full 2573 * drop. Dropping only to the pcb matches fnsave's behaviour. 2574 * We only need to drop to !PCB_INITDONE in sendsig(). But 2575 * sendsig() is the only caller of npxgetregs()... perhaps we just 2576 * have too many layers. 2577 */ 2578 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2579 intr_restore(s); 2580 } 2581 2582 int 2583 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2584 { 2585 struct pcb *pcb; 2586 2587 if (td == NULL) { 2588 dbregs->dr[0] = rdr0(); 2589 dbregs->dr[1] = rdr1(); 2590 dbregs->dr[2] = rdr2(); 2591 dbregs->dr[3] = rdr3(); 2592 dbregs->dr[4] = rdr4(); 2593 dbregs->dr[5] = rdr5(); 2594 dbregs->dr[6] = rdr6(); 2595 dbregs->dr[7] = rdr7(); 2596 } else { 2597 pcb = td->td_pcb; 2598 dbregs->dr[0] = pcb->pcb_dr0; 2599 dbregs->dr[1] = pcb->pcb_dr1; 2600 dbregs->dr[2] = pcb->pcb_dr2; 2601 dbregs->dr[3] = pcb->pcb_dr3; 2602 dbregs->dr[4] = 0; 2603 dbregs->dr[5] = 0; 2604 dbregs->dr[6] = pcb->pcb_dr6; 2605 dbregs->dr[7] = pcb->pcb_dr7; 2606 } 2607 return (0); 2608 } 2609 2610 int 2611 set_dbregs(struct thread *td, struct dbreg *dbregs) 2612 { 2613 struct pcb *pcb; 2614 int i; 2615 u_int32_t mask1, mask2; 2616 2617 if (td == NULL) { 2618 load_dr0(dbregs->dr[0]); 2619 load_dr1(dbregs->dr[1]); 2620 load_dr2(dbregs->dr[2]); 2621 load_dr3(dbregs->dr[3]); 2622 load_dr4(dbregs->dr[4]); 2623 load_dr5(dbregs->dr[5]); 2624 load_dr6(dbregs->dr[6]); 2625 load_dr7(dbregs->dr[7]); 2626 } else { 2627 /* 2628 * Don't let an illegal value for dr7 get set. Specifically, 2629 * check for undefined settings. Setting these bit patterns 2630 * result in undefined behaviour and can lead to an unexpected 2631 * TRCTRAP. 2632 */ 2633 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8; 2634 i++, mask1 <<= 2, mask2 <<= 2) 2635 if ((dbregs->dr[7] & mask1) == mask2) 2636 return (EINVAL); 2637 2638 pcb = td->td_pcb; 2639 2640 /* 2641 * Don't let a process set a breakpoint that is not within the 2642 * process's address space. If a process could do this, it 2643 * could halt the system by setting a breakpoint in the kernel 2644 * (if ddb was enabled). Thus, we need to check to make sure 2645 * that no breakpoints are being enabled for addresses outside 2646 * process's address space. 2647 * 2648 * XXX - what about when the watched area of the user's 2649 * address space is written into from within the kernel 2650 * ... wouldn't that still cause a breakpoint to be generated 2651 * from within kernel mode? 2652 */ 2653 2654 if (dbregs->dr[7] & 0x3) { 2655 /* dr0 is enabled */ 2656 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2657 return (EINVAL); 2658 } 2659 2660 if (dbregs->dr[7] & (0x3<<2)) { 2661 /* dr1 is enabled */ 2662 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2663 return (EINVAL); 2664 } 2665 2666 if (dbregs->dr[7] & (0x3<<4)) { 2667 /* dr2 is enabled */ 2668 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2669 return (EINVAL); 2670 } 2671 2672 if (dbregs->dr[7] & (0x3<<6)) { 2673 /* dr3 is enabled */ 2674 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2675 return (EINVAL); 2676 } 2677 2678 pcb->pcb_dr0 = dbregs->dr[0]; 2679 pcb->pcb_dr1 = dbregs->dr[1]; 2680 pcb->pcb_dr2 = dbregs->dr[2]; 2681 pcb->pcb_dr3 = dbregs->dr[3]; 2682 pcb->pcb_dr6 = dbregs->dr[6]; 2683 pcb->pcb_dr7 = dbregs->dr[7]; 2684 2685 pcb->pcb_flags |= PCB_DBREGS; 2686 } 2687 2688 return (0); 2689 } 2690 2691 /* 2692 * Return > 0 if a hardware breakpoint has been hit, and the 2693 * breakpoint was in user space. Return 0, otherwise. 2694 */ 2695 int 2696 user_dbreg_trap(void) 2697 { 2698 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2699 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2700 int nbp; /* number of breakpoints that triggered */ 2701 caddr_t addr[4]; /* breakpoint addresses */ 2702 int i; 2703 2704 dr7 = rdr7(); 2705 if ((dr7 & 0x000000ff) == 0) { 2706 /* 2707 * all GE and LE bits in the dr7 register are zero, 2708 * thus the trap couldn't have been caused by the 2709 * hardware debug registers 2710 */ 2711 return 0; 2712 } 2713 2714 nbp = 0; 2715 dr6 = rdr6(); 2716 bp = dr6 & 0x0000000f; 2717 2718 if (!bp) { 2719 /* 2720 * None of the breakpoint bits are set meaning this 2721 * trap was not caused by any of the debug registers 2722 */ 2723 return 0; 2724 } 2725 2726 /* 2727 * at least one of the breakpoints were hit, check to see 2728 * which ones and if any of them are user space addresses 2729 */ 2730 2731 if (bp & 0x01) { 2732 addr[nbp++] = (caddr_t)rdr0(); 2733 } 2734 if (bp & 0x02) { 2735 addr[nbp++] = (caddr_t)rdr1(); 2736 } 2737 if (bp & 0x04) { 2738 addr[nbp++] = (caddr_t)rdr2(); 2739 } 2740 if (bp & 0x08) { 2741 addr[nbp++] = (caddr_t)rdr3(); 2742 } 2743 2744 for (i=0; i<nbp; i++) { 2745 if (addr[i] < 2746 (caddr_t)VM_MAXUSER_ADDRESS) { 2747 /* 2748 * addr[i] is in user space 2749 */ 2750 return nbp; 2751 } 2752 } 2753 2754 /* 2755 * None of the breakpoints are in user space. 2756 */ 2757 return 0; 2758 } 2759 2760 #ifdef KDB 2761 2762 /* 2763 * Provide inb() and outb() as functions. They are normally only 2764 * available as macros calling inlined functions, thus cannot be 2765 * called from the debugger. 2766 * 2767 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2768 */ 2769 2770 #undef inb 2771 #undef outb 2772 2773 /* silence compiler warnings */ 2774 u_char inb(u_int); 2775 void outb(u_int, u_char); 2776 2777 u_char 2778 inb(u_int port) 2779 { 2780 u_char data; 2781 /* 2782 * We use %%dx and not %1 here because i/o is done at %dx and not at 2783 * %edx, while gcc generates inferior code (movw instead of movl) 2784 * if we tell it to load (u_short) port. 2785 */ 2786 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2787 return (data); 2788 } 2789 2790 void 2791 outb(u_int port, u_char data) 2792 { 2793 u_char al; 2794 /* 2795 * Use an unnecessary assignment to help gcc's register allocator. 2796 * This make a large difference for gcc-1.40 and a tiny difference 2797 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2798 * best results. gcc-2.6.0 can't handle this. 2799 */ 2800 al = data; 2801 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2802 } 2803 2804 #endif /* KDB */
Cache object: 30a4bbb7e575ed2f11ac88253d5d8060
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