Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pc98/pc98/machdep.c
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1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD$"); 42 43 #include "opt_atalk.h" 44 #include "opt_compat.h" 45 #include "opt_cpu.h" 46 #include "opt_ddb.h" 47 #include "opt_inet.h" 48 #include "opt_ipx.h" 49 #include "opt_isa.h" 50 #include "opt_kstack_pages.h" 51 #include "opt_maxmem.h" 52 #include "opt_msgbuf.h" 53 #include "opt_npx.h" 54 #include "opt_perfmon.h" 55 56 #include <sys/param.h> 57 #include <sys/proc.h> 58 #include <sys/systm.h> 59 #include <sys/bio.h> 60 #include <sys/buf.h> 61 #include <sys/bus.h> 62 #include <sys/callout.h> 63 #include <sys/clock.h> 64 #include <sys/cons.h> 65 #include <sys/cpu.h> 66 #include <sys/eventhandler.h> 67 #include <sys/exec.h> 68 #include <sys/imgact.h> 69 #include <sys/kdb.h> 70 #include <sys/kernel.h> 71 #include <sys/ktr.h> 72 #include <sys/linker.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/memrange.h> 76 #include <sys/msgbuf.h> 77 #include <sys/mutex.h> 78 #include <sys/pcpu.h> 79 #include <sys/ptrace.h> 80 #include <sys/reboot.h> 81 #include <sys/sched.h> 82 #include <sys/signalvar.h> 83 #include <sys/sysctl.h> 84 #include <sys/sysent.h> 85 #include <sys/sysproto.h> 86 #include <sys/ucontext.h> 87 #include <sys/vmmeter.h> 88 89 #include <vm/vm.h> 90 #include <vm/vm_extern.h> 91 #include <vm/vm_kern.h> 92 #include <vm/vm_page.h> 93 #include <vm/vm_map.h> 94 #include <vm/vm_object.h> 95 #include <vm/vm_pager.h> 96 #include <vm/vm_param.h> 97 98 #ifdef DDB 99 #ifndef KDB 100 #error KDB must be enabled in order for DDB to work! 101 #endif 102 #include <ddb/ddb.h> 103 #include <ddb/db_sym.h> 104 #endif 105 106 #include <pc98/pc98/pc98_machdep.h> 107 108 #include <net/netisr.h> 109 110 #include <machine/bootinfo.h> 111 #include <machine/clock.h> 112 #include <machine/cpu.h> 113 #include <machine/cputypes.h> 114 #include <machine/intr_machdep.h> 115 #include <machine/md_var.h> 116 #include <machine/pc/bios.h> 117 #include <machine/pcb.h> 118 #include <machine/pcb_ext.h> 119 #include <machine/proc.h> 120 #include <machine/reg.h> 121 #include <machine/sigframe.h> 122 #include <machine/specialreg.h> 123 #include <machine/vm86.h> 124 #ifdef PERFMON 125 #include <machine/perfmon.h> 126 #endif 127 #ifdef SMP 128 #include <machine/privatespace.h> 129 #include <machine/smp.h> 130 #endif 131 132 #ifdef DEV_ISA 133 #include <i386/isa/icu.h> 134 #endif 135 136 /* Sanity check for __curthread() */ 137 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 138 139 extern void init386(int first); 140 extern void dblfault_handler(void); 141 142 extern void printcpuinfo(void); /* XXX header file */ 143 extern void finishidentcpu(void); 144 extern void panicifcpuunsupported(void); 145 extern void initializecpu(void); 146 147 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 148 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 149 150 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 151 #define CPU_ENABLE_SSE 152 #endif 153 154 static void cpu_startup(void *); 155 static void fpstate_drop(struct thread *td); 156 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 157 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 158 #ifdef CPU_ENABLE_SSE 159 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 160 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 161 #endif /* CPU_ENABLE_SSE */ 162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL) 163 164 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */ 165 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */ 166 167 #ifdef DDB 168 extern vm_offset_t ksym_start, ksym_end; 169 #endif 170 171 int _udatasel, _ucodesel; 172 u_int basemem; 173 174 static int ispc98 = 1; 175 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 176 177 int cold = 1; 178 179 #ifdef COMPAT_43 180 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 181 #endif 182 #ifdef COMPAT_FREEBSD4 183 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 184 #endif 185 186 long Maxmem = 0; 187 long realmem = 0; 188 189 /* 190 * The number of PHYSMAP entries must be one less than the number of 191 * PHYSSEG entries because the PHYSMAP entry that spans the largest 192 * physical address that is accessible by ISA DMA is split into two 193 * PHYSSEG entries. 194 */ 195 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 196 197 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 198 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 199 200 /* must be 2 less so 0 0 can signal end of chunks */ 201 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 202 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 203 204 struct kva_md_info kmi; 205 206 static struct trapframe proc0_tf; 207 #ifndef SMP 208 static struct pcpu __pcpu; 209 #endif 210 211 struct mtx icu_lock; 212 213 struct mem_range_softc mem_range_softc; 214 215 static void 216 cpu_startup(dummy) 217 void *dummy; 218 { 219 /* 220 * Good {morning,afternoon,evening,night}. 221 */ 222 startrtclock(); 223 printcpuinfo(); 224 panicifcpuunsupported(); 225 #ifdef PERFMON 226 perfmon_init(); 227 #endif 228 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 229 ptoa((uintmax_t)Maxmem) / 1048576); 230 realmem = Maxmem; 231 /* 232 * Display any holes after the first chunk of extended memory. 233 */ 234 if (bootverbose) { 235 int indx; 236 237 printf("Physical memory chunk(s):\n"); 238 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 239 vm_paddr_t size; 240 241 size = phys_avail[indx + 1] - phys_avail[indx]; 242 printf( 243 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 244 (uintmax_t)phys_avail[indx], 245 (uintmax_t)phys_avail[indx + 1] - 1, 246 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 247 } 248 } 249 250 vm_ksubmap_init(&kmi); 251 252 printf("avail memory = %ju (%ju MB)\n", 253 ptoa((uintmax_t)cnt.v_free_count), 254 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 255 256 /* 257 * Set up buffers, so they can be used to read disk labels. 258 */ 259 bufinit(); 260 vm_pager_bufferinit(); 261 262 cpu_setregs(); 263 } 264 265 /* 266 * Send an interrupt to process. 267 * 268 * Stack is set up to allow sigcode stored 269 * at top to call routine, followed by kcall 270 * to sigreturn routine below. After sigreturn 271 * resets the signal mask, the stack, and the 272 * frame pointer, it returns to the user 273 * specified pc, psl. 274 */ 275 #ifdef COMPAT_43 276 static void 277 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 278 { 279 struct osigframe sf, *fp; 280 struct proc *p; 281 struct thread *td; 282 struct sigacts *psp; 283 struct trapframe *regs; 284 int sig; 285 int oonstack; 286 287 td = curthread; 288 p = td->td_proc; 289 PROC_LOCK_ASSERT(p, MA_OWNED); 290 sig = ksi->ksi_signo; 291 psp = p->p_sigacts; 292 mtx_assert(&psp->ps_mtx, MA_OWNED); 293 regs = td->td_frame; 294 oonstack = sigonstack(regs->tf_esp); 295 296 /* Allocate space for the signal handler context. */ 297 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 298 SIGISMEMBER(psp->ps_sigonstack, sig)) { 299 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 300 td->td_sigstk.ss_size - sizeof(struct osigframe)); 301 #if defined(COMPAT_43) 302 td->td_sigstk.ss_flags |= SS_ONSTACK; 303 #endif 304 } else 305 fp = (struct osigframe *)regs->tf_esp - 1; 306 307 /* Translate the signal if appropriate. */ 308 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 309 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 310 311 /* Build the argument list for the signal handler. */ 312 sf.sf_signum = sig; 313 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 314 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 315 /* Signal handler installed with SA_SIGINFO. */ 316 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 317 sf.sf_siginfo.si_signo = sig; 318 sf.sf_siginfo.si_code = ksi->ksi_code; 319 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 320 } else { 321 /* Old FreeBSD-style arguments. */ 322 sf.sf_arg2 = ksi->ksi_code; 323 sf.sf_addr = (register_t)ksi->ksi_addr; 324 sf.sf_ahu.sf_handler = catcher; 325 } 326 mtx_unlock(&psp->ps_mtx); 327 PROC_UNLOCK(p); 328 329 /* Save most if not all of trap frame. */ 330 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 331 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 332 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 333 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 334 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 335 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 336 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 337 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 338 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 339 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 340 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 341 sf.sf_siginfo.si_sc.sc_gs = rgs(); 342 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 343 344 /* Build the signal context to be used by osigreturn(). */ 345 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 346 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 347 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 348 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 349 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 350 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 351 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 352 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 353 354 /* 355 * If we're a vm86 process, we want to save the segment registers. 356 * We also change eflags to be our emulated eflags, not the actual 357 * eflags. 358 */ 359 if (regs->tf_eflags & PSL_VM) { 360 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 361 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 362 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 363 364 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 365 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 366 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 367 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 368 369 if (vm86->vm86_has_vme == 0) 370 sf.sf_siginfo.si_sc.sc_ps = 371 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 372 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 373 374 /* See sendsig() for comments. */ 375 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 376 } 377 378 /* 379 * Copy the sigframe out to the user's stack. 380 */ 381 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 382 #ifdef DEBUG 383 printf("process %ld has trashed its stack\n", (long)p->p_pid); 384 #endif 385 PROC_LOCK(p); 386 sigexit(td, SIGILL); 387 } 388 389 regs->tf_esp = (int)fp; 390 regs->tf_eip = PS_STRINGS - szosigcode; 391 regs->tf_eflags &= ~PSL_T; 392 regs->tf_cs = _ucodesel; 393 regs->tf_ds = _udatasel; 394 regs->tf_es = _udatasel; 395 regs->tf_fs = _udatasel; 396 load_gs(_udatasel); 397 regs->tf_ss = _udatasel; 398 PROC_LOCK(p); 399 mtx_lock(&psp->ps_mtx); 400 } 401 #endif /* COMPAT_43 */ 402 403 #ifdef COMPAT_FREEBSD4 404 static void 405 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 406 { 407 struct sigframe4 sf, *sfp; 408 struct proc *p; 409 struct thread *td; 410 struct sigacts *psp; 411 struct trapframe *regs; 412 int sig; 413 int oonstack; 414 415 td = curthread; 416 p = td->td_proc; 417 PROC_LOCK_ASSERT(p, MA_OWNED); 418 sig = ksi->ksi_signo; 419 psp = p->p_sigacts; 420 mtx_assert(&psp->ps_mtx, MA_OWNED); 421 regs = td->td_frame; 422 oonstack = sigonstack(regs->tf_esp); 423 424 /* Save user context. */ 425 bzero(&sf, sizeof(sf)); 426 sf.sf_uc.uc_sigmask = *mask; 427 sf.sf_uc.uc_stack = td->td_sigstk; 428 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 429 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 430 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 431 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 432 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 433 434 /* Allocate space for the signal handler context. */ 435 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 436 SIGISMEMBER(psp->ps_sigonstack, sig)) { 437 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 438 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 439 #if defined(COMPAT_43) 440 td->td_sigstk.ss_flags |= SS_ONSTACK; 441 #endif 442 } else 443 sfp = (struct sigframe4 *)regs->tf_esp - 1; 444 445 /* Translate the signal if appropriate. */ 446 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 447 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 448 449 /* Build the argument list for the signal handler. */ 450 sf.sf_signum = sig; 451 sf.sf_ucontext = (register_t)&sfp->sf_uc; 452 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 453 /* Signal handler installed with SA_SIGINFO. */ 454 sf.sf_siginfo = (register_t)&sfp->sf_si; 455 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 456 457 /* Fill in POSIX parts */ 458 sf.sf_si.si_signo = sig; 459 sf.sf_si.si_code = ksi->ksi_code; 460 sf.sf_si.si_addr = ksi->ksi_addr; 461 } else { 462 /* Old FreeBSD-style arguments. */ 463 sf.sf_siginfo = ksi->ksi_code; 464 sf.sf_addr = (register_t)ksi->ksi_addr; 465 sf.sf_ahu.sf_handler = catcher; 466 } 467 mtx_unlock(&psp->ps_mtx); 468 PROC_UNLOCK(p); 469 470 /* 471 * If we're a vm86 process, we want to save the segment registers. 472 * We also change eflags to be our emulated eflags, not the actual 473 * eflags. 474 */ 475 if (regs->tf_eflags & PSL_VM) { 476 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 477 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 478 479 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 480 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 481 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 482 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 483 484 if (vm86->vm86_has_vme == 0) 485 sf.sf_uc.uc_mcontext.mc_eflags = 486 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 487 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 488 489 /* 490 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 491 * syscalls made by the signal handler. This just avoids 492 * wasting time for our lazy fixup of such faults. PSL_NT 493 * does nothing in vm86 mode, but vm86 programs can set it 494 * almost legitimately in probes for old cpu types. 495 */ 496 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 497 } 498 499 /* 500 * Copy the sigframe out to the user's stack. 501 */ 502 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 503 #ifdef DEBUG 504 printf("process %ld has trashed its stack\n", (long)p->p_pid); 505 #endif 506 PROC_LOCK(p); 507 sigexit(td, SIGILL); 508 } 509 510 regs->tf_esp = (int)sfp; 511 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 512 regs->tf_eflags &= ~PSL_T; 513 regs->tf_cs = _ucodesel; 514 regs->tf_ds = _udatasel; 515 regs->tf_es = _udatasel; 516 regs->tf_fs = _udatasel; 517 regs->tf_ss = _udatasel; 518 PROC_LOCK(p); 519 mtx_lock(&psp->ps_mtx); 520 } 521 #endif /* COMPAT_FREEBSD4 */ 522 523 void 524 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 525 { 526 struct sigframe sf, *sfp; 527 struct proc *p; 528 struct thread *td; 529 struct sigacts *psp; 530 char *sp; 531 struct trapframe *regs; 532 int sig; 533 int oonstack; 534 535 td = curthread; 536 p = td->td_proc; 537 PROC_LOCK_ASSERT(p, MA_OWNED); 538 sig = ksi->ksi_signo; 539 psp = p->p_sigacts; 540 mtx_assert(&psp->ps_mtx, MA_OWNED); 541 #ifdef COMPAT_FREEBSD4 542 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 543 freebsd4_sendsig(catcher, ksi, mask); 544 return; 545 } 546 #endif 547 #ifdef COMPAT_43 548 if (SIGISMEMBER(psp->ps_osigset, sig)) { 549 osendsig(catcher, ksi, mask); 550 return; 551 } 552 #endif 553 regs = td->td_frame; 554 oonstack = sigonstack(regs->tf_esp); 555 556 /* Save user context. */ 557 bzero(&sf, sizeof(sf)); 558 sf.sf_uc.uc_sigmask = *mask; 559 sf.sf_uc.uc_stack = td->td_sigstk; 560 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 561 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 562 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 563 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 564 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 565 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 566 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 567 fpstate_drop(td); 568 569 /* Allocate space for the signal handler context. */ 570 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 571 SIGISMEMBER(psp->ps_sigonstack, sig)) { 572 sp = td->td_sigstk.ss_sp + 573 td->td_sigstk.ss_size - sizeof(struct sigframe); 574 #if defined(COMPAT_43) 575 td->td_sigstk.ss_flags |= SS_ONSTACK; 576 #endif 577 } else 578 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 579 /* Align to 16 bytes. */ 580 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 581 582 /* Translate the signal if appropriate. */ 583 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 584 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 585 586 /* Build the argument list for the signal handler. */ 587 sf.sf_signum = sig; 588 sf.sf_ucontext = (register_t)&sfp->sf_uc; 589 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 590 /* Signal handler installed with SA_SIGINFO. */ 591 sf.sf_siginfo = (register_t)&sfp->sf_si; 592 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 593 594 /* Fill in POSIX parts */ 595 sf.sf_si = ksi->ksi_info; 596 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 597 } else { 598 /* Old FreeBSD-style arguments. */ 599 sf.sf_siginfo = ksi->ksi_code; 600 sf.sf_addr = (register_t)ksi->ksi_addr; 601 sf.sf_ahu.sf_handler = catcher; 602 } 603 mtx_unlock(&psp->ps_mtx); 604 PROC_UNLOCK(p); 605 606 /* 607 * If we're a vm86 process, we want to save the segment registers. 608 * We also change eflags to be our emulated eflags, not the actual 609 * eflags. 610 */ 611 if (regs->tf_eflags & PSL_VM) { 612 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 613 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 614 615 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 616 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 617 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 618 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 619 620 if (vm86->vm86_has_vme == 0) 621 sf.sf_uc.uc_mcontext.mc_eflags = 622 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 623 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 624 625 /* 626 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 627 * syscalls made by the signal handler. This just avoids 628 * wasting time for our lazy fixup of such faults. PSL_NT 629 * does nothing in vm86 mode, but vm86 programs can set it 630 * almost legitimately in probes for old cpu types. 631 */ 632 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 633 } 634 635 /* 636 * Copy the sigframe out to the user's stack. 637 */ 638 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 639 #ifdef DEBUG 640 printf("process %ld has trashed its stack\n", (long)p->p_pid); 641 #endif 642 PROC_LOCK(p); 643 sigexit(td, SIGILL); 644 } 645 646 regs->tf_esp = (int)sfp; 647 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 648 regs->tf_eflags &= ~PSL_T; 649 regs->tf_cs = _ucodesel; 650 regs->tf_ds = _udatasel; 651 regs->tf_es = _udatasel; 652 regs->tf_fs = _udatasel; 653 regs->tf_ss = _udatasel; 654 PROC_LOCK(p); 655 mtx_lock(&psp->ps_mtx); 656 } 657 658 /* 659 * System call to cleanup state after a signal 660 * has been taken. Reset signal mask and 661 * stack state from context left by sendsig (above). 662 * Return to previous pc and psl as specified by 663 * context left by sendsig. Check carefully to 664 * make sure that the user has not modified the 665 * state to gain improper privileges. 666 * 667 * MPSAFE 668 */ 669 #ifdef COMPAT_43 670 int 671 osigreturn(td, uap) 672 struct thread *td; 673 struct osigreturn_args /* { 674 struct osigcontext *sigcntxp; 675 } */ *uap; 676 { 677 struct osigcontext sc; 678 struct trapframe *regs; 679 struct osigcontext *scp; 680 struct proc *p = td->td_proc; 681 int eflags, error; 682 ksiginfo_t ksi; 683 684 regs = td->td_frame; 685 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 686 if (error != 0) 687 return (error); 688 scp = ≻ 689 eflags = scp->sc_ps; 690 if (eflags & PSL_VM) { 691 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 692 struct vm86_kernel *vm86; 693 694 /* 695 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 696 * set up the vm86 area, and we can't enter vm86 mode. 697 */ 698 if (td->td_pcb->pcb_ext == 0) 699 return (EINVAL); 700 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 701 if (vm86->vm86_inited == 0) 702 return (EINVAL); 703 704 /* Go back to user mode if both flags are set. */ 705 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 706 ksiginfo_init_trap(&ksi); 707 ksi.ksi_signo = SIGBUS; 708 ksi.ksi_code = BUS_OBJERR; 709 ksi.ksi_addr = (void *)regs->tf_eip; 710 trapsignal(td, &ksi); 711 } 712 713 if (vm86->vm86_has_vme) { 714 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 715 (eflags & VME_USERCHANGE) | PSL_VM; 716 } else { 717 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 718 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 719 (eflags & VM_USERCHANGE) | PSL_VM; 720 } 721 tf->tf_vm86_ds = scp->sc_ds; 722 tf->tf_vm86_es = scp->sc_es; 723 tf->tf_vm86_fs = scp->sc_fs; 724 tf->tf_vm86_gs = scp->sc_gs; 725 tf->tf_ds = _udatasel; 726 tf->tf_es = _udatasel; 727 tf->tf_fs = _udatasel; 728 } else { 729 /* 730 * Don't allow users to change privileged or reserved flags. 731 */ 732 /* 733 * XXX do allow users to change the privileged flag PSL_RF. 734 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 735 * should sometimes set it there too. tf_eflags is kept in 736 * the signal context during signal handling and there is no 737 * other place to remember it, so the PSL_RF bit may be 738 * corrupted by the signal handler without us knowing. 739 * Corruption of the PSL_RF bit at worst causes one more or 740 * one less debugger trap, so allowing it is fairly harmless. 741 */ 742 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 743 return (EINVAL); 744 } 745 746 /* 747 * Don't allow users to load a valid privileged %cs. Let the 748 * hardware check for invalid selectors, excess privilege in 749 * other selectors, invalid %eip's and invalid %esp's. 750 */ 751 if (!CS_SECURE(scp->sc_cs)) { 752 ksiginfo_init_trap(&ksi); 753 ksi.ksi_signo = SIGBUS; 754 ksi.ksi_code = BUS_OBJERR; 755 ksi.ksi_trapno = T_PROTFLT; 756 ksi.ksi_addr = (void *)regs->tf_eip; 757 trapsignal(td, &ksi); 758 return (EINVAL); 759 } 760 regs->tf_ds = scp->sc_ds; 761 regs->tf_es = scp->sc_es; 762 regs->tf_fs = scp->sc_fs; 763 } 764 765 /* Restore remaining registers. */ 766 regs->tf_eax = scp->sc_eax; 767 regs->tf_ebx = scp->sc_ebx; 768 regs->tf_ecx = scp->sc_ecx; 769 regs->tf_edx = scp->sc_edx; 770 regs->tf_esi = scp->sc_esi; 771 regs->tf_edi = scp->sc_edi; 772 regs->tf_cs = scp->sc_cs; 773 regs->tf_ss = scp->sc_ss; 774 regs->tf_isp = scp->sc_isp; 775 regs->tf_ebp = scp->sc_fp; 776 regs->tf_esp = scp->sc_sp; 777 regs->tf_eip = scp->sc_pc; 778 regs->tf_eflags = eflags; 779 780 PROC_LOCK(p); 781 #if defined(COMPAT_43) 782 if (scp->sc_onstack & 1) 783 td->td_sigstk.ss_flags |= SS_ONSTACK; 784 else 785 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 786 #endif 787 SIGSETOLD(td->td_sigmask, scp->sc_mask); 788 SIG_CANTMASK(td->td_sigmask); 789 signotify(td); 790 PROC_UNLOCK(p); 791 return (EJUSTRETURN); 792 } 793 #endif /* COMPAT_43 */ 794 795 #ifdef COMPAT_FREEBSD4 796 /* 797 * MPSAFE 798 */ 799 int 800 freebsd4_sigreturn(td, uap) 801 struct thread *td; 802 struct freebsd4_sigreturn_args /* { 803 const ucontext4 *sigcntxp; 804 } */ *uap; 805 { 806 struct ucontext4 uc; 807 struct proc *p = td->td_proc; 808 struct trapframe *regs; 809 const struct ucontext4 *ucp; 810 int cs, eflags, error; 811 ksiginfo_t ksi; 812 813 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 814 if (error != 0) 815 return (error); 816 ucp = &uc; 817 regs = td->td_frame; 818 eflags = ucp->uc_mcontext.mc_eflags; 819 if (eflags & PSL_VM) { 820 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 821 struct vm86_kernel *vm86; 822 823 /* 824 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 825 * set up the vm86 area, and we can't enter vm86 mode. 826 */ 827 if (td->td_pcb->pcb_ext == 0) 828 return (EINVAL); 829 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 830 if (vm86->vm86_inited == 0) 831 return (EINVAL); 832 833 /* Go back to user mode if both flags are set. */ 834 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 835 ksiginfo_init_trap(&ksi); 836 ksi.ksi_signo = SIGBUS; 837 ksi.ksi_code = BUS_OBJERR; 838 ksi.ksi_addr = (void *)regs->tf_eip; 839 trapsignal(td, &ksi); 840 } 841 if (vm86->vm86_has_vme) { 842 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 843 (eflags & VME_USERCHANGE) | PSL_VM; 844 } else { 845 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 846 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 847 (eflags & VM_USERCHANGE) | PSL_VM; 848 } 849 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 850 tf->tf_eflags = eflags; 851 tf->tf_vm86_ds = tf->tf_ds; 852 tf->tf_vm86_es = tf->tf_es; 853 tf->tf_vm86_fs = tf->tf_fs; 854 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 855 tf->tf_ds = _udatasel; 856 tf->tf_es = _udatasel; 857 tf->tf_fs = _udatasel; 858 } else { 859 /* 860 * Don't allow users to change privileged or reserved flags. 861 */ 862 /* 863 * XXX do allow users to change the privileged flag PSL_RF. 864 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 865 * should sometimes set it there too. tf_eflags is kept in 866 * the signal context during signal handling and there is no 867 * other place to remember it, so the PSL_RF bit may be 868 * corrupted by the signal handler without us knowing. 869 * Corruption of the PSL_RF bit at worst causes one more or 870 * one less debugger trap, so allowing it is fairly harmless. 871 */ 872 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 873 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 874 return (EINVAL); 875 } 876 877 /* 878 * Don't allow users to load a valid privileged %cs. Let the 879 * hardware check for invalid selectors, excess privilege in 880 * other selectors, invalid %eip's and invalid %esp's. 881 */ 882 cs = ucp->uc_mcontext.mc_cs; 883 if (!CS_SECURE(cs)) { 884 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 885 ksiginfo_init_trap(&ksi); 886 ksi.ksi_signo = SIGBUS; 887 ksi.ksi_code = BUS_OBJERR; 888 ksi.ksi_trapno = T_PROTFLT; 889 ksi.ksi_addr = (void *)regs->tf_eip; 890 trapsignal(td, &ksi); 891 return (EINVAL); 892 } 893 894 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 895 } 896 897 PROC_LOCK(p); 898 #if defined(COMPAT_43) 899 if (ucp->uc_mcontext.mc_onstack & 1) 900 td->td_sigstk.ss_flags |= SS_ONSTACK; 901 else 902 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 903 #endif 904 905 td->td_sigmask = ucp->uc_sigmask; 906 SIG_CANTMASK(td->td_sigmask); 907 signotify(td); 908 PROC_UNLOCK(p); 909 return (EJUSTRETURN); 910 } 911 #endif /* COMPAT_FREEBSD4 */ 912 913 /* 914 * MPSAFE 915 */ 916 int 917 sigreturn(td, uap) 918 struct thread *td; 919 struct sigreturn_args /* { 920 const struct __ucontext *sigcntxp; 921 } */ *uap; 922 { 923 ucontext_t uc; 924 struct proc *p = td->td_proc; 925 struct trapframe *regs; 926 const ucontext_t *ucp; 927 int cs, eflags, error, ret; 928 ksiginfo_t ksi; 929 930 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 931 if (error != 0) 932 return (error); 933 ucp = &uc; 934 regs = td->td_frame; 935 eflags = ucp->uc_mcontext.mc_eflags; 936 if (eflags & PSL_VM) { 937 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 938 struct vm86_kernel *vm86; 939 940 /* 941 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 942 * set up the vm86 area, and we can't enter vm86 mode. 943 */ 944 if (td->td_pcb->pcb_ext == 0) 945 return (EINVAL); 946 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 947 if (vm86->vm86_inited == 0) 948 return (EINVAL); 949 950 /* Go back to user mode if both flags are set. */ 951 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 952 ksiginfo_init_trap(&ksi); 953 ksi.ksi_signo = SIGBUS; 954 ksi.ksi_code = BUS_OBJERR; 955 ksi.ksi_addr = (void *)regs->tf_eip; 956 trapsignal(td, &ksi); 957 } 958 959 if (vm86->vm86_has_vme) { 960 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 961 (eflags & VME_USERCHANGE) | PSL_VM; 962 } else { 963 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 964 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 965 (eflags & VM_USERCHANGE) | PSL_VM; 966 } 967 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 968 tf->tf_eflags = eflags; 969 tf->tf_vm86_ds = tf->tf_ds; 970 tf->tf_vm86_es = tf->tf_es; 971 tf->tf_vm86_fs = tf->tf_fs; 972 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 973 tf->tf_ds = _udatasel; 974 tf->tf_es = _udatasel; 975 tf->tf_fs = _udatasel; 976 } else { 977 /* 978 * Don't allow users to change privileged or reserved flags. 979 */ 980 /* 981 * XXX do allow users to change the privileged flag PSL_RF. 982 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 983 * should sometimes set it there too. tf_eflags is kept in 984 * the signal context during signal handling and there is no 985 * other place to remember it, so the PSL_RF bit may be 986 * corrupted by the signal handler without us knowing. 987 * Corruption of the PSL_RF bit at worst causes one more or 988 * one less debugger trap, so allowing it is fairly harmless. 989 */ 990 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 991 printf("sigreturn: eflags = 0x%x\n", eflags); 992 return (EINVAL); 993 } 994 995 /* 996 * Don't allow users to load a valid privileged %cs. Let the 997 * hardware check for invalid selectors, excess privilege in 998 * other selectors, invalid %eip's and invalid %esp's. 999 */ 1000 cs = ucp->uc_mcontext.mc_cs; 1001 if (!CS_SECURE(cs)) { 1002 printf("sigreturn: cs = 0x%x\n", cs); 1003 ksiginfo_init_trap(&ksi); 1004 ksi.ksi_signo = SIGBUS; 1005 ksi.ksi_code = BUS_OBJERR; 1006 ksi.ksi_trapno = T_PROTFLT; 1007 ksi.ksi_addr = (void *)regs->tf_eip; 1008 trapsignal(td, &ksi); 1009 return (EINVAL); 1010 } 1011 1012 ret = set_fpcontext(td, &ucp->uc_mcontext); 1013 if (ret != 0) 1014 return (ret); 1015 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1016 } 1017 1018 PROC_LOCK(p); 1019 #if defined(COMPAT_43) 1020 if (ucp->uc_mcontext.mc_onstack & 1) 1021 td->td_sigstk.ss_flags |= SS_ONSTACK; 1022 else 1023 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1024 #endif 1025 1026 td->td_sigmask = ucp->uc_sigmask; 1027 SIG_CANTMASK(td->td_sigmask); 1028 signotify(td); 1029 PROC_UNLOCK(p); 1030 return (EJUSTRETURN); 1031 } 1032 1033 /* 1034 * Machine dependent boot() routine 1035 * 1036 * I haven't seen anything to put here yet 1037 * Possibly some stuff might be grafted back here from boot() 1038 */ 1039 void 1040 cpu_boot(int howto) 1041 { 1042 } 1043 1044 /* Get current clock frequency for the given cpu id. */ 1045 int 1046 cpu_est_clockrate(int cpu_id, uint64_t *rate) 1047 { 1048 register_t reg; 1049 uint64_t tsc1, tsc2; 1050 1051 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1052 return (EINVAL); 1053 if (!tsc_present) 1054 return (EOPNOTSUPP); 1055 1056 /* If we're booting, trust the rate calibrated moments ago. */ 1057 if (cold) { 1058 *rate = tsc_freq; 1059 return (0); 1060 } 1061 1062 #ifdef SMP 1063 /* Schedule ourselves on the indicated cpu. */ 1064 thread_lock(curthread); 1065 sched_bind(curthread, cpu_id); 1066 thread_unlock(curthread); 1067 #endif 1068 1069 /* Calibrate by measuring a short delay. */ 1070 reg = intr_disable(); 1071 tsc1 = rdtsc(); 1072 DELAY(1000); 1073 tsc2 = rdtsc(); 1074 intr_restore(reg); 1075 1076 #ifdef SMP 1077 thread_lock(curthread); 1078 sched_unbind(curthread); 1079 thread_unlock(curthread); 1080 #endif 1081 1082 /* 1083 * Calculate the difference in readings, convert to Mhz, and 1084 * subtract 0.5% of the total. Empirical testing has shown that 1085 * overhead in DELAY() works out to approximately this value. 1086 */ 1087 tsc2 -= tsc1; 1088 *rate = tsc2 * 1000 - tsc2 * 5; 1089 return (0); 1090 } 1091 1092 /* 1093 * Shutdown the CPU as much as possible 1094 */ 1095 void 1096 cpu_halt(void) 1097 { 1098 for (;;) 1099 __asm__ ("hlt"); 1100 } 1101 1102 /* 1103 * Hook to idle the CPU when possible. In the SMP case we default to 1104 * off because a halted cpu will not currently pick up a new thread in the 1105 * run queue until the next timer tick. If turned on this will result in 1106 * approximately a 4.2% loss in real time performance in buildworld tests 1107 * (but improves user and sys times oddly enough), and saves approximately 1108 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1109 * 1110 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1111 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1112 * Then we can have our cake and eat it too. 1113 * 1114 * XXX I'm turning it on for SMP as well by default for now. It seems to 1115 * help lock contention somewhat, and this is critical for HTT. -Peter 1116 */ 1117 static int cpu_idle_hlt = 1; 1118 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt); 1119 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1120 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1121 1122 static void 1123 cpu_idle_default(void) 1124 { 1125 /* 1126 * we must absolutely guarentee that hlt is the 1127 * absolute next instruction after sti or we 1128 * introduce a timing window. 1129 */ 1130 __asm __volatile("sti; hlt"); 1131 } 1132 1133 /* 1134 * Note that we have to be careful here to avoid a race between checking 1135 * sched_runnable() and actually halting. If we don't do this, we may waste 1136 * the time between calling hlt and the next interrupt even though there 1137 * is a runnable process. 1138 */ 1139 void 1140 cpu_idle(void) 1141 { 1142 1143 #ifdef SMP 1144 if (mp_grab_cpu_hlt()) 1145 return; 1146 #endif 1147 1148 if (cpu_idle_hlt) { 1149 disable_intr(); 1150 if (sched_runnable()) 1151 enable_intr(); 1152 else 1153 (*cpu_idle_hook)(); 1154 } 1155 } 1156 1157 /* Other subsystems (e.g., ACPI) can hook this later. */ 1158 void (*cpu_idle_hook)(void) = cpu_idle_default; 1159 1160 /* 1161 * Clear registers on exec 1162 */ 1163 void 1164 exec_setregs(td, entry, stack, ps_strings) 1165 struct thread *td; 1166 u_long entry; 1167 u_long stack; 1168 u_long ps_strings; 1169 { 1170 struct trapframe *regs = td->td_frame; 1171 struct pcb *pcb = td->td_pcb; 1172 1173 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1174 pcb->pcb_gs = _udatasel; 1175 load_gs(_udatasel); 1176 1177 mtx_lock_spin(&dt_lock); 1178 if (td->td_proc->p_md.md_ldt) 1179 user_ldt_free(td); 1180 else 1181 mtx_unlock_spin(&dt_lock); 1182 1183 bzero((char *)regs, sizeof(struct trapframe)); 1184 regs->tf_eip = entry; 1185 regs->tf_esp = stack; 1186 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1187 regs->tf_ss = _udatasel; 1188 regs->tf_ds = _udatasel; 1189 regs->tf_es = _udatasel; 1190 regs->tf_fs = _udatasel; 1191 regs->tf_cs = _ucodesel; 1192 1193 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1194 regs->tf_ebx = ps_strings; 1195 1196 /* 1197 * Reset the hardware debug registers if they were in use. 1198 * They won't have any meaning for the newly exec'd process. 1199 */ 1200 if (pcb->pcb_flags & PCB_DBREGS) { 1201 pcb->pcb_dr0 = 0; 1202 pcb->pcb_dr1 = 0; 1203 pcb->pcb_dr2 = 0; 1204 pcb->pcb_dr3 = 0; 1205 pcb->pcb_dr6 = 0; 1206 pcb->pcb_dr7 = 0; 1207 if (pcb == PCPU_GET(curpcb)) { 1208 /* 1209 * Clear the debug registers on the running 1210 * CPU, otherwise they will end up affecting 1211 * the next process we switch to. 1212 */ 1213 reset_dbregs(); 1214 } 1215 pcb->pcb_flags &= ~PCB_DBREGS; 1216 } 1217 1218 /* 1219 * Initialize the math emulator (if any) for the current process. 1220 * Actually, just clear the bit that says that the emulator has 1221 * been initialized. Initialization is delayed until the process 1222 * traps to the emulator (if it is done at all) mainly because 1223 * emulators don't provide an entry point for initialization. 1224 */ 1225 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1226 1227 /* 1228 * Drop the FP state if we hold it, so that the process gets a 1229 * clean FP state if it uses the FPU again. 1230 */ 1231 fpstate_drop(td); 1232 1233 /* 1234 * XXX - Linux emulator 1235 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1236 * on it. 1237 */ 1238 td->td_retval[1] = 0; 1239 } 1240 1241 void 1242 cpu_setregs(void) 1243 { 1244 unsigned int cr0; 1245 1246 cr0 = rcr0(); 1247 1248 /* 1249 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1250 * 1251 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1252 * instructions. We must set the CR0_MP bit and use the CR0_TS 1253 * bit to control the trap, because setting the CR0_EM bit does 1254 * not cause WAIT instructions to trap. It's important to trap 1255 * WAIT instructions - otherwise the "wait" variants of no-wait 1256 * control instructions would degenerate to the "no-wait" variants 1257 * after FP context switches but work correctly otherwise. It's 1258 * particularly important to trap WAITs when there is no NPX - 1259 * otherwise the "wait" variants would always degenerate. 1260 * 1261 * Try setting CR0_NE to get correct error reporting on 486DX's. 1262 * Setting it should fail or do nothing on lesser processors. 1263 */ 1264 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1265 load_cr0(cr0); 1266 load_gs(_udatasel); 1267 } 1268 1269 u_long bootdev; /* not a struct cdev *- encoding is different */ 1270 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1271 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1272 1273 /* 1274 * Initialize 386 and configure to run kernel 1275 */ 1276 1277 /* 1278 * Initialize segments & interrupt table 1279 */ 1280 1281 int _default_ldt; 1282 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1283 static struct gate_descriptor idt0[NIDT]; 1284 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1285 union descriptor ldt[NLDT]; /* local descriptor table */ 1286 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1287 struct mtx dt_lock; /* lock for GDT and LDT */ 1288 1289 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1290 extern int has_f00f_bug; 1291 #endif 1292 1293 static struct i386tss dblfault_tss; 1294 static char dblfault_stack[PAGE_SIZE]; 1295 1296 extern vm_offset_t proc0kstack; 1297 1298 1299 /* 1300 * software prototypes -- in more palatable form. 1301 * 1302 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1303 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1304 */ 1305 struct soft_segment_descriptor gdt_segs[] = { 1306 /* GNULL_SEL 0 Null Descriptor */ 1307 { 0x0, /* segment base address */ 1308 0x0, /* length */ 1309 0, /* segment type */ 1310 0, /* segment descriptor priority level */ 1311 0, /* segment descriptor present */ 1312 0, 0, 1313 0, /* default 32 vs 16 bit size */ 1314 0 /* limit granularity (byte/page units)*/ }, 1315 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1316 { 0x0, /* segment base address */ 1317 0xfffff, /* length - all address space */ 1318 SDT_MEMRWA, /* segment type */ 1319 0, /* segment descriptor priority level */ 1320 1, /* segment descriptor present */ 1321 0, 0, 1322 1, /* default 32 vs 16 bit size */ 1323 1 /* limit granularity (byte/page units)*/ }, 1324 /* GUFS_SEL 2 %fs Descriptor for user */ 1325 { 0x0, /* segment base address */ 1326 0xfffff, /* length - all address space */ 1327 SDT_MEMRWA, /* segment type */ 1328 SEL_UPL, /* segment descriptor priority level */ 1329 1, /* segment descriptor present */ 1330 0, 0, 1331 1, /* default 32 vs 16 bit size */ 1332 1 /* limit granularity (byte/page units)*/ }, 1333 /* GUGS_SEL 3 %gs Descriptor for user */ 1334 { 0x0, /* segment base address */ 1335 0xfffff, /* length - all address space */ 1336 SDT_MEMRWA, /* segment type */ 1337 SEL_UPL, /* segment descriptor priority level */ 1338 1, /* segment descriptor present */ 1339 0, 0, 1340 1, /* default 32 vs 16 bit size */ 1341 1 /* limit granularity (byte/page units)*/ }, 1342 /* GCODE_SEL 4 Code Descriptor for kernel */ 1343 { 0x0, /* segment base address */ 1344 0xfffff, /* length - all address space */ 1345 SDT_MEMERA, /* segment type */ 1346 0, /* segment descriptor priority level */ 1347 1, /* segment descriptor present */ 1348 0, 0, 1349 1, /* default 32 vs 16 bit size */ 1350 1 /* limit granularity (byte/page units)*/ }, 1351 /* GDATA_SEL 5 Data Descriptor for kernel */ 1352 { 0x0, /* segment base address */ 1353 0xfffff, /* length - all address space */ 1354 SDT_MEMRWA, /* segment type */ 1355 0, /* segment descriptor priority level */ 1356 1, /* segment descriptor present */ 1357 0, 0, 1358 1, /* default 32 vs 16 bit size */ 1359 1 /* limit granularity (byte/page units)*/ }, 1360 /* GUCODE_SEL 6 Code Descriptor for user */ 1361 { 0x0, /* segment base address */ 1362 0xfffff, /* length - all address space */ 1363 SDT_MEMERA, /* segment type */ 1364 SEL_UPL, /* segment descriptor priority level */ 1365 1, /* segment descriptor present */ 1366 0, 0, 1367 1, /* default 32 vs 16 bit size */ 1368 1 /* limit granularity (byte/page units)*/ }, 1369 /* GUDATA_SEL 7 Data Descriptor for user */ 1370 { 0x0, /* segment base address */ 1371 0xfffff, /* length - all address space */ 1372 SDT_MEMRWA, /* segment type */ 1373 SEL_UPL, /* segment descriptor priority level */ 1374 1, /* segment descriptor present */ 1375 0, 0, 1376 1, /* default 32 vs 16 bit size */ 1377 1 /* limit granularity (byte/page units)*/ }, 1378 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1379 { 0x400, /* segment base address */ 1380 0xfffff, /* length */ 1381 SDT_MEMRWA, /* segment type */ 1382 0, /* segment descriptor priority level */ 1383 1, /* segment descriptor present */ 1384 0, 0, 1385 1, /* default 32 vs 16 bit size */ 1386 1 /* limit granularity (byte/page units)*/ }, 1387 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1388 { 1389 0x0, /* segment base address */ 1390 sizeof(struct i386tss)-1,/* length */ 1391 SDT_SYS386TSS, /* segment type */ 1392 0, /* segment descriptor priority level */ 1393 1, /* segment descriptor present */ 1394 0, 0, 1395 0, /* unused - default 32 vs 16 bit size */ 1396 0 /* limit granularity (byte/page units)*/ }, 1397 /* GLDT_SEL 10 LDT Descriptor */ 1398 { (int) ldt, /* segment base address */ 1399 sizeof(ldt)-1, /* length - all address space */ 1400 SDT_SYSLDT, /* segment type */ 1401 SEL_UPL, /* segment descriptor priority level */ 1402 1, /* segment descriptor present */ 1403 0, 0, 1404 0, /* unused - default 32 vs 16 bit size */ 1405 0 /* limit granularity (byte/page units)*/ }, 1406 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1407 { (int) ldt, /* segment base address */ 1408 (512 * sizeof(union descriptor)-1), /* length */ 1409 SDT_SYSLDT, /* segment type */ 1410 0, /* segment descriptor priority level */ 1411 1, /* segment descriptor present */ 1412 0, 0, 1413 0, /* unused - default 32 vs 16 bit size */ 1414 0 /* limit granularity (byte/page units)*/ }, 1415 /* GPANIC_SEL 12 Panic Tss Descriptor */ 1416 { (int) &dblfault_tss, /* segment base address */ 1417 sizeof(struct i386tss)-1,/* length - all address space */ 1418 SDT_SYS386TSS, /* segment type */ 1419 0, /* segment descriptor priority level */ 1420 1, /* segment descriptor present */ 1421 0, 0, 1422 0, /* unused - default 32 vs 16 bit size */ 1423 0 /* limit granularity (byte/page units)*/ }, 1424 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1425 { 0, /* segment base address (overwritten) */ 1426 0xfffff, /* length */ 1427 SDT_MEMERA, /* segment type */ 1428 0, /* segment descriptor priority level */ 1429 1, /* segment descriptor present */ 1430 0, 0, 1431 0, /* default 32 vs 16 bit size */ 1432 1 /* limit granularity (byte/page units)*/ }, 1433 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1434 { 0, /* segment base address (overwritten) */ 1435 0xfffff, /* length */ 1436 SDT_MEMERA, /* segment type */ 1437 0, /* segment descriptor priority level */ 1438 1, /* segment descriptor present */ 1439 0, 0, 1440 0, /* default 32 vs 16 bit size */ 1441 1 /* limit granularity (byte/page units)*/ }, 1442 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1443 { 0, /* segment base address (overwritten) */ 1444 0xfffff, /* length */ 1445 SDT_MEMRWA, /* segment type */ 1446 0, /* segment descriptor priority level */ 1447 1, /* segment descriptor present */ 1448 0, 0, 1449 1, /* default 32 vs 16 bit size */ 1450 1 /* limit granularity (byte/page units)*/ }, 1451 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1452 { 0, /* segment base address (overwritten) */ 1453 0xfffff, /* length */ 1454 SDT_MEMRWA, /* segment type */ 1455 0, /* segment descriptor priority level */ 1456 1, /* segment descriptor present */ 1457 0, 0, 1458 0, /* default 32 vs 16 bit size */ 1459 1 /* limit granularity (byte/page units)*/ }, 1460 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1461 { 0, /* segment base address (overwritten) */ 1462 0xfffff, /* length */ 1463 SDT_MEMRWA, /* segment type */ 1464 0, /* segment descriptor priority level */ 1465 1, /* segment descriptor present */ 1466 0, 0, 1467 0, /* default 32 vs 16 bit size */ 1468 1 /* limit granularity (byte/page units)*/ }, 1469 /* GNDIS_SEL 18 NDIS Descriptor */ 1470 { 0x0, /* segment base address */ 1471 0x0, /* length */ 1472 0, /* segment type */ 1473 0, /* segment descriptor priority level */ 1474 0, /* segment descriptor present */ 1475 0, 0, 1476 0, /* default 32 vs 16 bit size */ 1477 0 /* limit granularity (byte/page units)*/ }, 1478 }; 1479 1480 static struct soft_segment_descriptor ldt_segs[] = { 1481 /* Null Descriptor - overwritten by call gate */ 1482 { 0x0, /* segment base address */ 1483 0x0, /* length - all address space */ 1484 0, /* segment type */ 1485 0, /* segment descriptor priority level */ 1486 0, /* segment descriptor present */ 1487 0, 0, 1488 0, /* default 32 vs 16 bit size */ 1489 0 /* limit granularity (byte/page units)*/ }, 1490 /* Null Descriptor - overwritten by call gate */ 1491 { 0x0, /* segment base address */ 1492 0x0, /* length - all address space */ 1493 0, /* segment type */ 1494 0, /* segment descriptor priority level */ 1495 0, /* segment descriptor present */ 1496 0, 0, 1497 0, /* default 32 vs 16 bit size */ 1498 0 /* limit granularity (byte/page units)*/ }, 1499 /* Null Descriptor - overwritten by call gate */ 1500 { 0x0, /* segment base address */ 1501 0x0, /* length - all address space */ 1502 0, /* segment type */ 1503 0, /* segment descriptor priority level */ 1504 0, /* segment descriptor present */ 1505 0, 0, 1506 0, /* default 32 vs 16 bit size */ 1507 0 /* limit granularity (byte/page units)*/ }, 1508 /* Code Descriptor for user */ 1509 { 0x0, /* segment base address */ 1510 0xfffff, /* length - all address space */ 1511 SDT_MEMERA, /* segment type */ 1512 SEL_UPL, /* segment descriptor priority level */ 1513 1, /* segment descriptor present */ 1514 0, 0, 1515 1, /* default 32 vs 16 bit size */ 1516 1 /* limit granularity (byte/page units)*/ }, 1517 /* Null Descriptor - overwritten by call gate */ 1518 { 0x0, /* segment base address */ 1519 0x0, /* length - all address space */ 1520 0, /* segment type */ 1521 0, /* segment descriptor priority level */ 1522 0, /* segment descriptor present */ 1523 0, 0, 1524 0, /* default 32 vs 16 bit size */ 1525 0 /* limit granularity (byte/page units)*/ }, 1526 /* Data Descriptor for user */ 1527 { 0x0, /* segment base address */ 1528 0xfffff, /* length - all address space */ 1529 SDT_MEMRWA, /* segment type */ 1530 SEL_UPL, /* segment descriptor priority level */ 1531 1, /* segment descriptor present */ 1532 0, 0, 1533 1, /* default 32 vs 16 bit size */ 1534 1 /* limit granularity (byte/page units)*/ }, 1535 }; 1536 1537 void 1538 setidt(idx, func, typ, dpl, selec) 1539 int idx; 1540 inthand_t *func; 1541 int typ; 1542 int dpl; 1543 int selec; 1544 { 1545 struct gate_descriptor *ip; 1546 1547 ip = idt + idx; 1548 ip->gd_looffset = (int)func; 1549 ip->gd_selector = selec; 1550 ip->gd_stkcpy = 0; 1551 ip->gd_xx = 0; 1552 ip->gd_type = typ; 1553 ip->gd_dpl = dpl; 1554 ip->gd_p = 1; 1555 ip->gd_hioffset = ((int)func)>>16 ; 1556 } 1557 1558 extern inthand_t 1559 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1560 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1561 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1562 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1563 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1564 1565 #ifdef DDB 1566 /* 1567 * Display the index and function name of any IDT entries that don't use 1568 * the default 'rsvd' entry point. 1569 */ 1570 DB_SHOW_COMMAND(idt, db_show_idt) 1571 { 1572 struct gate_descriptor *ip; 1573 int idx; 1574 uintptr_t func; 1575 1576 ip = idt; 1577 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1578 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1579 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1580 db_printf("%3d\t", idx); 1581 db_printsym(func, DB_STGY_PROC); 1582 db_printf("\n"); 1583 } 1584 ip++; 1585 } 1586 } 1587 #endif 1588 1589 void 1590 sdtossd(sd, ssd) 1591 struct segment_descriptor *sd; 1592 struct soft_segment_descriptor *ssd; 1593 { 1594 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1595 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1596 ssd->ssd_type = sd->sd_type; 1597 ssd->ssd_dpl = sd->sd_dpl; 1598 ssd->ssd_p = sd->sd_p; 1599 ssd->ssd_def32 = sd->sd_def32; 1600 ssd->ssd_gran = sd->sd_gran; 1601 } 1602 1603 /* 1604 * Populate the (physmap) array with base/bound pairs describing the 1605 * available physical memory in the system, then test this memory and 1606 * build the phys_avail array describing the actually-available memory. 1607 * 1608 * If we cannot accurately determine the physical memory map, then use 1609 * value from the 0xE801 call, and failing that, the RTC. 1610 * 1611 * Total memory size may be set by the kernel environment variable 1612 * hw.physmem or the compile-time define MAXMEM. 1613 * 1614 * XXX first should be vm_paddr_t. 1615 */ 1616 static void 1617 getmemsize(int first) 1618 { 1619 int i, off, physmap_idx, pa_indx, da_indx; 1620 int pg_n; 1621 u_long physmem_tunable; 1622 u_int extmem, under16; 1623 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1624 pt_entry_t *pte; 1625 quad_t dcons_addr, dcons_size; 1626 1627 bzero(physmap, sizeof(physmap)); 1628 1629 /* XXX - some of EPSON machines can't use PG_N */ 1630 pg_n = PG_N; 1631 if (pc98_machine_type & M_EPSON_PC98) { 1632 switch (epson_machine_id) { 1633 #ifdef WB_CACHE 1634 default: 1635 #endif 1636 case EPSON_PC486_HX: 1637 case EPSON_PC486_HG: 1638 case EPSON_PC486_HA: 1639 pg_n = 0; 1640 break; 1641 } 1642 } 1643 1644 /* 1645 * Perform "base memory" related probes & setup 1646 */ 1647 under16 = pc98_getmemsize(&basemem, &extmem); 1648 if (basemem > 640) { 1649 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1650 basemem); 1651 basemem = 640; 1652 } 1653 1654 /* 1655 * XXX if biosbasemem is now < 640, there is a `hole' 1656 * between the end of base memory and the start of 1657 * ISA memory. The hole may be empty or it may 1658 * contain BIOS code or data. Map it read/write so 1659 * that the BIOS can write to it. (Memory from 0 to 1660 * the physical end of the kernel is mapped read-only 1661 * to begin with and then parts of it are remapped. 1662 * The parts that aren't remapped form holes that 1663 * remain read-only and are unused by the kernel. 1664 * The base memory area is below the physical end of 1665 * the kernel and right now forms a read-only hole. 1666 * The part of it from PAGE_SIZE to 1667 * (trunc_page(biosbasemem * 1024) - 1) will be 1668 * remapped and used by the kernel later.) 1669 * 1670 * This code is similar to the code used in 1671 * pmap_mapdev, but since no memory needs to be 1672 * allocated we simply change the mapping. 1673 */ 1674 for (pa = trunc_page(basemem * 1024); 1675 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1676 pmap_kenter(KERNBASE + pa, pa); 1677 1678 /* 1679 * if basemem != 640, map pages r/w into vm86 page table so 1680 * that the bios can scribble on it. 1681 */ 1682 pte = (pt_entry_t *)vm86paddr; 1683 for (i = basemem / 4; i < 160; i++) 1684 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1685 1686 physmap[0] = 0; 1687 physmap[1] = basemem * 1024; 1688 physmap_idx = 2; 1689 physmap[physmap_idx] = 0x100000; 1690 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1691 1692 /* 1693 * Now, physmap contains a map of physical memory. 1694 */ 1695 1696 #ifdef SMP 1697 /* make hole for AP bootstrap code */ 1698 physmap[1] = mp_bootaddress(physmap[1]); 1699 #endif 1700 1701 /* 1702 * Maxmem isn't the "maximum memory", it's one larger than the 1703 * highest page of the physical address space. It should be 1704 * called something like "Maxphyspage". We may adjust this 1705 * based on ``hw.physmem'' and the results of the memory test. 1706 */ 1707 Maxmem = atop(physmap[physmap_idx + 1]); 1708 1709 #ifdef MAXMEM 1710 Maxmem = MAXMEM / 4; 1711 #endif 1712 1713 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1714 Maxmem = atop(physmem_tunable); 1715 1716 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1717 (boothowto & RB_VERBOSE)) 1718 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1719 1720 /* 1721 * If Maxmem has been increased beyond what the system has detected, 1722 * extend the last memory segment to the new limit. 1723 */ 1724 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1725 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1726 1727 /* 1728 * We need to divide chunk if Maxmem is larger than 16MB and 1729 * under 16MB area is not full of memory. 1730 * (1) system area (15-16MB region) is cut off 1731 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY") 1732 */ 1733 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) { 1734 /* 15M - 16M region is cut off, so need to divide chunk */ 1735 physmap[physmap_idx + 1] = under16 * 1024; 1736 physmap_idx += 2; 1737 physmap[physmap_idx] = 0x1000000; 1738 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024; 1739 } 1740 1741 /* call pmap initialization to make new kernel address space */ 1742 pmap_bootstrap(first); 1743 1744 /* 1745 * Size up each available chunk of physical memory. 1746 */ 1747 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1748 pa_indx = 0; 1749 da_indx = 1; 1750 phys_avail[pa_indx++] = physmap[0]; 1751 phys_avail[pa_indx] = physmap[0]; 1752 dump_avail[da_indx] = physmap[0]; 1753 pte = CMAP1; 1754 1755 /* 1756 * Get dcons buffer address 1757 */ 1758 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1759 getenv_quad("dcons.size", &dcons_size) == 0) 1760 dcons_addr = 0; 1761 1762 /* 1763 * physmap is in bytes, so when converting to page boundaries, 1764 * round up the start address and round down the end address. 1765 */ 1766 for (i = 0; i <= physmap_idx; i += 2) { 1767 vm_paddr_t end; 1768 1769 end = ptoa((vm_paddr_t)Maxmem); 1770 if (physmap[i + 1] < end) 1771 end = trunc_page(physmap[i + 1]); 1772 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1773 int tmp, page_bad, full; 1774 int *ptr = (int *)CADDR1; 1775 1776 full = FALSE; 1777 /* 1778 * block out kernel memory as not available. 1779 */ 1780 if (pa >= KERNLOAD && pa < first) 1781 goto do_dump_avail; 1782 1783 /* 1784 * block out dcons buffer 1785 */ 1786 if (dcons_addr > 0 1787 && pa >= trunc_page(dcons_addr) 1788 && pa < dcons_addr + dcons_size) 1789 goto do_dump_avail; 1790 1791 page_bad = FALSE; 1792 1793 /* 1794 * map page into kernel: valid, read/write,non-cacheable 1795 */ 1796 *pte = pa | PG_V | PG_RW | pg_n; 1797 invltlb(); 1798 1799 tmp = *(int *)ptr; 1800 /* 1801 * Test for alternating 1's and 0's 1802 */ 1803 *(volatile int *)ptr = 0xaaaaaaaa; 1804 if (*(volatile int *)ptr != 0xaaaaaaaa) 1805 page_bad = TRUE; 1806 /* 1807 * Test for alternating 0's and 1's 1808 */ 1809 *(volatile int *)ptr = 0x55555555; 1810 if (*(volatile int *)ptr != 0x55555555) 1811 page_bad = TRUE; 1812 /* 1813 * Test for all 1's 1814 */ 1815 *(volatile int *)ptr = 0xffffffff; 1816 if (*(volatile int *)ptr != 0xffffffff) 1817 page_bad = TRUE; 1818 /* 1819 * Test for all 0's 1820 */ 1821 *(volatile int *)ptr = 0x0; 1822 if (*(volatile int *)ptr != 0x0) 1823 page_bad = TRUE; 1824 /* 1825 * Restore original value. 1826 */ 1827 *(int *)ptr = tmp; 1828 1829 /* 1830 * Adjust array of valid/good pages. 1831 */ 1832 if (page_bad == TRUE) 1833 continue; 1834 /* 1835 * If this good page is a continuation of the 1836 * previous set of good pages, then just increase 1837 * the end pointer. Otherwise start a new chunk. 1838 * Note that "end" points one higher than end, 1839 * making the range >= start and < end. 1840 * If we're also doing a speculative memory 1841 * test and we at or past the end, bump up Maxmem 1842 * so that we keep going. The first bad page 1843 * will terminate the loop. 1844 */ 1845 if (phys_avail[pa_indx] == pa) { 1846 phys_avail[pa_indx] += PAGE_SIZE; 1847 } else { 1848 pa_indx++; 1849 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1850 printf( 1851 "Too many holes in the physical address space, giving up\n"); 1852 pa_indx--; 1853 full = TRUE; 1854 goto do_dump_avail; 1855 } 1856 phys_avail[pa_indx++] = pa; /* start */ 1857 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1858 } 1859 physmem++; 1860 do_dump_avail: 1861 if (dump_avail[da_indx] == pa) { 1862 dump_avail[da_indx] += PAGE_SIZE; 1863 } else { 1864 da_indx++; 1865 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1866 da_indx--; 1867 goto do_next; 1868 } 1869 dump_avail[da_indx++] = pa; /* start */ 1870 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1871 } 1872 do_next: 1873 if (full) 1874 break; 1875 } 1876 } 1877 *pte = 0; 1878 invltlb(); 1879 1880 /* 1881 * XXX 1882 * The last chunk must contain at least one page plus the message 1883 * buffer to avoid complicating other code (message buffer address 1884 * calculation, etc.). 1885 */ 1886 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1887 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1888 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1889 phys_avail[pa_indx--] = 0; 1890 phys_avail[pa_indx--] = 0; 1891 } 1892 1893 Maxmem = atop(phys_avail[pa_indx]); 1894 1895 /* Trim off space for the message buffer. */ 1896 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1897 1898 /* Map the message buffer. */ 1899 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1900 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1901 off); 1902 } 1903 1904 void 1905 init386(first) 1906 int first; 1907 { 1908 struct gate_descriptor *gdp; 1909 int gsel_tss, metadata_missing, x; 1910 struct pcpu *pc; 1911 1912 thread0.td_kstack = proc0kstack; 1913 thread0.td_pcb = (struct pcb *) 1914 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1915 1916 /* 1917 * This may be done better later if it gets more high level 1918 * components in it. If so just link td->td_proc here. 1919 */ 1920 proc_linkup0(&proc0, &thread0); 1921 1922 /* 1923 * Initialize DMAC 1924 */ 1925 pc98_init_dmac(); 1926 1927 metadata_missing = 0; 1928 if (bootinfo.bi_modulep) { 1929 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1930 preload_bootstrap_relocate(KERNBASE); 1931 } else { 1932 metadata_missing = 1; 1933 } 1934 if (envmode == 1) 1935 kern_envp = static_env; 1936 else if (bootinfo.bi_envp) 1937 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1938 1939 /* Init basic tunables, hz etc */ 1940 init_param1(); 1941 1942 /* 1943 * Make gdt memory segments. All segments cover the full 4GB 1944 * of address space and permissions are enforced at page level. 1945 */ 1946 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1947 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1948 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 1949 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 1950 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 1951 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 1952 1953 #ifdef SMP 1954 pc = &SMP_prvspace[0].pcpu; 1955 #else 1956 pc = &__pcpu; 1957 #endif 1958 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 1959 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 1960 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 1961 1962 for (x = 0; x < NGDT; x++) 1963 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1964 1965 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1966 r_gdt.rd_base = (int) gdt; 1967 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN); 1968 lgdt(&r_gdt); 1969 1970 pcpu_init(pc, 0, sizeof(struct pcpu)); 1971 PCPU_SET(prvspace, pc); 1972 PCPU_SET(curthread, &thread0); 1973 PCPU_SET(curpcb, thread0.td_pcb); 1974 1975 /* 1976 * Initialize mutexes. 1977 * 1978 * icu_lock: in order to allow an interrupt to occur in a critical 1979 * section, to set pcpu->ipending (etc...) properly, we 1980 * must be able to get the icu lock, so it can't be 1981 * under witness. 1982 */ 1983 mutex_init(); 1984 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE); 1985 1986 /* make ldt memory segments */ 1987 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 1988 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 1989 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 1990 ssdtosd(&ldt_segs[x], &ldt[x].sd); 1991 1992 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 1993 lldt(_default_ldt); 1994 PCPU_SET(currentldt, _default_ldt); 1995 1996 /* exceptions */ 1997 for (x = 0; x < NIDT; x++) 1998 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 1999 GSEL(GCODE_SEL, SEL_KPL)); 2000 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2001 GSEL(GCODE_SEL, SEL_KPL)); 2002 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2003 GSEL(GCODE_SEL, SEL_KPL)); 2004 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2005 GSEL(GCODE_SEL, SEL_KPL)); 2006 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2007 GSEL(GCODE_SEL, SEL_KPL)); 2008 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2009 GSEL(GCODE_SEL, SEL_KPL)); 2010 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2011 GSEL(GCODE_SEL, SEL_KPL)); 2012 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2013 GSEL(GCODE_SEL, SEL_KPL)); 2014 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2015 , GSEL(GCODE_SEL, SEL_KPL)); 2016 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2017 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2018 GSEL(GCODE_SEL, SEL_KPL)); 2019 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2020 GSEL(GCODE_SEL, SEL_KPL)); 2021 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2022 GSEL(GCODE_SEL, SEL_KPL)); 2023 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2024 GSEL(GCODE_SEL, SEL_KPL)); 2025 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2026 GSEL(GCODE_SEL, SEL_KPL)); 2027 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2028 GSEL(GCODE_SEL, SEL_KPL)); 2029 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2030 GSEL(GCODE_SEL, SEL_KPL)); 2031 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2032 GSEL(GCODE_SEL, SEL_KPL)); 2033 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2034 GSEL(GCODE_SEL, SEL_KPL)); 2035 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2036 GSEL(GCODE_SEL, SEL_KPL)); 2037 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2038 GSEL(GCODE_SEL, SEL_KPL)); 2039 2040 r_idt.rd_limit = sizeof(idt0) - 1; 2041 r_idt.rd_base = (int) idt; 2042 lidt(&r_idt); 2043 2044 /* 2045 * Initialize the i8254 before the console so that console 2046 * initialization can use DELAY(). 2047 */ 2048 i8254_init(); 2049 2050 /* 2051 * Initialize the console before we print anything out. 2052 */ 2053 cninit(); 2054 2055 if (metadata_missing) 2056 printf("WARNING: loader(8) metadata is missing!\n"); 2057 2058 #ifdef DEV_ISA 2059 atpic_startup(); 2060 #endif 2061 2062 #ifdef DDB 2063 ksym_start = bootinfo.bi_symtab; 2064 ksym_end = bootinfo.bi_esymtab; 2065 #endif 2066 2067 kdb_init(); 2068 2069 #ifdef KDB 2070 if (boothowto & RB_KDB) 2071 kdb_enter("Boot flags requested debugger"); 2072 #endif 2073 2074 finishidentcpu(); /* Final stage of CPU initialization */ 2075 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2076 GSEL(GCODE_SEL, SEL_KPL)); 2077 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2078 GSEL(GCODE_SEL, SEL_KPL)); 2079 initializecpu(); /* Initialize CPU registers */ 2080 2081 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2082 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2083 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2084 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2085 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2086 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2087 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2088 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2089 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2090 ltr(gsel_tss); 2091 2092 /* pointer to selector slot for %fs/%gs */ 2093 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2094 2095 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2096 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2097 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2098 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2099 dblfault_tss.tss_cr3 = (int)IdlePTD; 2100 dblfault_tss.tss_eip = (int)dblfault_handler; 2101 dblfault_tss.tss_eflags = PSL_KERNEL; 2102 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2103 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2104 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2105 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2106 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2107 2108 vm86_initialize(); 2109 getmemsize(first); 2110 init_param2(physmem); 2111 2112 /* now running on new page tables, configured,and u/iom is accessible */ 2113 2114 msgbufinit(msgbufp, MSGBUF_SIZE); 2115 2116 /* make a call gate to reenter kernel with */ 2117 gdp = &ldt[LSYS5CALLS_SEL].gd; 2118 2119 x = (int) &IDTVEC(lcall_syscall); 2120 gdp->gd_looffset = x; 2121 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2122 gdp->gd_stkcpy = 1; 2123 gdp->gd_type = SDT_SYS386CGT; 2124 gdp->gd_dpl = SEL_UPL; 2125 gdp->gd_p = 1; 2126 gdp->gd_hioffset = x >> 16; 2127 2128 /* XXX does this work? */ 2129 /* XXX yes! */ 2130 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2131 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2132 2133 /* transfer to user mode */ 2134 2135 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2136 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2137 2138 /* setup proc 0's pcb */ 2139 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 2140 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2141 thread0.td_pcb->pcb_ext = 0; 2142 thread0.td_frame = &proc0_tf; 2143 } 2144 2145 void 2146 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2147 { 2148 2149 } 2150 2151 void 2152 spinlock_enter(void) 2153 { 2154 struct thread *td; 2155 2156 td = curthread; 2157 if (td->td_md.md_spinlock_count == 0) 2158 td->td_md.md_saved_flags = intr_disable(); 2159 td->td_md.md_spinlock_count++; 2160 critical_enter(); 2161 } 2162 2163 void 2164 spinlock_exit(void) 2165 { 2166 struct thread *td; 2167 2168 td = curthread; 2169 critical_exit(); 2170 td->td_md.md_spinlock_count--; 2171 if (td->td_md.md_spinlock_count == 0) 2172 intr_restore(td->td_md.md_saved_flags); 2173 } 2174 2175 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2176 static void f00f_hack(void *unused); 2177 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL) 2178 2179 static void 2180 f00f_hack(void *unused) 2181 { 2182 struct gate_descriptor *new_idt; 2183 vm_offset_t tmp; 2184 2185 if (!has_f00f_bug) 2186 return; 2187 2188 GIANT_REQUIRED; 2189 2190 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2191 2192 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2193 if (tmp == 0) 2194 panic("kmem_alloc returned 0"); 2195 2196 /* Put the problematic entry (#6) at the end of the lower page. */ 2197 new_idt = (struct gate_descriptor*) 2198 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2199 bcopy(idt, new_idt, sizeof(idt0)); 2200 r_idt.rd_base = (u_int)new_idt; 2201 lidt(&r_idt); 2202 idt = new_idt; 2203 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2204 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2205 panic("vm_map_protect failed"); 2206 } 2207 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2208 2209 /* 2210 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2211 * we want to start a backtrace from the function that caused us to enter 2212 * the debugger. We have the context in the trapframe, but base the trace 2213 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2214 * enough for a backtrace. 2215 */ 2216 void 2217 makectx(struct trapframe *tf, struct pcb *pcb) 2218 { 2219 2220 pcb->pcb_edi = tf->tf_edi; 2221 pcb->pcb_esi = tf->tf_esi; 2222 pcb->pcb_ebp = tf->tf_ebp; 2223 pcb->pcb_ebx = tf->tf_ebx; 2224 pcb->pcb_eip = tf->tf_eip; 2225 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2226 } 2227 2228 int 2229 ptrace_set_pc(struct thread *td, u_long addr) 2230 { 2231 2232 td->td_frame->tf_eip = addr; 2233 return (0); 2234 } 2235 2236 int 2237 ptrace_single_step(struct thread *td) 2238 { 2239 td->td_frame->tf_eflags |= PSL_T; 2240 return (0); 2241 } 2242 2243 int 2244 ptrace_clear_single_step(struct thread *td) 2245 { 2246 td->td_frame->tf_eflags &= ~PSL_T; 2247 return (0); 2248 } 2249 2250 int 2251 fill_regs(struct thread *td, struct reg *regs) 2252 { 2253 struct pcb *pcb; 2254 struct trapframe *tp; 2255 2256 tp = td->td_frame; 2257 pcb = td->td_pcb; 2258 regs->r_fs = tp->tf_fs; 2259 regs->r_es = tp->tf_es; 2260 regs->r_ds = tp->tf_ds; 2261 regs->r_edi = tp->tf_edi; 2262 regs->r_esi = tp->tf_esi; 2263 regs->r_ebp = tp->tf_ebp; 2264 regs->r_ebx = tp->tf_ebx; 2265 regs->r_edx = tp->tf_edx; 2266 regs->r_ecx = tp->tf_ecx; 2267 regs->r_eax = tp->tf_eax; 2268 regs->r_eip = tp->tf_eip; 2269 regs->r_cs = tp->tf_cs; 2270 regs->r_eflags = tp->tf_eflags; 2271 regs->r_esp = tp->tf_esp; 2272 regs->r_ss = tp->tf_ss; 2273 regs->r_gs = pcb->pcb_gs; 2274 return (0); 2275 } 2276 2277 int 2278 set_regs(struct thread *td, struct reg *regs) 2279 { 2280 struct pcb *pcb; 2281 struct trapframe *tp; 2282 2283 tp = td->td_frame; 2284 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2285 !CS_SECURE(regs->r_cs)) 2286 return (EINVAL); 2287 pcb = td->td_pcb; 2288 tp->tf_fs = regs->r_fs; 2289 tp->tf_es = regs->r_es; 2290 tp->tf_ds = regs->r_ds; 2291 tp->tf_edi = regs->r_edi; 2292 tp->tf_esi = regs->r_esi; 2293 tp->tf_ebp = regs->r_ebp; 2294 tp->tf_ebx = regs->r_ebx; 2295 tp->tf_edx = regs->r_edx; 2296 tp->tf_ecx = regs->r_ecx; 2297 tp->tf_eax = regs->r_eax; 2298 tp->tf_eip = regs->r_eip; 2299 tp->tf_cs = regs->r_cs; 2300 tp->tf_eflags = regs->r_eflags; 2301 tp->tf_esp = regs->r_esp; 2302 tp->tf_ss = regs->r_ss; 2303 pcb->pcb_gs = regs->r_gs; 2304 return (0); 2305 } 2306 2307 #ifdef CPU_ENABLE_SSE 2308 static void 2309 fill_fpregs_xmm(sv_xmm, sv_87) 2310 struct savexmm *sv_xmm; 2311 struct save87 *sv_87; 2312 { 2313 register struct env87 *penv_87 = &sv_87->sv_env; 2314 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2315 int i; 2316 2317 bzero(sv_87, sizeof(*sv_87)); 2318 2319 /* FPU control/status */ 2320 penv_87->en_cw = penv_xmm->en_cw; 2321 penv_87->en_sw = penv_xmm->en_sw; 2322 penv_87->en_tw = penv_xmm->en_tw; 2323 penv_87->en_fip = penv_xmm->en_fip; 2324 penv_87->en_fcs = penv_xmm->en_fcs; 2325 penv_87->en_opcode = penv_xmm->en_opcode; 2326 penv_87->en_foo = penv_xmm->en_foo; 2327 penv_87->en_fos = penv_xmm->en_fos; 2328 2329 /* FPU registers */ 2330 for (i = 0; i < 8; ++i) 2331 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2332 } 2333 2334 static void 2335 set_fpregs_xmm(sv_87, sv_xmm) 2336 struct save87 *sv_87; 2337 struct savexmm *sv_xmm; 2338 { 2339 register struct env87 *penv_87 = &sv_87->sv_env; 2340 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2341 int i; 2342 2343 /* FPU control/status */ 2344 penv_xmm->en_cw = penv_87->en_cw; 2345 penv_xmm->en_sw = penv_87->en_sw; 2346 penv_xmm->en_tw = penv_87->en_tw; 2347 penv_xmm->en_fip = penv_87->en_fip; 2348 penv_xmm->en_fcs = penv_87->en_fcs; 2349 penv_xmm->en_opcode = penv_87->en_opcode; 2350 penv_xmm->en_foo = penv_87->en_foo; 2351 penv_xmm->en_fos = penv_87->en_fos; 2352 2353 /* FPU registers */ 2354 for (i = 0; i < 8; ++i) 2355 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2356 } 2357 #endif /* CPU_ENABLE_SSE */ 2358 2359 int 2360 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2361 { 2362 #ifdef CPU_ENABLE_SSE 2363 if (cpu_fxsr) { 2364 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2365 (struct save87 *)fpregs); 2366 return (0); 2367 } 2368 #endif /* CPU_ENABLE_SSE */ 2369 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2370 return (0); 2371 } 2372 2373 int 2374 set_fpregs(struct thread *td, struct fpreg *fpregs) 2375 { 2376 #ifdef CPU_ENABLE_SSE 2377 if (cpu_fxsr) { 2378 set_fpregs_xmm((struct save87 *)fpregs, 2379 &td->td_pcb->pcb_save.sv_xmm); 2380 return (0); 2381 } 2382 #endif /* CPU_ENABLE_SSE */ 2383 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2384 return (0); 2385 } 2386 2387 /* 2388 * Get machine context. 2389 */ 2390 int 2391 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2392 { 2393 struct trapframe *tp; 2394 2395 tp = td->td_frame; 2396 2397 PROC_LOCK(curthread->td_proc); 2398 mcp->mc_onstack = sigonstack(tp->tf_esp); 2399 PROC_UNLOCK(curthread->td_proc); 2400 mcp->mc_gs = td->td_pcb->pcb_gs; 2401 mcp->mc_fs = tp->tf_fs; 2402 mcp->mc_es = tp->tf_es; 2403 mcp->mc_ds = tp->tf_ds; 2404 mcp->mc_edi = tp->tf_edi; 2405 mcp->mc_esi = tp->tf_esi; 2406 mcp->mc_ebp = tp->tf_ebp; 2407 mcp->mc_isp = tp->tf_isp; 2408 mcp->mc_eflags = tp->tf_eflags; 2409 if (flags & GET_MC_CLEAR_RET) { 2410 mcp->mc_eax = 0; 2411 mcp->mc_edx = 0; 2412 mcp->mc_eflags &= ~PSL_C; 2413 } else { 2414 mcp->mc_eax = tp->tf_eax; 2415 mcp->mc_edx = tp->tf_edx; 2416 } 2417 mcp->mc_ebx = tp->tf_ebx; 2418 mcp->mc_ecx = tp->tf_ecx; 2419 mcp->mc_eip = tp->tf_eip; 2420 mcp->mc_cs = tp->tf_cs; 2421 mcp->mc_esp = tp->tf_esp; 2422 mcp->mc_ss = tp->tf_ss; 2423 mcp->mc_len = sizeof(*mcp); 2424 get_fpcontext(td, mcp); 2425 return (0); 2426 } 2427 2428 /* 2429 * Set machine context. 2430 * 2431 * However, we don't set any but the user modifiable flags, and we won't 2432 * touch the cs selector. 2433 */ 2434 int 2435 set_mcontext(struct thread *td, const mcontext_t *mcp) 2436 { 2437 struct trapframe *tp; 2438 int eflags, ret; 2439 2440 tp = td->td_frame; 2441 if (mcp->mc_len != sizeof(*mcp)) 2442 return (EINVAL); 2443 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2444 (tp->tf_eflags & ~PSL_USERCHANGE); 2445 if ((ret = set_fpcontext(td, mcp)) == 0) { 2446 tp->tf_fs = mcp->mc_fs; 2447 tp->tf_es = mcp->mc_es; 2448 tp->tf_ds = mcp->mc_ds; 2449 tp->tf_edi = mcp->mc_edi; 2450 tp->tf_esi = mcp->mc_esi; 2451 tp->tf_ebp = mcp->mc_ebp; 2452 tp->tf_ebx = mcp->mc_ebx; 2453 tp->tf_edx = mcp->mc_edx; 2454 tp->tf_ecx = mcp->mc_ecx; 2455 tp->tf_eax = mcp->mc_eax; 2456 tp->tf_eip = mcp->mc_eip; 2457 tp->tf_eflags = eflags; 2458 tp->tf_esp = mcp->mc_esp; 2459 tp->tf_ss = mcp->mc_ss; 2460 td->td_pcb->pcb_gs = mcp->mc_gs; 2461 ret = 0; 2462 } 2463 return (ret); 2464 } 2465 2466 static void 2467 get_fpcontext(struct thread *td, mcontext_t *mcp) 2468 { 2469 #ifndef DEV_NPX 2470 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2471 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2472 #else 2473 union savefpu *addr; 2474 2475 /* 2476 * XXX mc_fpstate might be misaligned, since its declaration is not 2477 * unportabilized using __attribute__((aligned(16))) like the 2478 * declaration of struct savemm, and anyway, alignment doesn't work 2479 * for auto variables since we don't use gcc's pessimal stack 2480 * alignment. Work around this by abusing the spare fields after 2481 * mcp->mc_fpstate. 2482 * 2483 * XXX unpessimize most cases by only aligning when fxsave might be 2484 * called, although this requires knowing too much about 2485 * npxgetregs()'s internals. 2486 */ 2487 addr = (union savefpu *)&mcp->mc_fpstate; 2488 if (td == PCPU_GET(fpcurthread) && 2489 #ifdef CPU_ENABLE_SSE 2490 cpu_fxsr && 2491 #endif 2492 ((uintptr_t)(void *)addr & 0xF)) { 2493 do 2494 addr = (void *)((char *)addr + 4); 2495 while ((uintptr_t)(void *)addr & 0xF); 2496 } 2497 mcp->mc_ownedfp = npxgetregs(td, addr); 2498 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2499 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2500 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2501 } 2502 mcp->mc_fpformat = npxformat(); 2503 #endif 2504 } 2505 2506 static int 2507 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2508 { 2509 union savefpu *addr; 2510 2511 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2512 return (0); 2513 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2514 mcp->mc_fpformat != _MC_FPFMT_XMM) 2515 return (EINVAL); 2516 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2517 /* We don't care what state is left in the FPU or PCB. */ 2518 fpstate_drop(td); 2519 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2520 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2521 /* XXX align as above. */ 2522 addr = (union savefpu *)&mcp->mc_fpstate; 2523 if (td == PCPU_GET(fpcurthread) && 2524 #ifdef CPU_ENABLE_SSE 2525 cpu_fxsr && 2526 #endif 2527 ((uintptr_t)(void *)addr & 0xF)) { 2528 do 2529 addr = (void *)((char *)addr + 4); 2530 while ((uintptr_t)(void *)addr & 0xF); 2531 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2532 } 2533 #ifdef DEV_NPX 2534 #ifdef CPU_ENABLE_SSE 2535 if (cpu_fxsr) 2536 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask; 2537 #endif 2538 /* 2539 * XXX we violate the dubious requirement that npxsetregs() 2540 * be called with interrupts disabled. 2541 */ 2542 npxsetregs(td, addr); 2543 #endif 2544 /* 2545 * Don't bother putting things back where they were in the 2546 * misaligned case, since we know that the caller won't use 2547 * them again. 2548 */ 2549 } else 2550 return (EINVAL); 2551 return (0); 2552 } 2553 2554 static void 2555 fpstate_drop(struct thread *td) 2556 { 2557 register_t s; 2558 2559 s = intr_disable(); 2560 #ifdef DEV_NPX 2561 if (PCPU_GET(fpcurthread) == td) 2562 npxdrop(); 2563 #endif 2564 /* 2565 * XXX force a full drop of the npx. The above only drops it if we 2566 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2567 * 2568 * XXX I don't much like npxgetregs()'s semantics of doing a full 2569 * drop. Dropping only to the pcb matches fnsave's behaviour. 2570 * We only need to drop to !PCB_INITDONE in sendsig(). But 2571 * sendsig() is the only caller of npxgetregs()... perhaps we just 2572 * have too many layers. 2573 */ 2574 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2575 intr_restore(s); 2576 } 2577 2578 int 2579 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2580 { 2581 struct pcb *pcb; 2582 2583 if (td == NULL) { 2584 dbregs->dr[0] = rdr0(); 2585 dbregs->dr[1] = rdr1(); 2586 dbregs->dr[2] = rdr2(); 2587 dbregs->dr[3] = rdr3(); 2588 dbregs->dr[4] = rdr4(); 2589 dbregs->dr[5] = rdr5(); 2590 dbregs->dr[6] = rdr6(); 2591 dbregs->dr[7] = rdr7(); 2592 } else { 2593 pcb = td->td_pcb; 2594 dbregs->dr[0] = pcb->pcb_dr0; 2595 dbregs->dr[1] = pcb->pcb_dr1; 2596 dbregs->dr[2] = pcb->pcb_dr2; 2597 dbregs->dr[3] = pcb->pcb_dr3; 2598 dbregs->dr[4] = 0; 2599 dbregs->dr[5] = 0; 2600 dbregs->dr[6] = pcb->pcb_dr6; 2601 dbregs->dr[7] = pcb->pcb_dr7; 2602 } 2603 return (0); 2604 } 2605 2606 int 2607 set_dbregs(struct thread *td, struct dbreg *dbregs) 2608 { 2609 struct pcb *pcb; 2610 int i; 2611 2612 if (td == NULL) { 2613 load_dr0(dbregs->dr[0]); 2614 load_dr1(dbregs->dr[1]); 2615 load_dr2(dbregs->dr[2]); 2616 load_dr3(dbregs->dr[3]); 2617 load_dr4(dbregs->dr[4]); 2618 load_dr5(dbregs->dr[5]); 2619 load_dr6(dbregs->dr[6]); 2620 load_dr7(dbregs->dr[7]); 2621 } else { 2622 /* 2623 * Don't let an illegal value for dr7 get set. Specifically, 2624 * check for undefined settings. Setting these bit patterns 2625 * result in undefined behaviour and can lead to an unexpected 2626 * TRCTRAP. 2627 */ 2628 for (i = 0; i < 4; i++) { 2629 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2630 return (EINVAL); 2631 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02) 2632 return (EINVAL); 2633 } 2634 2635 pcb = td->td_pcb; 2636 2637 /* 2638 * Don't let a process set a breakpoint that is not within the 2639 * process's address space. If a process could do this, it 2640 * could halt the system by setting a breakpoint in the kernel 2641 * (if ddb was enabled). Thus, we need to check to make sure 2642 * that no breakpoints are being enabled for addresses outside 2643 * process's address space. 2644 * 2645 * XXX - what about when the watched area of the user's 2646 * address space is written into from within the kernel 2647 * ... wouldn't that still cause a breakpoint to be generated 2648 * from within kernel mode? 2649 */ 2650 2651 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2652 /* dr0 is enabled */ 2653 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2654 return (EINVAL); 2655 } 2656 2657 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2658 /* dr1 is enabled */ 2659 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2660 return (EINVAL); 2661 } 2662 2663 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2664 /* dr2 is enabled */ 2665 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2666 return (EINVAL); 2667 } 2668 2669 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2670 /* dr3 is enabled */ 2671 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2672 return (EINVAL); 2673 } 2674 2675 pcb->pcb_dr0 = dbregs->dr[0]; 2676 pcb->pcb_dr1 = dbregs->dr[1]; 2677 pcb->pcb_dr2 = dbregs->dr[2]; 2678 pcb->pcb_dr3 = dbregs->dr[3]; 2679 pcb->pcb_dr6 = dbregs->dr[6]; 2680 pcb->pcb_dr7 = dbregs->dr[7]; 2681 2682 pcb->pcb_flags |= PCB_DBREGS; 2683 } 2684 2685 return (0); 2686 } 2687 2688 /* 2689 * Return > 0 if a hardware breakpoint has been hit, and the 2690 * breakpoint was in user space. Return 0, otherwise. 2691 */ 2692 int 2693 user_dbreg_trap(void) 2694 { 2695 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2696 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2697 int nbp; /* number of breakpoints that triggered */ 2698 caddr_t addr[4]; /* breakpoint addresses */ 2699 int i; 2700 2701 dr7 = rdr7(); 2702 if ((dr7 & 0x000000ff) == 0) { 2703 /* 2704 * all GE and LE bits in the dr7 register are zero, 2705 * thus the trap couldn't have been caused by the 2706 * hardware debug registers 2707 */ 2708 return 0; 2709 } 2710 2711 nbp = 0; 2712 dr6 = rdr6(); 2713 bp = dr6 & 0x0000000f; 2714 2715 if (!bp) { 2716 /* 2717 * None of the breakpoint bits are set meaning this 2718 * trap was not caused by any of the debug registers 2719 */ 2720 return 0; 2721 } 2722 2723 /* 2724 * at least one of the breakpoints were hit, check to see 2725 * which ones and if any of them are user space addresses 2726 */ 2727 2728 if (bp & 0x01) { 2729 addr[nbp++] = (caddr_t)rdr0(); 2730 } 2731 if (bp & 0x02) { 2732 addr[nbp++] = (caddr_t)rdr1(); 2733 } 2734 if (bp & 0x04) { 2735 addr[nbp++] = (caddr_t)rdr2(); 2736 } 2737 if (bp & 0x08) { 2738 addr[nbp++] = (caddr_t)rdr3(); 2739 } 2740 2741 for (i = 0; i < nbp; i++) { 2742 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2743 /* 2744 * addr[i] is in user space 2745 */ 2746 return nbp; 2747 } 2748 } 2749 2750 /* 2751 * None of the breakpoints are in user space. 2752 */ 2753 return 0; 2754 } 2755 2756 #ifdef KDB 2757 2758 /* 2759 * Provide inb() and outb() as functions. They are normally only 2760 * available as macros calling inlined functions, thus cannot be 2761 * called from the debugger. 2762 * 2763 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2764 */ 2765 2766 #undef inb 2767 #undef outb 2768 2769 /* silence compiler warnings */ 2770 u_char inb(u_int); 2771 void outb(u_int, u_char); 2772 2773 u_char 2774 inb(u_int port) 2775 { 2776 u_char data; 2777 /* 2778 * We use %%dx and not %1 here because i/o is done at %dx and not at 2779 * %edx, while gcc generates inferior code (movw instead of movl) 2780 * if we tell it to load (u_short) port. 2781 */ 2782 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2783 return (data); 2784 } 2785 2786 void 2787 outb(u_int port, u_char data) 2788 { 2789 u_char al; 2790 /* 2791 * Use an unnecessary assignment to help gcc's register allocator. 2792 * This make a large difference for gcc-1.40 and a tiny difference 2793 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2794 * best results. gcc-2.6.0 can't handle this. 2795 */ 2796 al = data; 2797 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2798 } 2799 2800 #endif /* KDB */
Cache object: c179a83d1f40538f3ddb613483ee8a50
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