Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pc98/pc98/machdep.c
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1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD$"); 42 43 #include "opt_atalk.h" 44 #include "opt_compat.h" 45 #include "opt_cpu.h" 46 #include "opt_ddb.h" 47 #include "opt_inet.h" 48 #include "opt_ipx.h" 49 #include "opt_isa.h" 50 #include "opt_kstack_pages.h" 51 #include "opt_maxmem.h" 52 #include "opt_msgbuf.h" 53 #include "opt_npx.h" 54 #include "opt_perfmon.h" 55 56 #include <sys/param.h> 57 #include <sys/proc.h> 58 #include <sys/systm.h> 59 #include <sys/bio.h> 60 #include <sys/buf.h> 61 #include <sys/bus.h> 62 #include <sys/callout.h> 63 #include <sys/clock.h> 64 #include <sys/cons.h> 65 #include <sys/cpu.h> 66 #include <sys/eventhandler.h> 67 #include <sys/exec.h> 68 #include <sys/imgact.h> 69 #include <sys/kdb.h> 70 #include <sys/kernel.h> 71 #include <sys/ktr.h> 72 #include <sys/linker.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/memrange.h> 76 #include <sys/msgbuf.h> 77 #include <sys/mutex.h> 78 #include <sys/pcpu.h> 79 #include <sys/ptrace.h> 80 #include <sys/reboot.h> 81 #include <sys/sched.h> 82 #include <sys/signalvar.h> 83 #include <sys/sysctl.h> 84 #include <sys/sysent.h> 85 #include <sys/sysproto.h> 86 #include <sys/ucontext.h> 87 #include <sys/vmmeter.h> 88 89 #include <vm/vm.h> 90 #include <vm/vm_extern.h> 91 #include <vm/vm_kern.h> 92 #include <vm/vm_page.h> 93 #include <vm/vm_map.h> 94 #include <vm/vm_object.h> 95 #include <vm/vm_pager.h> 96 #include <vm/vm_param.h> 97 98 #ifdef DDB 99 #ifndef KDB 100 #error KDB must be enabled in order for DDB to work! 101 #endif 102 #include <ddb/ddb.h> 103 #include <ddb/db_sym.h> 104 #endif 105 106 #include <pc98/pc98/pc98_machdep.h> 107 108 #include <net/netisr.h> 109 110 #include <machine/bootinfo.h> 111 #include <machine/clock.h> 112 #include <machine/cpu.h> 113 #include <machine/cputypes.h> 114 #include <machine/intr_machdep.h> 115 #include <machine/md_var.h> 116 #include <machine/pc/bios.h> 117 #include <machine/pcb.h> 118 #include <machine/pcb_ext.h> 119 #include <machine/proc.h> 120 #include <machine/reg.h> 121 #include <machine/sigframe.h> 122 #include <machine/specialreg.h> 123 #include <machine/vm86.h> 124 #ifdef PERFMON 125 #include <machine/perfmon.h> 126 #endif 127 #ifdef SMP 128 #include <machine/smp.h> 129 #endif 130 131 #ifdef DEV_ISA 132 #include <i386/isa/icu.h> 133 #endif 134 135 /* Sanity check for __curthread() */ 136 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 137 138 extern void init386(int first); 139 extern void dblfault_handler(void); 140 141 extern void printcpuinfo(void); /* XXX header file */ 142 extern void finishidentcpu(void); 143 extern void panicifcpuunsupported(void); 144 extern void initializecpu(void); 145 146 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 147 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 148 149 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 150 #define CPU_ENABLE_SSE 151 #endif 152 153 static void cpu_startup(void *); 154 static void fpstate_drop(struct thread *td); 155 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 156 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 157 #ifdef CPU_ENABLE_SSE 158 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 159 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 160 #endif /* CPU_ENABLE_SSE */ 161 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 162 163 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */ 164 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */ 165 166 #ifdef DDB 167 extern vm_offset_t ksym_start, ksym_end; 168 #endif 169 170 int _udatasel, _ucodesel; 171 u_int basemem; 172 173 static int ispc98 = 1; 174 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 175 176 int cold = 1; 177 178 #ifdef COMPAT_43 179 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 180 #endif 181 #ifdef COMPAT_FREEBSD4 182 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 183 #endif 184 185 long Maxmem = 0; 186 long realmem = 0; 187 188 /* 189 * The number of PHYSMAP entries must be one less than the number of 190 * PHYSSEG entries because the PHYSMAP entry that spans the largest 191 * physical address that is accessible by ISA DMA is split into two 192 * PHYSSEG entries. 193 */ 194 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 195 196 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 197 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 198 199 /* must be 2 less so 0 0 can signal end of chunks */ 200 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 201 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 202 203 struct kva_md_info kmi; 204 205 static struct trapframe proc0_tf; 206 struct pcpu __pcpu[MAXCPU]; 207 208 struct mtx icu_lock; 209 210 struct mem_range_softc mem_range_softc; 211 212 static void 213 cpu_startup(dummy) 214 void *dummy; 215 { 216 /* 217 * Good {morning,afternoon,evening,night}. 218 */ 219 startrtclock(); 220 printcpuinfo(); 221 panicifcpuunsupported(); 222 #ifdef PERFMON 223 perfmon_init(); 224 #endif 225 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 226 ptoa((uintmax_t)Maxmem) / 1048576); 227 realmem = Maxmem; 228 /* 229 * Display any holes after the first chunk of extended memory. 230 */ 231 if (bootverbose) { 232 int indx; 233 234 printf("Physical memory chunk(s):\n"); 235 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 236 vm_paddr_t size; 237 238 size = phys_avail[indx + 1] - phys_avail[indx]; 239 printf( 240 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 241 (uintmax_t)phys_avail[indx], 242 (uintmax_t)phys_avail[indx + 1] - 1, 243 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 244 } 245 } 246 247 vm_ksubmap_init(&kmi); 248 249 printf("avail memory = %ju (%ju MB)\n", 250 ptoa((uintmax_t)cnt.v_free_count), 251 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 252 253 /* 254 * Set up buffers, so they can be used to read disk labels. 255 */ 256 bufinit(); 257 vm_pager_bufferinit(); 258 259 cpu_setregs(); 260 } 261 262 /* 263 * Send an interrupt to process. 264 * 265 * Stack is set up to allow sigcode stored 266 * at top to call routine, followed by kcall 267 * to sigreturn routine below. After sigreturn 268 * resets the signal mask, the stack, and the 269 * frame pointer, it returns to the user 270 * specified pc, psl. 271 */ 272 #ifdef COMPAT_43 273 static void 274 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 275 { 276 struct osigframe sf, *fp; 277 struct proc *p; 278 struct thread *td; 279 struct sigacts *psp; 280 struct trapframe *regs; 281 int sig; 282 int oonstack; 283 284 td = curthread; 285 p = td->td_proc; 286 PROC_LOCK_ASSERT(p, MA_OWNED); 287 sig = ksi->ksi_signo; 288 psp = p->p_sigacts; 289 mtx_assert(&psp->ps_mtx, MA_OWNED); 290 regs = td->td_frame; 291 oonstack = sigonstack(regs->tf_esp); 292 293 /* Allocate space for the signal handler context. */ 294 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 295 SIGISMEMBER(psp->ps_sigonstack, sig)) { 296 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 297 td->td_sigstk.ss_size - sizeof(struct osigframe)); 298 #if defined(COMPAT_43) 299 td->td_sigstk.ss_flags |= SS_ONSTACK; 300 #endif 301 } else 302 fp = (struct osigframe *)regs->tf_esp - 1; 303 304 /* Translate the signal if appropriate. */ 305 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 306 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 307 308 /* Build the argument list for the signal handler. */ 309 sf.sf_signum = sig; 310 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 311 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 312 /* Signal handler installed with SA_SIGINFO. */ 313 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 314 sf.sf_siginfo.si_signo = sig; 315 sf.sf_siginfo.si_code = ksi->ksi_code; 316 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 317 } else { 318 /* Old FreeBSD-style arguments. */ 319 sf.sf_arg2 = ksi->ksi_code; 320 sf.sf_addr = (register_t)ksi->ksi_addr; 321 sf.sf_ahu.sf_handler = catcher; 322 } 323 mtx_unlock(&psp->ps_mtx); 324 PROC_UNLOCK(p); 325 326 /* Save most if not all of trap frame. */ 327 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 328 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 329 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 330 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 331 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 332 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 333 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 334 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 335 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 336 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 337 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 338 sf.sf_siginfo.si_sc.sc_gs = rgs(); 339 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 340 341 /* Build the signal context to be used by osigreturn(). */ 342 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 343 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 344 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 345 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 346 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 347 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 348 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 349 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 350 351 /* 352 * If we're a vm86 process, we want to save the segment registers. 353 * We also change eflags to be our emulated eflags, not the actual 354 * eflags. 355 */ 356 if (regs->tf_eflags & PSL_VM) { 357 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 358 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 359 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 360 361 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 362 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 363 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 364 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 365 366 if (vm86->vm86_has_vme == 0) 367 sf.sf_siginfo.si_sc.sc_ps = 368 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 369 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 370 371 /* See sendsig() for comments. */ 372 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 373 } 374 375 /* 376 * Copy the sigframe out to the user's stack. 377 */ 378 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 379 #ifdef DEBUG 380 printf("process %ld has trashed its stack\n", (long)p->p_pid); 381 #endif 382 PROC_LOCK(p); 383 sigexit(td, SIGILL); 384 } 385 386 regs->tf_esp = (int)fp; 387 regs->tf_eip = PS_STRINGS - szosigcode; 388 regs->tf_eflags &= ~(PSL_T | PSL_D); 389 regs->tf_cs = _ucodesel; 390 regs->tf_ds = _udatasel; 391 regs->tf_es = _udatasel; 392 regs->tf_fs = _udatasel; 393 load_gs(_udatasel); 394 regs->tf_ss = _udatasel; 395 PROC_LOCK(p); 396 mtx_lock(&psp->ps_mtx); 397 } 398 #endif /* COMPAT_43 */ 399 400 #ifdef COMPAT_FREEBSD4 401 static void 402 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 403 { 404 struct sigframe4 sf, *sfp; 405 struct proc *p; 406 struct thread *td; 407 struct sigacts *psp; 408 struct trapframe *regs; 409 int sig; 410 int oonstack; 411 412 td = curthread; 413 p = td->td_proc; 414 PROC_LOCK_ASSERT(p, MA_OWNED); 415 sig = ksi->ksi_signo; 416 psp = p->p_sigacts; 417 mtx_assert(&psp->ps_mtx, MA_OWNED); 418 regs = td->td_frame; 419 oonstack = sigonstack(regs->tf_esp); 420 421 /* Save user context. */ 422 bzero(&sf, sizeof(sf)); 423 sf.sf_uc.uc_sigmask = *mask; 424 sf.sf_uc.uc_stack = td->td_sigstk; 425 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 426 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 427 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 428 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 429 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 430 431 /* Allocate space for the signal handler context. */ 432 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 433 SIGISMEMBER(psp->ps_sigonstack, sig)) { 434 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 435 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 436 #if defined(COMPAT_43) 437 td->td_sigstk.ss_flags |= SS_ONSTACK; 438 #endif 439 } else 440 sfp = (struct sigframe4 *)regs->tf_esp - 1; 441 442 /* Translate the signal if appropriate. */ 443 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 444 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 445 446 /* Build the argument list for the signal handler. */ 447 sf.sf_signum = sig; 448 sf.sf_ucontext = (register_t)&sfp->sf_uc; 449 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 450 /* Signal handler installed with SA_SIGINFO. */ 451 sf.sf_siginfo = (register_t)&sfp->sf_si; 452 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 453 454 /* Fill in POSIX parts */ 455 sf.sf_si.si_signo = sig; 456 sf.sf_si.si_code = ksi->ksi_code; 457 sf.sf_si.si_addr = ksi->ksi_addr; 458 } else { 459 /* Old FreeBSD-style arguments. */ 460 sf.sf_siginfo = ksi->ksi_code; 461 sf.sf_addr = (register_t)ksi->ksi_addr; 462 sf.sf_ahu.sf_handler = catcher; 463 } 464 mtx_unlock(&psp->ps_mtx); 465 PROC_UNLOCK(p); 466 467 /* 468 * If we're a vm86 process, we want to save the segment registers. 469 * We also change eflags to be our emulated eflags, not the actual 470 * eflags. 471 */ 472 if (regs->tf_eflags & PSL_VM) { 473 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 474 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 475 476 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 477 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 478 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 479 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 480 481 if (vm86->vm86_has_vme == 0) 482 sf.sf_uc.uc_mcontext.mc_eflags = 483 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 484 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 485 486 /* 487 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 488 * syscalls made by the signal handler. This just avoids 489 * wasting time for our lazy fixup of such faults. PSL_NT 490 * does nothing in vm86 mode, but vm86 programs can set it 491 * almost legitimately in probes for old cpu types. 492 */ 493 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 494 } 495 496 /* 497 * Copy the sigframe out to the user's stack. 498 */ 499 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 500 #ifdef DEBUG 501 printf("process %ld has trashed its stack\n", (long)p->p_pid); 502 #endif 503 PROC_LOCK(p); 504 sigexit(td, SIGILL); 505 } 506 507 regs->tf_esp = (int)sfp; 508 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 509 regs->tf_eflags &= ~(PSL_T | PSL_D); 510 regs->tf_cs = _ucodesel; 511 regs->tf_ds = _udatasel; 512 regs->tf_es = _udatasel; 513 regs->tf_fs = _udatasel; 514 regs->tf_ss = _udatasel; 515 PROC_LOCK(p); 516 mtx_lock(&psp->ps_mtx); 517 } 518 #endif /* COMPAT_FREEBSD4 */ 519 520 void 521 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 522 { 523 struct sigframe sf, *sfp; 524 struct proc *p; 525 struct thread *td; 526 struct sigacts *psp; 527 char *sp; 528 struct trapframe *regs; 529 int sig; 530 int oonstack; 531 532 td = curthread; 533 p = td->td_proc; 534 PROC_LOCK_ASSERT(p, MA_OWNED); 535 sig = ksi->ksi_signo; 536 psp = p->p_sigacts; 537 mtx_assert(&psp->ps_mtx, MA_OWNED); 538 #ifdef COMPAT_FREEBSD4 539 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 540 freebsd4_sendsig(catcher, ksi, mask); 541 return; 542 } 543 #endif 544 #ifdef COMPAT_43 545 if (SIGISMEMBER(psp->ps_osigset, sig)) { 546 osendsig(catcher, ksi, mask); 547 return; 548 } 549 #endif 550 regs = td->td_frame; 551 oonstack = sigonstack(regs->tf_esp); 552 553 /* Save user context. */ 554 bzero(&sf, sizeof(sf)); 555 sf.sf_uc.uc_sigmask = *mask; 556 sf.sf_uc.uc_stack = td->td_sigstk; 557 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 558 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 559 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 560 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 561 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 562 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 563 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 564 fpstate_drop(td); 565 566 /* Allocate space for the signal handler context. */ 567 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 568 SIGISMEMBER(psp->ps_sigonstack, sig)) { 569 sp = td->td_sigstk.ss_sp + 570 td->td_sigstk.ss_size - sizeof(struct sigframe); 571 #if defined(COMPAT_43) 572 td->td_sigstk.ss_flags |= SS_ONSTACK; 573 #endif 574 } else 575 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 576 /* Align to 16 bytes. */ 577 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 578 579 /* Translate the signal if appropriate. */ 580 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 581 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 582 583 /* Build the argument list for the signal handler. */ 584 sf.sf_signum = sig; 585 sf.sf_ucontext = (register_t)&sfp->sf_uc; 586 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 587 /* Signal handler installed with SA_SIGINFO. */ 588 sf.sf_siginfo = (register_t)&sfp->sf_si; 589 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 590 591 /* Fill in POSIX parts */ 592 sf.sf_si = ksi->ksi_info; 593 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 594 } else { 595 /* Old FreeBSD-style arguments. */ 596 sf.sf_siginfo = ksi->ksi_code; 597 sf.sf_addr = (register_t)ksi->ksi_addr; 598 sf.sf_ahu.sf_handler = catcher; 599 } 600 mtx_unlock(&psp->ps_mtx); 601 PROC_UNLOCK(p); 602 603 /* 604 * If we're a vm86 process, we want to save the segment registers. 605 * We also change eflags to be our emulated eflags, not the actual 606 * eflags. 607 */ 608 if (regs->tf_eflags & PSL_VM) { 609 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 610 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 611 612 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 613 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 614 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 615 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 616 617 if (vm86->vm86_has_vme == 0) 618 sf.sf_uc.uc_mcontext.mc_eflags = 619 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 620 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 621 622 /* 623 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 624 * syscalls made by the signal handler. This just avoids 625 * wasting time for our lazy fixup of such faults. PSL_NT 626 * does nothing in vm86 mode, but vm86 programs can set it 627 * almost legitimately in probes for old cpu types. 628 */ 629 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 630 } 631 632 /* 633 * Copy the sigframe out to the user's stack. 634 */ 635 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 636 #ifdef DEBUG 637 printf("process %ld has trashed its stack\n", (long)p->p_pid); 638 #endif 639 PROC_LOCK(p); 640 sigexit(td, SIGILL); 641 } 642 643 regs->tf_esp = (int)sfp; 644 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 645 regs->tf_eflags &= ~(PSL_T | PSL_D); 646 regs->tf_cs = _ucodesel; 647 regs->tf_ds = _udatasel; 648 regs->tf_es = _udatasel; 649 regs->tf_fs = _udatasel; 650 regs->tf_ss = _udatasel; 651 PROC_LOCK(p); 652 mtx_lock(&psp->ps_mtx); 653 } 654 655 /* 656 * System call to cleanup state after a signal 657 * has been taken. Reset signal mask and 658 * stack state from context left by sendsig (above). 659 * Return to previous pc and psl as specified by 660 * context left by sendsig. Check carefully to 661 * make sure that the user has not modified the 662 * state to gain improper privileges. 663 * 664 * MPSAFE 665 */ 666 #ifdef COMPAT_43 667 int 668 osigreturn(td, uap) 669 struct thread *td; 670 struct osigreturn_args /* { 671 struct osigcontext *sigcntxp; 672 } */ *uap; 673 { 674 struct osigcontext sc; 675 struct trapframe *regs; 676 struct osigcontext *scp; 677 struct proc *p = td->td_proc; 678 int eflags, error; 679 ksiginfo_t ksi; 680 681 regs = td->td_frame; 682 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 683 if (error != 0) 684 return (error); 685 scp = ≻ 686 eflags = scp->sc_ps; 687 if (eflags & PSL_VM) { 688 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 689 struct vm86_kernel *vm86; 690 691 /* 692 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 693 * set up the vm86 area, and we can't enter vm86 mode. 694 */ 695 if (td->td_pcb->pcb_ext == 0) 696 return (EINVAL); 697 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 698 if (vm86->vm86_inited == 0) 699 return (EINVAL); 700 701 /* Go back to user mode if both flags are set. */ 702 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 703 ksiginfo_init_trap(&ksi); 704 ksi.ksi_signo = SIGBUS; 705 ksi.ksi_code = BUS_OBJERR; 706 ksi.ksi_addr = (void *)regs->tf_eip; 707 trapsignal(td, &ksi); 708 } 709 710 if (vm86->vm86_has_vme) { 711 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 712 (eflags & VME_USERCHANGE) | PSL_VM; 713 } else { 714 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 715 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 716 (eflags & VM_USERCHANGE) | PSL_VM; 717 } 718 tf->tf_vm86_ds = scp->sc_ds; 719 tf->tf_vm86_es = scp->sc_es; 720 tf->tf_vm86_fs = scp->sc_fs; 721 tf->tf_vm86_gs = scp->sc_gs; 722 tf->tf_ds = _udatasel; 723 tf->tf_es = _udatasel; 724 tf->tf_fs = _udatasel; 725 } else { 726 /* 727 * Don't allow users to change privileged or reserved flags. 728 */ 729 /* 730 * XXX do allow users to change the privileged flag PSL_RF. 731 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 732 * should sometimes set it there too. tf_eflags is kept in 733 * the signal context during signal handling and there is no 734 * other place to remember it, so the PSL_RF bit may be 735 * corrupted by the signal handler without us knowing. 736 * Corruption of the PSL_RF bit at worst causes one more or 737 * one less debugger trap, so allowing it is fairly harmless. 738 */ 739 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 740 return (EINVAL); 741 } 742 743 /* 744 * Don't allow users to load a valid privileged %cs. Let the 745 * hardware check for invalid selectors, excess privilege in 746 * other selectors, invalid %eip's and invalid %esp's. 747 */ 748 if (!CS_SECURE(scp->sc_cs)) { 749 ksiginfo_init_trap(&ksi); 750 ksi.ksi_signo = SIGBUS; 751 ksi.ksi_code = BUS_OBJERR; 752 ksi.ksi_trapno = T_PROTFLT; 753 ksi.ksi_addr = (void *)regs->tf_eip; 754 trapsignal(td, &ksi); 755 return (EINVAL); 756 } 757 regs->tf_ds = scp->sc_ds; 758 regs->tf_es = scp->sc_es; 759 regs->tf_fs = scp->sc_fs; 760 } 761 762 /* Restore remaining registers. */ 763 regs->tf_eax = scp->sc_eax; 764 regs->tf_ebx = scp->sc_ebx; 765 regs->tf_ecx = scp->sc_ecx; 766 regs->tf_edx = scp->sc_edx; 767 regs->tf_esi = scp->sc_esi; 768 regs->tf_edi = scp->sc_edi; 769 regs->tf_cs = scp->sc_cs; 770 regs->tf_ss = scp->sc_ss; 771 regs->tf_isp = scp->sc_isp; 772 regs->tf_ebp = scp->sc_fp; 773 regs->tf_esp = scp->sc_sp; 774 regs->tf_eip = scp->sc_pc; 775 regs->tf_eflags = eflags; 776 777 PROC_LOCK(p); 778 #if defined(COMPAT_43) 779 if (scp->sc_onstack & 1) 780 td->td_sigstk.ss_flags |= SS_ONSTACK; 781 else 782 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 783 #endif 784 SIGSETOLD(td->td_sigmask, scp->sc_mask); 785 SIG_CANTMASK(td->td_sigmask); 786 signotify(td); 787 PROC_UNLOCK(p); 788 return (EJUSTRETURN); 789 } 790 #endif /* COMPAT_43 */ 791 792 #ifdef COMPAT_FREEBSD4 793 /* 794 * MPSAFE 795 */ 796 int 797 freebsd4_sigreturn(td, uap) 798 struct thread *td; 799 struct freebsd4_sigreturn_args /* { 800 const ucontext4 *sigcntxp; 801 } */ *uap; 802 { 803 struct ucontext4 uc; 804 struct proc *p = td->td_proc; 805 struct trapframe *regs; 806 const struct ucontext4 *ucp; 807 int cs, eflags, error; 808 ksiginfo_t ksi; 809 810 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 811 if (error != 0) 812 return (error); 813 ucp = &uc; 814 regs = td->td_frame; 815 eflags = ucp->uc_mcontext.mc_eflags; 816 if (eflags & PSL_VM) { 817 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 818 struct vm86_kernel *vm86; 819 820 /* 821 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 822 * set up the vm86 area, and we can't enter vm86 mode. 823 */ 824 if (td->td_pcb->pcb_ext == 0) 825 return (EINVAL); 826 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 827 if (vm86->vm86_inited == 0) 828 return (EINVAL); 829 830 /* Go back to user mode if both flags are set. */ 831 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 832 ksiginfo_init_trap(&ksi); 833 ksi.ksi_signo = SIGBUS; 834 ksi.ksi_code = BUS_OBJERR; 835 ksi.ksi_addr = (void *)regs->tf_eip; 836 trapsignal(td, &ksi); 837 } 838 if (vm86->vm86_has_vme) { 839 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 840 (eflags & VME_USERCHANGE) | PSL_VM; 841 } else { 842 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 843 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 844 (eflags & VM_USERCHANGE) | PSL_VM; 845 } 846 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 847 tf->tf_eflags = eflags; 848 tf->tf_vm86_ds = tf->tf_ds; 849 tf->tf_vm86_es = tf->tf_es; 850 tf->tf_vm86_fs = tf->tf_fs; 851 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 852 tf->tf_ds = _udatasel; 853 tf->tf_es = _udatasel; 854 tf->tf_fs = _udatasel; 855 } else { 856 /* 857 * Don't allow users to change privileged or reserved flags. 858 */ 859 /* 860 * XXX do allow users to change the privileged flag PSL_RF. 861 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 862 * should sometimes set it there too. tf_eflags is kept in 863 * the signal context during signal handling and there is no 864 * other place to remember it, so the PSL_RF bit may be 865 * corrupted by the signal handler without us knowing. 866 * Corruption of the PSL_RF bit at worst causes one more or 867 * one less debugger trap, so allowing it is fairly harmless. 868 */ 869 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 870 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 871 return (EINVAL); 872 } 873 874 /* 875 * Don't allow users to load a valid privileged %cs. Let the 876 * hardware check for invalid selectors, excess privilege in 877 * other selectors, invalid %eip's and invalid %esp's. 878 */ 879 cs = ucp->uc_mcontext.mc_cs; 880 if (!CS_SECURE(cs)) { 881 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 882 ksiginfo_init_trap(&ksi); 883 ksi.ksi_signo = SIGBUS; 884 ksi.ksi_code = BUS_OBJERR; 885 ksi.ksi_trapno = T_PROTFLT; 886 ksi.ksi_addr = (void *)regs->tf_eip; 887 trapsignal(td, &ksi); 888 return (EINVAL); 889 } 890 891 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 892 } 893 894 PROC_LOCK(p); 895 #if defined(COMPAT_43) 896 if (ucp->uc_mcontext.mc_onstack & 1) 897 td->td_sigstk.ss_flags |= SS_ONSTACK; 898 else 899 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 900 #endif 901 902 td->td_sigmask = ucp->uc_sigmask; 903 SIG_CANTMASK(td->td_sigmask); 904 signotify(td); 905 PROC_UNLOCK(p); 906 return (EJUSTRETURN); 907 } 908 #endif /* COMPAT_FREEBSD4 */ 909 910 /* 911 * MPSAFE 912 */ 913 int 914 sigreturn(td, uap) 915 struct thread *td; 916 struct sigreturn_args /* { 917 const struct __ucontext *sigcntxp; 918 } */ *uap; 919 { 920 ucontext_t uc; 921 struct proc *p = td->td_proc; 922 struct trapframe *regs; 923 const ucontext_t *ucp; 924 int cs, eflags, error, ret; 925 ksiginfo_t ksi; 926 927 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 928 if (error != 0) 929 return (error); 930 ucp = &uc; 931 regs = td->td_frame; 932 eflags = ucp->uc_mcontext.mc_eflags; 933 if (eflags & PSL_VM) { 934 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 935 struct vm86_kernel *vm86; 936 937 /* 938 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 939 * set up the vm86 area, and we can't enter vm86 mode. 940 */ 941 if (td->td_pcb->pcb_ext == 0) 942 return (EINVAL); 943 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 944 if (vm86->vm86_inited == 0) 945 return (EINVAL); 946 947 /* Go back to user mode if both flags are set. */ 948 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 949 ksiginfo_init_trap(&ksi); 950 ksi.ksi_signo = SIGBUS; 951 ksi.ksi_code = BUS_OBJERR; 952 ksi.ksi_addr = (void *)regs->tf_eip; 953 trapsignal(td, &ksi); 954 } 955 956 if (vm86->vm86_has_vme) { 957 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 958 (eflags & VME_USERCHANGE) | PSL_VM; 959 } else { 960 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 961 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 962 (eflags & VM_USERCHANGE) | PSL_VM; 963 } 964 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 965 tf->tf_eflags = eflags; 966 tf->tf_vm86_ds = tf->tf_ds; 967 tf->tf_vm86_es = tf->tf_es; 968 tf->tf_vm86_fs = tf->tf_fs; 969 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 970 tf->tf_ds = _udatasel; 971 tf->tf_es = _udatasel; 972 tf->tf_fs = _udatasel; 973 } else { 974 /* 975 * Don't allow users to change privileged or reserved flags. 976 */ 977 /* 978 * XXX do allow users to change the privileged flag PSL_RF. 979 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 980 * should sometimes set it there too. tf_eflags is kept in 981 * the signal context during signal handling and there is no 982 * other place to remember it, so the PSL_RF bit may be 983 * corrupted by the signal handler without us knowing. 984 * Corruption of the PSL_RF bit at worst causes one more or 985 * one less debugger trap, so allowing it is fairly harmless. 986 */ 987 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 988 printf("sigreturn: eflags = 0x%x\n", eflags); 989 return (EINVAL); 990 } 991 992 /* 993 * Don't allow users to load a valid privileged %cs. Let the 994 * hardware check for invalid selectors, excess privilege in 995 * other selectors, invalid %eip's and invalid %esp's. 996 */ 997 cs = ucp->uc_mcontext.mc_cs; 998 if (!CS_SECURE(cs)) { 999 printf("sigreturn: cs = 0x%x\n", cs); 1000 ksiginfo_init_trap(&ksi); 1001 ksi.ksi_signo = SIGBUS; 1002 ksi.ksi_code = BUS_OBJERR; 1003 ksi.ksi_trapno = T_PROTFLT; 1004 ksi.ksi_addr = (void *)regs->tf_eip; 1005 trapsignal(td, &ksi); 1006 return (EINVAL); 1007 } 1008 1009 ret = set_fpcontext(td, &ucp->uc_mcontext); 1010 if (ret != 0) 1011 return (ret); 1012 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1013 } 1014 1015 PROC_LOCK(p); 1016 #if defined(COMPAT_43) 1017 if (ucp->uc_mcontext.mc_onstack & 1) 1018 td->td_sigstk.ss_flags |= SS_ONSTACK; 1019 else 1020 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1021 #endif 1022 1023 td->td_sigmask = ucp->uc_sigmask; 1024 SIG_CANTMASK(td->td_sigmask); 1025 signotify(td); 1026 PROC_UNLOCK(p); 1027 return (EJUSTRETURN); 1028 } 1029 1030 /* 1031 * Machine dependent boot() routine 1032 * 1033 * I haven't seen anything to put here yet 1034 * Possibly some stuff might be grafted back here from boot() 1035 */ 1036 void 1037 cpu_boot(int howto) 1038 { 1039 } 1040 1041 /* Get current clock frequency for the given cpu id. */ 1042 int 1043 cpu_est_clockrate(int cpu_id, uint64_t *rate) 1044 { 1045 register_t reg; 1046 uint64_t tsc1, tsc2; 1047 1048 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1049 return (EINVAL); 1050 if (!tsc_present) 1051 return (EOPNOTSUPP); 1052 1053 /* If we're booting, trust the rate calibrated moments ago. */ 1054 if (cold) { 1055 *rate = tsc_freq; 1056 return (0); 1057 } 1058 1059 #ifdef SMP 1060 /* Schedule ourselves on the indicated cpu. */ 1061 thread_lock(curthread); 1062 sched_bind(curthread, cpu_id); 1063 thread_unlock(curthread); 1064 #endif 1065 1066 /* Calibrate by measuring a short delay. */ 1067 reg = intr_disable(); 1068 tsc1 = rdtsc(); 1069 DELAY(1000); 1070 tsc2 = rdtsc(); 1071 intr_restore(reg); 1072 1073 #ifdef SMP 1074 thread_lock(curthread); 1075 sched_unbind(curthread); 1076 thread_unlock(curthread); 1077 #endif 1078 1079 /* 1080 * Calculate the difference in readings, convert to Mhz, and 1081 * subtract 0.5% of the total. Empirical testing has shown that 1082 * overhead in DELAY() works out to approximately this value. 1083 */ 1084 tsc2 -= tsc1; 1085 *rate = tsc2 * 1000 - tsc2 * 5; 1086 return (0); 1087 } 1088 1089 /* 1090 * Shutdown the CPU as much as possible 1091 */ 1092 void 1093 cpu_halt(void) 1094 { 1095 for (;;) 1096 __asm__ ("hlt"); 1097 } 1098 1099 /* 1100 * Hook to idle the CPU when possible. In the SMP case we default to 1101 * off because a halted cpu will not currently pick up a new thread in the 1102 * run queue until the next timer tick. If turned on this will result in 1103 * approximately a 4.2% loss in real time performance in buildworld tests 1104 * (but improves user and sys times oddly enough), and saves approximately 1105 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1106 * 1107 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1108 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1109 * Then we can have our cake and eat it too. 1110 * 1111 * XXX I'm turning it on for SMP as well by default for now. It seems to 1112 * help lock contention somewhat, and this is critical for HTT. -Peter 1113 */ 1114 static int cpu_idle_hlt = 1; 1115 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt); 1116 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1117 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1118 1119 static void 1120 cpu_idle_default(void) 1121 { 1122 /* 1123 * we must absolutely guarentee that hlt is the 1124 * absolute next instruction after sti or we 1125 * introduce a timing window. 1126 */ 1127 __asm __volatile("sti; hlt"); 1128 } 1129 1130 /* 1131 * Note that we have to be careful here to avoid a race between checking 1132 * sched_runnable() and actually halting. If we don't do this, we may waste 1133 * the time between calling hlt and the next interrupt even though there 1134 * is a runnable process. 1135 */ 1136 void 1137 cpu_idle(void) 1138 { 1139 1140 #ifdef SMP 1141 if (mp_grab_cpu_hlt()) 1142 return; 1143 #endif 1144 1145 if (cpu_idle_hlt) { 1146 disable_intr(); 1147 if (sched_runnable()) 1148 enable_intr(); 1149 else 1150 (*cpu_idle_hook)(); 1151 } 1152 } 1153 1154 /* Other subsystems (e.g., ACPI) can hook this later. */ 1155 void (*cpu_idle_hook)(void) = cpu_idle_default; 1156 1157 /* 1158 * Clear registers on exec 1159 */ 1160 void 1161 exec_setregs(td, entry, stack, ps_strings) 1162 struct thread *td; 1163 u_long entry; 1164 u_long stack; 1165 u_long ps_strings; 1166 { 1167 struct trapframe *regs = td->td_frame; 1168 struct pcb *pcb = td->td_pcb; 1169 1170 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1171 pcb->pcb_gs = _udatasel; 1172 load_gs(_udatasel); 1173 1174 mtx_lock_spin(&dt_lock); 1175 if (td->td_proc->p_md.md_ldt) 1176 user_ldt_free(td); 1177 else 1178 mtx_unlock_spin(&dt_lock); 1179 1180 bzero((char *)regs, sizeof(struct trapframe)); 1181 regs->tf_eip = entry; 1182 regs->tf_esp = stack; 1183 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1184 regs->tf_ss = _udatasel; 1185 regs->tf_ds = _udatasel; 1186 regs->tf_es = _udatasel; 1187 regs->tf_fs = _udatasel; 1188 regs->tf_cs = _ucodesel; 1189 1190 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1191 regs->tf_ebx = ps_strings; 1192 1193 /* 1194 * Reset the hardware debug registers if they were in use. 1195 * They won't have any meaning for the newly exec'd process. 1196 */ 1197 if (pcb->pcb_flags & PCB_DBREGS) { 1198 pcb->pcb_dr0 = 0; 1199 pcb->pcb_dr1 = 0; 1200 pcb->pcb_dr2 = 0; 1201 pcb->pcb_dr3 = 0; 1202 pcb->pcb_dr6 = 0; 1203 pcb->pcb_dr7 = 0; 1204 if (pcb == PCPU_GET(curpcb)) { 1205 /* 1206 * Clear the debug registers on the running 1207 * CPU, otherwise they will end up affecting 1208 * the next process we switch to. 1209 */ 1210 reset_dbregs(); 1211 } 1212 pcb->pcb_flags &= ~PCB_DBREGS; 1213 } 1214 1215 /* 1216 * Initialize the math emulator (if any) for the current process. 1217 * Actually, just clear the bit that says that the emulator has 1218 * been initialized. Initialization is delayed until the process 1219 * traps to the emulator (if it is done at all) mainly because 1220 * emulators don't provide an entry point for initialization. 1221 */ 1222 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1223 1224 /* 1225 * Drop the FP state if we hold it, so that the process gets a 1226 * clean FP state if it uses the FPU again. 1227 */ 1228 fpstate_drop(td); 1229 1230 /* 1231 * XXX - Linux emulator 1232 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1233 * on it. 1234 */ 1235 td->td_retval[1] = 0; 1236 } 1237 1238 void 1239 cpu_setregs(void) 1240 { 1241 unsigned int cr0; 1242 1243 cr0 = rcr0(); 1244 1245 /* 1246 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1247 * 1248 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1249 * instructions. We must set the CR0_MP bit and use the CR0_TS 1250 * bit to control the trap, because setting the CR0_EM bit does 1251 * not cause WAIT instructions to trap. It's important to trap 1252 * WAIT instructions - otherwise the "wait" variants of no-wait 1253 * control instructions would degenerate to the "no-wait" variants 1254 * after FP context switches but work correctly otherwise. It's 1255 * particularly important to trap WAITs when there is no NPX - 1256 * otherwise the "wait" variants would always degenerate. 1257 * 1258 * Try setting CR0_NE to get correct error reporting on 486DX's. 1259 * Setting it should fail or do nothing on lesser processors. 1260 */ 1261 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1262 load_cr0(cr0); 1263 load_gs(_udatasel); 1264 } 1265 1266 u_long bootdev; /* not a struct cdev *- encoding is different */ 1267 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1268 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1269 1270 /* 1271 * Initialize 386 and configure to run kernel 1272 */ 1273 1274 /* 1275 * Initialize segments & interrupt table 1276 */ 1277 1278 int _default_ldt; 1279 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1280 static struct gate_descriptor idt0[NIDT]; 1281 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1282 union descriptor ldt[NLDT]; /* local descriptor table */ 1283 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1284 struct mtx dt_lock; /* lock for GDT and LDT */ 1285 1286 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1287 extern int has_f00f_bug; 1288 #endif 1289 1290 static struct i386tss dblfault_tss; 1291 static char dblfault_stack[PAGE_SIZE]; 1292 1293 extern vm_offset_t proc0kstack; 1294 1295 1296 /* 1297 * software prototypes -- in more palatable form. 1298 * 1299 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1300 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1301 */ 1302 struct soft_segment_descriptor gdt_segs[] = { 1303 /* GNULL_SEL 0 Null Descriptor */ 1304 { 0x0, /* segment base address */ 1305 0x0, /* length */ 1306 0, /* segment type */ 1307 0, /* segment descriptor priority level */ 1308 0, /* segment descriptor present */ 1309 0, 0, 1310 0, /* default 32 vs 16 bit size */ 1311 0 /* limit granularity (byte/page units)*/ }, 1312 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1313 { 0x0, /* segment base address */ 1314 0xfffff, /* length - all address space */ 1315 SDT_MEMRWA, /* segment type */ 1316 0, /* segment descriptor priority level */ 1317 1, /* segment descriptor present */ 1318 0, 0, 1319 1, /* default 32 vs 16 bit size */ 1320 1 /* limit granularity (byte/page units)*/ }, 1321 /* GUFS_SEL 2 %fs Descriptor for user */ 1322 { 0x0, /* segment base address */ 1323 0xfffff, /* length - all address space */ 1324 SDT_MEMRWA, /* segment type */ 1325 SEL_UPL, /* segment descriptor priority level */ 1326 1, /* segment descriptor present */ 1327 0, 0, 1328 1, /* default 32 vs 16 bit size */ 1329 1 /* limit granularity (byte/page units)*/ }, 1330 /* GUGS_SEL 3 %gs Descriptor for user */ 1331 { 0x0, /* segment base address */ 1332 0xfffff, /* length - all address space */ 1333 SDT_MEMRWA, /* segment type */ 1334 SEL_UPL, /* segment descriptor priority level */ 1335 1, /* segment descriptor present */ 1336 0, 0, 1337 1, /* default 32 vs 16 bit size */ 1338 1 /* limit granularity (byte/page units)*/ }, 1339 /* GCODE_SEL 4 Code Descriptor for kernel */ 1340 { 0x0, /* segment base address */ 1341 0xfffff, /* length - all address space */ 1342 SDT_MEMERA, /* segment type */ 1343 0, /* segment descriptor priority level */ 1344 1, /* segment descriptor present */ 1345 0, 0, 1346 1, /* default 32 vs 16 bit size */ 1347 1 /* limit granularity (byte/page units)*/ }, 1348 /* GDATA_SEL 5 Data Descriptor for kernel */ 1349 { 0x0, /* segment base address */ 1350 0xfffff, /* length - all address space */ 1351 SDT_MEMRWA, /* segment type */ 1352 0, /* segment descriptor priority level */ 1353 1, /* segment descriptor present */ 1354 0, 0, 1355 1, /* default 32 vs 16 bit size */ 1356 1 /* limit granularity (byte/page units)*/ }, 1357 /* GUCODE_SEL 6 Code Descriptor for user */ 1358 { 0x0, /* segment base address */ 1359 0xfffff, /* length - all address space */ 1360 SDT_MEMERA, /* segment type */ 1361 SEL_UPL, /* segment descriptor priority level */ 1362 1, /* segment descriptor present */ 1363 0, 0, 1364 1, /* default 32 vs 16 bit size */ 1365 1 /* limit granularity (byte/page units)*/ }, 1366 /* GUDATA_SEL 7 Data Descriptor for user */ 1367 { 0x0, /* segment base address */ 1368 0xfffff, /* length - all address space */ 1369 SDT_MEMRWA, /* segment type */ 1370 SEL_UPL, /* segment descriptor priority level */ 1371 1, /* segment descriptor present */ 1372 0, 0, 1373 1, /* default 32 vs 16 bit size */ 1374 1 /* limit granularity (byte/page units)*/ }, 1375 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1376 { 0x400, /* segment base address */ 1377 0xfffff, /* length */ 1378 SDT_MEMRWA, /* segment type */ 1379 0, /* segment descriptor priority level */ 1380 1, /* segment descriptor present */ 1381 0, 0, 1382 1, /* default 32 vs 16 bit size */ 1383 1 /* limit granularity (byte/page units)*/ }, 1384 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1385 { 1386 0x0, /* segment base address */ 1387 sizeof(struct i386tss)-1,/* length */ 1388 SDT_SYS386TSS, /* segment type */ 1389 0, /* segment descriptor priority level */ 1390 1, /* segment descriptor present */ 1391 0, 0, 1392 0, /* unused - default 32 vs 16 bit size */ 1393 0 /* limit granularity (byte/page units)*/ }, 1394 /* GLDT_SEL 10 LDT Descriptor */ 1395 { (int) ldt, /* segment base address */ 1396 sizeof(ldt)-1, /* length - all address space */ 1397 SDT_SYSLDT, /* segment type */ 1398 SEL_UPL, /* segment descriptor priority level */ 1399 1, /* segment descriptor present */ 1400 0, 0, 1401 0, /* unused - default 32 vs 16 bit size */ 1402 0 /* limit granularity (byte/page units)*/ }, 1403 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1404 { (int) ldt, /* segment base address */ 1405 (512 * sizeof(union descriptor)-1), /* length */ 1406 SDT_SYSLDT, /* segment type */ 1407 0, /* segment descriptor priority level */ 1408 1, /* segment descriptor present */ 1409 0, 0, 1410 0, /* unused - default 32 vs 16 bit size */ 1411 0 /* limit granularity (byte/page units)*/ }, 1412 /* GPANIC_SEL 12 Panic Tss Descriptor */ 1413 { (int) &dblfault_tss, /* segment base address */ 1414 sizeof(struct i386tss)-1,/* length - all address space */ 1415 SDT_SYS386TSS, /* segment type */ 1416 0, /* segment descriptor priority level */ 1417 1, /* segment descriptor present */ 1418 0, 0, 1419 0, /* unused - default 32 vs 16 bit size */ 1420 0 /* limit granularity (byte/page units)*/ }, 1421 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1422 { 0, /* segment base address (overwritten) */ 1423 0xfffff, /* length */ 1424 SDT_MEMERA, /* segment type */ 1425 0, /* segment descriptor priority level */ 1426 1, /* segment descriptor present */ 1427 0, 0, 1428 0, /* default 32 vs 16 bit size */ 1429 1 /* limit granularity (byte/page units)*/ }, 1430 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1431 { 0, /* segment base address (overwritten) */ 1432 0xfffff, /* length */ 1433 SDT_MEMERA, /* segment type */ 1434 0, /* segment descriptor priority level */ 1435 1, /* segment descriptor present */ 1436 0, 0, 1437 0, /* default 32 vs 16 bit size */ 1438 1 /* limit granularity (byte/page units)*/ }, 1439 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1440 { 0, /* segment base address (overwritten) */ 1441 0xfffff, /* length */ 1442 SDT_MEMRWA, /* segment type */ 1443 0, /* segment descriptor priority level */ 1444 1, /* segment descriptor present */ 1445 0, 0, 1446 1, /* default 32 vs 16 bit size */ 1447 1 /* limit granularity (byte/page units)*/ }, 1448 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1449 { 0, /* segment base address (overwritten) */ 1450 0xfffff, /* length */ 1451 SDT_MEMRWA, /* segment type */ 1452 0, /* segment descriptor priority level */ 1453 1, /* segment descriptor present */ 1454 0, 0, 1455 0, /* default 32 vs 16 bit size */ 1456 1 /* limit granularity (byte/page units)*/ }, 1457 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1458 { 0, /* segment base address (overwritten) */ 1459 0xfffff, /* length */ 1460 SDT_MEMRWA, /* segment type */ 1461 0, /* segment descriptor priority level */ 1462 1, /* segment descriptor present */ 1463 0, 0, 1464 0, /* default 32 vs 16 bit size */ 1465 1 /* limit granularity (byte/page units)*/ }, 1466 /* GNDIS_SEL 18 NDIS Descriptor */ 1467 { 0x0, /* segment base address */ 1468 0x0, /* length */ 1469 0, /* segment type */ 1470 0, /* segment descriptor priority level */ 1471 0, /* segment descriptor present */ 1472 0, 0, 1473 0, /* default 32 vs 16 bit size */ 1474 0 /* limit granularity (byte/page units)*/ }, 1475 }; 1476 1477 static struct soft_segment_descriptor ldt_segs[] = { 1478 /* Null Descriptor - overwritten by call gate */ 1479 { 0x0, /* segment base address */ 1480 0x0, /* length - all address space */ 1481 0, /* segment type */ 1482 0, /* segment descriptor priority level */ 1483 0, /* segment descriptor present */ 1484 0, 0, 1485 0, /* default 32 vs 16 bit size */ 1486 0 /* limit granularity (byte/page units)*/ }, 1487 /* Null Descriptor - overwritten by call gate */ 1488 { 0x0, /* segment base address */ 1489 0x0, /* length - all address space */ 1490 0, /* segment type */ 1491 0, /* segment descriptor priority level */ 1492 0, /* segment descriptor present */ 1493 0, 0, 1494 0, /* default 32 vs 16 bit size */ 1495 0 /* limit granularity (byte/page units)*/ }, 1496 /* Null Descriptor - overwritten by call gate */ 1497 { 0x0, /* segment base address */ 1498 0x0, /* length - all address space */ 1499 0, /* segment type */ 1500 0, /* segment descriptor priority level */ 1501 0, /* segment descriptor present */ 1502 0, 0, 1503 0, /* default 32 vs 16 bit size */ 1504 0 /* limit granularity (byte/page units)*/ }, 1505 /* Code Descriptor for user */ 1506 { 0x0, /* segment base address */ 1507 0xfffff, /* length - all address space */ 1508 SDT_MEMERA, /* segment type */ 1509 SEL_UPL, /* segment descriptor priority level */ 1510 1, /* segment descriptor present */ 1511 0, 0, 1512 1, /* default 32 vs 16 bit size */ 1513 1 /* limit granularity (byte/page units)*/ }, 1514 /* Null Descriptor - overwritten by call gate */ 1515 { 0x0, /* segment base address */ 1516 0x0, /* length - all address space */ 1517 0, /* segment type */ 1518 0, /* segment descriptor priority level */ 1519 0, /* segment descriptor present */ 1520 0, 0, 1521 0, /* default 32 vs 16 bit size */ 1522 0 /* limit granularity (byte/page units)*/ }, 1523 /* Data Descriptor for user */ 1524 { 0x0, /* segment base address */ 1525 0xfffff, /* length - all address space */ 1526 SDT_MEMRWA, /* segment type */ 1527 SEL_UPL, /* segment descriptor priority level */ 1528 1, /* segment descriptor present */ 1529 0, 0, 1530 1, /* default 32 vs 16 bit size */ 1531 1 /* limit granularity (byte/page units)*/ }, 1532 }; 1533 1534 void 1535 setidt(idx, func, typ, dpl, selec) 1536 int idx; 1537 inthand_t *func; 1538 int typ; 1539 int dpl; 1540 int selec; 1541 { 1542 struct gate_descriptor *ip; 1543 1544 ip = idt + idx; 1545 ip->gd_looffset = (int)func; 1546 ip->gd_selector = selec; 1547 ip->gd_stkcpy = 0; 1548 ip->gd_xx = 0; 1549 ip->gd_type = typ; 1550 ip->gd_dpl = dpl; 1551 ip->gd_p = 1; 1552 ip->gd_hioffset = ((int)func)>>16 ; 1553 } 1554 1555 extern inthand_t 1556 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1557 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1558 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1559 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1560 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1561 1562 #ifdef DDB 1563 /* 1564 * Display the index and function name of any IDT entries that don't use 1565 * the default 'rsvd' entry point. 1566 */ 1567 DB_SHOW_COMMAND(idt, db_show_idt) 1568 { 1569 struct gate_descriptor *ip; 1570 int idx; 1571 uintptr_t func; 1572 1573 ip = idt; 1574 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1575 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1576 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1577 db_printf("%3d\t", idx); 1578 db_printsym(func, DB_STGY_PROC); 1579 db_printf("\n"); 1580 } 1581 ip++; 1582 } 1583 } 1584 1585 /* Show privileged registers. */ 1586 DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1587 { 1588 uint64_t idtr, gdtr; 1589 1590 idtr = ridt(); 1591 db_printf("idtr\t0x%08x/%04x\n", 1592 (u_int)(idtr >> 16), (u_int)idtr & 0xffff); 1593 gdtr = rgdt(); 1594 db_printf("gdtr\t0x%08x/%04x\n", 1595 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff); 1596 db_printf("ldtr\t0x%04x\n", rldt()); 1597 db_printf("tr\t0x%04x\n", rtr()); 1598 db_printf("cr0\t0x%08x\n", rcr0()); 1599 db_printf("cr2\t0x%08x\n", rcr2()); 1600 db_printf("cr3\t0x%08x\n", rcr3()); 1601 db_printf("cr4\t0x%08x\n", rcr4()); 1602 } 1603 #endif 1604 1605 void 1606 sdtossd(sd, ssd) 1607 struct segment_descriptor *sd; 1608 struct soft_segment_descriptor *ssd; 1609 { 1610 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1611 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1612 ssd->ssd_type = sd->sd_type; 1613 ssd->ssd_dpl = sd->sd_dpl; 1614 ssd->ssd_p = sd->sd_p; 1615 ssd->ssd_def32 = sd->sd_def32; 1616 ssd->ssd_gran = sd->sd_gran; 1617 } 1618 1619 /* 1620 * Populate the (physmap) array with base/bound pairs describing the 1621 * available physical memory in the system, then test this memory and 1622 * build the phys_avail array describing the actually-available memory. 1623 * 1624 * If we cannot accurately determine the physical memory map, then use 1625 * value from the 0xE801 call, and failing that, the RTC. 1626 * 1627 * Total memory size may be set by the kernel environment variable 1628 * hw.physmem or the compile-time define MAXMEM. 1629 * 1630 * XXX first should be vm_paddr_t. 1631 */ 1632 static void 1633 getmemsize(int first) 1634 { 1635 int i, off, physmap_idx, pa_indx, da_indx; 1636 int pg_n; 1637 u_long physmem_tunable; 1638 u_int extmem, under16; 1639 vm_paddr_t pa, physmap[PHYSMAP_SIZE]; 1640 pt_entry_t *pte; 1641 quad_t dcons_addr, dcons_size; 1642 1643 bzero(physmap, sizeof(physmap)); 1644 1645 /* XXX - some of EPSON machines can't use PG_N */ 1646 pg_n = PG_N; 1647 if (pc98_machine_type & M_EPSON_PC98) { 1648 switch (epson_machine_id) { 1649 #ifdef WB_CACHE 1650 default: 1651 #endif 1652 case EPSON_PC486_HX: 1653 case EPSON_PC486_HG: 1654 case EPSON_PC486_HA: 1655 pg_n = 0; 1656 break; 1657 } 1658 } 1659 1660 /* 1661 * Perform "base memory" related probes & setup 1662 */ 1663 under16 = pc98_getmemsize(&basemem, &extmem); 1664 if (basemem > 640) { 1665 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1666 basemem); 1667 basemem = 640; 1668 } 1669 1670 /* 1671 * XXX if biosbasemem is now < 640, there is a `hole' 1672 * between the end of base memory and the start of 1673 * ISA memory. The hole may be empty or it may 1674 * contain BIOS code or data. Map it read/write so 1675 * that the BIOS can write to it. (Memory from 0 to 1676 * the physical end of the kernel is mapped read-only 1677 * to begin with and then parts of it are remapped. 1678 * The parts that aren't remapped form holes that 1679 * remain read-only and are unused by the kernel. 1680 * The base memory area is below the physical end of 1681 * the kernel and right now forms a read-only hole. 1682 * The part of it from PAGE_SIZE to 1683 * (trunc_page(biosbasemem * 1024) - 1) will be 1684 * remapped and used by the kernel later.) 1685 * 1686 * This code is similar to the code used in 1687 * pmap_mapdev, but since no memory needs to be 1688 * allocated we simply change the mapping. 1689 */ 1690 for (pa = trunc_page(basemem * 1024); 1691 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1692 pmap_kenter(KERNBASE + pa, pa); 1693 1694 /* 1695 * if basemem != 640, map pages r/w into vm86 page table so 1696 * that the bios can scribble on it. 1697 */ 1698 pte = (pt_entry_t *)vm86paddr; 1699 for (i = basemem / 4; i < 160; i++) 1700 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1701 1702 physmap[0] = 0; 1703 physmap[1] = basemem * 1024; 1704 physmap_idx = 2; 1705 physmap[physmap_idx] = 0x100000; 1706 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1707 1708 /* 1709 * Now, physmap contains a map of physical memory. 1710 */ 1711 1712 #ifdef SMP 1713 /* make hole for AP bootstrap code */ 1714 physmap[1] = mp_bootaddress(physmap[1]); 1715 #endif 1716 1717 /* 1718 * Maxmem isn't the "maximum memory", it's one larger than the 1719 * highest page of the physical address space. It should be 1720 * called something like "Maxphyspage". We may adjust this 1721 * based on ``hw.physmem'' and the results of the memory test. 1722 */ 1723 Maxmem = atop(physmap[physmap_idx + 1]); 1724 1725 #ifdef MAXMEM 1726 Maxmem = MAXMEM / 4; 1727 #endif 1728 1729 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1730 Maxmem = atop(physmem_tunable); 1731 1732 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1733 (boothowto & RB_VERBOSE)) 1734 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1735 1736 /* 1737 * If Maxmem has been increased beyond what the system has detected, 1738 * extend the last memory segment to the new limit. 1739 */ 1740 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1741 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1742 1743 /* 1744 * We need to divide chunk if Maxmem is larger than 16MB and 1745 * under 16MB area is not full of memory. 1746 * (1) system area (15-16MB region) is cut off 1747 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY") 1748 */ 1749 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) { 1750 /* 15M - 16M region is cut off, so need to divide chunk */ 1751 physmap[physmap_idx + 1] = under16 * 1024; 1752 physmap_idx += 2; 1753 physmap[physmap_idx] = 0x1000000; 1754 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024; 1755 } 1756 1757 /* call pmap initialization to make new kernel address space */ 1758 pmap_bootstrap(first); 1759 1760 /* 1761 * Size up each available chunk of physical memory. 1762 */ 1763 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1764 pa_indx = 0; 1765 da_indx = 1; 1766 phys_avail[pa_indx++] = physmap[0]; 1767 phys_avail[pa_indx] = physmap[0]; 1768 dump_avail[da_indx] = physmap[0]; 1769 pte = CMAP1; 1770 1771 /* 1772 * Get dcons buffer address 1773 */ 1774 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1775 getenv_quad("dcons.size", &dcons_size) == 0) 1776 dcons_addr = 0; 1777 1778 /* 1779 * physmap is in bytes, so when converting to page boundaries, 1780 * round up the start address and round down the end address. 1781 */ 1782 for (i = 0; i <= physmap_idx; i += 2) { 1783 vm_paddr_t end; 1784 1785 end = ptoa((vm_paddr_t)Maxmem); 1786 if (physmap[i + 1] < end) 1787 end = trunc_page(physmap[i + 1]); 1788 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1789 int tmp, page_bad, full; 1790 int *ptr = (int *)CADDR1; 1791 1792 full = FALSE; 1793 /* 1794 * block out kernel memory as not available. 1795 */ 1796 if (pa >= KERNLOAD && pa < first) 1797 goto do_dump_avail; 1798 1799 /* 1800 * block out dcons buffer 1801 */ 1802 if (dcons_addr > 0 1803 && pa >= trunc_page(dcons_addr) 1804 && pa < dcons_addr + dcons_size) 1805 goto do_dump_avail; 1806 1807 page_bad = FALSE; 1808 1809 /* 1810 * map page into kernel: valid, read/write,non-cacheable 1811 */ 1812 *pte = pa | PG_V | PG_RW | pg_n; 1813 invltlb(); 1814 1815 tmp = *(int *)ptr; 1816 /* 1817 * Test for alternating 1's and 0's 1818 */ 1819 *(volatile int *)ptr = 0xaaaaaaaa; 1820 if (*(volatile int *)ptr != 0xaaaaaaaa) 1821 page_bad = TRUE; 1822 /* 1823 * Test for alternating 0's and 1's 1824 */ 1825 *(volatile int *)ptr = 0x55555555; 1826 if (*(volatile int *)ptr != 0x55555555) 1827 page_bad = TRUE; 1828 /* 1829 * Test for all 1's 1830 */ 1831 *(volatile int *)ptr = 0xffffffff; 1832 if (*(volatile int *)ptr != 0xffffffff) 1833 page_bad = TRUE; 1834 /* 1835 * Test for all 0's 1836 */ 1837 *(volatile int *)ptr = 0x0; 1838 if (*(volatile int *)ptr != 0x0) 1839 page_bad = TRUE; 1840 /* 1841 * Restore original value. 1842 */ 1843 *(int *)ptr = tmp; 1844 1845 /* 1846 * Adjust array of valid/good pages. 1847 */ 1848 if (page_bad == TRUE) 1849 continue; 1850 /* 1851 * If this good page is a continuation of the 1852 * previous set of good pages, then just increase 1853 * the end pointer. Otherwise start a new chunk. 1854 * Note that "end" points one higher than end, 1855 * making the range >= start and < end. 1856 * If we're also doing a speculative memory 1857 * test and we at or past the end, bump up Maxmem 1858 * so that we keep going. The first bad page 1859 * will terminate the loop. 1860 */ 1861 if (phys_avail[pa_indx] == pa) { 1862 phys_avail[pa_indx] += PAGE_SIZE; 1863 } else { 1864 pa_indx++; 1865 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1866 printf( 1867 "Too many holes in the physical address space, giving up\n"); 1868 pa_indx--; 1869 full = TRUE; 1870 goto do_dump_avail; 1871 } 1872 phys_avail[pa_indx++] = pa; /* start */ 1873 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1874 } 1875 physmem++; 1876 do_dump_avail: 1877 if (dump_avail[da_indx] == pa) { 1878 dump_avail[da_indx] += PAGE_SIZE; 1879 } else { 1880 da_indx++; 1881 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1882 da_indx--; 1883 goto do_next; 1884 } 1885 dump_avail[da_indx++] = pa; /* start */ 1886 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1887 } 1888 do_next: 1889 if (full) 1890 break; 1891 } 1892 } 1893 *pte = 0; 1894 invltlb(); 1895 1896 /* 1897 * XXX 1898 * The last chunk must contain at least one page plus the message 1899 * buffer to avoid complicating other code (message buffer address 1900 * calculation, etc.). 1901 */ 1902 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1903 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1904 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1905 phys_avail[pa_indx--] = 0; 1906 phys_avail[pa_indx--] = 0; 1907 } 1908 1909 Maxmem = atop(phys_avail[pa_indx]); 1910 1911 /* Trim off space for the message buffer. */ 1912 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1913 1914 /* Map the message buffer. */ 1915 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1916 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1917 off); 1918 } 1919 1920 void 1921 init386(first) 1922 int first; 1923 { 1924 struct gate_descriptor *gdp; 1925 int gsel_tss, metadata_missing, x; 1926 struct pcpu *pc; 1927 1928 thread0.td_kstack = proc0kstack; 1929 thread0.td_pcb = (struct pcb *) 1930 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1931 1932 /* 1933 * This may be done better later if it gets more high level 1934 * components in it. If so just link td->td_proc here. 1935 */ 1936 proc_linkup0(&proc0, &thread0); 1937 1938 /* 1939 * Initialize DMAC 1940 */ 1941 pc98_init_dmac(); 1942 1943 metadata_missing = 0; 1944 if (bootinfo.bi_modulep) { 1945 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1946 preload_bootstrap_relocate(KERNBASE); 1947 } else { 1948 metadata_missing = 1; 1949 } 1950 if (envmode == 1) 1951 kern_envp = static_env; 1952 else if (bootinfo.bi_envp) 1953 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1954 1955 /* Init basic tunables, hz etc */ 1956 init_param1(); 1957 1958 /* 1959 * Make gdt memory segments. All segments cover the full 4GB 1960 * of address space and permissions are enforced at page level. 1961 */ 1962 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1963 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1964 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 1965 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 1966 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 1967 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 1968 1969 pc = &__pcpu[0]; 1970 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 1971 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 1972 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 1973 1974 for (x = 0; x < NGDT; x++) 1975 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1976 1977 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1978 r_gdt.rd_base = (int) gdt; 1979 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN); 1980 lgdt(&r_gdt); 1981 1982 pcpu_init(pc, 0, sizeof(struct pcpu)); 1983 PCPU_SET(prvspace, pc); 1984 PCPU_SET(curthread, &thread0); 1985 PCPU_SET(curpcb, thread0.td_pcb); 1986 1987 /* 1988 * Initialize mutexes. 1989 * 1990 * icu_lock: in order to allow an interrupt to occur in a critical 1991 * section, to set pcpu->ipending (etc...) properly, we 1992 * must be able to get the icu lock, so it can't be 1993 * under witness. 1994 */ 1995 mutex_init(); 1996 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE); 1997 1998 /* make ldt memory segments */ 1999 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 2000 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 2001 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 2002 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2003 2004 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2005 lldt(_default_ldt); 2006 PCPU_SET(currentldt, _default_ldt); 2007 2008 /* exceptions */ 2009 for (x = 0; x < NIDT; x++) 2010 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2011 GSEL(GCODE_SEL, SEL_KPL)); 2012 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2013 GSEL(GCODE_SEL, SEL_KPL)); 2014 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2015 GSEL(GCODE_SEL, SEL_KPL)); 2016 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2017 GSEL(GCODE_SEL, SEL_KPL)); 2018 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2019 GSEL(GCODE_SEL, SEL_KPL)); 2020 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2021 GSEL(GCODE_SEL, SEL_KPL)); 2022 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2023 GSEL(GCODE_SEL, SEL_KPL)); 2024 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2025 GSEL(GCODE_SEL, SEL_KPL)); 2026 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2027 , GSEL(GCODE_SEL, SEL_KPL)); 2028 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2029 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2030 GSEL(GCODE_SEL, SEL_KPL)); 2031 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2032 GSEL(GCODE_SEL, SEL_KPL)); 2033 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2034 GSEL(GCODE_SEL, SEL_KPL)); 2035 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2036 GSEL(GCODE_SEL, SEL_KPL)); 2037 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2038 GSEL(GCODE_SEL, SEL_KPL)); 2039 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2040 GSEL(GCODE_SEL, SEL_KPL)); 2041 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2042 GSEL(GCODE_SEL, SEL_KPL)); 2043 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2044 GSEL(GCODE_SEL, SEL_KPL)); 2045 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2046 GSEL(GCODE_SEL, SEL_KPL)); 2047 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2048 GSEL(GCODE_SEL, SEL_KPL)); 2049 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2050 GSEL(GCODE_SEL, SEL_KPL)); 2051 2052 r_idt.rd_limit = sizeof(idt0) - 1; 2053 r_idt.rd_base = (int) idt; 2054 lidt(&r_idt); 2055 2056 /* 2057 * Initialize the i8254 before the console so that console 2058 * initialization can use DELAY(). 2059 */ 2060 i8254_init(); 2061 2062 /* 2063 * Initialize the console before we print anything out. 2064 */ 2065 cninit(); 2066 2067 if (metadata_missing) 2068 printf("WARNING: loader(8) metadata is missing!\n"); 2069 2070 #ifdef DEV_ISA 2071 atpic_startup(); 2072 #endif 2073 2074 #ifdef DDB 2075 ksym_start = bootinfo.bi_symtab; 2076 ksym_end = bootinfo.bi_esymtab; 2077 #endif 2078 2079 kdb_init(); 2080 2081 #ifdef KDB 2082 if (boothowto & RB_KDB) 2083 kdb_enter_why(KDB_WHY_BOOTFLAGS, 2084 "Boot flags requested debugger"); 2085 #endif 2086 2087 finishidentcpu(); /* Final stage of CPU initialization */ 2088 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2089 GSEL(GCODE_SEL, SEL_KPL)); 2090 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2091 GSEL(GCODE_SEL, SEL_KPL)); 2092 initializecpu(); /* Initialize CPU registers */ 2093 2094 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2095 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2096 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2097 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2098 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2099 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2100 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2101 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2102 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2103 ltr(gsel_tss); 2104 2105 /* pointer to selector slot for %fs/%gs */ 2106 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2107 2108 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2109 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2110 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2111 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2112 dblfault_tss.tss_cr3 = (int)IdlePTD; 2113 dblfault_tss.tss_eip = (int)dblfault_handler; 2114 dblfault_tss.tss_eflags = PSL_KERNEL; 2115 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2116 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2117 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2118 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2119 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2120 2121 vm86_initialize(); 2122 getmemsize(first); 2123 init_param2(physmem); 2124 2125 /* now running on new page tables, configured,and u/iom is accessible */ 2126 2127 msgbufinit(msgbufp, MSGBUF_SIZE); 2128 2129 /* make a call gate to reenter kernel with */ 2130 gdp = &ldt[LSYS5CALLS_SEL].gd; 2131 2132 x = (int) &IDTVEC(lcall_syscall); 2133 gdp->gd_looffset = x; 2134 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2135 gdp->gd_stkcpy = 1; 2136 gdp->gd_type = SDT_SYS386CGT; 2137 gdp->gd_dpl = SEL_UPL; 2138 gdp->gd_p = 1; 2139 gdp->gd_hioffset = x >> 16; 2140 2141 /* XXX does this work? */ 2142 /* XXX yes! */ 2143 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2144 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2145 2146 /* transfer to user mode */ 2147 2148 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2149 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2150 2151 /* setup proc 0's pcb */ 2152 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 2153 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2154 thread0.td_pcb->pcb_ext = 0; 2155 thread0.td_frame = &proc0_tf; 2156 } 2157 2158 void 2159 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2160 { 2161 2162 } 2163 2164 void 2165 spinlock_enter(void) 2166 { 2167 struct thread *td; 2168 2169 td = curthread; 2170 if (td->td_md.md_spinlock_count == 0) 2171 td->td_md.md_saved_flags = intr_disable(); 2172 td->td_md.md_spinlock_count++; 2173 critical_enter(); 2174 } 2175 2176 void 2177 spinlock_exit(void) 2178 { 2179 struct thread *td; 2180 2181 td = curthread; 2182 critical_exit(); 2183 td->td_md.md_spinlock_count--; 2184 if (td->td_md.md_spinlock_count == 0) 2185 intr_restore(td->td_md.md_saved_flags); 2186 } 2187 2188 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2189 static void f00f_hack(void *unused); 2190 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 2191 2192 static void 2193 f00f_hack(void *unused) 2194 { 2195 struct gate_descriptor *new_idt; 2196 vm_offset_t tmp; 2197 2198 if (!has_f00f_bug) 2199 return; 2200 2201 GIANT_REQUIRED; 2202 2203 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2204 2205 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2206 if (tmp == 0) 2207 panic("kmem_alloc returned 0"); 2208 2209 /* Put the problematic entry (#6) at the end of the lower page. */ 2210 new_idt = (struct gate_descriptor*) 2211 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2212 bcopy(idt, new_idt, sizeof(idt0)); 2213 r_idt.rd_base = (u_int)new_idt; 2214 lidt(&r_idt); 2215 idt = new_idt; 2216 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2217 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2218 panic("vm_map_protect failed"); 2219 } 2220 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2221 2222 /* 2223 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2224 * we want to start a backtrace from the function that caused us to enter 2225 * the debugger. We have the context in the trapframe, but base the trace 2226 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2227 * enough for a backtrace. 2228 */ 2229 void 2230 makectx(struct trapframe *tf, struct pcb *pcb) 2231 { 2232 2233 pcb->pcb_edi = tf->tf_edi; 2234 pcb->pcb_esi = tf->tf_esi; 2235 pcb->pcb_ebp = tf->tf_ebp; 2236 pcb->pcb_ebx = tf->tf_ebx; 2237 pcb->pcb_eip = tf->tf_eip; 2238 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2239 } 2240 2241 int 2242 ptrace_set_pc(struct thread *td, u_long addr) 2243 { 2244 2245 td->td_frame->tf_eip = addr; 2246 return (0); 2247 } 2248 2249 int 2250 ptrace_single_step(struct thread *td) 2251 { 2252 td->td_frame->tf_eflags |= PSL_T; 2253 return (0); 2254 } 2255 2256 int 2257 ptrace_clear_single_step(struct thread *td) 2258 { 2259 td->td_frame->tf_eflags &= ~PSL_T; 2260 return (0); 2261 } 2262 2263 int 2264 fill_regs(struct thread *td, struct reg *regs) 2265 { 2266 struct pcb *pcb; 2267 struct trapframe *tp; 2268 2269 tp = td->td_frame; 2270 pcb = td->td_pcb; 2271 regs->r_fs = tp->tf_fs; 2272 regs->r_es = tp->tf_es; 2273 regs->r_ds = tp->tf_ds; 2274 regs->r_edi = tp->tf_edi; 2275 regs->r_esi = tp->tf_esi; 2276 regs->r_ebp = tp->tf_ebp; 2277 regs->r_ebx = tp->tf_ebx; 2278 regs->r_edx = tp->tf_edx; 2279 regs->r_ecx = tp->tf_ecx; 2280 regs->r_eax = tp->tf_eax; 2281 regs->r_eip = tp->tf_eip; 2282 regs->r_cs = tp->tf_cs; 2283 regs->r_eflags = tp->tf_eflags; 2284 regs->r_esp = tp->tf_esp; 2285 regs->r_ss = tp->tf_ss; 2286 regs->r_gs = pcb->pcb_gs; 2287 return (0); 2288 } 2289 2290 int 2291 set_regs(struct thread *td, struct reg *regs) 2292 { 2293 struct pcb *pcb; 2294 struct trapframe *tp; 2295 2296 tp = td->td_frame; 2297 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2298 !CS_SECURE(regs->r_cs)) 2299 return (EINVAL); 2300 pcb = td->td_pcb; 2301 tp->tf_fs = regs->r_fs; 2302 tp->tf_es = regs->r_es; 2303 tp->tf_ds = regs->r_ds; 2304 tp->tf_edi = regs->r_edi; 2305 tp->tf_esi = regs->r_esi; 2306 tp->tf_ebp = regs->r_ebp; 2307 tp->tf_ebx = regs->r_ebx; 2308 tp->tf_edx = regs->r_edx; 2309 tp->tf_ecx = regs->r_ecx; 2310 tp->tf_eax = regs->r_eax; 2311 tp->tf_eip = regs->r_eip; 2312 tp->tf_cs = regs->r_cs; 2313 tp->tf_eflags = regs->r_eflags; 2314 tp->tf_esp = regs->r_esp; 2315 tp->tf_ss = regs->r_ss; 2316 pcb->pcb_gs = regs->r_gs; 2317 return (0); 2318 } 2319 2320 #ifdef CPU_ENABLE_SSE 2321 static void 2322 fill_fpregs_xmm(sv_xmm, sv_87) 2323 struct savexmm *sv_xmm; 2324 struct save87 *sv_87; 2325 { 2326 register struct env87 *penv_87 = &sv_87->sv_env; 2327 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2328 int i; 2329 2330 bzero(sv_87, sizeof(*sv_87)); 2331 2332 /* FPU control/status */ 2333 penv_87->en_cw = penv_xmm->en_cw; 2334 penv_87->en_sw = penv_xmm->en_sw; 2335 penv_87->en_tw = penv_xmm->en_tw; 2336 penv_87->en_fip = penv_xmm->en_fip; 2337 penv_87->en_fcs = penv_xmm->en_fcs; 2338 penv_87->en_opcode = penv_xmm->en_opcode; 2339 penv_87->en_foo = penv_xmm->en_foo; 2340 penv_87->en_fos = penv_xmm->en_fos; 2341 2342 /* FPU registers */ 2343 for (i = 0; i < 8; ++i) 2344 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2345 } 2346 2347 static void 2348 set_fpregs_xmm(sv_87, sv_xmm) 2349 struct save87 *sv_87; 2350 struct savexmm *sv_xmm; 2351 { 2352 register struct env87 *penv_87 = &sv_87->sv_env; 2353 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2354 int i; 2355 2356 /* FPU control/status */ 2357 penv_xmm->en_cw = penv_87->en_cw; 2358 penv_xmm->en_sw = penv_87->en_sw; 2359 penv_xmm->en_tw = penv_87->en_tw; 2360 penv_xmm->en_fip = penv_87->en_fip; 2361 penv_xmm->en_fcs = penv_87->en_fcs; 2362 penv_xmm->en_opcode = penv_87->en_opcode; 2363 penv_xmm->en_foo = penv_87->en_foo; 2364 penv_xmm->en_fos = penv_87->en_fos; 2365 2366 /* FPU registers */ 2367 for (i = 0; i < 8; ++i) 2368 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2369 } 2370 #endif /* CPU_ENABLE_SSE */ 2371 2372 int 2373 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2374 { 2375 #ifdef CPU_ENABLE_SSE 2376 if (cpu_fxsr) { 2377 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2378 (struct save87 *)fpregs); 2379 return (0); 2380 } 2381 #endif /* CPU_ENABLE_SSE */ 2382 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2383 return (0); 2384 } 2385 2386 int 2387 set_fpregs(struct thread *td, struct fpreg *fpregs) 2388 { 2389 #ifdef CPU_ENABLE_SSE 2390 if (cpu_fxsr) { 2391 set_fpregs_xmm((struct save87 *)fpregs, 2392 &td->td_pcb->pcb_save.sv_xmm); 2393 return (0); 2394 } 2395 #endif /* CPU_ENABLE_SSE */ 2396 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2397 return (0); 2398 } 2399 2400 /* 2401 * Get machine context. 2402 */ 2403 int 2404 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2405 { 2406 struct trapframe *tp; 2407 2408 tp = td->td_frame; 2409 2410 PROC_LOCK(curthread->td_proc); 2411 mcp->mc_onstack = sigonstack(tp->tf_esp); 2412 PROC_UNLOCK(curthread->td_proc); 2413 mcp->mc_gs = td->td_pcb->pcb_gs; 2414 mcp->mc_fs = tp->tf_fs; 2415 mcp->mc_es = tp->tf_es; 2416 mcp->mc_ds = tp->tf_ds; 2417 mcp->mc_edi = tp->tf_edi; 2418 mcp->mc_esi = tp->tf_esi; 2419 mcp->mc_ebp = tp->tf_ebp; 2420 mcp->mc_isp = tp->tf_isp; 2421 mcp->mc_eflags = tp->tf_eflags; 2422 if (flags & GET_MC_CLEAR_RET) { 2423 mcp->mc_eax = 0; 2424 mcp->mc_edx = 0; 2425 mcp->mc_eflags &= ~PSL_C; 2426 } else { 2427 mcp->mc_eax = tp->tf_eax; 2428 mcp->mc_edx = tp->tf_edx; 2429 } 2430 mcp->mc_ebx = tp->tf_ebx; 2431 mcp->mc_ecx = tp->tf_ecx; 2432 mcp->mc_eip = tp->tf_eip; 2433 mcp->mc_cs = tp->tf_cs; 2434 mcp->mc_esp = tp->tf_esp; 2435 mcp->mc_ss = tp->tf_ss; 2436 mcp->mc_len = sizeof(*mcp); 2437 get_fpcontext(td, mcp); 2438 return (0); 2439 } 2440 2441 /* 2442 * Set machine context. 2443 * 2444 * However, we don't set any but the user modifiable flags, and we won't 2445 * touch the cs selector. 2446 */ 2447 int 2448 set_mcontext(struct thread *td, const mcontext_t *mcp) 2449 { 2450 struct trapframe *tp; 2451 int eflags, ret; 2452 2453 tp = td->td_frame; 2454 if (mcp->mc_len != sizeof(*mcp)) 2455 return (EINVAL); 2456 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2457 (tp->tf_eflags & ~PSL_USERCHANGE); 2458 if ((ret = set_fpcontext(td, mcp)) == 0) { 2459 tp->tf_fs = mcp->mc_fs; 2460 tp->tf_es = mcp->mc_es; 2461 tp->tf_ds = mcp->mc_ds; 2462 tp->tf_edi = mcp->mc_edi; 2463 tp->tf_esi = mcp->mc_esi; 2464 tp->tf_ebp = mcp->mc_ebp; 2465 tp->tf_ebx = mcp->mc_ebx; 2466 tp->tf_edx = mcp->mc_edx; 2467 tp->tf_ecx = mcp->mc_ecx; 2468 tp->tf_eax = mcp->mc_eax; 2469 tp->tf_eip = mcp->mc_eip; 2470 tp->tf_eflags = eflags; 2471 tp->tf_esp = mcp->mc_esp; 2472 tp->tf_ss = mcp->mc_ss; 2473 td->td_pcb->pcb_gs = mcp->mc_gs; 2474 ret = 0; 2475 } 2476 return (ret); 2477 } 2478 2479 static void 2480 get_fpcontext(struct thread *td, mcontext_t *mcp) 2481 { 2482 #ifndef DEV_NPX 2483 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2484 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2485 #else 2486 union savefpu *addr; 2487 2488 /* 2489 * XXX mc_fpstate might be misaligned, since its declaration is not 2490 * unportabilized using __attribute__((aligned(16))) like the 2491 * declaration of struct savemm, and anyway, alignment doesn't work 2492 * for auto variables since we don't use gcc's pessimal stack 2493 * alignment. Work around this by abusing the spare fields after 2494 * mcp->mc_fpstate. 2495 * 2496 * XXX unpessimize most cases by only aligning when fxsave might be 2497 * called, although this requires knowing too much about 2498 * npxgetregs()'s internals. 2499 */ 2500 addr = (union savefpu *)&mcp->mc_fpstate; 2501 if (td == PCPU_GET(fpcurthread) && 2502 #ifdef CPU_ENABLE_SSE 2503 cpu_fxsr && 2504 #endif 2505 ((uintptr_t)(void *)addr & 0xF)) { 2506 do 2507 addr = (void *)((char *)addr + 4); 2508 while ((uintptr_t)(void *)addr & 0xF); 2509 } 2510 mcp->mc_ownedfp = npxgetregs(td, addr); 2511 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2512 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2513 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2514 } 2515 mcp->mc_fpformat = npxformat(); 2516 #endif 2517 } 2518 2519 static int 2520 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2521 { 2522 union savefpu *addr; 2523 2524 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2525 return (0); 2526 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2527 mcp->mc_fpformat != _MC_FPFMT_XMM) 2528 return (EINVAL); 2529 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2530 /* We don't care what state is left in the FPU or PCB. */ 2531 fpstate_drop(td); 2532 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2533 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2534 /* XXX align as above. */ 2535 addr = (union savefpu *)&mcp->mc_fpstate; 2536 if (td == PCPU_GET(fpcurthread) && 2537 #ifdef CPU_ENABLE_SSE 2538 cpu_fxsr && 2539 #endif 2540 ((uintptr_t)(void *)addr & 0xF)) { 2541 do 2542 addr = (void *)((char *)addr + 4); 2543 while ((uintptr_t)(void *)addr & 0xF); 2544 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2545 } 2546 #ifdef DEV_NPX 2547 #ifdef CPU_ENABLE_SSE 2548 if (cpu_fxsr) 2549 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask; 2550 #endif 2551 /* 2552 * XXX we violate the dubious requirement that npxsetregs() 2553 * be called with interrupts disabled. 2554 */ 2555 npxsetregs(td, addr); 2556 #endif 2557 /* 2558 * Don't bother putting things back where they were in the 2559 * misaligned case, since we know that the caller won't use 2560 * them again. 2561 */ 2562 } else 2563 return (EINVAL); 2564 return (0); 2565 } 2566 2567 static void 2568 fpstate_drop(struct thread *td) 2569 { 2570 register_t s; 2571 2572 s = intr_disable(); 2573 #ifdef DEV_NPX 2574 if (PCPU_GET(fpcurthread) == td) 2575 npxdrop(); 2576 #endif 2577 /* 2578 * XXX force a full drop of the npx. The above only drops it if we 2579 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2580 * 2581 * XXX I don't much like npxgetregs()'s semantics of doing a full 2582 * drop. Dropping only to the pcb matches fnsave's behaviour. 2583 * We only need to drop to !PCB_INITDONE in sendsig(). But 2584 * sendsig() is the only caller of npxgetregs()... perhaps we just 2585 * have too many layers. 2586 */ 2587 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2588 intr_restore(s); 2589 } 2590 2591 int 2592 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2593 { 2594 struct pcb *pcb; 2595 2596 if (td == NULL) { 2597 dbregs->dr[0] = rdr0(); 2598 dbregs->dr[1] = rdr1(); 2599 dbregs->dr[2] = rdr2(); 2600 dbregs->dr[3] = rdr3(); 2601 dbregs->dr[4] = rdr4(); 2602 dbregs->dr[5] = rdr5(); 2603 dbregs->dr[6] = rdr6(); 2604 dbregs->dr[7] = rdr7(); 2605 } else { 2606 pcb = td->td_pcb; 2607 dbregs->dr[0] = pcb->pcb_dr0; 2608 dbregs->dr[1] = pcb->pcb_dr1; 2609 dbregs->dr[2] = pcb->pcb_dr2; 2610 dbregs->dr[3] = pcb->pcb_dr3; 2611 dbregs->dr[4] = 0; 2612 dbregs->dr[5] = 0; 2613 dbregs->dr[6] = pcb->pcb_dr6; 2614 dbregs->dr[7] = pcb->pcb_dr7; 2615 } 2616 return (0); 2617 } 2618 2619 int 2620 set_dbregs(struct thread *td, struct dbreg *dbregs) 2621 { 2622 struct pcb *pcb; 2623 int i; 2624 2625 if (td == NULL) { 2626 load_dr0(dbregs->dr[0]); 2627 load_dr1(dbregs->dr[1]); 2628 load_dr2(dbregs->dr[2]); 2629 load_dr3(dbregs->dr[3]); 2630 load_dr4(dbregs->dr[4]); 2631 load_dr5(dbregs->dr[5]); 2632 load_dr6(dbregs->dr[6]); 2633 load_dr7(dbregs->dr[7]); 2634 } else { 2635 /* 2636 * Don't let an illegal value for dr7 get set. Specifically, 2637 * check for undefined settings. Setting these bit patterns 2638 * result in undefined behaviour and can lead to an unexpected 2639 * TRCTRAP. 2640 */ 2641 for (i = 0; i < 4; i++) { 2642 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2643 return (EINVAL); 2644 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02) 2645 return (EINVAL); 2646 } 2647 2648 pcb = td->td_pcb; 2649 2650 /* 2651 * Don't let a process set a breakpoint that is not within the 2652 * process's address space. If a process could do this, it 2653 * could halt the system by setting a breakpoint in the kernel 2654 * (if ddb was enabled). Thus, we need to check to make sure 2655 * that no breakpoints are being enabled for addresses outside 2656 * process's address space. 2657 * 2658 * XXX - what about when the watched area of the user's 2659 * address space is written into from within the kernel 2660 * ... wouldn't that still cause a breakpoint to be generated 2661 * from within kernel mode? 2662 */ 2663 2664 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2665 /* dr0 is enabled */ 2666 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2667 return (EINVAL); 2668 } 2669 2670 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2671 /* dr1 is enabled */ 2672 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2673 return (EINVAL); 2674 } 2675 2676 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2677 /* dr2 is enabled */ 2678 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2679 return (EINVAL); 2680 } 2681 2682 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2683 /* dr3 is enabled */ 2684 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2685 return (EINVAL); 2686 } 2687 2688 pcb->pcb_dr0 = dbregs->dr[0]; 2689 pcb->pcb_dr1 = dbregs->dr[1]; 2690 pcb->pcb_dr2 = dbregs->dr[2]; 2691 pcb->pcb_dr3 = dbregs->dr[3]; 2692 pcb->pcb_dr6 = dbregs->dr[6]; 2693 pcb->pcb_dr7 = dbregs->dr[7]; 2694 2695 pcb->pcb_flags |= PCB_DBREGS; 2696 } 2697 2698 return (0); 2699 } 2700 2701 /* 2702 * Return > 0 if a hardware breakpoint has been hit, and the 2703 * breakpoint was in user space. Return 0, otherwise. 2704 */ 2705 int 2706 user_dbreg_trap(void) 2707 { 2708 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2709 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2710 int nbp; /* number of breakpoints that triggered */ 2711 caddr_t addr[4]; /* breakpoint addresses */ 2712 int i; 2713 2714 dr7 = rdr7(); 2715 if ((dr7 & 0x000000ff) == 0) { 2716 /* 2717 * all GE and LE bits in the dr7 register are zero, 2718 * thus the trap couldn't have been caused by the 2719 * hardware debug registers 2720 */ 2721 return 0; 2722 } 2723 2724 nbp = 0; 2725 dr6 = rdr6(); 2726 bp = dr6 & 0x0000000f; 2727 2728 if (!bp) { 2729 /* 2730 * None of the breakpoint bits are set meaning this 2731 * trap was not caused by any of the debug registers 2732 */ 2733 return 0; 2734 } 2735 2736 /* 2737 * at least one of the breakpoints were hit, check to see 2738 * which ones and if any of them are user space addresses 2739 */ 2740 2741 if (bp & 0x01) { 2742 addr[nbp++] = (caddr_t)rdr0(); 2743 } 2744 if (bp & 0x02) { 2745 addr[nbp++] = (caddr_t)rdr1(); 2746 } 2747 if (bp & 0x04) { 2748 addr[nbp++] = (caddr_t)rdr2(); 2749 } 2750 if (bp & 0x08) { 2751 addr[nbp++] = (caddr_t)rdr3(); 2752 } 2753 2754 for (i = 0; i < nbp; i++) { 2755 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2756 /* 2757 * addr[i] is in user space 2758 */ 2759 return nbp; 2760 } 2761 } 2762 2763 /* 2764 * None of the breakpoints are in user space. 2765 */ 2766 return 0; 2767 } 2768 2769 #ifdef KDB 2770 2771 /* 2772 * Provide inb() and outb() as functions. They are normally only 2773 * available as macros calling inlined functions, thus cannot be 2774 * called from the debugger. 2775 * 2776 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2777 */ 2778 2779 #undef inb 2780 #undef outb 2781 2782 /* silence compiler warnings */ 2783 u_char inb(u_int); 2784 void outb(u_int, u_char); 2785 2786 u_char 2787 inb(u_int port) 2788 { 2789 u_char data; 2790 /* 2791 * We use %%dx and not %1 here because i/o is done at %dx and not at 2792 * %edx, while gcc generates inferior code (movw instead of movl) 2793 * if we tell it to load (u_short) port. 2794 */ 2795 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2796 return (data); 2797 } 2798 2799 void 2800 outb(u_int port, u_char data) 2801 { 2802 u_char al; 2803 /* 2804 * Use an unnecessary assignment to help gcc's register allocator. 2805 * This make a large difference for gcc-1.40 and a tiny difference 2806 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2807 * best results. gcc-2.6.0 can't handle this. 2808 */ 2809 al = data; 2810 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2811 } 2812 2813 #endif /* KDB */
Cache object: 1c1957115d05066618f48a36c278da56
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