Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/pc98/pc98/machdep.c
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD: releng/7.4/sys/pc98/pc98/machdep.c 214594 2010-10-31 08:50:31Z nyan $"); 42 43 #include "opt_atalk.h" 44 #include "opt_compat.h" 45 #include "opt_cpu.h" 46 #include "opt_ddb.h" 47 #include "opt_inet.h" 48 #include "opt_ipx.h" 49 #include "opt_isa.h" 50 #include "opt_kstack_pages.h" 51 #include "opt_maxmem.h" 52 #include "opt_msgbuf.h" 53 #include "opt_npx.h" 54 #include "opt_perfmon.h" 55 56 #include <sys/param.h> 57 #include <sys/proc.h> 58 #include <sys/systm.h> 59 #include <sys/bio.h> 60 #include <sys/buf.h> 61 #include <sys/bus.h> 62 #include <sys/callout.h> 63 #include <sys/clock.h> 64 #include <sys/cons.h> 65 #include <sys/cpu.h> 66 #include <sys/eventhandler.h> 67 #include <sys/exec.h> 68 #include <sys/imgact.h> 69 #include <sys/kdb.h> 70 #include <sys/kernel.h> 71 #include <sys/ktr.h> 72 #include <sys/linker.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/memrange.h> 76 #include <sys/msgbuf.h> 77 #include <sys/mutex.h> 78 #include <sys/pcpu.h> 79 #include <sys/ptrace.h> 80 #include <sys/reboot.h> 81 #include <sys/sched.h> 82 #include <sys/signalvar.h> 83 #include <sys/sysctl.h> 84 #include <sys/sysent.h> 85 #include <sys/sysproto.h> 86 #include <sys/ucontext.h> 87 #include <sys/vmmeter.h> 88 89 #include <vm/vm.h> 90 #include <vm/vm_extern.h> 91 #include <vm/vm_kern.h> 92 #include <vm/vm_page.h> 93 #include <vm/vm_map.h> 94 #include <vm/vm_object.h> 95 #include <vm/vm_pager.h> 96 #include <vm/vm_param.h> 97 98 #ifdef DDB 99 #ifndef KDB 100 #error KDB must be enabled in order for DDB to work! 101 #endif 102 #include <ddb/ddb.h> 103 #include <ddb/db_sym.h> 104 #endif 105 106 #include <pc98/pc98/pc98_machdep.h> 107 108 #include <net/netisr.h> 109 110 #include <machine/bootinfo.h> 111 #include <machine/clock.h> 112 #include <machine/cpu.h> 113 #include <machine/cputypes.h> 114 #include <machine/intr_machdep.h> 115 #include <machine/mca.h> 116 #include <machine/md_var.h> 117 #include <machine/pc/bios.h> 118 #include <machine/pcb.h> 119 #include <machine/pcb_ext.h> 120 #include <machine/proc.h> 121 #include <machine/reg.h> 122 #include <machine/sigframe.h> 123 #include <machine/specialreg.h> 124 #include <machine/vm86.h> 125 #ifdef PERFMON 126 #include <machine/perfmon.h> 127 #endif 128 #ifdef SMP 129 #include <machine/smp.h> 130 #endif 131 132 #ifdef DEV_ISA 133 #include <i386/isa/icu.h> 134 #endif 135 136 /* Sanity check for __curthread() */ 137 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 138 139 extern void init386(int first); 140 extern void dblfault_handler(void); 141 142 extern void printcpuinfo(void); /* XXX header file */ 143 extern void finishidentcpu(void); 144 extern void panicifcpuunsupported(void); 145 extern void initializecpu(void); 146 147 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 148 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 149 150 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 151 #define CPU_ENABLE_SSE 152 #endif 153 154 static void cpu_startup(void *); 155 static void fpstate_drop(struct thread *td); 156 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 157 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 158 #ifdef CPU_ENABLE_SSE 159 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 160 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 161 #endif /* CPU_ENABLE_SSE */ 162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 163 164 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */ 165 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */ 166 167 #ifdef DDB 168 extern vm_offset_t ksym_start, ksym_end; 169 #endif 170 171 int _udatasel, _ucodesel; 172 u_int basemem; 173 174 static int ispc98 = 1; 175 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 176 177 int cold = 1; 178 179 #ifdef COMPAT_43 180 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 181 #endif 182 #ifdef COMPAT_FREEBSD4 183 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 184 #endif 185 186 long Maxmem = 0; 187 long realmem = 0; 188 189 /* 190 * The number of PHYSMAP entries must be one less than the number of 191 * PHYSSEG entries because the PHYSMAP entry that spans the largest 192 * physical address that is accessible by ISA DMA is split into two 193 * PHYSSEG entries. 194 */ 195 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 196 197 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 198 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 199 200 /* must be 2 less so 0 0 can signal end of chunks */ 201 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 202 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 203 204 struct kva_md_info kmi; 205 206 static struct trapframe proc0_tf; 207 struct pcpu __pcpu[MAXCPU]; 208 209 struct mtx icu_lock; 210 211 struct mem_range_softc mem_range_softc; 212 213 static void 214 cpu_startup(dummy) 215 void *dummy; 216 { 217 /* 218 * Good {morning,afternoon,evening,night}. 219 */ 220 startrtclock(); 221 printcpuinfo(); 222 panicifcpuunsupported(); 223 #ifdef PERFMON 224 perfmon_init(); 225 #endif 226 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 227 ptoa((uintmax_t)Maxmem) / 1048576); 228 realmem = Maxmem; 229 /* 230 * Display any holes after the first chunk of extended memory. 231 */ 232 if (bootverbose) { 233 int indx; 234 235 printf("Physical memory chunk(s):\n"); 236 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 237 vm_paddr_t size; 238 239 size = phys_avail[indx + 1] - phys_avail[indx]; 240 printf( 241 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 242 (uintmax_t)phys_avail[indx], 243 (uintmax_t)phys_avail[indx + 1] - 1, 244 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 245 } 246 } 247 248 vm_ksubmap_init(&kmi); 249 250 printf("avail memory = %ju (%ju MB)\n", 251 ptoa((uintmax_t)cnt.v_free_count), 252 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 253 254 /* 255 * Set up buffers, so they can be used to read disk labels. 256 */ 257 bufinit(); 258 vm_pager_bufferinit(); 259 260 cpu_setregs(); 261 } 262 263 /* 264 * Send an interrupt to process. 265 * 266 * Stack is set up to allow sigcode stored 267 * at top to call routine, followed by kcall 268 * to sigreturn routine below. After sigreturn 269 * resets the signal mask, the stack, and the 270 * frame pointer, it returns to the user 271 * specified pc, psl. 272 */ 273 #ifdef COMPAT_43 274 static void 275 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 276 { 277 struct osigframe sf, *fp; 278 struct proc *p; 279 struct thread *td; 280 struct sigacts *psp; 281 struct trapframe *regs; 282 int sig; 283 int oonstack; 284 285 td = curthread; 286 p = td->td_proc; 287 PROC_LOCK_ASSERT(p, MA_OWNED); 288 sig = ksi->ksi_signo; 289 psp = p->p_sigacts; 290 mtx_assert(&psp->ps_mtx, MA_OWNED); 291 regs = td->td_frame; 292 oonstack = sigonstack(regs->tf_esp); 293 294 /* Allocate space for the signal handler context. */ 295 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 296 SIGISMEMBER(psp->ps_sigonstack, sig)) { 297 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 298 td->td_sigstk.ss_size - sizeof(struct osigframe)); 299 #if defined(COMPAT_43) 300 td->td_sigstk.ss_flags |= SS_ONSTACK; 301 #endif 302 } else 303 fp = (struct osigframe *)regs->tf_esp - 1; 304 305 /* Translate the signal if appropriate. */ 306 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 307 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 308 309 /* Build the argument list for the signal handler. */ 310 sf.sf_signum = sig; 311 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 312 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 313 /* Signal handler installed with SA_SIGINFO. */ 314 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 315 sf.sf_siginfo.si_signo = sig; 316 sf.sf_siginfo.si_code = ksi->ksi_code; 317 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 318 } else { 319 /* Old FreeBSD-style arguments. */ 320 sf.sf_arg2 = ksi->ksi_code; 321 sf.sf_addr = (register_t)ksi->ksi_addr; 322 sf.sf_ahu.sf_handler = catcher; 323 } 324 mtx_unlock(&psp->ps_mtx); 325 PROC_UNLOCK(p); 326 327 /* Save most if not all of trap frame. */ 328 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 329 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 330 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 331 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 332 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 333 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 334 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 335 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 336 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 337 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 338 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 339 sf.sf_siginfo.si_sc.sc_gs = rgs(); 340 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 341 342 /* Build the signal context to be used by osigreturn(). */ 343 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 344 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 345 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 346 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 347 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 348 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 349 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 350 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 351 352 /* 353 * If we're a vm86 process, we want to save the segment registers. 354 * We also change eflags to be our emulated eflags, not the actual 355 * eflags. 356 */ 357 if (regs->tf_eflags & PSL_VM) { 358 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 359 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 360 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 361 362 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 363 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 364 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 365 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 366 367 if (vm86->vm86_has_vme == 0) 368 sf.sf_siginfo.si_sc.sc_ps = 369 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 370 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 371 372 /* See sendsig() for comments. */ 373 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 374 } 375 376 /* 377 * Copy the sigframe out to the user's stack. 378 */ 379 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 380 #ifdef DEBUG 381 printf("process %ld has trashed its stack\n", (long)p->p_pid); 382 #endif 383 PROC_LOCK(p); 384 sigexit(td, SIGILL); 385 } 386 387 regs->tf_esp = (int)fp; 388 regs->tf_eip = PS_STRINGS - szosigcode; 389 regs->tf_eflags &= ~(PSL_T | PSL_D); 390 regs->tf_cs = _ucodesel; 391 regs->tf_ds = _udatasel; 392 regs->tf_es = _udatasel; 393 regs->tf_fs = _udatasel; 394 load_gs(_udatasel); 395 regs->tf_ss = _udatasel; 396 PROC_LOCK(p); 397 mtx_lock(&psp->ps_mtx); 398 } 399 #endif /* COMPAT_43 */ 400 401 #ifdef COMPAT_FREEBSD4 402 static void 403 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 404 { 405 struct sigframe4 sf, *sfp; 406 struct proc *p; 407 struct thread *td; 408 struct sigacts *psp; 409 struct trapframe *regs; 410 int sig; 411 int oonstack; 412 413 td = curthread; 414 p = td->td_proc; 415 PROC_LOCK_ASSERT(p, MA_OWNED); 416 sig = ksi->ksi_signo; 417 psp = p->p_sigacts; 418 mtx_assert(&psp->ps_mtx, MA_OWNED); 419 regs = td->td_frame; 420 oonstack = sigonstack(regs->tf_esp); 421 422 /* Save user context. */ 423 bzero(&sf, sizeof(sf)); 424 sf.sf_uc.uc_sigmask = *mask; 425 sf.sf_uc.uc_stack = td->td_sigstk; 426 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 427 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 428 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 429 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 430 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 431 432 /* Allocate space for the signal handler context. */ 433 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 434 SIGISMEMBER(psp->ps_sigonstack, sig)) { 435 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 436 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 437 #if defined(COMPAT_43) 438 td->td_sigstk.ss_flags |= SS_ONSTACK; 439 #endif 440 } else 441 sfp = (struct sigframe4 *)regs->tf_esp - 1; 442 443 /* Translate the signal if appropriate. */ 444 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 445 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 446 447 /* Build the argument list for the signal handler. */ 448 sf.sf_signum = sig; 449 sf.sf_ucontext = (register_t)&sfp->sf_uc; 450 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 451 /* Signal handler installed with SA_SIGINFO. */ 452 sf.sf_siginfo = (register_t)&sfp->sf_si; 453 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 454 455 /* Fill in POSIX parts */ 456 sf.sf_si.si_signo = sig; 457 sf.sf_si.si_code = ksi->ksi_code; 458 sf.sf_si.si_addr = ksi->ksi_addr; 459 } else { 460 /* Old FreeBSD-style arguments. */ 461 sf.sf_siginfo = ksi->ksi_code; 462 sf.sf_addr = (register_t)ksi->ksi_addr; 463 sf.sf_ahu.sf_handler = catcher; 464 } 465 mtx_unlock(&psp->ps_mtx); 466 PROC_UNLOCK(p); 467 468 /* 469 * If we're a vm86 process, we want to save the segment registers. 470 * We also change eflags to be our emulated eflags, not the actual 471 * eflags. 472 */ 473 if (regs->tf_eflags & PSL_VM) { 474 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 475 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 476 477 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 478 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 479 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 480 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 481 482 if (vm86->vm86_has_vme == 0) 483 sf.sf_uc.uc_mcontext.mc_eflags = 484 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 485 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 486 487 /* 488 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 489 * syscalls made by the signal handler. This just avoids 490 * wasting time for our lazy fixup of such faults. PSL_NT 491 * does nothing in vm86 mode, but vm86 programs can set it 492 * almost legitimately in probes for old cpu types. 493 */ 494 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 495 } 496 497 /* 498 * Copy the sigframe out to the user's stack. 499 */ 500 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 501 #ifdef DEBUG 502 printf("process %ld has trashed its stack\n", (long)p->p_pid); 503 #endif 504 PROC_LOCK(p); 505 sigexit(td, SIGILL); 506 } 507 508 regs->tf_esp = (int)sfp; 509 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 510 regs->tf_eflags &= ~(PSL_T | PSL_D); 511 regs->tf_cs = _ucodesel; 512 regs->tf_ds = _udatasel; 513 regs->tf_es = _udatasel; 514 regs->tf_fs = _udatasel; 515 regs->tf_ss = _udatasel; 516 PROC_LOCK(p); 517 mtx_lock(&psp->ps_mtx); 518 } 519 #endif /* COMPAT_FREEBSD4 */ 520 521 void 522 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 523 { 524 struct sigframe sf, *sfp; 525 struct proc *p; 526 struct thread *td; 527 struct sigacts *psp; 528 char *sp; 529 struct trapframe *regs; 530 int sig; 531 int oonstack; 532 533 td = curthread; 534 p = td->td_proc; 535 PROC_LOCK_ASSERT(p, MA_OWNED); 536 sig = ksi->ksi_signo; 537 psp = p->p_sigacts; 538 mtx_assert(&psp->ps_mtx, MA_OWNED); 539 #ifdef COMPAT_FREEBSD4 540 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 541 freebsd4_sendsig(catcher, ksi, mask); 542 return; 543 } 544 #endif 545 #ifdef COMPAT_43 546 if (SIGISMEMBER(psp->ps_osigset, sig)) { 547 osendsig(catcher, ksi, mask); 548 return; 549 } 550 #endif 551 regs = td->td_frame; 552 oonstack = sigonstack(regs->tf_esp); 553 554 /* Save user context. */ 555 bzero(&sf, sizeof(sf)); 556 sf.sf_uc.uc_sigmask = *mask; 557 sf.sf_uc.uc_stack = td->td_sigstk; 558 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 559 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 560 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 561 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 562 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 563 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 564 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 565 fpstate_drop(td); 566 567 /* Allocate space for the signal handler context. */ 568 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 569 SIGISMEMBER(psp->ps_sigonstack, sig)) { 570 sp = td->td_sigstk.ss_sp + 571 td->td_sigstk.ss_size - sizeof(struct sigframe); 572 #if defined(COMPAT_43) 573 td->td_sigstk.ss_flags |= SS_ONSTACK; 574 #endif 575 } else 576 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 577 /* Align to 16 bytes. */ 578 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 579 580 /* Translate the signal if appropriate. */ 581 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 582 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 583 584 /* Build the argument list for the signal handler. */ 585 sf.sf_signum = sig; 586 sf.sf_ucontext = (register_t)&sfp->sf_uc; 587 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 588 /* Signal handler installed with SA_SIGINFO. */ 589 sf.sf_siginfo = (register_t)&sfp->sf_si; 590 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 591 592 /* Fill in POSIX parts */ 593 sf.sf_si = ksi->ksi_info; 594 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 595 } else { 596 /* Old FreeBSD-style arguments. */ 597 sf.sf_siginfo = ksi->ksi_code; 598 sf.sf_addr = (register_t)ksi->ksi_addr; 599 sf.sf_ahu.sf_handler = catcher; 600 } 601 mtx_unlock(&psp->ps_mtx); 602 PROC_UNLOCK(p); 603 604 /* 605 * If we're a vm86 process, we want to save the segment registers. 606 * We also change eflags to be our emulated eflags, not the actual 607 * eflags. 608 */ 609 if (regs->tf_eflags & PSL_VM) { 610 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 611 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 612 613 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 614 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 615 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 616 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 617 618 if (vm86->vm86_has_vme == 0) 619 sf.sf_uc.uc_mcontext.mc_eflags = 620 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 621 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 622 623 /* 624 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 625 * syscalls made by the signal handler. This just avoids 626 * wasting time for our lazy fixup of such faults. PSL_NT 627 * does nothing in vm86 mode, but vm86 programs can set it 628 * almost legitimately in probes for old cpu types. 629 */ 630 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 631 } 632 633 /* 634 * Copy the sigframe out to the user's stack. 635 */ 636 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 637 #ifdef DEBUG 638 printf("process %ld has trashed its stack\n", (long)p->p_pid); 639 #endif 640 PROC_LOCK(p); 641 sigexit(td, SIGILL); 642 } 643 644 regs->tf_esp = (int)sfp; 645 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 646 regs->tf_eflags &= ~(PSL_T | PSL_D); 647 regs->tf_cs = _ucodesel; 648 regs->tf_ds = _udatasel; 649 regs->tf_es = _udatasel; 650 regs->tf_fs = _udatasel; 651 regs->tf_ss = _udatasel; 652 PROC_LOCK(p); 653 mtx_lock(&psp->ps_mtx); 654 } 655 656 /* 657 * System call to cleanup state after a signal 658 * has been taken. Reset signal mask and 659 * stack state from context left by sendsig (above). 660 * Return to previous pc and psl as specified by 661 * context left by sendsig. Check carefully to 662 * make sure that the user has not modified the 663 * state to gain improper privileges. 664 * 665 * MPSAFE 666 */ 667 #ifdef COMPAT_43 668 int 669 osigreturn(td, uap) 670 struct thread *td; 671 struct osigreturn_args /* { 672 struct osigcontext *sigcntxp; 673 } */ *uap; 674 { 675 struct osigcontext sc; 676 struct trapframe *regs; 677 struct osigcontext *scp; 678 struct proc *p = td->td_proc; 679 int eflags, error; 680 ksiginfo_t ksi; 681 682 regs = td->td_frame; 683 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 684 if (error != 0) 685 return (error); 686 scp = ≻ 687 eflags = scp->sc_ps; 688 if (eflags & PSL_VM) { 689 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 690 struct vm86_kernel *vm86; 691 692 /* 693 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 694 * set up the vm86 area, and we can't enter vm86 mode. 695 */ 696 if (td->td_pcb->pcb_ext == 0) 697 return (EINVAL); 698 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 699 if (vm86->vm86_inited == 0) 700 return (EINVAL); 701 702 /* Go back to user mode if both flags are set. */ 703 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 704 ksiginfo_init_trap(&ksi); 705 ksi.ksi_signo = SIGBUS; 706 ksi.ksi_code = BUS_OBJERR; 707 ksi.ksi_addr = (void *)regs->tf_eip; 708 trapsignal(td, &ksi); 709 } 710 711 if (vm86->vm86_has_vme) { 712 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 713 (eflags & VME_USERCHANGE) | PSL_VM; 714 } else { 715 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 716 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 717 (eflags & VM_USERCHANGE) | PSL_VM; 718 } 719 tf->tf_vm86_ds = scp->sc_ds; 720 tf->tf_vm86_es = scp->sc_es; 721 tf->tf_vm86_fs = scp->sc_fs; 722 tf->tf_vm86_gs = scp->sc_gs; 723 tf->tf_ds = _udatasel; 724 tf->tf_es = _udatasel; 725 tf->tf_fs = _udatasel; 726 } else { 727 /* 728 * Don't allow users to change privileged or reserved flags. 729 */ 730 /* 731 * XXX do allow users to change the privileged flag PSL_RF. 732 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 733 * should sometimes set it there too. tf_eflags is kept in 734 * the signal context during signal handling and there is no 735 * other place to remember it, so the PSL_RF bit may be 736 * corrupted by the signal handler without us knowing. 737 * Corruption of the PSL_RF bit at worst causes one more or 738 * one less debugger trap, so allowing it is fairly harmless. 739 */ 740 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 741 return (EINVAL); 742 } 743 744 /* 745 * Don't allow users to load a valid privileged %cs. Let the 746 * hardware check for invalid selectors, excess privilege in 747 * other selectors, invalid %eip's and invalid %esp's. 748 */ 749 if (!CS_SECURE(scp->sc_cs)) { 750 ksiginfo_init_trap(&ksi); 751 ksi.ksi_signo = SIGBUS; 752 ksi.ksi_code = BUS_OBJERR; 753 ksi.ksi_trapno = T_PROTFLT; 754 ksi.ksi_addr = (void *)regs->tf_eip; 755 trapsignal(td, &ksi); 756 return (EINVAL); 757 } 758 regs->tf_ds = scp->sc_ds; 759 regs->tf_es = scp->sc_es; 760 regs->tf_fs = scp->sc_fs; 761 } 762 763 /* Restore remaining registers. */ 764 regs->tf_eax = scp->sc_eax; 765 regs->tf_ebx = scp->sc_ebx; 766 regs->tf_ecx = scp->sc_ecx; 767 regs->tf_edx = scp->sc_edx; 768 regs->tf_esi = scp->sc_esi; 769 regs->tf_edi = scp->sc_edi; 770 regs->tf_cs = scp->sc_cs; 771 regs->tf_ss = scp->sc_ss; 772 regs->tf_isp = scp->sc_isp; 773 regs->tf_ebp = scp->sc_fp; 774 regs->tf_esp = scp->sc_sp; 775 regs->tf_eip = scp->sc_pc; 776 regs->tf_eflags = eflags; 777 778 PROC_LOCK(p); 779 #if defined(COMPAT_43) 780 if (scp->sc_onstack & 1) 781 td->td_sigstk.ss_flags |= SS_ONSTACK; 782 else 783 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 784 #endif 785 SIGSETOLD(td->td_sigmask, scp->sc_mask); 786 SIG_CANTMASK(td->td_sigmask); 787 signotify(td); 788 PROC_UNLOCK(p); 789 return (EJUSTRETURN); 790 } 791 #endif /* COMPAT_43 */ 792 793 #ifdef COMPAT_FREEBSD4 794 /* 795 * MPSAFE 796 */ 797 int 798 freebsd4_sigreturn(td, uap) 799 struct thread *td; 800 struct freebsd4_sigreturn_args /* { 801 const ucontext4 *sigcntxp; 802 } */ *uap; 803 { 804 struct ucontext4 uc; 805 struct proc *p = td->td_proc; 806 struct trapframe *regs; 807 const struct ucontext4 *ucp; 808 int cs, eflags, error; 809 ksiginfo_t ksi; 810 811 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 812 if (error != 0) 813 return (error); 814 ucp = &uc; 815 regs = td->td_frame; 816 eflags = ucp->uc_mcontext.mc_eflags; 817 if (eflags & PSL_VM) { 818 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 819 struct vm86_kernel *vm86; 820 821 /* 822 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 823 * set up the vm86 area, and we can't enter vm86 mode. 824 */ 825 if (td->td_pcb->pcb_ext == 0) 826 return (EINVAL); 827 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 828 if (vm86->vm86_inited == 0) 829 return (EINVAL); 830 831 /* Go back to user mode if both flags are set. */ 832 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 833 ksiginfo_init_trap(&ksi); 834 ksi.ksi_signo = SIGBUS; 835 ksi.ksi_code = BUS_OBJERR; 836 ksi.ksi_addr = (void *)regs->tf_eip; 837 trapsignal(td, &ksi); 838 } 839 if (vm86->vm86_has_vme) { 840 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 841 (eflags & VME_USERCHANGE) | PSL_VM; 842 } else { 843 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 844 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 845 (eflags & VM_USERCHANGE) | PSL_VM; 846 } 847 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 848 tf->tf_eflags = eflags; 849 tf->tf_vm86_ds = tf->tf_ds; 850 tf->tf_vm86_es = tf->tf_es; 851 tf->tf_vm86_fs = tf->tf_fs; 852 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 853 tf->tf_ds = _udatasel; 854 tf->tf_es = _udatasel; 855 tf->tf_fs = _udatasel; 856 } else { 857 /* 858 * Don't allow users to change privileged or reserved flags. 859 */ 860 /* 861 * XXX do allow users to change the privileged flag PSL_RF. 862 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 863 * should sometimes set it there too. tf_eflags is kept in 864 * the signal context during signal handling and there is no 865 * other place to remember it, so the PSL_RF bit may be 866 * corrupted by the signal handler without us knowing. 867 * Corruption of the PSL_RF bit at worst causes one more or 868 * one less debugger trap, so allowing it is fairly harmless. 869 */ 870 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 871 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 872 return (EINVAL); 873 } 874 875 /* 876 * Don't allow users to load a valid privileged %cs. Let the 877 * hardware check for invalid selectors, excess privilege in 878 * other selectors, invalid %eip's and invalid %esp's. 879 */ 880 cs = ucp->uc_mcontext.mc_cs; 881 if (!CS_SECURE(cs)) { 882 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 883 ksiginfo_init_trap(&ksi); 884 ksi.ksi_signo = SIGBUS; 885 ksi.ksi_code = BUS_OBJERR; 886 ksi.ksi_trapno = T_PROTFLT; 887 ksi.ksi_addr = (void *)regs->tf_eip; 888 trapsignal(td, &ksi); 889 return (EINVAL); 890 } 891 892 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 893 } 894 895 PROC_LOCK(p); 896 #if defined(COMPAT_43) 897 if (ucp->uc_mcontext.mc_onstack & 1) 898 td->td_sigstk.ss_flags |= SS_ONSTACK; 899 else 900 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 901 #endif 902 903 td->td_sigmask = ucp->uc_sigmask; 904 SIG_CANTMASK(td->td_sigmask); 905 signotify(td); 906 PROC_UNLOCK(p); 907 return (EJUSTRETURN); 908 } 909 #endif /* COMPAT_FREEBSD4 */ 910 911 /* 912 * MPSAFE 913 */ 914 int 915 sigreturn(td, uap) 916 struct thread *td; 917 struct sigreturn_args /* { 918 const struct __ucontext *sigcntxp; 919 } */ *uap; 920 { 921 ucontext_t uc; 922 struct proc *p = td->td_proc; 923 struct trapframe *regs; 924 const ucontext_t *ucp; 925 int cs, eflags, error, ret; 926 ksiginfo_t ksi; 927 928 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 929 if (error != 0) 930 return (error); 931 ucp = &uc; 932 regs = td->td_frame; 933 eflags = ucp->uc_mcontext.mc_eflags; 934 if (eflags & PSL_VM) { 935 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 936 struct vm86_kernel *vm86; 937 938 /* 939 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 940 * set up the vm86 area, and we can't enter vm86 mode. 941 */ 942 if (td->td_pcb->pcb_ext == 0) 943 return (EINVAL); 944 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 945 if (vm86->vm86_inited == 0) 946 return (EINVAL); 947 948 /* Go back to user mode if both flags are set. */ 949 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 950 ksiginfo_init_trap(&ksi); 951 ksi.ksi_signo = SIGBUS; 952 ksi.ksi_code = BUS_OBJERR; 953 ksi.ksi_addr = (void *)regs->tf_eip; 954 trapsignal(td, &ksi); 955 } 956 957 if (vm86->vm86_has_vme) { 958 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 959 (eflags & VME_USERCHANGE) | PSL_VM; 960 } else { 961 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 962 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 963 (eflags & VM_USERCHANGE) | PSL_VM; 964 } 965 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 966 tf->tf_eflags = eflags; 967 tf->tf_vm86_ds = tf->tf_ds; 968 tf->tf_vm86_es = tf->tf_es; 969 tf->tf_vm86_fs = tf->tf_fs; 970 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 971 tf->tf_ds = _udatasel; 972 tf->tf_es = _udatasel; 973 tf->tf_fs = _udatasel; 974 } else { 975 /* 976 * Don't allow users to change privileged or reserved flags. 977 */ 978 /* 979 * XXX do allow users to change the privileged flag PSL_RF. 980 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 981 * should sometimes set it there too. tf_eflags is kept in 982 * the signal context during signal handling and there is no 983 * other place to remember it, so the PSL_RF bit may be 984 * corrupted by the signal handler without us knowing. 985 * Corruption of the PSL_RF bit at worst causes one more or 986 * one less debugger trap, so allowing it is fairly harmless. 987 */ 988 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 989 printf("sigreturn: eflags = 0x%x\n", eflags); 990 return (EINVAL); 991 } 992 993 /* 994 * Don't allow users to load a valid privileged %cs. Let the 995 * hardware check for invalid selectors, excess privilege in 996 * other selectors, invalid %eip's and invalid %esp's. 997 */ 998 cs = ucp->uc_mcontext.mc_cs; 999 if (!CS_SECURE(cs)) { 1000 printf("sigreturn: cs = 0x%x\n", cs); 1001 ksiginfo_init_trap(&ksi); 1002 ksi.ksi_signo = SIGBUS; 1003 ksi.ksi_code = BUS_OBJERR; 1004 ksi.ksi_trapno = T_PROTFLT; 1005 ksi.ksi_addr = (void *)regs->tf_eip; 1006 trapsignal(td, &ksi); 1007 return (EINVAL); 1008 } 1009 1010 ret = set_fpcontext(td, &ucp->uc_mcontext); 1011 if (ret != 0) 1012 return (ret); 1013 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1014 } 1015 1016 PROC_LOCK(p); 1017 #if defined(COMPAT_43) 1018 if (ucp->uc_mcontext.mc_onstack & 1) 1019 td->td_sigstk.ss_flags |= SS_ONSTACK; 1020 else 1021 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1022 #endif 1023 1024 td->td_sigmask = ucp->uc_sigmask; 1025 SIG_CANTMASK(td->td_sigmask); 1026 signotify(td); 1027 PROC_UNLOCK(p); 1028 return (EJUSTRETURN); 1029 } 1030 1031 /* 1032 * Machine dependent boot() routine 1033 * 1034 * I haven't seen anything to put here yet 1035 * Possibly some stuff might be grafted back here from boot() 1036 */ 1037 void 1038 cpu_boot(int howto) 1039 { 1040 } 1041 1042 /* Get current clock frequency for the given cpu id. */ 1043 int 1044 cpu_est_clockrate(int cpu_id, uint64_t *rate) 1045 { 1046 register_t reg; 1047 uint64_t tsc1, tsc2; 1048 1049 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1050 return (EINVAL); 1051 if (!tsc_present) 1052 return (EOPNOTSUPP); 1053 1054 /* If we're booting, trust the rate calibrated moments ago. */ 1055 if (cold) { 1056 *rate = tsc_freq; 1057 return (0); 1058 } 1059 1060 #ifdef SMP 1061 /* Schedule ourselves on the indicated cpu. */ 1062 thread_lock(curthread); 1063 sched_bind(curthread, cpu_id); 1064 thread_unlock(curthread); 1065 #endif 1066 1067 /* Calibrate by measuring a short delay. */ 1068 reg = intr_disable(); 1069 tsc1 = rdtsc(); 1070 DELAY(1000); 1071 tsc2 = rdtsc(); 1072 intr_restore(reg); 1073 1074 #ifdef SMP 1075 thread_lock(curthread); 1076 sched_unbind(curthread); 1077 thread_unlock(curthread); 1078 #endif 1079 1080 /* 1081 * Calculate the difference in readings, convert to Mhz, and 1082 * subtract 0.5% of the total. Empirical testing has shown that 1083 * overhead in DELAY() works out to approximately this value. 1084 */ 1085 tsc2 -= tsc1; 1086 *rate = tsc2 * 1000 - tsc2 * 5; 1087 return (0); 1088 } 1089 1090 /* 1091 * Shutdown the CPU as much as possible 1092 */ 1093 void 1094 cpu_halt(void) 1095 { 1096 for (;;) 1097 __asm__ ("hlt"); 1098 } 1099 1100 /* 1101 * Hook to idle the CPU when possible. In the SMP case we default to 1102 * off because a halted cpu will not currently pick up a new thread in the 1103 * run queue until the next timer tick. If turned on this will result in 1104 * approximately a 4.2% loss in real time performance in buildworld tests 1105 * (but improves user and sys times oddly enough), and saves approximately 1106 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1107 * 1108 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1109 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1110 * Then we can have our cake and eat it too. 1111 * 1112 * XXX I'm turning it on for SMP as well by default for now. It seems to 1113 * help lock contention somewhat, and this is critical for HTT. -Peter 1114 */ 1115 static int cpu_idle_hlt = 1; 1116 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt); 1117 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1118 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1119 1120 static void 1121 cpu_idle_default(void) 1122 { 1123 /* 1124 * we must absolutely guarentee that hlt is the 1125 * absolute next instruction after sti or we 1126 * introduce a timing window. 1127 */ 1128 __asm __volatile("sti; hlt"); 1129 } 1130 1131 /* 1132 * Note that we have to be careful here to avoid a race between checking 1133 * sched_runnable() and actually halting. If we don't do this, we may waste 1134 * the time between calling hlt and the next interrupt even though there 1135 * is a runnable process. 1136 */ 1137 void 1138 cpu_idle(void) 1139 { 1140 1141 #ifdef SMP 1142 if (mp_grab_cpu_hlt()) 1143 return; 1144 #endif 1145 1146 if (cpu_idle_hlt) { 1147 disable_intr(); 1148 if (sched_runnable()) 1149 enable_intr(); 1150 else 1151 (*cpu_idle_hook)(); 1152 } 1153 } 1154 1155 /* Other subsystems (e.g., ACPI) can hook this later. */ 1156 void (*cpu_idle_hook)(void) = cpu_idle_default; 1157 1158 /* 1159 * Reset registers to default values on exec. 1160 */ 1161 void 1162 exec_setregs(td, entry, stack, ps_strings) 1163 struct thread *td; 1164 u_long entry; 1165 u_long stack; 1166 u_long ps_strings; 1167 { 1168 struct trapframe *regs = td->td_frame; 1169 struct pcb *pcb = td->td_pcb; 1170 1171 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1172 pcb->pcb_gs = _udatasel; 1173 load_gs(_udatasel); 1174 1175 mtx_lock_spin(&dt_lock); 1176 if (td->td_proc->p_md.md_ldt) 1177 user_ldt_free(td); 1178 else 1179 mtx_unlock_spin(&dt_lock); 1180 1181 bzero((char *)regs, sizeof(struct trapframe)); 1182 regs->tf_eip = entry; 1183 regs->tf_esp = stack; 1184 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1185 regs->tf_ss = _udatasel; 1186 regs->tf_ds = _udatasel; 1187 regs->tf_es = _udatasel; 1188 regs->tf_fs = _udatasel; 1189 regs->tf_cs = _ucodesel; 1190 1191 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1192 regs->tf_ebx = ps_strings; 1193 1194 /* 1195 * Reset the hardware debug registers if they were in use. 1196 * They won't have any meaning for the newly exec'd process. 1197 */ 1198 if (pcb->pcb_flags & PCB_DBREGS) { 1199 pcb->pcb_dr0 = 0; 1200 pcb->pcb_dr1 = 0; 1201 pcb->pcb_dr2 = 0; 1202 pcb->pcb_dr3 = 0; 1203 pcb->pcb_dr6 = 0; 1204 pcb->pcb_dr7 = 0; 1205 if (pcb == PCPU_GET(curpcb)) { 1206 /* 1207 * Clear the debug registers on the running 1208 * CPU, otherwise they will end up affecting 1209 * the next process we switch to. 1210 */ 1211 reset_dbregs(); 1212 } 1213 pcb->pcb_flags &= ~PCB_DBREGS; 1214 } 1215 1216 /* 1217 * Initialize the math emulator (if any) for the current process. 1218 * Actually, just clear the bit that says that the emulator has 1219 * been initialized. Initialization is delayed until the process 1220 * traps to the emulator (if it is done at all) mainly because 1221 * emulators don't provide an entry point for initialization. 1222 */ 1223 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1224 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__; 1225 1226 /* 1227 * Drop the FP state if we hold it, so that the process gets a 1228 * clean FP state if it uses the FPU again. 1229 */ 1230 fpstate_drop(td); 1231 1232 /* 1233 * XXX - Linux emulator 1234 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1235 * on it. 1236 */ 1237 td->td_retval[1] = 0; 1238 } 1239 1240 void 1241 cpu_setregs(void) 1242 { 1243 unsigned int cr0; 1244 1245 cr0 = rcr0(); 1246 1247 /* 1248 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1249 * 1250 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1251 * instructions. We must set the CR0_MP bit and use the CR0_TS 1252 * bit to control the trap, because setting the CR0_EM bit does 1253 * not cause WAIT instructions to trap. It's important to trap 1254 * WAIT instructions - otherwise the "wait" variants of no-wait 1255 * control instructions would degenerate to the "no-wait" variants 1256 * after FP context switches but work correctly otherwise. It's 1257 * particularly important to trap WAITs when there is no NPX - 1258 * otherwise the "wait" variants would always degenerate. 1259 * 1260 * Try setting CR0_NE to get correct error reporting on 486DX's. 1261 * Setting it should fail or do nothing on lesser processors. 1262 */ 1263 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1264 load_cr0(cr0); 1265 load_gs(_udatasel); 1266 } 1267 1268 u_long bootdev; /* not a struct cdev *- encoding is different */ 1269 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1270 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1271 1272 /* 1273 * Initialize 386 and configure to run kernel 1274 */ 1275 1276 /* 1277 * Initialize segments & interrupt table 1278 */ 1279 1280 int _default_ldt; 1281 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1282 static struct gate_descriptor idt0[NIDT]; 1283 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1284 union descriptor ldt[NLDT]; /* local descriptor table */ 1285 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1286 struct mtx dt_lock; /* lock for GDT and LDT */ 1287 1288 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1289 extern int has_f00f_bug; 1290 #endif 1291 1292 static struct i386tss dblfault_tss; 1293 static char dblfault_stack[PAGE_SIZE]; 1294 1295 extern vm_offset_t proc0kstack; 1296 1297 1298 /* 1299 * software prototypes -- in more palatable form. 1300 * 1301 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1302 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1303 */ 1304 struct soft_segment_descriptor gdt_segs[] = { 1305 /* GNULL_SEL 0 Null Descriptor */ 1306 { 0x0, /* segment base address */ 1307 0x0, /* length */ 1308 0, /* segment type */ 1309 0, /* segment descriptor priority level */ 1310 0, /* segment descriptor present */ 1311 0, 0, 1312 0, /* default 32 vs 16 bit size */ 1313 0 /* limit granularity (byte/page units)*/ }, 1314 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1315 { 0x0, /* segment base address */ 1316 0xfffff, /* length - all address space */ 1317 SDT_MEMRWA, /* segment type */ 1318 0, /* segment descriptor priority level */ 1319 1, /* segment descriptor present */ 1320 0, 0, 1321 1, /* default 32 vs 16 bit size */ 1322 1 /* limit granularity (byte/page units)*/ }, 1323 /* GUFS_SEL 2 %fs Descriptor for user */ 1324 { 0x0, /* segment base address */ 1325 0xfffff, /* length - all address space */ 1326 SDT_MEMRWA, /* segment type */ 1327 SEL_UPL, /* segment descriptor priority level */ 1328 1, /* segment descriptor present */ 1329 0, 0, 1330 1, /* default 32 vs 16 bit size */ 1331 1 /* limit granularity (byte/page units)*/ }, 1332 /* GUGS_SEL 3 %gs Descriptor for user */ 1333 { 0x0, /* segment base address */ 1334 0xfffff, /* length - all address space */ 1335 SDT_MEMRWA, /* segment type */ 1336 SEL_UPL, /* segment descriptor priority level */ 1337 1, /* segment descriptor present */ 1338 0, 0, 1339 1, /* default 32 vs 16 bit size */ 1340 1 /* limit granularity (byte/page units)*/ }, 1341 /* GCODE_SEL 4 Code Descriptor for kernel */ 1342 { 0x0, /* segment base address */ 1343 0xfffff, /* length - all address space */ 1344 SDT_MEMERA, /* segment type */ 1345 0, /* segment descriptor priority level */ 1346 1, /* segment descriptor present */ 1347 0, 0, 1348 1, /* default 32 vs 16 bit size */ 1349 1 /* limit granularity (byte/page units)*/ }, 1350 /* GDATA_SEL 5 Data Descriptor for kernel */ 1351 { 0x0, /* segment base address */ 1352 0xfffff, /* length - all address space */ 1353 SDT_MEMRWA, /* segment type */ 1354 0, /* segment descriptor priority level */ 1355 1, /* segment descriptor present */ 1356 0, 0, 1357 1, /* default 32 vs 16 bit size */ 1358 1 /* limit granularity (byte/page units)*/ }, 1359 /* GUCODE_SEL 6 Code Descriptor for user */ 1360 { 0x0, /* segment base address */ 1361 0xfffff, /* length - all address space */ 1362 SDT_MEMERA, /* segment type */ 1363 SEL_UPL, /* segment descriptor priority level */ 1364 1, /* segment descriptor present */ 1365 0, 0, 1366 1, /* default 32 vs 16 bit size */ 1367 1 /* limit granularity (byte/page units)*/ }, 1368 /* GUDATA_SEL 7 Data Descriptor for user */ 1369 { 0x0, /* segment base address */ 1370 0xfffff, /* length - all address space */ 1371 SDT_MEMRWA, /* segment type */ 1372 SEL_UPL, /* segment descriptor priority level */ 1373 1, /* segment descriptor present */ 1374 0, 0, 1375 1, /* default 32 vs 16 bit size */ 1376 1 /* limit granularity (byte/page units)*/ }, 1377 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1378 { 0x400, /* segment base address */ 1379 0xfffff, /* length */ 1380 SDT_MEMRWA, /* segment type */ 1381 0, /* segment descriptor priority level */ 1382 1, /* segment descriptor present */ 1383 0, 0, 1384 1, /* default 32 vs 16 bit size */ 1385 1 /* limit granularity (byte/page units)*/ }, 1386 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1387 { 1388 0x0, /* segment base address */ 1389 sizeof(struct i386tss)-1,/* length */ 1390 SDT_SYS386TSS, /* segment type */ 1391 0, /* segment descriptor priority level */ 1392 1, /* segment descriptor present */ 1393 0, 0, 1394 0, /* unused - default 32 vs 16 bit size */ 1395 0 /* limit granularity (byte/page units)*/ }, 1396 /* GLDT_SEL 10 LDT Descriptor */ 1397 { (int) ldt, /* segment base address */ 1398 sizeof(ldt)-1, /* length - all address space */ 1399 SDT_SYSLDT, /* segment type */ 1400 SEL_UPL, /* segment descriptor priority level */ 1401 1, /* segment descriptor present */ 1402 0, 0, 1403 0, /* unused - default 32 vs 16 bit size */ 1404 0 /* limit granularity (byte/page units)*/ }, 1405 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1406 { (int) ldt, /* segment base address */ 1407 (512 * sizeof(union descriptor)-1), /* length */ 1408 SDT_SYSLDT, /* segment type */ 1409 0, /* segment descriptor priority level */ 1410 1, /* segment descriptor present */ 1411 0, 0, 1412 0, /* unused - default 32 vs 16 bit size */ 1413 0 /* limit granularity (byte/page units)*/ }, 1414 /* GPANIC_SEL 12 Panic Tss Descriptor */ 1415 { (int) &dblfault_tss, /* segment base address */ 1416 sizeof(struct i386tss)-1,/* length - all address space */ 1417 SDT_SYS386TSS, /* segment type */ 1418 0, /* segment descriptor priority level */ 1419 1, /* segment descriptor present */ 1420 0, 0, 1421 0, /* unused - default 32 vs 16 bit size */ 1422 0 /* limit granularity (byte/page units)*/ }, 1423 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1424 { 0, /* segment base address (overwritten) */ 1425 0xfffff, /* length */ 1426 SDT_MEMERA, /* segment type */ 1427 0, /* segment descriptor priority level */ 1428 1, /* segment descriptor present */ 1429 0, 0, 1430 0, /* default 32 vs 16 bit size */ 1431 1 /* limit granularity (byte/page units)*/ }, 1432 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1433 { 0, /* segment base address (overwritten) */ 1434 0xfffff, /* length */ 1435 SDT_MEMERA, /* segment type */ 1436 0, /* segment descriptor priority level */ 1437 1, /* segment descriptor present */ 1438 0, 0, 1439 0, /* default 32 vs 16 bit size */ 1440 1 /* limit granularity (byte/page units)*/ }, 1441 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1442 { 0, /* segment base address (overwritten) */ 1443 0xfffff, /* length */ 1444 SDT_MEMRWA, /* segment type */ 1445 0, /* segment descriptor priority level */ 1446 1, /* segment descriptor present */ 1447 0, 0, 1448 1, /* default 32 vs 16 bit size */ 1449 1 /* limit granularity (byte/page units)*/ }, 1450 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1451 { 0, /* segment base address (overwritten) */ 1452 0xfffff, /* length */ 1453 SDT_MEMRWA, /* segment type */ 1454 0, /* segment descriptor priority level */ 1455 1, /* segment descriptor present */ 1456 0, 0, 1457 0, /* default 32 vs 16 bit size */ 1458 1 /* limit granularity (byte/page units)*/ }, 1459 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1460 { 0, /* segment base address (overwritten) */ 1461 0xfffff, /* length */ 1462 SDT_MEMRWA, /* segment type */ 1463 0, /* segment descriptor priority level */ 1464 1, /* segment descriptor present */ 1465 0, 0, 1466 0, /* default 32 vs 16 bit size */ 1467 1 /* limit granularity (byte/page units)*/ }, 1468 /* GNDIS_SEL 18 NDIS Descriptor */ 1469 { 0x0, /* segment base address */ 1470 0x0, /* length */ 1471 0, /* segment type */ 1472 0, /* segment descriptor priority level */ 1473 0, /* segment descriptor present */ 1474 0, 0, 1475 0, /* default 32 vs 16 bit size */ 1476 0 /* limit granularity (byte/page units)*/ }, 1477 }; 1478 1479 static struct soft_segment_descriptor ldt_segs[] = { 1480 /* Null Descriptor - overwritten by call gate */ 1481 { 0x0, /* segment base address */ 1482 0x0, /* length - all address space */ 1483 0, /* segment type */ 1484 0, /* segment descriptor priority level */ 1485 0, /* segment descriptor present */ 1486 0, 0, 1487 0, /* default 32 vs 16 bit size */ 1488 0 /* limit granularity (byte/page units)*/ }, 1489 /* Null Descriptor - overwritten by call gate */ 1490 { 0x0, /* segment base address */ 1491 0x0, /* length - all address space */ 1492 0, /* segment type */ 1493 0, /* segment descriptor priority level */ 1494 0, /* segment descriptor present */ 1495 0, 0, 1496 0, /* default 32 vs 16 bit size */ 1497 0 /* limit granularity (byte/page units)*/ }, 1498 /* Null Descriptor - overwritten by call gate */ 1499 { 0x0, /* segment base address */ 1500 0x0, /* length - all address space */ 1501 0, /* segment type */ 1502 0, /* segment descriptor priority level */ 1503 0, /* segment descriptor present */ 1504 0, 0, 1505 0, /* default 32 vs 16 bit size */ 1506 0 /* limit granularity (byte/page units)*/ }, 1507 /* Code Descriptor for user */ 1508 { 0x0, /* segment base address */ 1509 0xfffff, /* length - all address space */ 1510 SDT_MEMERA, /* segment type */ 1511 SEL_UPL, /* segment descriptor priority level */ 1512 1, /* segment descriptor present */ 1513 0, 0, 1514 1, /* default 32 vs 16 bit size */ 1515 1 /* limit granularity (byte/page units)*/ }, 1516 /* Null Descriptor - overwritten by call gate */ 1517 { 0x0, /* segment base address */ 1518 0x0, /* length - all address space */ 1519 0, /* segment type */ 1520 0, /* segment descriptor priority level */ 1521 0, /* segment descriptor present */ 1522 0, 0, 1523 0, /* default 32 vs 16 bit size */ 1524 0 /* limit granularity (byte/page units)*/ }, 1525 /* Data Descriptor for user */ 1526 { 0x0, /* segment base address */ 1527 0xfffff, /* length - all address space */ 1528 SDT_MEMRWA, /* segment type */ 1529 SEL_UPL, /* segment descriptor priority level */ 1530 1, /* segment descriptor present */ 1531 0, 0, 1532 1, /* default 32 vs 16 bit size */ 1533 1 /* limit granularity (byte/page units)*/ }, 1534 }; 1535 1536 void 1537 setidt(idx, func, typ, dpl, selec) 1538 int idx; 1539 inthand_t *func; 1540 int typ; 1541 int dpl; 1542 int selec; 1543 { 1544 struct gate_descriptor *ip; 1545 1546 ip = idt + idx; 1547 ip->gd_looffset = (int)func; 1548 ip->gd_selector = selec; 1549 ip->gd_stkcpy = 0; 1550 ip->gd_xx = 0; 1551 ip->gd_type = typ; 1552 ip->gd_dpl = dpl; 1553 ip->gd_p = 1; 1554 ip->gd_hioffset = ((int)func)>>16 ; 1555 } 1556 1557 extern inthand_t 1558 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1559 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1560 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1561 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1562 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1563 1564 #ifdef DDB 1565 /* 1566 * Display the index and function name of any IDT entries that don't use 1567 * the default 'rsvd' entry point. 1568 */ 1569 DB_SHOW_COMMAND(idt, db_show_idt) 1570 { 1571 struct gate_descriptor *ip; 1572 int idx; 1573 uintptr_t func; 1574 1575 ip = idt; 1576 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1577 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1578 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1579 db_printf("%3d\t", idx); 1580 db_printsym(func, DB_STGY_PROC); 1581 db_printf("\n"); 1582 } 1583 ip++; 1584 } 1585 } 1586 1587 /* Show privileged registers. */ 1588 DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1589 { 1590 uint64_t idtr, gdtr; 1591 1592 idtr = ridt(); 1593 db_printf("idtr\t0x%08x/%04x\n", 1594 (u_int)(idtr >> 16), (u_int)idtr & 0xffff); 1595 gdtr = rgdt(); 1596 db_printf("gdtr\t0x%08x/%04x\n", 1597 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff); 1598 db_printf("ldtr\t0x%04x\n", rldt()); 1599 db_printf("tr\t0x%04x\n", rtr()); 1600 db_printf("cr0\t0x%08x\n", rcr0()); 1601 db_printf("cr2\t0x%08x\n", rcr2()); 1602 db_printf("cr3\t0x%08x\n", rcr3()); 1603 db_printf("cr4\t0x%08x\n", rcr4()); 1604 } 1605 #endif 1606 1607 void 1608 sdtossd(sd, ssd) 1609 struct segment_descriptor *sd; 1610 struct soft_segment_descriptor *ssd; 1611 { 1612 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1613 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1614 ssd->ssd_type = sd->sd_type; 1615 ssd->ssd_dpl = sd->sd_dpl; 1616 ssd->ssd_p = sd->sd_p; 1617 ssd->ssd_def32 = sd->sd_def32; 1618 ssd->ssd_gran = sd->sd_gran; 1619 } 1620 1621 static void 1622 basemem_setup(void) 1623 { 1624 vm_paddr_t pa; 1625 pt_entry_t *pte; 1626 int i; 1627 1628 if (basemem > 640) { 1629 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1630 basemem); 1631 basemem = 640; 1632 } 1633 1634 /* 1635 * XXX if biosbasemem is now < 640, there is a `hole' 1636 * between the end of base memory and the start of 1637 * ISA memory. The hole may be empty or it may 1638 * contain BIOS code or data. Map it read/write so 1639 * that the BIOS can write to it. (Memory from 0 to 1640 * the physical end of the kernel is mapped read-only 1641 * to begin with and then parts of it are remapped. 1642 * The parts that aren't remapped form holes that 1643 * remain read-only and are unused by the kernel. 1644 * The base memory area is below the physical end of 1645 * the kernel and right now forms a read-only hole. 1646 * The part of it from PAGE_SIZE to 1647 * (trunc_page(biosbasemem * 1024) - 1) will be 1648 * remapped and used by the kernel later.) 1649 * 1650 * This code is similar to the code used in 1651 * pmap_mapdev, but since no memory needs to be 1652 * allocated we simply change the mapping. 1653 */ 1654 for (pa = trunc_page(basemem * 1024); 1655 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1656 pmap_kenter(KERNBASE + pa, pa); 1657 1658 /* 1659 * Map pages between basemem and ISA_HOLE_START, if any, r/w into 1660 * the vm86 page table so that vm86 can scribble on them using 1661 * the vm86 map too. XXX: why 2 ways for this and only 1 way for 1662 * page 0, at least as initialized here? 1663 */ 1664 pte = (pt_entry_t *)vm86paddr; 1665 for (i = basemem / 4; i < 160; i++) 1666 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1667 } 1668 1669 /* 1670 * Populate the (physmap) array with base/bound pairs describing the 1671 * available physical memory in the system, then test this memory and 1672 * build the phys_avail array describing the actually-available memory. 1673 * 1674 * If we cannot accurately determine the physical memory map, then use 1675 * value from the 0xE801 call, and failing that, the RTC. 1676 * 1677 * Total memory size may be set by the kernel environment variable 1678 * hw.physmem or the compile-time define MAXMEM. 1679 * 1680 * XXX first should be vm_paddr_t. 1681 */ 1682 static void 1683 getmemsize(int first) 1684 { 1685 int off, physmap_idx, pa_indx, da_indx; 1686 u_long physmem_tunable; 1687 vm_paddr_t physmap[PHYSMAP_SIZE]; 1688 pt_entry_t *pte; 1689 quad_t dcons_addr, dcons_size; 1690 int i; 1691 int pg_n; 1692 u_int extmem; 1693 u_int under16; 1694 vm_paddr_t pa; 1695 1696 bzero(physmap, sizeof(physmap)); 1697 1698 /* XXX - some of EPSON machines can't use PG_N */ 1699 pg_n = PG_N; 1700 if (pc98_machine_type & M_EPSON_PC98) { 1701 switch (epson_machine_id) { 1702 #ifdef WB_CACHE 1703 default: 1704 #endif 1705 case EPSON_PC486_HX: 1706 case EPSON_PC486_HG: 1707 case EPSON_PC486_HA: 1708 pg_n = 0; 1709 break; 1710 } 1711 } 1712 1713 under16 = pc98_getmemsize(&basemem, &extmem); 1714 basemem_setup(); 1715 1716 physmap[0] = 0; 1717 physmap[1] = basemem * 1024; 1718 physmap_idx = 2; 1719 physmap[physmap_idx] = 0x100000; 1720 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1721 1722 /* 1723 * Now, physmap contains a map of physical memory. 1724 */ 1725 1726 #ifdef SMP 1727 /* make hole for AP bootstrap code */ 1728 physmap[1] = mp_bootaddress(physmap[1]); 1729 #endif 1730 1731 /* 1732 * Maxmem isn't the "maximum memory", it's one larger than the 1733 * highest page of the physical address space. It should be 1734 * called something like "Maxphyspage". We may adjust this 1735 * based on ``hw.physmem'' and the results of the memory test. 1736 */ 1737 Maxmem = atop(physmap[physmap_idx + 1]); 1738 1739 #ifdef MAXMEM 1740 Maxmem = MAXMEM / 4; 1741 #endif 1742 1743 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1744 Maxmem = atop(physmem_tunable); 1745 1746 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1747 (boothowto & RB_VERBOSE)) 1748 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1749 1750 /* 1751 * If Maxmem has been increased beyond what the system has detected, 1752 * extend the last memory segment to the new limit. 1753 */ 1754 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1755 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1756 1757 /* 1758 * We need to divide chunk if Maxmem is larger than 16MB and 1759 * under 16MB area is not full of memory. 1760 * (1) system area (15-16MB region) is cut off 1761 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY") 1762 */ 1763 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) { 1764 /* 15M - 16M region is cut off, so need to divide chunk */ 1765 physmap[physmap_idx + 1] = under16 * 1024; 1766 physmap_idx += 2; 1767 physmap[physmap_idx] = 0x1000000; 1768 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024; 1769 } 1770 1771 /* call pmap initialization to make new kernel address space */ 1772 pmap_bootstrap(first); 1773 1774 /* 1775 * Size up each available chunk of physical memory. 1776 */ 1777 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1778 pa_indx = 0; 1779 da_indx = 1; 1780 phys_avail[pa_indx++] = physmap[0]; 1781 phys_avail[pa_indx] = physmap[0]; 1782 dump_avail[da_indx] = physmap[0]; 1783 pte = CMAP1; 1784 1785 /* 1786 * Get dcons buffer address 1787 */ 1788 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1789 getenv_quad("dcons.size", &dcons_size) == 0) 1790 dcons_addr = 0; 1791 1792 /* 1793 * physmap is in bytes, so when converting to page boundaries, 1794 * round up the start address and round down the end address. 1795 */ 1796 for (i = 0; i <= physmap_idx; i += 2) { 1797 vm_paddr_t end; 1798 1799 end = ptoa((vm_paddr_t)Maxmem); 1800 if (physmap[i + 1] < end) 1801 end = trunc_page(physmap[i + 1]); 1802 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1803 int tmp, page_bad, full; 1804 int *ptr = (int *)CADDR1; 1805 1806 full = FALSE; 1807 /* 1808 * block out kernel memory as not available. 1809 */ 1810 if (pa >= KERNLOAD && pa < first) 1811 goto do_dump_avail; 1812 1813 /* 1814 * block out dcons buffer 1815 */ 1816 if (dcons_addr > 0 1817 && pa >= trunc_page(dcons_addr) 1818 && pa < dcons_addr + dcons_size) 1819 goto do_dump_avail; 1820 1821 page_bad = FALSE; 1822 1823 /* 1824 * map page into kernel: valid, read/write,non-cacheable 1825 */ 1826 *pte = pa | PG_V | PG_RW | pg_n; 1827 invltlb(); 1828 1829 tmp = *(int *)ptr; 1830 /* 1831 * Test for alternating 1's and 0's 1832 */ 1833 *(volatile int *)ptr = 0xaaaaaaaa; 1834 if (*(volatile int *)ptr != 0xaaaaaaaa) 1835 page_bad = TRUE; 1836 /* 1837 * Test for alternating 0's and 1's 1838 */ 1839 *(volatile int *)ptr = 0x55555555; 1840 if (*(volatile int *)ptr != 0x55555555) 1841 page_bad = TRUE; 1842 /* 1843 * Test for all 1's 1844 */ 1845 *(volatile int *)ptr = 0xffffffff; 1846 if (*(volatile int *)ptr != 0xffffffff) 1847 page_bad = TRUE; 1848 /* 1849 * Test for all 0's 1850 */ 1851 *(volatile int *)ptr = 0x0; 1852 if (*(volatile int *)ptr != 0x0) 1853 page_bad = TRUE; 1854 /* 1855 * Restore original value. 1856 */ 1857 *(int *)ptr = tmp; 1858 1859 /* 1860 * Adjust array of valid/good pages. 1861 */ 1862 if (page_bad == TRUE) 1863 continue; 1864 /* 1865 * If this good page is a continuation of the 1866 * previous set of good pages, then just increase 1867 * the end pointer. Otherwise start a new chunk. 1868 * Note that "end" points one higher than end, 1869 * making the range >= start and < end. 1870 * If we're also doing a speculative memory 1871 * test and we at or past the end, bump up Maxmem 1872 * so that we keep going. The first bad page 1873 * will terminate the loop. 1874 */ 1875 if (phys_avail[pa_indx] == pa) { 1876 phys_avail[pa_indx] += PAGE_SIZE; 1877 } else { 1878 pa_indx++; 1879 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1880 printf( 1881 "Too many holes in the physical address space, giving up\n"); 1882 pa_indx--; 1883 full = TRUE; 1884 goto do_dump_avail; 1885 } 1886 phys_avail[pa_indx++] = pa; /* start */ 1887 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1888 } 1889 physmem++; 1890 do_dump_avail: 1891 if (dump_avail[da_indx] == pa) { 1892 dump_avail[da_indx] += PAGE_SIZE; 1893 } else { 1894 da_indx++; 1895 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1896 da_indx--; 1897 goto do_next; 1898 } 1899 dump_avail[da_indx++] = pa; /* start */ 1900 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1901 } 1902 do_next: 1903 if (full) 1904 break; 1905 } 1906 } 1907 *pte = 0; 1908 invltlb(); 1909 1910 /* 1911 * XXX 1912 * The last chunk must contain at least one page plus the message 1913 * buffer to avoid complicating other code (message buffer address 1914 * calculation, etc.). 1915 */ 1916 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1917 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1918 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1919 phys_avail[pa_indx--] = 0; 1920 phys_avail[pa_indx--] = 0; 1921 } 1922 1923 Maxmem = atop(phys_avail[pa_indx]); 1924 1925 /* Trim off space for the message buffer. */ 1926 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1927 1928 /* Map the message buffer. */ 1929 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1930 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1931 off); 1932 } 1933 1934 void 1935 init386(first) 1936 int first; 1937 { 1938 struct gate_descriptor *gdp; 1939 int gsel_tss, metadata_missing, x; 1940 struct pcpu *pc; 1941 1942 thread0.td_kstack = proc0kstack; 1943 thread0.td_pcb = (struct pcb *) 1944 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1945 1946 /* 1947 * This may be done better later if it gets more high level 1948 * components in it. If so just link td->td_proc here. 1949 */ 1950 proc_linkup0(&proc0, &thread0); 1951 1952 /* 1953 * Initialize DMAC 1954 */ 1955 pc98_init_dmac(); 1956 1957 metadata_missing = 0; 1958 if (bootinfo.bi_modulep) { 1959 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1960 preload_bootstrap_relocate(KERNBASE); 1961 } else { 1962 metadata_missing = 1; 1963 } 1964 if (envmode == 1) 1965 kern_envp = static_env; 1966 else if (bootinfo.bi_envp) 1967 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1968 1969 /* Init basic tunables, hz etc */ 1970 init_param1(); 1971 1972 /* 1973 * Make gdt memory segments. All segments cover the full 4GB 1974 * of address space and permissions are enforced at page level. 1975 */ 1976 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 1977 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 1978 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 1979 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 1980 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 1981 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 1982 1983 pc = &__pcpu[0]; 1984 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 1985 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 1986 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 1987 1988 for (x = 0; x < NGDT; x++) 1989 ssdtosd(&gdt_segs[x], &gdt[x].sd); 1990 1991 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 1992 r_gdt.rd_base = (int) gdt; 1993 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN); 1994 lgdt(&r_gdt); 1995 1996 pcpu_init(pc, 0, sizeof(struct pcpu)); 1997 PCPU_SET(prvspace, pc); 1998 PCPU_SET(curthread, &thread0); 1999 PCPU_SET(curpcb, thread0.td_pcb); 2000 2001 /* 2002 * Initialize mutexes. 2003 * 2004 * icu_lock: in order to allow an interrupt to occur in a critical 2005 * section, to set pcpu->ipending (etc...) properly, we 2006 * must be able to get the icu lock, so it can't be 2007 * under witness. 2008 */ 2009 mutex_init(); 2010 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE); 2011 2012 /* make ldt memory segments */ 2013 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 2014 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 2015 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 2016 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2017 2018 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2019 lldt(_default_ldt); 2020 PCPU_SET(currentldt, _default_ldt); 2021 2022 /* exceptions */ 2023 for (x = 0; x < NIDT; x++) 2024 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2025 GSEL(GCODE_SEL, SEL_KPL)); 2026 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2027 GSEL(GCODE_SEL, SEL_KPL)); 2028 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2029 GSEL(GCODE_SEL, SEL_KPL)); 2030 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2031 GSEL(GCODE_SEL, SEL_KPL)); 2032 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2033 GSEL(GCODE_SEL, SEL_KPL)); 2034 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2035 GSEL(GCODE_SEL, SEL_KPL)); 2036 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2037 GSEL(GCODE_SEL, SEL_KPL)); 2038 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2039 GSEL(GCODE_SEL, SEL_KPL)); 2040 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2041 , GSEL(GCODE_SEL, SEL_KPL)); 2042 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2043 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2044 GSEL(GCODE_SEL, SEL_KPL)); 2045 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2046 GSEL(GCODE_SEL, SEL_KPL)); 2047 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2048 GSEL(GCODE_SEL, SEL_KPL)); 2049 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2050 GSEL(GCODE_SEL, SEL_KPL)); 2051 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2052 GSEL(GCODE_SEL, SEL_KPL)); 2053 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2054 GSEL(GCODE_SEL, SEL_KPL)); 2055 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2056 GSEL(GCODE_SEL, SEL_KPL)); 2057 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2058 GSEL(GCODE_SEL, SEL_KPL)); 2059 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2060 GSEL(GCODE_SEL, SEL_KPL)); 2061 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2062 GSEL(GCODE_SEL, SEL_KPL)); 2063 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2064 GSEL(GCODE_SEL, SEL_KPL)); 2065 2066 r_idt.rd_limit = sizeof(idt0) - 1; 2067 r_idt.rd_base = (int) idt; 2068 lidt(&r_idt); 2069 2070 /* 2071 * Initialize the i8254 before the console so that console 2072 * initialization can use DELAY(). 2073 */ 2074 i8254_init(); 2075 2076 /* 2077 * Initialize the console before we print anything out. 2078 */ 2079 cninit(); 2080 2081 if (metadata_missing) 2082 printf("WARNING: loader(8) metadata is missing!\n"); 2083 2084 #ifdef DEV_ISA 2085 atpic_startup(); 2086 #endif 2087 2088 #ifdef DDB 2089 ksym_start = bootinfo.bi_symtab; 2090 ksym_end = bootinfo.bi_esymtab; 2091 #endif 2092 2093 kdb_init(); 2094 2095 #ifdef KDB 2096 if (boothowto & RB_KDB) 2097 kdb_enter_why(KDB_WHY_BOOTFLAGS, 2098 "Boot flags requested debugger"); 2099 #endif 2100 2101 finishidentcpu(); /* Final stage of CPU initialization */ 2102 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2103 GSEL(GCODE_SEL, SEL_KPL)); 2104 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2105 GSEL(GCODE_SEL, SEL_KPL)); 2106 initializecpu(); /* Initialize CPU registers */ 2107 2108 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2109 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2110 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2111 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2112 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2113 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2114 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2115 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2116 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2117 ltr(gsel_tss); 2118 2119 /* pointer to selector slot for %fs/%gs */ 2120 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2121 2122 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2123 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2124 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2125 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2126 dblfault_tss.tss_cr3 = (int)IdlePTD; 2127 dblfault_tss.tss_eip = (int)dblfault_handler; 2128 dblfault_tss.tss_eflags = PSL_KERNEL; 2129 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2130 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2131 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2132 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2133 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2134 2135 vm86_initialize(); 2136 getmemsize(first); 2137 init_param2(physmem); 2138 2139 /* now running on new page tables, configured,and u/iom is accessible */ 2140 2141 msgbufinit(msgbufp, MSGBUF_SIZE); 2142 2143 /* make a call gate to reenter kernel with */ 2144 gdp = &ldt[LSYS5CALLS_SEL].gd; 2145 2146 x = (int) &IDTVEC(lcall_syscall); 2147 gdp->gd_looffset = x; 2148 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2149 gdp->gd_stkcpy = 1; 2150 gdp->gd_type = SDT_SYS386CGT; 2151 gdp->gd_dpl = SEL_UPL; 2152 gdp->gd_p = 1; 2153 gdp->gd_hioffset = x >> 16; 2154 2155 /* XXX does this work? */ 2156 /* XXX yes! */ 2157 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2158 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2159 2160 /* transfer to user mode */ 2161 2162 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2163 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2164 2165 /* setup proc 0's pcb */ 2166 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */ 2167 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2168 thread0.td_pcb->pcb_ext = 0; 2169 thread0.td_frame = &proc0_tf; 2170 } 2171 2172 void 2173 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2174 { 2175 2176 } 2177 2178 void 2179 spinlock_enter(void) 2180 { 2181 struct thread *td; 2182 2183 td = curthread; 2184 if (td->td_md.md_spinlock_count == 0) 2185 td->td_md.md_saved_flags = intr_disable(); 2186 td->td_md.md_spinlock_count++; 2187 critical_enter(); 2188 } 2189 2190 void 2191 spinlock_exit(void) 2192 { 2193 struct thread *td; 2194 2195 td = curthread; 2196 critical_exit(); 2197 td->td_md.md_spinlock_count--; 2198 if (td->td_md.md_spinlock_count == 0) 2199 intr_restore(td->td_md.md_saved_flags); 2200 } 2201 2202 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2203 static void f00f_hack(void *unused); 2204 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 2205 2206 static void 2207 f00f_hack(void *unused) 2208 { 2209 struct gate_descriptor *new_idt; 2210 vm_offset_t tmp; 2211 2212 if (!has_f00f_bug) 2213 return; 2214 2215 GIANT_REQUIRED; 2216 2217 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2218 2219 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2220 if (tmp == 0) 2221 panic("kmem_alloc returned 0"); 2222 2223 /* Put the problematic entry (#6) at the end of the lower page. */ 2224 new_idt = (struct gate_descriptor*) 2225 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2226 bcopy(idt, new_idt, sizeof(idt0)); 2227 r_idt.rd_base = (u_int)new_idt; 2228 lidt(&r_idt); 2229 idt = new_idt; 2230 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2231 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2232 panic("vm_map_protect failed"); 2233 } 2234 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2235 2236 /* 2237 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2238 * we want to start a backtrace from the function that caused us to enter 2239 * the debugger. We have the context in the trapframe, but base the trace 2240 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2241 * enough for a backtrace. 2242 */ 2243 void 2244 makectx(struct trapframe *tf, struct pcb *pcb) 2245 { 2246 2247 pcb->pcb_edi = tf->tf_edi; 2248 pcb->pcb_esi = tf->tf_esi; 2249 pcb->pcb_ebp = tf->tf_ebp; 2250 pcb->pcb_ebx = tf->tf_ebx; 2251 pcb->pcb_eip = tf->tf_eip; 2252 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2253 } 2254 2255 int 2256 ptrace_set_pc(struct thread *td, u_long addr) 2257 { 2258 2259 td->td_frame->tf_eip = addr; 2260 return (0); 2261 } 2262 2263 int 2264 ptrace_single_step(struct thread *td) 2265 { 2266 td->td_frame->tf_eflags |= PSL_T; 2267 return (0); 2268 } 2269 2270 int 2271 ptrace_clear_single_step(struct thread *td) 2272 { 2273 td->td_frame->tf_eflags &= ~PSL_T; 2274 return (0); 2275 } 2276 2277 int 2278 fill_regs(struct thread *td, struct reg *regs) 2279 { 2280 struct pcb *pcb; 2281 struct trapframe *tp; 2282 2283 tp = td->td_frame; 2284 pcb = td->td_pcb; 2285 regs->r_fs = tp->tf_fs; 2286 regs->r_es = tp->tf_es; 2287 regs->r_ds = tp->tf_ds; 2288 regs->r_edi = tp->tf_edi; 2289 regs->r_esi = tp->tf_esi; 2290 regs->r_ebp = tp->tf_ebp; 2291 regs->r_ebx = tp->tf_ebx; 2292 regs->r_edx = tp->tf_edx; 2293 regs->r_ecx = tp->tf_ecx; 2294 regs->r_eax = tp->tf_eax; 2295 regs->r_eip = tp->tf_eip; 2296 regs->r_cs = tp->tf_cs; 2297 regs->r_eflags = tp->tf_eflags; 2298 regs->r_esp = tp->tf_esp; 2299 regs->r_ss = tp->tf_ss; 2300 regs->r_gs = pcb->pcb_gs; 2301 return (0); 2302 } 2303 2304 int 2305 set_regs(struct thread *td, struct reg *regs) 2306 { 2307 struct pcb *pcb; 2308 struct trapframe *tp; 2309 2310 tp = td->td_frame; 2311 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2312 !CS_SECURE(regs->r_cs)) 2313 return (EINVAL); 2314 pcb = td->td_pcb; 2315 tp->tf_fs = regs->r_fs; 2316 tp->tf_es = regs->r_es; 2317 tp->tf_ds = regs->r_ds; 2318 tp->tf_edi = regs->r_edi; 2319 tp->tf_esi = regs->r_esi; 2320 tp->tf_ebp = regs->r_ebp; 2321 tp->tf_ebx = regs->r_ebx; 2322 tp->tf_edx = regs->r_edx; 2323 tp->tf_ecx = regs->r_ecx; 2324 tp->tf_eax = regs->r_eax; 2325 tp->tf_eip = regs->r_eip; 2326 tp->tf_cs = regs->r_cs; 2327 tp->tf_eflags = regs->r_eflags; 2328 tp->tf_esp = regs->r_esp; 2329 tp->tf_ss = regs->r_ss; 2330 pcb->pcb_gs = regs->r_gs; 2331 return (0); 2332 } 2333 2334 #ifdef CPU_ENABLE_SSE 2335 static void 2336 fill_fpregs_xmm(sv_xmm, sv_87) 2337 struct savexmm *sv_xmm; 2338 struct save87 *sv_87; 2339 { 2340 register struct env87 *penv_87 = &sv_87->sv_env; 2341 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2342 int i; 2343 2344 bzero(sv_87, sizeof(*sv_87)); 2345 2346 /* FPU control/status */ 2347 penv_87->en_cw = penv_xmm->en_cw; 2348 penv_87->en_sw = penv_xmm->en_sw; 2349 penv_87->en_tw = penv_xmm->en_tw; 2350 penv_87->en_fip = penv_xmm->en_fip; 2351 penv_87->en_fcs = penv_xmm->en_fcs; 2352 penv_87->en_opcode = penv_xmm->en_opcode; 2353 penv_87->en_foo = penv_xmm->en_foo; 2354 penv_87->en_fos = penv_xmm->en_fos; 2355 2356 /* FPU registers */ 2357 for (i = 0; i < 8; ++i) 2358 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2359 } 2360 2361 static void 2362 set_fpregs_xmm(sv_87, sv_xmm) 2363 struct save87 *sv_87; 2364 struct savexmm *sv_xmm; 2365 { 2366 register struct env87 *penv_87 = &sv_87->sv_env; 2367 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2368 int i; 2369 2370 /* FPU control/status */ 2371 penv_xmm->en_cw = penv_87->en_cw; 2372 penv_xmm->en_sw = penv_87->en_sw; 2373 penv_xmm->en_tw = penv_87->en_tw; 2374 penv_xmm->en_fip = penv_87->en_fip; 2375 penv_xmm->en_fcs = penv_87->en_fcs; 2376 penv_xmm->en_opcode = penv_87->en_opcode; 2377 penv_xmm->en_foo = penv_87->en_foo; 2378 penv_xmm->en_fos = penv_87->en_fos; 2379 2380 /* FPU registers */ 2381 for (i = 0; i < 8; ++i) 2382 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2383 } 2384 #endif /* CPU_ENABLE_SSE */ 2385 2386 int 2387 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2388 { 2389 #ifdef CPU_ENABLE_SSE 2390 if (cpu_fxsr) { 2391 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2392 (struct save87 *)fpregs); 2393 return (0); 2394 } 2395 #endif /* CPU_ENABLE_SSE */ 2396 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2397 return (0); 2398 } 2399 2400 int 2401 set_fpregs(struct thread *td, struct fpreg *fpregs) 2402 { 2403 #ifdef CPU_ENABLE_SSE 2404 if (cpu_fxsr) { 2405 set_fpregs_xmm((struct save87 *)fpregs, 2406 &td->td_pcb->pcb_save.sv_xmm); 2407 return (0); 2408 } 2409 #endif /* CPU_ENABLE_SSE */ 2410 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2411 return (0); 2412 } 2413 2414 /* 2415 * Get machine context. 2416 */ 2417 int 2418 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2419 { 2420 struct trapframe *tp; 2421 2422 tp = td->td_frame; 2423 2424 PROC_LOCK(curthread->td_proc); 2425 mcp->mc_onstack = sigonstack(tp->tf_esp); 2426 PROC_UNLOCK(curthread->td_proc); 2427 mcp->mc_gs = td->td_pcb->pcb_gs; 2428 mcp->mc_fs = tp->tf_fs; 2429 mcp->mc_es = tp->tf_es; 2430 mcp->mc_ds = tp->tf_ds; 2431 mcp->mc_edi = tp->tf_edi; 2432 mcp->mc_esi = tp->tf_esi; 2433 mcp->mc_ebp = tp->tf_ebp; 2434 mcp->mc_isp = tp->tf_isp; 2435 mcp->mc_eflags = tp->tf_eflags; 2436 if (flags & GET_MC_CLEAR_RET) { 2437 mcp->mc_eax = 0; 2438 mcp->mc_edx = 0; 2439 mcp->mc_eflags &= ~PSL_C; 2440 } else { 2441 mcp->mc_eax = tp->tf_eax; 2442 mcp->mc_edx = tp->tf_edx; 2443 } 2444 mcp->mc_ebx = tp->tf_ebx; 2445 mcp->mc_ecx = tp->tf_ecx; 2446 mcp->mc_eip = tp->tf_eip; 2447 mcp->mc_cs = tp->tf_cs; 2448 mcp->mc_esp = tp->tf_esp; 2449 mcp->mc_ss = tp->tf_ss; 2450 mcp->mc_len = sizeof(*mcp); 2451 get_fpcontext(td, mcp); 2452 return (0); 2453 } 2454 2455 /* 2456 * Set machine context. 2457 * 2458 * However, we don't set any but the user modifiable flags, and we won't 2459 * touch the cs selector. 2460 */ 2461 int 2462 set_mcontext(struct thread *td, const mcontext_t *mcp) 2463 { 2464 struct trapframe *tp; 2465 int eflags, ret; 2466 2467 tp = td->td_frame; 2468 if (mcp->mc_len != sizeof(*mcp)) 2469 return (EINVAL); 2470 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2471 (tp->tf_eflags & ~PSL_USERCHANGE); 2472 if ((ret = set_fpcontext(td, mcp)) == 0) { 2473 tp->tf_fs = mcp->mc_fs; 2474 tp->tf_es = mcp->mc_es; 2475 tp->tf_ds = mcp->mc_ds; 2476 tp->tf_edi = mcp->mc_edi; 2477 tp->tf_esi = mcp->mc_esi; 2478 tp->tf_ebp = mcp->mc_ebp; 2479 tp->tf_ebx = mcp->mc_ebx; 2480 tp->tf_edx = mcp->mc_edx; 2481 tp->tf_ecx = mcp->mc_ecx; 2482 tp->tf_eax = mcp->mc_eax; 2483 tp->tf_eip = mcp->mc_eip; 2484 tp->tf_eflags = eflags; 2485 tp->tf_esp = mcp->mc_esp; 2486 tp->tf_ss = mcp->mc_ss; 2487 td->td_pcb->pcb_gs = mcp->mc_gs; 2488 ret = 0; 2489 } 2490 return (ret); 2491 } 2492 2493 static void 2494 get_fpcontext(struct thread *td, mcontext_t *mcp) 2495 { 2496 #ifndef DEV_NPX 2497 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2498 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2499 #else 2500 union savefpu *addr; 2501 2502 /* 2503 * XXX mc_fpstate might be misaligned, since its declaration is not 2504 * unportabilized using __attribute__((aligned(16))) like the 2505 * declaration of struct savemm, and anyway, alignment doesn't work 2506 * for auto variables since we don't use gcc's pessimal stack 2507 * alignment. Work around this by abusing the spare fields after 2508 * mcp->mc_fpstate. 2509 * 2510 * XXX unpessimize most cases by only aligning when fxsave might be 2511 * called, although this requires knowing too much about 2512 * npxgetregs()'s internals. 2513 */ 2514 addr = (union savefpu *)&mcp->mc_fpstate; 2515 if (td == PCPU_GET(fpcurthread) && 2516 #ifdef CPU_ENABLE_SSE 2517 cpu_fxsr && 2518 #endif 2519 ((uintptr_t)(void *)addr & 0xF)) { 2520 do 2521 addr = (void *)((char *)addr + 4); 2522 while ((uintptr_t)(void *)addr & 0xF); 2523 } 2524 mcp->mc_ownedfp = npxgetregs(td, addr); 2525 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2526 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2527 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2528 } 2529 mcp->mc_fpformat = npxformat(); 2530 #endif 2531 } 2532 2533 static int 2534 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2535 { 2536 union savefpu *addr; 2537 2538 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2539 return (0); 2540 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2541 mcp->mc_fpformat != _MC_FPFMT_XMM) 2542 return (EINVAL); 2543 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2544 /* We don't care what state is left in the FPU or PCB. */ 2545 fpstate_drop(td); 2546 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2547 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2548 /* XXX align as above. */ 2549 addr = (union savefpu *)&mcp->mc_fpstate; 2550 if (td == PCPU_GET(fpcurthread) && 2551 #ifdef CPU_ENABLE_SSE 2552 cpu_fxsr && 2553 #endif 2554 ((uintptr_t)(void *)addr & 0xF)) { 2555 do 2556 addr = (void *)((char *)addr + 4); 2557 while ((uintptr_t)(void *)addr & 0xF); 2558 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2559 } 2560 #ifdef DEV_NPX 2561 #ifdef CPU_ENABLE_SSE 2562 if (cpu_fxsr) 2563 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask; 2564 #endif 2565 /* 2566 * XXX we violate the dubious requirement that npxsetregs() 2567 * be called with interrupts disabled. 2568 */ 2569 npxsetregs(td, addr); 2570 #endif 2571 /* 2572 * Don't bother putting things back where they were in the 2573 * misaligned case, since we know that the caller won't use 2574 * them again. 2575 */ 2576 } else 2577 return (EINVAL); 2578 return (0); 2579 } 2580 2581 static void 2582 fpstate_drop(struct thread *td) 2583 { 2584 register_t s; 2585 2586 s = intr_disable(); 2587 #ifdef DEV_NPX 2588 if (PCPU_GET(fpcurthread) == td) 2589 npxdrop(); 2590 #endif 2591 /* 2592 * XXX force a full drop of the npx. The above only drops it if we 2593 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2594 * 2595 * XXX I don't much like npxgetregs()'s semantics of doing a full 2596 * drop. Dropping only to the pcb matches fnsave's behaviour. 2597 * We only need to drop to !PCB_INITDONE in sendsig(). But 2598 * sendsig() is the only caller of npxgetregs()... perhaps we just 2599 * have too many layers. 2600 */ 2601 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2602 intr_restore(s); 2603 } 2604 2605 int 2606 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2607 { 2608 struct pcb *pcb; 2609 2610 if (td == NULL) { 2611 dbregs->dr[0] = rdr0(); 2612 dbregs->dr[1] = rdr1(); 2613 dbregs->dr[2] = rdr2(); 2614 dbregs->dr[3] = rdr3(); 2615 dbregs->dr[4] = rdr4(); 2616 dbregs->dr[5] = rdr5(); 2617 dbregs->dr[6] = rdr6(); 2618 dbregs->dr[7] = rdr7(); 2619 } else { 2620 pcb = td->td_pcb; 2621 dbregs->dr[0] = pcb->pcb_dr0; 2622 dbregs->dr[1] = pcb->pcb_dr1; 2623 dbregs->dr[2] = pcb->pcb_dr2; 2624 dbregs->dr[3] = pcb->pcb_dr3; 2625 dbregs->dr[4] = 0; 2626 dbregs->dr[5] = 0; 2627 dbregs->dr[6] = pcb->pcb_dr6; 2628 dbregs->dr[7] = pcb->pcb_dr7; 2629 } 2630 return (0); 2631 } 2632 2633 int 2634 set_dbregs(struct thread *td, struct dbreg *dbregs) 2635 { 2636 struct pcb *pcb; 2637 int i; 2638 2639 if (td == NULL) { 2640 load_dr0(dbregs->dr[0]); 2641 load_dr1(dbregs->dr[1]); 2642 load_dr2(dbregs->dr[2]); 2643 load_dr3(dbregs->dr[3]); 2644 load_dr4(dbregs->dr[4]); 2645 load_dr5(dbregs->dr[5]); 2646 load_dr6(dbregs->dr[6]); 2647 load_dr7(dbregs->dr[7]); 2648 } else { 2649 /* 2650 * Don't let an illegal value for dr7 get set. Specifically, 2651 * check for undefined settings. Setting these bit patterns 2652 * result in undefined behaviour and can lead to an unexpected 2653 * TRCTRAP. 2654 */ 2655 for (i = 0; i < 4; i++) { 2656 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2657 return (EINVAL); 2658 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02) 2659 return (EINVAL); 2660 } 2661 2662 pcb = td->td_pcb; 2663 2664 /* 2665 * Don't let a process set a breakpoint that is not within the 2666 * process's address space. If a process could do this, it 2667 * could halt the system by setting a breakpoint in the kernel 2668 * (if ddb was enabled). Thus, we need to check to make sure 2669 * that no breakpoints are being enabled for addresses outside 2670 * process's address space. 2671 * 2672 * XXX - what about when the watched area of the user's 2673 * address space is written into from within the kernel 2674 * ... wouldn't that still cause a breakpoint to be generated 2675 * from within kernel mode? 2676 */ 2677 2678 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2679 /* dr0 is enabled */ 2680 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2681 return (EINVAL); 2682 } 2683 2684 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2685 /* dr1 is enabled */ 2686 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2687 return (EINVAL); 2688 } 2689 2690 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2691 /* dr2 is enabled */ 2692 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2693 return (EINVAL); 2694 } 2695 2696 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2697 /* dr3 is enabled */ 2698 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2699 return (EINVAL); 2700 } 2701 2702 pcb->pcb_dr0 = dbregs->dr[0]; 2703 pcb->pcb_dr1 = dbregs->dr[1]; 2704 pcb->pcb_dr2 = dbregs->dr[2]; 2705 pcb->pcb_dr3 = dbregs->dr[3]; 2706 pcb->pcb_dr6 = dbregs->dr[6]; 2707 pcb->pcb_dr7 = dbregs->dr[7]; 2708 2709 pcb->pcb_flags |= PCB_DBREGS; 2710 } 2711 2712 return (0); 2713 } 2714 2715 /* 2716 * Return > 0 if a hardware breakpoint has been hit, and the 2717 * breakpoint was in user space. Return 0, otherwise. 2718 */ 2719 int 2720 user_dbreg_trap(void) 2721 { 2722 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2723 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2724 int nbp; /* number of breakpoints that triggered */ 2725 caddr_t addr[4]; /* breakpoint addresses */ 2726 int i; 2727 2728 dr7 = rdr7(); 2729 if ((dr7 & 0x000000ff) == 0) { 2730 /* 2731 * all GE and LE bits in the dr7 register are zero, 2732 * thus the trap couldn't have been caused by the 2733 * hardware debug registers 2734 */ 2735 return 0; 2736 } 2737 2738 nbp = 0; 2739 dr6 = rdr6(); 2740 bp = dr6 & 0x0000000f; 2741 2742 if (!bp) { 2743 /* 2744 * None of the breakpoint bits are set meaning this 2745 * trap was not caused by any of the debug registers 2746 */ 2747 return 0; 2748 } 2749 2750 /* 2751 * at least one of the breakpoints were hit, check to see 2752 * which ones and if any of them are user space addresses 2753 */ 2754 2755 if (bp & 0x01) { 2756 addr[nbp++] = (caddr_t)rdr0(); 2757 } 2758 if (bp & 0x02) { 2759 addr[nbp++] = (caddr_t)rdr1(); 2760 } 2761 if (bp & 0x04) { 2762 addr[nbp++] = (caddr_t)rdr2(); 2763 } 2764 if (bp & 0x08) { 2765 addr[nbp++] = (caddr_t)rdr3(); 2766 } 2767 2768 for (i = 0; i < nbp; i++) { 2769 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2770 /* 2771 * addr[i] is in user space 2772 */ 2773 return nbp; 2774 } 2775 } 2776 2777 /* 2778 * None of the breakpoints are in user space. 2779 */ 2780 return 0; 2781 } 2782 2783 #ifdef KDB 2784 2785 /* 2786 * Provide inb() and outb() as functions. They are normally only 2787 * available as macros calling inlined functions, thus cannot be 2788 * called from the debugger. 2789 * 2790 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2791 */ 2792 2793 #undef inb 2794 #undef outb 2795 2796 /* silence compiler warnings */ 2797 u_char inb(u_int); 2798 void outb(u_int, u_char); 2799 2800 u_char 2801 inb(u_int port) 2802 { 2803 u_char data; 2804 /* 2805 * We use %%dx and not %1 here because i/o is done at %dx and not at 2806 * %edx, while gcc generates inferior code (movw instead of movl) 2807 * if we tell it to load (u_short) port. 2808 */ 2809 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2810 return (data); 2811 } 2812 2813 void 2814 outb(u_int port, u_char data) 2815 { 2816 u_char al; 2817 /* 2818 * Use an unnecessary assignment to help gcc's register allocator. 2819 * This make a large difference for gcc-1.40 and a tiny difference 2820 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2821 * best results. gcc-2.6.0 can't handle this. 2822 */ 2823 al = data; 2824 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2825 } 2826 2827 #endif /* KDB */
Cache object: 66f4e3cd4876aedce9ab76f7c97f37ae
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]