Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pc98/pc98/machdep.c
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1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD$"); 42 43 #include "opt_atalk.h" 44 #include "opt_compat.h" 45 #include "opt_cpu.h" 46 #include "opt_ddb.h" 47 #include "opt_inet.h" 48 #include "opt_ipx.h" 49 #include "opt_isa.h" 50 #include "opt_kstack_pages.h" 51 #include "opt_maxmem.h" 52 #include "opt_msgbuf.h" 53 #include "opt_npx.h" 54 #include "opt_perfmon.h" 55 56 #include <sys/param.h> 57 #include <sys/proc.h> 58 #include <sys/systm.h> 59 #include <sys/bio.h> 60 #include <sys/buf.h> 61 #include <sys/bus.h> 62 #include <sys/callout.h> 63 #include <sys/clock.h> 64 #include <sys/cons.h> 65 #include <sys/cpu.h> 66 #include <sys/eventhandler.h> 67 #include <sys/exec.h> 68 #include <sys/imgact.h> 69 #include <sys/kdb.h> 70 #include <sys/kernel.h> 71 #include <sys/ktr.h> 72 #include <sys/linker.h> 73 #include <sys/lock.h> 74 #include <sys/malloc.h> 75 #include <sys/memrange.h> 76 #include <sys/msgbuf.h> 77 #include <sys/mutex.h> 78 #include <sys/pcpu.h> 79 #include <sys/ptrace.h> 80 #include <sys/reboot.h> 81 #include <sys/sched.h> 82 #include <sys/signalvar.h> 83 #include <sys/sysctl.h> 84 #include <sys/sysent.h> 85 #include <sys/sysproto.h> 86 #include <sys/ucontext.h> 87 #include <sys/vmmeter.h> 88 89 #include <vm/vm.h> 90 #include <vm/vm_extern.h> 91 #include <vm/vm_kern.h> 92 #include <vm/vm_page.h> 93 #include <vm/vm_map.h> 94 #include <vm/vm_object.h> 95 #include <vm/vm_pager.h> 96 #include <vm/vm_param.h> 97 98 #ifdef DDB 99 #ifndef KDB 100 #error KDB must be enabled in order for DDB to work! 101 #endif 102 #include <ddb/ddb.h> 103 #include <ddb/db_sym.h> 104 #endif 105 106 #include <pc98/pc98/pc98_machdep.h> 107 108 #include <net/netisr.h> 109 110 #include <machine/bootinfo.h> 111 #include <machine/clock.h> 112 #include <machine/cpu.h> 113 #include <machine/cputypes.h> 114 #include <machine/intr_machdep.h> 115 #include <machine/mca.h> 116 #include <machine/md_var.h> 117 #include <machine/pc/bios.h> 118 #include <machine/pcb.h> 119 #include <machine/pcb_ext.h> 120 #include <machine/proc.h> 121 #include <machine/reg.h> 122 #include <machine/sigframe.h> 123 #include <machine/specialreg.h> 124 #include <machine/vm86.h> 125 #ifdef PERFMON 126 #include <machine/perfmon.h> 127 #endif 128 #ifdef SMP 129 #include <machine/smp.h> 130 #endif 131 132 #ifdef DEV_ISA 133 #include <i386/isa/icu.h> 134 #endif 135 136 /* Sanity check for __curthread() */ 137 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 138 139 extern void init386(int first); 140 extern void dblfault_handler(void); 141 142 extern void printcpuinfo(void); /* XXX header file */ 143 extern void finishidentcpu(void); 144 extern void panicifcpuunsupported(void); 145 extern void initializecpu(void); 146 147 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 148 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 149 150 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 151 #define CPU_ENABLE_SSE 152 #endif 153 154 static void cpu_startup(void *); 155 static void fpstate_drop(struct thread *td); 156 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 157 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 158 #ifdef CPU_ENABLE_SSE 159 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 160 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 161 #endif /* CPU_ENABLE_SSE */ 162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 163 164 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */ 165 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */ 166 167 #ifdef DDB 168 extern vm_offset_t ksym_start, ksym_end; 169 #endif 170 171 int _udatasel, _ucodesel; 172 u_int basemem; 173 174 static int ispc98 = 1; 175 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 176 177 int cold = 1; 178 179 #ifdef COMPAT_43 180 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 181 #endif 182 #ifdef COMPAT_FREEBSD4 183 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 184 #endif 185 186 long Maxmem = 0; 187 long realmem = 0; 188 189 /* 190 * The number of PHYSMAP entries must be one less than the number of 191 * PHYSSEG entries because the PHYSMAP entry that spans the largest 192 * physical address that is accessible by ISA DMA is split into two 193 * PHYSSEG entries. 194 */ 195 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 196 197 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 198 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 199 200 /* must be 2 less so 0 0 can signal end of chunks */ 201 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 202 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 203 204 struct kva_md_info kmi; 205 206 static struct trapframe proc0_tf; 207 struct pcpu __pcpu[MAXCPU]; 208 209 struct mtx icu_lock; 210 211 struct mem_range_softc mem_range_softc; 212 213 static void 214 cpu_startup(dummy) 215 void *dummy; 216 { 217 /* 218 * Good {morning,afternoon,evening,night}. 219 */ 220 startrtclock(); 221 printcpuinfo(); 222 panicifcpuunsupported(); 223 #ifdef PERFMON 224 perfmon_init(); 225 #endif 226 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem), 227 ptoa((uintmax_t)Maxmem) / 1048576); 228 realmem = Maxmem; 229 /* 230 * Display any holes after the first chunk of extended memory. 231 */ 232 if (bootverbose) { 233 int indx; 234 235 printf("Physical memory chunk(s):\n"); 236 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 237 vm_paddr_t size; 238 239 size = phys_avail[indx + 1] - phys_avail[indx]; 240 printf( 241 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 242 (uintmax_t)phys_avail[indx], 243 (uintmax_t)phys_avail[indx + 1] - 1, 244 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 245 } 246 } 247 248 vm_ksubmap_init(&kmi); 249 250 printf("avail memory = %ju (%ju MB)\n", 251 ptoa((uintmax_t)cnt.v_free_count), 252 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 253 254 /* 255 * Set up buffers, so they can be used to read disk labels. 256 */ 257 bufinit(); 258 vm_pager_bufferinit(); 259 260 cpu_setregs(); 261 } 262 263 /* 264 * Send an interrupt to process. 265 * 266 * Stack is set up to allow sigcode stored 267 * at top to call routine, followed by kcall 268 * to sigreturn routine below. After sigreturn 269 * resets the signal mask, the stack, and the 270 * frame pointer, it returns to the user 271 * specified pc, psl. 272 */ 273 #ifdef COMPAT_43 274 static void 275 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 276 { 277 struct osigframe sf, *fp; 278 struct proc *p; 279 struct thread *td; 280 struct sigacts *psp; 281 struct trapframe *regs; 282 int sig; 283 int oonstack; 284 285 td = curthread; 286 p = td->td_proc; 287 PROC_LOCK_ASSERT(p, MA_OWNED); 288 sig = ksi->ksi_signo; 289 psp = p->p_sigacts; 290 mtx_assert(&psp->ps_mtx, MA_OWNED); 291 regs = td->td_frame; 292 oonstack = sigonstack(regs->tf_esp); 293 294 /* Allocate space for the signal handler context. */ 295 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 296 SIGISMEMBER(psp->ps_sigonstack, sig)) { 297 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 298 td->td_sigstk.ss_size - sizeof(struct osigframe)); 299 #if defined(COMPAT_43) 300 td->td_sigstk.ss_flags |= SS_ONSTACK; 301 #endif 302 } else 303 fp = (struct osigframe *)regs->tf_esp - 1; 304 305 /* Translate the signal if appropriate. */ 306 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 307 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 308 309 /* Build the argument list for the signal handler. */ 310 sf.sf_signum = sig; 311 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 312 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo)); 313 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 314 /* Signal handler installed with SA_SIGINFO. */ 315 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 316 sf.sf_siginfo.si_signo = sig; 317 sf.sf_siginfo.si_code = ksi->ksi_code; 318 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 319 sf.sf_addr = 0; 320 } else { 321 /* Old FreeBSD-style arguments. */ 322 sf.sf_arg2 = ksi->ksi_code; 323 sf.sf_addr = (register_t)ksi->ksi_addr; 324 sf.sf_ahu.sf_handler = catcher; 325 } 326 mtx_unlock(&psp->ps_mtx); 327 PROC_UNLOCK(p); 328 329 /* Save most if not all of trap frame. */ 330 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 331 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 332 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 333 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 334 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 335 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 336 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 337 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 338 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 339 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 340 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 341 sf.sf_siginfo.si_sc.sc_gs = rgs(); 342 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 343 344 /* Build the signal context to be used by osigreturn(). */ 345 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 346 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 347 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 348 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 349 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 350 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 351 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 352 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 353 354 /* 355 * If we're a vm86 process, we want to save the segment registers. 356 * We also change eflags to be our emulated eflags, not the actual 357 * eflags. 358 */ 359 if (regs->tf_eflags & PSL_VM) { 360 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 361 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 362 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 363 364 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 365 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 366 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 367 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 368 369 if (vm86->vm86_has_vme == 0) 370 sf.sf_siginfo.si_sc.sc_ps = 371 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 372 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 373 374 /* See sendsig() for comments. */ 375 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 376 } 377 378 /* 379 * Copy the sigframe out to the user's stack. 380 */ 381 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 382 #ifdef DEBUG 383 printf("process %ld has trashed its stack\n", (long)p->p_pid); 384 #endif 385 PROC_LOCK(p); 386 sigexit(td, SIGILL); 387 } 388 389 regs->tf_esp = (int)fp; 390 regs->tf_eip = PS_STRINGS - szosigcode; 391 regs->tf_eflags &= ~(PSL_T | PSL_D); 392 regs->tf_cs = _ucodesel; 393 regs->tf_ds = _udatasel; 394 regs->tf_es = _udatasel; 395 regs->tf_fs = _udatasel; 396 load_gs(_udatasel); 397 regs->tf_ss = _udatasel; 398 PROC_LOCK(p); 399 mtx_lock(&psp->ps_mtx); 400 } 401 #endif /* COMPAT_43 */ 402 403 #ifdef COMPAT_FREEBSD4 404 static void 405 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 406 { 407 struct sigframe4 sf, *sfp; 408 struct proc *p; 409 struct thread *td; 410 struct sigacts *psp; 411 struct trapframe *regs; 412 int sig; 413 int oonstack; 414 415 td = curthread; 416 p = td->td_proc; 417 PROC_LOCK_ASSERT(p, MA_OWNED); 418 sig = ksi->ksi_signo; 419 psp = p->p_sigacts; 420 mtx_assert(&psp->ps_mtx, MA_OWNED); 421 regs = td->td_frame; 422 oonstack = sigonstack(regs->tf_esp); 423 424 /* Save user context. */ 425 bzero(&sf, sizeof(sf)); 426 sf.sf_uc.uc_sigmask = *mask; 427 sf.sf_uc.uc_stack = td->td_sigstk; 428 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 429 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 430 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 431 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 432 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 433 bzero(sf.sf_uc.uc_mcontext.mc_fpregs, 434 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs)); 435 bzero(sf.sf_uc.uc_mcontext.__spare__, 436 sizeof(sf.sf_uc.uc_mcontext.__spare__)); 437 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__)); 438 439 /* Allocate space for the signal handler context. */ 440 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 441 SIGISMEMBER(psp->ps_sigonstack, sig)) { 442 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 443 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 444 #if defined(COMPAT_43) 445 td->td_sigstk.ss_flags |= SS_ONSTACK; 446 #endif 447 } else 448 sfp = (struct sigframe4 *)regs->tf_esp - 1; 449 450 /* Translate the signal if appropriate. */ 451 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 452 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 453 454 /* Build the argument list for the signal handler. */ 455 sf.sf_signum = sig; 456 sf.sf_ucontext = (register_t)&sfp->sf_uc; 457 bzero(&sf.sf_si, sizeof(sf.sf_si)); 458 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 459 /* Signal handler installed with SA_SIGINFO. */ 460 sf.sf_siginfo = (register_t)&sfp->sf_si; 461 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 462 463 /* Fill in POSIX parts */ 464 sf.sf_si.si_signo = sig; 465 sf.sf_si.si_code = ksi->ksi_code; 466 sf.sf_si.si_addr = ksi->ksi_addr; 467 } else { 468 /* Old FreeBSD-style arguments. */ 469 sf.sf_siginfo = ksi->ksi_code; 470 sf.sf_addr = (register_t)ksi->ksi_addr; 471 sf.sf_ahu.sf_handler = catcher; 472 } 473 mtx_unlock(&psp->ps_mtx); 474 PROC_UNLOCK(p); 475 476 /* 477 * If we're a vm86 process, we want to save the segment registers. 478 * We also change eflags to be our emulated eflags, not the actual 479 * eflags. 480 */ 481 if (regs->tf_eflags & PSL_VM) { 482 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 483 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 484 485 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 486 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 487 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 488 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 489 490 if (vm86->vm86_has_vme == 0) 491 sf.sf_uc.uc_mcontext.mc_eflags = 492 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 493 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 494 495 /* 496 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 497 * syscalls made by the signal handler. This just avoids 498 * wasting time for our lazy fixup of such faults. PSL_NT 499 * does nothing in vm86 mode, but vm86 programs can set it 500 * almost legitimately in probes for old cpu types. 501 */ 502 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 503 } 504 505 /* 506 * Copy the sigframe out to the user's stack. 507 */ 508 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 509 #ifdef DEBUG 510 printf("process %ld has trashed its stack\n", (long)p->p_pid); 511 #endif 512 PROC_LOCK(p); 513 sigexit(td, SIGILL); 514 } 515 516 regs->tf_esp = (int)sfp; 517 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 518 regs->tf_eflags &= ~(PSL_T | PSL_D); 519 regs->tf_cs = _ucodesel; 520 regs->tf_ds = _udatasel; 521 regs->tf_es = _udatasel; 522 regs->tf_fs = _udatasel; 523 regs->tf_ss = _udatasel; 524 PROC_LOCK(p); 525 mtx_lock(&psp->ps_mtx); 526 } 527 #endif /* COMPAT_FREEBSD4 */ 528 529 void 530 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 531 { 532 struct sigframe sf, *sfp; 533 struct proc *p; 534 struct thread *td; 535 struct sigacts *psp; 536 char *sp; 537 struct trapframe *regs; 538 int sig; 539 int oonstack; 540 541 td = curthread; 542 p = td->td_proc; 543 PROC_LOCK_ASSERT(p, MA_OWNED); 544 sig = ksi->ksi_signo; 545 psp = p->p_sigacts; 546 mtx_assert(&psp->ps_mtx, MA_OWNED); 547 #ifdef COMPAT_FREEBSD4 548 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 549 freebsd4_sendsig(catcher, ksi, mask); 550 return; 551 } 552 #endif 553 #ifdef COMPAT_43 554 if (SIGISMEMBER(psp->ps_osigset, sig)) { 555 osendsig(catcher, ksi, mask); 556 return; 557 } 558 #endif 559 regs = td->td_frame; 560 oonstack = sigonstack(regs->tf_esp); 561 562 /* Save user context. */ 563 bzero(&sf, sizeof(sf)); 564 sf.sf_uc.uc_sigmask = *mask; 565 sf.sf_uc.uc_stack = td->td_sigstk; 566 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 567 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 568 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 569 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 570 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 571 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 572 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 573 fpstate_drop(td); 574 bzero(sf.sf_uc.uc_mcontext.mc_spare1, 575 sizeof(sf.sf_uc.uc_mcontext.mc_spare1)); 576 bzero(sf.sf_uc.uc_mcontext.mc_spare2, 577 sizeof(sf.sf_uc.uc_mcontext.mc_spare2)); 578 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__)); 579 580 /* Allocate space for the signal handler context. */ 581 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 582 SIGISMEMBER(psp->ps_sigonstack, sig)) { 583 sp = td->td_sigstk.ss_sp + 584 td->td_sigstk.ss_size - sizeof(struct sigframe); 585 #if defined(COMPAT_43) 586 td->td_sigstk.ss_flags |= SS_ONSTACK; 587 #endif 588 } else 589 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 590 /* Align to 16 bytes. */ 591 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 592 593 /* Translate the signal if appropriate. */ 594 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 595 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 596 597 /* Build the argument list for the signal handler. */ 598 sf.sf_signum = sig; 599 sf.sf_ucontext = (register_t)&sfp->sf_uc; 600 bzero(&sf.sf_si, sizeof(sf.sf_si)); 601 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 602 /* Signal handler installed with SA_SIGINFO. */ 603 sf.sf_siginfo = (register_t)&sfp->sf_si; 604 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 605 606 /* Fill in POSIX parts */ 607 sf.sf_si = ksi->ksi_info; 608 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 609 } else { 610 /* Old FreeBSD-style arguments. */ 611 sf.sf_siginfo = ksi->ksi_code; 612 sf.sf_addr = (register_t)ksi->ksi_addr; 613 sf.sf_ahu.sf_handler = catcher; 614 } 615 mtx_unlock(&psp->ps_mtx); 616 PROC_UNLOCK(p); 617 618 /* 619 * If we're a vm86 process, we want to save the segment registers. 620 * We also change eflags to be our emulated eflags, not the actual 621 * eflags. 622 */ 623 if (regs->tf_eflags & PSL_VM) { 624 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 625 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 626 627 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 628 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 629 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 630 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 631 632 if (vm86->vm86_has_vme == 0) 633 sf.sf_uc.uc_mcontext.mc_eflags = 634 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 635 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 636 637 /* 638 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 639 * syscalls made by the signal handler. This just avoids 640 * wasting time for our lazy fixup of such faults. PSL_NT 641 * does nothing in vm86 mode, but vm86 programs can set it 642 * almost legitimately in probes for old cpu types. 643 */ 644 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 645 } 646 647 /* 648 * Copy the sigframe out to the user's stack. 649 */ 650 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 651 #ifdef DEBUG 652 printf("process %ld has trashed its stack\n", (long)p->p_pid); 653 #endif 654 PROC_LOCK(p); 655 sigexit(td, SIGILL); 656 } 657 658 regs->tf_esp = (int)sfp; 659 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 660 regs->tf_eflags &= ~(PSL_T | PSL_D); 661 regs->tf_cs = _ucodesel; 662 regs->tf_ds = _udatasel; 663 regs->tf_es = _udatasel; 664 regs->tf_fs = _udatasel; 665 regs->tf_ss = _udatasel; 666 PROC_LOCK(p); 667 mtx_lock(&psp->ps_mtx); 668 } 669 670 /* 671 * System call to cleanup state after a signal 672 * has been taken. Reset signal mask and 673 * stack state from context left by sendsig (above). 674 * Return to previous pc and psl as specified by 675 * context left by sendsig. Check carefully to 676 * make sure that the user has not modified the 677 * state to gain improper privileges. 678 * 679 * MPSAFE 680 */ 681 #ifdef COMPAT_43 682 int 683 osigreturn(td, uap) 684 struct thread *td; 685 struct osigreturn_args /* { 686 struct osigcontext *sigcntxp; 687 } */ *uap; 688 { 689 struct osigcontext sc; 690 struct trapframe *regs; 691 struct osigcontext *scp; 692 struct proc *p = td->td_proc; 693 int eflags, error; 694 ksiginfo_t ksi; 695 696 regs = td->td_frame; 697 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 698 if (error != 0) 699 return (error); 700 scp = ≻ 701 eflags = scp->sc_ps; 702 if (eflags & PSL_VM) { 703 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 704 struct vm86_kernel *vm86; 705 706 /* 707 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 708 * set up the vm86 area, and we can't enter vm86 mode. 709 */ 710 if (td->td_pcb->pcb_ext == 0) 711 return (EINVAL); 712 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 713 if (vm86->vm86_inited == 0) 714 return (EINVAL); 715 716 /* Go back to user mode if both flags are set. */ 717 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 718 ksiginfo_init_trap(&ksi); 719 ksi.ksi_signo = SIGBUS; 720 ksi.ksi_code = BUS_OBJERR; 721 ksi.ksi_addr = (void *)regs->tf_eip; 722 trapsignal(td, &ksi); 723 } 724 725 if (vm86->vm86_has_vme) { 726 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 727 (eflags & VME_USERCHANGE) | PSL_VM; 728 } else { 729 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 730 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 731 (eflags & VM_USERCHANGE) | PSL_VM; 732 } 733 tf->tf_vm86_ds = scp->sc_ds; 734 tf->tf_vm86_es = scp->sc_es; 735 tf->tf_vm86_fs = scp->sc_fs; 736 tf->tf_vm86_gs = scp->sc_gs; 737 tf->tf_ds = _udatasel; 738 tf->tf_es = _udatasel; 739 tf->tf_fs = _udatasel; 740 } else { 741 /* 742 * Don't allow users to change privileged or reserved flags. 743 */ 744 /* 745 * XXX do allow users to change the privileged flag PSL_RF. 746 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 747 * should sometimes set it there too. tf_eflags is kept in 748 * the signal context during signal handling and there is no 749 * other place to remember it, so the PSL_RF bit may be 750 * corrupted by the signal handler without us knowing. 751 * Corruption of the PSL_RF bit at worst causes one more or 752 * one less debugger trap, so allowing it is fairly harmless. 753 */ 754 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 755 return (EINVAL); 756 } 757 758 /* 759 * Don't allow users to load a valid privileged %cs. Let the 760 * hardware check for invalid selectors, excess privilege in 761 * other selectors, invalid %eip's and invalid %esp's. 762 */ 763 if (!CS_SECURE(scp->sc_cs)) { 764 ksiginfo_init_trap(&ksi); 765 ksi.ksi_signo = SIGBUS; 766 ksi.ksi_code = BUS_OBJERR; 767 ksi.ksi_trapno = T_PROTFLT; 768 ksi.ksi_addr = (void *)regs->tf_eip; 769 trapsignal(td, &ksi); 770 return (EINVAL); 771 } 772 regs->tf_ds = scp->sc_ds; 773 regs->tf_es = scp->sc_es; 774 regs->tf_fs = scp->sc_fs; 775 } 776 777 /* Restore remaining registers. */ 778 regs->tf_eax = scp->sc_eax; 779 regs->tf_ebx = scp->sc_ebx; 780 regs->tf_ecx = scp->sc_ecx; 781 regs->tf_edx = scp->sc_edx; 782 regs->tf_esi = scp->sc_esi; 783 regs->tf_edi = scp->sc_edi; 784 regs->tf_cs = scp->sc_cs; 785 regs->tf_ss = scp->sc_ss; 786 regs->tf_isp = scp->sc_isp; 787 regs->tf_ebp = scp->sc_fp; 788 regs->tf_esp = scp->sc_sp; 789 regs->tf_eip = scp->sc_pc; 790 regs->tf_eflags = eflags; 791 792 PROC_LOCK(p); 793 #if defined(COMPAT_43) 794 if (scp->sc_onstack & 1) 795 td->td_sigstk.ss_flags |= SS_ONSTACK; 796 else 797 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 798 #endif 799 SIGSETOLD(td->td_sigmask, scp->sc_mask); 800 SIG_CANTMASK(td->td_sigmask); 801 signotify(td); 802 PROC_UNLOCK(p); 803 return (EJUSTRETURN); 804 } 805 #endif /* COMPAT_43 */ 806 807 #ifdef COMPAT_FREEBSD4 808 /* 809 * MPSAFE 810 */ 811 int 812 freebsd4_sigreturn(td, uap) 813 struct thread *td; 814 struct freebsd4_sigreturn_args /* { 815 const ucontext4 *sigcntxp; 816 } */ *uap; 817 { 818 struct ucontext4 uc; 819 struct proc *p = td->td_proc; 820 struct trapframe *regs; 821 const struct ucontext4 *ucp; 822 int cs, eflags, error; 823 ksiginfo_t ksi; 824 825 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 826 if (error != 0) 827 return (error); 828 ucp = &uc; 829 regs = td->td_frame; 830 eflags = ucp->uc_mcontext.mc_eflags; 831 if (eflags & PSL_VM) { 832 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 833 struct vm86_kernel *vm86; 834 835 /* 836 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 837 * set up the vm86 area, and we can't enter vm86 mode. 838 */ 839 if (td->td_pcb->pcb_ext == 0) 840 return (EINVAL); 841 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 842 if (vm86->vm86_inited == 0) 843 return (EINVAL); 844 845 /* Go back to user mode if both flags are set. */ 846 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 847 ksiginfo_init_trap(&ksi); 848 ksi.ksi_signo = SIGBUS; 849 ksi.ksi_code = BUS_OBJERR; 850 ksi.ksi_addr = (void *)regs->tf_eip; 851 trapsignal(td, &ksi); 852 } 853 if (vm86->vm86_has_vme) { 854 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 855 (eflags & VME_USERCHANGE) | PSL_VM; 856 } else { 857 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 858 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 859 (eflags & VM_USERCHANGE) | PSL_VM; 860 } 861 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 862 tf->tf_eflags = eflags; 863 tf->tf_vm86_ds = tf->tf_ds; 864 tf->tf_vm86_es = tf->tf_es; 865 tf->tf_vm86_fs = tf->tf_fs; 866 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 867 tf->tf_ds = _udatasel; 868 tf->tf_es = _udatasel; 869 tf->tf_fs = _udatasel; 870 } else { 871 /* 872 * Don't allow users to change privileged or reserved flags. 873 */ 874 /* 875 * XXX do allow users to change the privileged flag PSL_RF. 876 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 877 * should sometimes set it there too. tf_eflags is kept in 878 * the signal context during signal handling and there is no 879 * other place to remember it, so the PSL_RF bit may be 880 * corrupted by the signal handler without us knowing. 881 * Corruption of the PSL_RF bit at worst causes one more or 882 * one less debugger trap, so allowing it is fairly harmless. 883 */ 884 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 885 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags); 886 return (EINVAL); 887 } 888 889 /* 890 * Don't allow users to load a valid privileged %cs. Let the 891 * hardware check for invalid selectors, excess privilege in 892 * other selectors, invalid %eip's and invalid %esp's. 893 */ 894 cs = ucp->uc_mcontext.mc_cs; 895 if (!CS_SECURE(cs)) { 896 printf("freebsd4_sigreturn: cs = 0x%x\n", cs); 897 ksiginfo_init_trap(&ksi); 898 ksi.ksi_signo = SIGBUS; 899 ksi.ksi_code = BUS_OBJERR; 900 ksi.ksi_trapno = T_PROTFLT; 901 ksi.ksi_addr = (void *)regs->tf_eip; 902 trapsignal(td, &ksi); 903 return (EINVAL); 904 } 905 906 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 907 } 908 909 PROC_LOCK(p); 910 #if defined(COMPAT_43) 911 if (ucp->uc_mcontext.mc_onstack & 1) 912 td->td_sigstk.ss_flags |= SS_ONSTACK; 913 else 914 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 915 #endif 916 917 td->td_sigmask = ucp->uc_sigmask; 918 SIG_CANTMASK(td->td_sigmask); 919 signotify(td); 920 PROC_UNLOCK(p); 921 return (EJUSTRETURN); 922 } 923 #endif /* COMPAT_FREEBSD4 */ 924 925 /* 926 * MPSAFE 927 */ 928 int 929 sigreturn(td, uap) 930 struct thread *td; 931 struct sigreturn_args /* { 932 const struct __ucontext *sigcntxp; 933 } */ *uap; 934 { 935 ucontext_t uc; 936 struct proc *p = td->td_proc; 937 struct trapframe *regs; 938 const ucontext_t *ucp; 939 int cs, eflags, error, ret; 940 ksiginfo_t ksi; 941 942 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 943 if (error != 0) 944 return (error); 945 ucp = &uc; 946 regs = td->td_frame; 947 eflags = ucp->uc_mcontext.mc_eflags; 948 if (eflags & PSL_VM) { 949 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 950 struct vm86_kernel *vm86; 951 952 /* 953 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 954 * set up the vm86 area, and we can't enter vm86 mode. 955 */ 956 if (td->td_pcb->pcb_ext == 0) 957 return (EINVAL); 958 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 959 if (vm86->vm86_inited == 0) 960 return (EINVAL); 961 962 /* Go back to user mode if both flags are set. */ 963 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 964 ksiginfo_init_trap(&ksi); 965 ksi.ksi_signo = SIGBUS; 966 ksi.ksi_code = BUS_OBJERR; 967 ksi.ksi_addr = (void *)regs->tf_eip; 968 trapsignal(td, &ksi); 969 } 970 971 if (vm86->vm86_has_vme) { 972 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 973 (eflags & VME_USERCHANGE) | PSL_VM; 974 } else { 975 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 976 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 977 (eflags & VM_USERCHANGE) | PSL_VM; 978 } 979 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 980 tf->tf_eflags = eflags; 981 tf->tf_vm86_ds = tf->tf_ds; 982 tf->tf_vm86_es = tf->tf_es; 983 tf->tf_vm86_fs = tf->tf_fs; 984 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 985 tf->tf_ds = _udatasel; 986 tf->tf_es = _udatasel; 987 tf->tf_fs = _udatasel; 988 } else { 989 /* 990 * Don't allow users to change privileged or reserved flags. 991 */ 992 /* 993 * XXX do allow users to change the privileged flag PSL_RF. 994 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 995 * should sometimes set it there too. tf_eflags is kept in 996 * the signal context during signal handling and there is no 997 * other place to remember it, so the PSL_RF bit may be 998 * corrupted by the signal handler without us knowing. 999 * Corruption of the PSL_RF bit at worst causes one more or 1000 * one less debugger trap, so allowing it is fairly harmless. 1001 */ 1002 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 1003 printf("sigreturn: eflags = 0x%x\n", eflags); 1004 return (EINVAL); 1005 } 1006 1007 /* 1008 * Don't allow users to load a valid privileged %cs. Let the 1009 * hardware check for invalid selectors, excess privilege in 1010 * other selectors, invalid %eip's and invalid %esp's. 1011 */ 1012 cs = ucp->uc_mcontext.mc_cs; 1013 if (!CS_SECURE(cs)) { 1014 printf("sigreturn: cs = 0x%x\n", cs); 1015 ksiginfo_init_trap(&ksi); 1016 ksi.ksi_signo = SIGBUS; 1017 ksi.ksi_code = BUS_OBJERR; 1018 ksi.ksi_trapno = T_PROTFLT; 1019 ksi.ksi_addr = (void *)regs->tf_eip; 1020 trapsignal(td, &ksi); 1021 return (EINVAL); 1022 } 1023 1024 ret = set_fpcontext(td, &ucp->uc_mcontext); 1025 if (ret != 0) 1026 return (ret); 1027 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1028 } 1029 1030 PROC_LOCK(p); 1031 #if defined(COMPAT_43) 1032 if (ucp->uc_mcontext.mc_onstack & 1) 1033 td->td_sigstk.ss_flags |= SS_ONSTACK; 1034 else 1035 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1036 #endif 1037 1038 td->td_sigmask = ucp->uc_sigmask; 1039 SIG_CANTMASK(td->td_sigmask); 1040 signotify(td); 1041 PROC_UNLOCK(p); 1042 return (EJUSTRETURN); 1043 } 1044 1045 /* 1046 * Machine dependent boot() routine 1047 * 1048 * I haven't seen anything to put here yet 1049 * Possibly some stuff might be grafted back here from boot() 1050 */ 1051 void 1052 cpu_boot(int howto) 1053 { 1054 } 1055 1056 /* Get current clock frequency for the given cpu id. */ 1057 int 1058 cpu_est_clockrate(int cpu_id, uint64_t *rate) 1059 { 1060 register_t reg; 1061 uint64_t tsc1, tsc2; 1062 1063 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1064 return (EINVAL); 1065 if (!tsc_present) 1066 return (EOPNOTSUPP); 1067 1068 /* If we're booting, trust the rate calibrated moments ago. */ 1069 if (cold) { 1070 *rate = tsc_freq; 1071 return (0); 1072 } 1073 1074 #ifdef SMP 1075 /* Schedule ourselves on the indicated cpu. */ 1076 thread_lock(curthread); 1077 sched_bind(curthread, cpu_id); 1078 thread_unlock(curthread); 1079 #endif 1080 1081 /* Calibrate by measuring a short delay. */ 1082 reg = intr_disable(); 1083 tsc1 = rdtsc(); 1084 DELAY(1000); 1085 tsc2 = rdtsc(); 1086 intr_restore(reg); 1087 1088 #ifdef SMP 1089 thread_lock(curthread); 1090 sched_unbind(curthread); 1091 thread_unlock(curthread); 1092 #endif 1093 1094 /* 1095 * Calculate the difference in readings, convert to Mhz, and 1096 * subtract 0.5% of the total. Empirical testing has shown that 1097 * overhead in DELAY() works out to approximately this value. 1098 */ 1099 tsc2 -= tsc1; 1100 *rate = tsc2 * 1000 - tsc2 * 5; 1101 return (0); 1102 } 1103 1104 /* 1105 * Shutdown the CPU as much as possible 1106 */ 1107 void 1108 cpu_halt(void) 1109 { 1110 for (;;) 1111 __asm__ ("hlt"); 1112 } 1113 1114 /* 1115 * Hook to idle the CPU when possible. In the SMP case we default to 1116 * off because a halted cpu will not currently pick up a new thread in the 1117 * run queue until the next timer tick. If turned on this will result in 1118 * approximately a 4.2% loss in real time performance in buildworld tests 1119 * (but improves user and sys times oddly enough), and saves approximately 1120 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3). 1121 * 1122 * XXX we need to have a cpu mask of idle cpus and generate an IPI or 1123 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT. 1124 * Then we can have our cake and eat it too. 1125 * 1126 * XXX I'm turning it on for SMP as well by default for now. It seems to 1127 * help lock contention somewhat, and this is critical for HTT. -Peter 1128 */ 1129 static int cpu_idle_hlt = 1; 1130 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt); 1131 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW, 1132 &cpu_idle_hlt, 0, "Idle loop HLT enable"); 1133 1134 static void 1135 cpu_idle_default(void) 1136 { 1137 /* 1138 * we must absolutely guarentee that hlt is the 1139 * absolute next instruction after sti or we 1140 * introduce a timing window. 1141 */ 1142 __asm __volatile("sti; hlt"); 1143 } 1144 1145 /* 1146 * Note that we have to be careful here to avoid a race between checking 1147 * sched_runnable() and actually halting. If we don't do this, we may waste 1148 * the time between calling hlt and the next interrupt even though there 1149 * is a runnable process. 1150 */ 1151 void 1152 cpu_idle(void) 1153 { 1154 1155 #ifdef SMP 1156 if (mp_grab_cpu_hlt()) 1157 return; 1158 #endif 1159 1160 if (cpu_idle_hlt) { 1161 disable_intr(); 1162 if (sched_runnable()) 1163 enable_intr(); 1164 else 1165 (*cpu_idle_hook)(); 1166 } 1167 } 1168 1169 /* Other subsystems (e.g., ACPI) can hook this later. */ 1170 void (*cpu_idle_hook)(void) = cpu_idle_default; 1171 1172 /* 1173 * Reset registers to default values on exec. 1174 */ 1175 void 1176 exec_setregs(td, entry, stack, ps_strings) 1177 struct thread *td; 1178 u_long entry; 1179 u_long stack; 1180 u_long ps_strings; 1181 { 1182 struct trapframe *regs = td->td_frame; 1183 struct pcb *pcb = td->td_pcb; 1184 1185 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1186 pcb->pcb_gs = _udatasel; 1187 load_gs(_udatasel); 1188 1189 mtx_lock_spin(&dt_lock); 1190 if (td->td_proc->p_md.md_ldt) 1191 user_ldt_free(td); 1192 else 1193 mtx_unlock_spin(&dt_lock); 1194 1195 bzero((char *)regs, sizeof(struct trapframe)); 1196 regs->tf_eip = entry; 1197 regs->tf_esp = stack; 1198 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1199 regs->tf_ss = _udatasel; 1200 regs->tf_ds = _udatasel; 1201 regs->tf_es = _udatasel; 1202 regs->tf_fs = _udatasel; 1203 regs->tf_cs = _ucodesel; 1204 1205 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1206 regs->tf_ebx = ps_strings; 1207 1208 /* 1209 * Reset the hardware debug registers if they were in use. 1210 * They won't have any meaning for the newly exec'd process. 1211 */ 1212 if (pcb->pcb_flags & PCB_DBREGS) { 1213 pcb->pcb_dr0 = 0; 1214 pcb->pcb_dr1 = 0; 1215 pcb->pcb_dr2 = 0; 1216 pcb->pcb_dr3 = 0; 1217 pcb->pcb_dr6 = 0; 1218 pcb->pcb_dr7 = 0; 1219 if (pcb == PCPU_GET(curpcb)) { 1220 /* 1221 * Clear the debug registers on the running 1222 * CPU, otherwise they will end up affecting 1223 * the next process we switch to. 1224 */ 1225 reset_dbregs(); 1226 } 1227 pcb->pcb_flags &= ~PCB_DBREGS; 1228 } 1229 1230 /* 1231 * Initialize the math emulator (if any) for the current process. 1232 * Actually, just clear the bit that says that the emulator has 1233 * been initialized. Initialization is delayed until the process 1234 * traps to the emulator (if it is done at all) mainly because 1235 * emulators don't provide an entry point for initialization. 1236 */ 1237 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1238 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__; 1239 1240 /* 1241 * Drop the FP state if we hold it, so that the process gets a 1242 * clean FP state if it uses the FPU again. 1243 */ 1244 fpstate_drop(td); 1245 1246 /* 1247 * XXX - Linux emulator 1248 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1249 * on it. 1250 */ 1251 td->td_retval[1] = 0; 1252 } 1253 1254 void 1255 cpu_setregs(void) 1256 { 1257 unsigned int cr0; 1258 1259 cr0 = rcr0(); 1260 1261 /* 1262 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1263 * 1264 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1265 * instructions. We must set the CR0_MP bit and use the CR0_TS 1266 * bit to control the trap, because setting the CR0_EM bit does 1267 * not cause WAIT instructions to trap. It's important to trap 1268 * WAIT instructions - otherwise the "wait" variants of no-wait 1269 * control instructions would degenerate to the "no-wait" variants 1270 * after FP context switches but work correctly otherwise. It's 1271 * particularly important to trap WAITs when there is no NPX - 1272 * otherwise the "wait" variants would always degenerate. 1273 * 1274 * Try setting CR0_NE to get correct error reporting on 486DX's. 1275 * Setting it should fail or do nothing on lesser processors. 1276 */ 1277 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1278 load_cr0(cr0); 1279 load_gs(_udatasel); 1280 } 1281 1282 u_long bootdev; /* not a struct cdev *- encoding is different */ 1283 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1284 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1285 1286 /* 1287 * Initialize 386 and configure to run kernel 1288 */ 1289 1290 /* 1291 * Initialize segments & interrupt table 1292 */ 1293 1294 int _default_ldt; 1295 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1296 static struct gate_descriptor idt0[NIDT]; 1297 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1298 union descriptor ldt[NLDT]; /* local descriptor table */ 1299 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1300 struct mtx dt_lock; /* lock for GDT and LDT */ 1301 1302 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1303 extern int has_f00f_bug; 1304 #endif 1305 1306 static struct i386tss dblfault_tss; 1307 static char dblfault_stack[PAGE_SIZE]; 1308 1309 extern vm_offset_t proc0kstack; 1310 1311 1312 /* 1313 * software prototypes -- in more palatable form. 1314 * 1315 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1316 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1317 */ 1318 struct soft_segment_descriptor gdt_segs[] = { 1319 /* GNULL_SEL 0 Null Descriptor */ 1320 { 0x0, /* segment base address */ 1321 0x0, /* length */ 1322 0, /* segment type */ 1323 0, /* segment descriptor priority level */ 1324 0, /* segment descriptor present */ 1325 0, 0, 1326 0, /* default 32 vs 16 bit size */ 1327 0 /* limit granularity (byte/page units)*/ }, 1328 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1329 { 0x0, /* segment base address */ 1330 0xfffff, /* length - all address space */ 1331 SDT_MEMRWA, /* segment type */ 1332 0, /* segment descriptor priority level */ 1333 1, /* segment descriptor present */ 1334 0, 0, 1335 1, /* default 32 vs 16 bit size */ 1336 1 /* limit granularity (byte/page units)*/ }, 1337 /* GUFS_SEL 2 %fs Descriptor for user */ 1338 { 0x0, /* segment base address */ 1339 0xfffff, /* length - all address space */ 1340 SDT_MEMRWA, /* segment type */ 1341 SEL_UPL, /* segment descriptor priority level */ 1342 1, /* segment descriptor present */ 1343 0, 0, 1344 1, /* default 32 vs 16 bit size */ 1345 1 /* limit granularity (byte/page units)*/ }, 1346 /* GUGS_SEL 3 %gs Descriptor for user */ 1347 { 0x0, /* segment base address */ 1348 0xfffff, /* length - all address space */ 1349 SDT_MEMRWA, /* segment type */ 1350 SEL_UPL, /* segment descriptor priority level */ 1351 1, /* segment descriptor present */ 1352 0, 0, 1353 1, /* default 32 vs 16 bit size */ 1354 1 /* limit granularity (byte/page units)*/ }, 1355 /* GCODE_SEL 4 Code Descriptor for kernel */ 1356 { 0x0, /* segment base address */ 1357 0xfffff, /* length - all address space */ 1358 SDT_MEMERA, /* segment type */ 1359 0, /* segment descriptor priority level */ 1360 1, /* segment descriptor present */ 1361 0, 0, 1362 1, /* default 32 vs 16 bit size */ 1363 1 /* limit granularity (byte/page units)*/ }, 1364 /* GDATA_SEL 5 Data Descriptor for kernel */ 1365 { 0x0, /* segment base address */ 1366 0xfffff, /* length - all address space */ 1367 SDT_MEMRWA, /* segment type */ 1368 0, /* segment descriptor priority level */ 1369 1, /* segment descriptor present */ 1370 0, 0, 1371 1, /* default 32 vs 16 bit size */ 1372 1 /* limit granularity (byte/page units)*/ }, 1373 /* GUCODE_SEL 6 Code Descriptor for user */ 1374 { 0x0, /* segment base address */ 1375 0xfffff, /* length - all address space */ 1376 SDT_MEMERA, /* segment type */ 1377 SEL_UPL, /* segment descriptor priority level */ 1378 1, /* segment descriptor present */ 1379 0, 0, 1380 1, /* default 32 vs 16 bit size */ 1381 1 /* limit granularity (byte/page units)*/ }, 1382 /* GUDATA_SEL 7 Data Descriptor for user */ 1383 { 0x0, /* segment base address */ 1384 0xfffff, /* length - all address space */ 1385 SDT_MEMRWA, /* segment type */ 1386 SEL_UPL, /* segment descriptor priority level */ 1387 1, /* segment descriptor present */ 1388 0, 0, 1389 1, /* default 32 vs 16 bit size */ 1390 1 /* limit granularity (byte/page units)*/ }, 1391 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1392 { 0x400, /* segment base address */ 1393 0xfffff, /* length */ 1394 SDT_MEMRWA, /* segment type */ 1395 0, /* segment descriptor priority level */ 1396 1, /* segment descriptor present */ 1397 0, 0, 1398 1, /* default 32 vs 16 bit size */ 1399 1 /* limit granularity (byte/page units)*/ }, 1400 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1401 { 1402 0x0, /* segment base address */ 1403 sizeof(struct i386tss)-1,/* length */ 1404 SDT_SYS386TSS, /* segment type */ 1405 0, /* segment descriptor priority level */ 1406 1, /* segment descriptor present */ 1407 0, 0, 1408 0, /* unused - default 32 vs 16 bit size */ 1409 0 /* limit granularity (byte/page units)*/ }, 1410 /* GLDT_SEL 10 LDT Descriptor */ 1411 { (int) ldt, /* segment base address */ 1412 sizeof(ldt)-1, /* length - all address space */ 1413 SDT_SYSLDT, /* segment type */ 1414 SEL_UPL, /* segment descriptor priority level */ 1415 1, /* segment descriptor present */ 1416 0, 0, 1417 0, /* unused - default 32 vs 16 bit size */ 1418 0 /* limit granularity (byte/page units)*/ }, 1419 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1420 { (int) ldt, /* segment base address */ 1421 (512 * sizeof(union descriptor)-1), /* length */ 1422 SDT_SYSLDT, /* segment type */ 1423 0, /* segment descriptor priority level */ 1424 1, /* segment descriptor present */ 1425 0, 0, 1426 0, /* unused - default 32 vs 16 bit size */ 1427 0 /* limit granularity (byte/page units)*/ }, 1428 /* GPANIC_SEL 12 Panic Tss Descriptor */ 1429 { (int) &dblfault_tss, /* segment base address */ 1430 sizeof(struct i386tss)-1,/* length - all address space */ 1431 SDT_SYS386TSS, /* segment type */ 1432 0, /* segment descriptor priority level */ 1433 1, /* segment descriptor present */ 1434 0, 0, 1435 0, /* unused - default 32 vs 16 bit size */ 1436 0 /* limit granularity (byte/page units)*/ }, 1437 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1438 { 0, /* segment base address (overwritten) */ 1439 0xfffff, /* length */ 1440 SDT_MEMERA, /* segment type */ 1441 0, /* segment descriptor priority level */ 1442 1, /* segment descriptor present */ 1443 0, 0, 1444 0, /* default 32 vs 16 bit size */ 1445 1 /* limit granularity (byte/page units)*/ }, 1446 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1447 { 0, /* segment base address (overwritten) */ 1448 0xfffff, /* length */ 1449 SDT_MEMERA, /* segment type */ 1450 0, /* segment descriptor priority level */ 1451 1, /* segment descriptor present */ 1452 0, 0, 1453 0, /* default 32 vs 16 bit size */ 1454 1 /* limit granularity (byte/page units)*/ }, 1455 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1456 { 0, /* segment base address (overwritten) */ 1457 0xfffff, /* length */ 1458 SDT_MEMRWA, /* segment type */ 1459 0, /* segment descriptor priority level */ 1460 1, /* segment descriptor present */ 1461 0, 0, 1462 1, /* default 32 vs 16 bit size */ 1463 1 /* limit granularity (byte/page units)*/ }, 1464 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1465 { 0, /* segment base address (overwritten) */ 1466 0xfffff, /* length */ 1467 SDT_MEMRWA, /* segment type */ 1468 0, /* segment descriptor priority level */ 1469 1, /* segment descriptor present */ 1470 0, 0, 1471 0, /* default 32 vs 16 bit size */ 1472 1 /* limit granularity (byte/page units)*/ }, 1473 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1474 { 0, /* segment base address (overwritten) */ 1475 0xfffff, /* length */ 1476 SDT_MEMRWA, /* segment type */ 1477 0, /* segment descriptor priority level */ 1478 1, /* segment descriptor present */ 1479 0, 0, 1480 0, /* default 32 vs 16 bit size */ 1481 1 /* limit granularity (byte/page units)*/ }, 1482 /* GNDIS_SEL 18 NDIS Descriptor */ 1483 { 0x0, /* segment base address */ 1484 0x0, /* length */ 1485 0, /* segment type */ 1486 0, /* segment descriptor priority level */ 1487 0, /* segment descriptor present */ 1488 0, 0, 1489 0, /* default 32 vs 16 bit size */ 1490 0 /* limit granularity (byte/page units)*/ }, 1491 }; 1492 1493 static struct soft_segment_descriptor ldt_segs[] = { 1494 /* Null Descriptor - overwritten by call gate */ 1495 { 0x0, /* segment base address */ 1496 0x0, /* length - all address space */ 1497 0, /* segment type */ 1498 0, /* segment descriptor priority level */ 1499 0, /* segment descriptor present */ 1500 0, 0, 1501 0, /* default 32 vs 16 bit size */ 1502 0 /* limit granularity (byte/page units)*/ }, 1503 /* Null Descriptor - overwritten by call gate */ 1504 { 0x0, /* segment base address */ 1505 0x0, /* length - all address space */ 1506 0, /* segment type */ 1507 0, /* segment descriptor priority level */ 1508 0, /* segment descriptor present */ 1509 0, 0, 1510 0, /* default 32 vs 16 bit size */ 1511 0 /* limit granularity (byte/page units)*/ }, 1512 /* Null Descriptor - overwritten by call gate */ 1513 { 0x0, /* segment base address */ 1514 0x0, /* length - all address space */ 1515 0, /* segment type */ 1516 0, /* segment descriptor priority level */ 1517 0, /* segment descriptor present */ 1518 0, 0, 1519 0, /* default 32 vs 16 bit size */ 1520 0 /* limit granularity (byte/page units)*/ }, 1521 /* Code Descriptor for user */ 1522 { 0x0, /* segment base address */ 1523 0xfffff, /* length - all address space */ 1524 SDT_MEMERA, /* segment type */ 1525 SEL_UPL, /* segment descriptor priority level */ 1526 1, /* segment descriptor present */ 1527 0, 0, 1528 1, /* default 32 vs 16 bit size */ 1529 1 /* limit granularity (byte/page units)*/ }, 1530 /* Null Descriptor - overwritten by call gate */ 1531 { 0x0, /* segment base address */ 1532 0x0, /* length - all address space */ 1533 0, /* segment type */ 1534 0, /* segment descriptor priority level */ 1535 0, /* segment descriptor present */ 1536 0, 0, 1537 0, /* default 32 vs 16 bit size */ 1538 0 /* limit granularity (byte/page units)*/ }, 1539 /* Data Descriptor for user */ 1540 { 0x0, /* segment base address */ 1541 0xfffff, /* length - all address space */ 1542 SDT_MEMRWA, /* segment type */ 1543 SEL_UPL, /* segment descriptor priority level */ 1544 1, /* segment descriptor present */ 1545 0, 0, 1546 1, /* default 32 vs 16 bit size */ 1547 1 /* limit granularity (byte/page units)*/ }, 1548 }; 1549 1550 void 1551 setidt(idx, func, typ, dpl, selec) 1552 int idx; 1553 inthand_t *func; 1554 int typ; 1555 int dpl; 1556 int selec; 1557 { 1558 struct gate_descriptor *ip; 1559 1560 ip = idt + idx; 1561 ip->gd_looffset = (int)func; 1562 ip->gd_selector = selec; 1563 ip->gd_stkcpy = 0; 1564 ip->gd_xx = 0; 1565 ip->gd_type = typ; 1566 ip->gd_dpl = dpl; 1567 ip->gd_p = 1; 1568 ip->gd_hioffset = ((int)func)>>16 ; 1569 } 1570 1571 extern inthand_t 1572 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1573 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1574 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1575 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1576 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1577 1578 #ifdef DDB 1579 /* 1580 * Display the index and function name of any IDT entries that don't use 1581 * the default 'rsvd' entry point. 1582 */ 1583 DB_SHOW_COMMAND(idt, db_show_idt) 1584 { 1585 struct gate_descriptor *ip; 1586 int idx; 1587 uintptr_t func; 1588 1589 ip = idt; 1590 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1591 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1592 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1593 db_printf("%3d\t", idx); 1594 db_printsym(func, DB_STGY_PROC); 1595 db_printf("\n"); 1596 } 1597 ip++; 1598 } 1599 } 1600 1601 /* Show privileged registers. */ 1602 DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1603 { 1604 uint64_t idtr, gdtr; 1605 1606 idtr = ridt(); 1607 db_printf("idtr\t0x%08x/%04x\n", 1608 (u_int)(idtr >> 16), (u_int)idtr & 0xffff); 1609 gdtr = rgdt(); 1610 db_printf("gdtr\t0x%08x/%04x\n", 1611 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff); 1612 db_printf("ldtr\t0x%04x\n", rldt()); 1613 db_printf("tr\t0x%04x\n", rtr()); 1614 db_printf("cr0\t0x%08x\n", rcr0()); 1615 db_printf("cr2\t0x%08x\n", rcr2()); 1616 db_printf("cr3\t0x%08x\n", rcr3()); 1617 db_printf("cr4\t0x%08x\n", rcr4()); 1618 } 1619 #endif 1620 1621 void 1622 sdtossd(sd, ssd) 1623 struct segment_descriptor *sd; 1624 struct soft_segment_descriptor *ssd; 1625 { 1626 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1627 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1628 ssd->ssd_type = sd->sd_type; 1629 ssd->ssd_dpl = sd->sd_dpl; 1630 ssd->ssd_p = sd->sd_p; 1631 ssd->ssd_def32 = sd->sd_def32; 1632 ssd->ssd_gran = sd->sd_gran; 1633 } 1634 1635 static void 1636 basemem_setup(void) 1637 { 1638 vm_paddr_t pa; 1639 pt_entry_t *pte; 1640 int i; 1641 1642 if (basemem > 640) { 1643 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1644 basemem); 1645 basemem = 640; 1646 } 1647 1648 /* 1649 * XXX if biosbasemem is now < 640, there is a `hole' 1650 * between the end of base memory and the start of 1651 * ISA memory. The hole may be empty or it may 1652 * contain BIOS code or data. Map it read/write so 1653 * that the BIOS can write to it. (Memory from 0 to 1654 * the physical end of the kernel is mapped read-only 1655 * to begin with and then parts of it are remapped. 1656 * The parts that aren't remapped form holes that 1657 * remain read-only and are unused by the kernel. 1658 * The base memory area is below the physical end of 1659 * the kernel and right now forms a read-only hole. 1660 * The part of it from PAGE_SIZE to 1661 * (trunc_page(biosbasemem * 1024) - 1) will be 1662 * remapped and used by the kernel later.) 1663 * 1664 * This code is similar to the code used in 1665 * pmap_mapdev, but since no memory needs to be 1666 * allocated we simply change the mapping. 1667 */ 1668 for (pa = trunc_page(basemem * 1024); 1669 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1670 pmap_kenter(KERNBASE + pa, pa); 1671 1672 /* 1673 * Map pages between basemem and ISA_HOLE_START, if any, r/w into 1674 * the vm86 page table so that vm86 can scribble on them using 1675 * the vm86 map too. XXX: why 2 ways for this and only 1 way for 1676 * page 0, at least as initialized here? 1677 */ 1678 pte = (pt_entry_t *)vm86paddr; 1679 for (i = basemem / 4; i < 160; i++) 1680 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1681 } 1682 1683 /* 1684 * Populate the (physmap) array with base/bound pairs describing the 1685 * available physical memory in the system, then test this memory and 1686 * build the phys_avail array describing the actually-available memory. 1687 * 1688 * If we cannot accurately determine the physical memory map, then use 1689 * value from the 0xE801 call, and failing that, the RTC. 1690 * 1691 * Total memory size may be set by the kernel environment variable 1692 * hw.physmem or the compile-time define MAXMEM. 1693 * 1694 * XXX first should be vm_paddr_t. 1695 */ 1696 static void 1697 getmemsize(int first) 1698 { 1699 int off, physmap_idx, pa_indx, da_indx; 1700 u_long physmem_tunable, memtest; 1701 vm_paddr_t physmap[PHYSMAP_SIZE]; 1702 pt_entry_t *pte; 1703 quad_t dcons_addr, dcons_size; 1704 int i; 1705 int pg_n; 1706 u_int extmem; 1707 u_int under16; 1708 vm_paddr_t pa; 1709 1710 bzero(physmap, sizeof(physmap)); 1711 1712 /* XXX - some of EPSON machines can't use PG_N */ 1713 pg_n = PG_N; 1714 if (pc98_machine_type & M_EPSON_PC98) { 1715 switch (epson_machine_id) { 1716 #ifdef WB_CACHE 1717 default: 1718 #endif 1719 case EPSON_PC486_HX: 1720 case EPSON_PC486_HG: 1721 case EPSON_PC486_HA: 1722 pg_n = 0; 1723 break; 1724 } 1725 } 1726 1727 under16 = pc98_getmemsize(&basemem, &extmem); 1728 basemem_setup(); 1729 1730 physmap[0] = 0; 1731 physmap[1] = basemem * 1024; 1732 physmap_idx = 2; 1733 physmap[physmap_idx] = 0x100000; 1734 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1735 1736 /* 1737 * Now, physmap contains a map of physical memory. 1738 */ 1739 1740 #ifdef SMP 1741 /* make hole for AP bootstrap code */ 1742 physmap[1] = mp_bootaddress(physmap[1]); 1743 #endif 1744 1745 /* 1746 * Maxmem isn't the "maximum memory", it's one larger than the 1747 * highest page of the physical address space. It should be 1748 * called something like "Maxphyspage". We may adjust this 1749 * based on ``hw.physmem'' and the results of the memory test. 1750 */ 1751 Maxmem = atop(physmap[physmap_idx + 1]); 1752 1753 #ifdef MAXMEM 1754 Maxmem = MAXMEM / 4; 1755 #endif 1756 1757 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1758 Maxmem = atop(physmem_tunable); 1759 1760 /* 1761 * By default keep the memtest enabled. Use a general name so that 1762 * one could eventually do more with the code than just disable it. 1763 */ 1764 memtest = 1; 1765 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest); 1766 1767 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1768 (boothowto & RB_VERBOSE)) 1769 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1770 1771 /* 1772 * If Maxmem has been increased beyond what the system has detected, 1773 * extend the last memory segment to the new limit. 1774 */ 1775 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1776 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1777 1778 /* 1779 * We need to divide chunk if Maxmem is larger than 16MB and 1780 * under 16MB area is not full of memory. 1781 * (1) system area (15-16MB region) is cut off 1782 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY") 1783 */ 1784 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) { 1785 /* 15M - 16M region is cut off, so need to divide chunk */ 1786 physmap[physmap_idx + 1] = under16 * 1024; 1787 physmap_idx += 2; 1788 physmap[physmap_idx] = 0x1000000; 1789 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024; 1790 } 1791 1792 /* call pmap initialization to make new kernel address space */ 1793 pmap_bootstrap(first); 1794 1795 /* 1796 * Size up each available chunk of physical memory. 1797 */ 1798 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1799 pa_indx = 0; 1800 da_indx = 1; 1801 phys_avail[pa_indx++] = physmap[0]; 1802 phys_avail[pa_indx] = physmap[0]; 1803 dump_avail[da_indx] = physmap[0]; 1804 pte = CMAP1; 1805 1806 /* 1807 * Get dcons buffer address 1808 */ 1809 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1810 getenv_quad("dcons.size", &dcons_size) == 0) 1811 dcons_addr = 0; 1812 1813 /* 1814 * physmap is in bytes, so when converting to page boundaries, 1815 * round up the start address and round down the end address. 1816 */ 1817 for (i = 0; i <= physmap_idx; i += 2) { 1818 vm_paddr_t end; 1819 1820 end = ptoa((vm_paddr_t)Maxmem); 1821 if (physmap[i + 1] < end) 1822 end = trunc_page(physmap[i + 1]); 1823 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1824 int tmp, page_bad, full; 1825 int *ptr = (int *)CADDR1; 1826 1827 full = FALSE; 1828 /* 1829 * block out kernel memory as not available. 1830 */ 1831 if (pa >= KERNLOAD && pa < first) 1832 goto do_dump_avail; 1833 1834 /* 1835 * block out dcons buffer 1836 */ 1837 if (dcons_addr > 0 1838 && pa >= trunc_page(dcons_addr) 1839 && pa < dcons_addr + dcons_size) 1840 goto do_dump_avail; 1841 1842 page_bad = FALSE; 1843 if (memtest == 0) 1844 goto skip_memtest; 1845 1846 /* 1847 * map page into kernel: valid, read/write,non-cacheable 1848 */ 1849 *pte = pa | PG_V | PG_RW | pg_n; 1850 invltlb(); 1851 1852 tmp = *(int *)ptr; 1853 /* 1854 * Test for alternating 1's and 0's 1855 */ 1856 *(volatile int *)ptr = 0xaaaaaaaa; 1857 if (*(volatile int *)ptr != 0xaaaaaaaa) 1858 page_bad = TRUE; 1859 /* 1860 * Test for alternating 0's and 1's 1861 */ 1862 *(volatile int *)ptr = 0x55555555; 1863 if (*(volatile int *)ptr != 0x55555555) 1864 page_bad = TRUE; 1865 /* 1866 * Test for all 1's 1867 */ 1868 *(volatile int *)ptr = 0xffffffff; 1869 if (*(volatile int *)ptr != 0xffffffff) 1870 page_bad = TRUE; 1871 /* 1872 * Test for all 0's 1873 */ 1874 *(volatile int *)ptr = 0x0; 1875 if (*(volatile int *)ptr != 0x0) 1876 page_bad = TRUE; 1877 /* 1878 * Restore original value. 1879 */ 1880 *(int *)ptr = tmp; 1881 1882 skip_memtest: 1883 /* 1884 * Adjust array of valid/good pages. 1885 */ 1886 if (page_bad == TRUE) 1887 continue; 1888 /* 1889 * If this good page is a continuation of the 1890 * previous set of good pages, then just increase 1891 * the end pointer. Otherwise start a new chunk. 1892 * Note that "end" points one higher than end, 1893 * making the range >= start and < end. 1894 * If we're also doing a speculative memory 1895 * test and we at or past the end, bump up Maxmem 1896 * so that we keep going. The first bad page 1897 * will terminate the loop. 1898 */ 1899 if (phys_avail[pa_indx] == pa) { 1900 phys_avail[pa_indx] += PAGE_SIZE; 1901 } else { 1902 pa_indx++; 1903 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 1904 printf( 1905 "Too many holes in the physical address space, giving up\n"); 1906 pa_indx--; 1907 full = TRUE; 1908 goto do_dump_avail; 1909 } 1910 phys_avail[pa_indx++] = pa; /* start */ 1911 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 1912 } 1913 physmem++; 1914 do_dump_avail: 1915 if (dump_avail[da_indx] == pa) { 1916 dump_avail[da_indx] += PAGE_SIZE; 1917 } else { 1918 da_indx++; 1919 if (da_indx == DUMP_AVAIL_ARRAY_END) { 1920 da_indx--; 1921 goto do_next; 1922 } 1923 dump_avail[da_indx++] = pa; /* start */ 1924 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 1925 } 1926 do_next: 1927 if (full) 1928 break; 1929 } 1930 } 1931 *pte = 0; 1932 invltlb(); 1933 1934 /* 1935 * XXX 1936 * The last chunk must contain at least one page plus the message 1937 * buffer to avoid complicating other code (message buffer address 1938 * calculation, etc.). 1939 */ 1940 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 1941 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 1942 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 1943 phys_avail[pa_indx--] = 0; 1944 phys_avail[pa_indx--] = 0; 1945 } 1946 1947 Maxmem = atop(phys_avail[pa_indx]); 1948 1949 /* Trim off space for the message buffer. */ 1950 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 1951 1952 /* Map the message buffer. */ 1953 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 1954 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 1955 off); 1956 } 1957 1958 void 1959 init386(first) 1960 int first; 1961 { 1962 struct gate_descriptor *gdp; 1963 int gsel_tss, metadata_missing, x; 1964 struct pcpu *pc; 1965 1966 thread0.td_kstack = proc0kstack; 1967 thread0.td_pcb = (struct pcb *) 1968 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 1969 1970 /* 1971 * This may be done better later if it gets more high level 1972 * components in it. If so just link td->td_proc here. 1973 */ 1974 proc_linkup0(&proc0, &thread0); 1975 1976 /* 1977 * Initialize DMAC 1978 */ 1979 pc98_init_dmac(); 1980 1981 metadata_missing = 0; 1982 if (bootinfo.bi_modulep) { 1983 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 1984 preload_bootstrap_relocate(KERNBASE); 1985 } else { 1986 metadata_missing = 1; 1987 } 1988 if (envmode == 1) 1989 kern_envp = static_env; 1990 else if (bootinfo.bi_envp) 1991 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 1992 1993 /* Init basic tunables, hz etc */ 1994 init_param1(); 1995 1996 /* 1997 * Make gdt memory segments. All segments cover the full 4GB 1998 * of address space and permissions are enforced at page level. 1999 */ 2000 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 2001 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 2002 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 2003 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 2004 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 2005 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 2006 2007 pc = &__pcpu[0]; 2008 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 2009 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 2010 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 2011 2012 for (x = 0; x < NGDT; x++) 2013 ssdtosd(&gdt_segs[x], &gdt[x].sd); 2014 2015 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 2016 r_gdt.rd_base = (int) gdt; 2017 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN); 2018 lgdt(&r_gdt); 2019 2020 pcpu_init(pc, 0, sizeof(struct pcpu)); 2021 PCPU_SET(prvspace, pc); 2022 PCPU_SET(curthread, &thread0); 2023 PCPU_SET(curpcb, thread0.td_pcb); 2024 2025 /* 2026 * Initialize mutexes. 2027 * 2028 * icu_lock: in order to allow an interrupt to occur in a critical 2029 * section, to set pcpu->ipending (etc...) properly, we 2030 * must be able to get the icu lock, so it can't be 2031 * under witness. 2032 */ 2033 mutex_init(); 2034 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE); 2035 2036 /* make ldt memory segments */ 2037 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 2038 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 2039 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 2040 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2041 2042 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2043 lldt(_default_ldt); 2044 PCPU_SET(currentldt, _default_ldt); 2045 2046 /* exceptions */ 2047 for (x = 0; x < NIDT; x++) 2048 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2049 GSEL(GCODE_SEL, SEL_KPL)); 2050 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2051 GSEL(GCODE_SEL, SEL_KPL)); 2052 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2053 GSEL(GCODE_SEL, SEL_KPL)); 2054 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2055 GSEL(GCODE_SEL, SEL_KPL)); 2056 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2057 GSEL(GCODE_SEL, SEL_KPL)); 2058 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2059 GSEL(GCODE_SEL, SEL_KPL)); 2060 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2061 GSEL(GCODE_SEL, SEL_KPL)); 2062 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2063 GSEL(GCODE_SEL, SEL_KPL)); 2064 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2065 , GSEL(GCODE_SEL, SEL_KPL)); 2066 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2067 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2068 GSEL(GCODE_SEL, SEL_KPL)); 2069 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2070 GSEL(GCODE_SEL, SEL_KPL)); 2071 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2072 GSEL(GCODE_SEL, SEL_KPL)); 2073 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2074 GSEL(GCODE_SEL, SEL_KPL)); 2075 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2076 GSEL(GCODE_SEL, SEL_KPL)); 2077 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2078 GSEL(GCODE_SEL, SEL_KPL)); 2079 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2080 GSEL(GCODE_SEL, SEL_KPL)); 2081 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2082 GSEL(GCODE_SEL, SEL_KPL)); 2083 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2084 GSEL(GCODE_SEL, SEL_KPL)); 2085 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2086 GSEL(GCODE_SEL, SEL_KPL)); 2087 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2088 GSEL(GCODE_SEL, SEL_KPL)); 2089 2090 r_idt.rd_limit = sizeof(idt0) - 1; 2091 r_idt.rd_base = (int) idt; 2092 lidt(&r_idt); 2093 2094 /* 2095 * Initialize the i8254 before the console so that console 2096 * initialization can use DELAY(). 2097 */ 2098 i8254_init(); 2099 2100 /* 2101 * Initialize the console before we print anything out. 2102 */ 2103 cninit(); 2104 2105 if (metadata_missing) 2106 printf("WARNING: loader(8) metadata is missing!\n"); 2107 2108 #ifdef DEV_ISA 2109 atpic_startup(); 2110 #endif 2111 2112 #ifdef DDB 2113 ksym_start = bootinfo.bi_symtab; 2114 ksym_end = bootinfo.bi_esymtab; 2115 #endif 2116 2117 kdb_init(); 2118 2119 #ifdef KDB 2120 if (boothowto & RB_KDB) 2121 kdb_enter_why(KDB_WHY_BOOTFLAGS, 2122 "Boot flags requested debugger"); 2123 #endif 2124 2125 finishidentcpu(); /* Final stage of CPU initialization */ 2126 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2127 GSEL(GCODE_SEL, SEL_KPL)); 2128 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2129 GSEL(GCODE_SEL, SEL_KPL)); 2130 initializecpu(); /* Initialize CPU registers */ 2131 2132 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2133 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2134 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2135 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2136 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2137 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2138 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2139 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2140 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2141 ltr(gsel_tss); 2142 2143 /* pointer to selector slot for %fs/%gs */ 2144 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2145 2146 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2147 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2148 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2149 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2150 dblfault_tss.tss_cr3 = (int)IdlePTD; 2151 dblfault_tss.tss_eip = (int)dblfault_handler; 2152 dblfault_tss.tss_eflags = PSL_KERNEL; 2153 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2154 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2155 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2156 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2157 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2158 2159 vm86_initialize(); 2160 getmemsize(first); 2161 init_param2(physmem); 2162 2163 /* now running on new page tables, configured,and u/iom is accessible */ 2164 2165 msgbufinit(msgbufp, MSGBUF_SIZE); 2166 2167 /* make a call gate to reenter kernel with */ 2168 gdp = &ldt[LSYS5CALLS_SEL].gd; 2169 2170 x = (int) &IDTVEC(lcall_syscall); 2171 gdp->gd_looffset = x; 2172 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2173 gdp->gd_stkcpy = 1; 2174 gdp->gd_type = SDT_SYS386CGT; 2175 gdp->gd_dpl = SEL_UPL; 2176 gdp->gd_p = 1; 2177 gdp->gd_hioffset = x >> 16; 2178 2179 /* XXX does this work? */ 2180 /* XXX yes! */ 2181 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2182 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2183 2184 /* transfer to user mode */ 2185 2186 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2187 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2188 2189 /* setup proc 0's pcb */ 2190 thread0.td_pcb->pcb_flags = 0; 2191 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2192 thread0.td_pcb->pcb_ext = 0; 2193 thread0.td_frame = &proc0_tf; 2194 } 2195 2196 void 2197 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2198 { 2199 2200 } 2201 2202 void 2203 spinlock_enter(void) 2204 { 2205 struct thread *td; 2206 register_t flags; 2207 2208 td = curthread; 2209 if (td->td_md.md_spinlock_count == 0) { 2210 flags = intr_disable(); 2211 td->td_md.md_spinlock_count = 1; 2212 td->td_md.md_saved_flags = flags; 2213 } else 2214 td->td_md.md_spinlock_count++; 2215 critical_enter(); 2216 } 2217 2218 void 2219 spinlock_exit(void) 2220 { 2221 struct thread *td; 2222 register_t flags; 2223 2224 td = curthread; 2225 critical_exit(); 2226 flags = td->td_md.md_saved_flags; 2227 td->td_md.md_spinlock_count--; 2228 if (td->td_md.md_spinlock_count == 0) 2229 intr_restore(flags); 2230 } 2231 2232 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2233 static void f00f_hack(void *unused); 2234 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 2235 2236 static void 2237 f00f_hack(void *unused) 2238 { 2239 struct gate_descriptor *new_idt; 2240 vm_offset_t tmp; 2241 2242 if (!has_f00f_bug) 2243 return; 2244 2245 GIANT_REQUIRED; 2246 2247 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2248 2249 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2250 if (tmp == 0) 2251 panic("kmem_alloc returned 0"); 2252 2253 /* Put the problematic entry (#6) at the end of the lower page. */ 2254 new_idt = (struct gate_descriptor*) 2255 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2256 bcopy(idt, new_idt, sizeof(idt0)); 2257 r_idt.rd_base = (u_int)new_idt; 2258 lidt(&r_idt); 2259 idt = new_idt; 2260 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2261 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2262 panic("vm_map_protect failed"); 2263 } 2264 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2265 2266 /* 2267 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2268 * we want to start a backtrace from the function that caused us to enter 2269 * the debugger. We have the context in the trapframe, but base the trace 2270 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2271 * enough for a backtrace. 2272 */ 2273 void 2274 makectx(struct trapframe *tf, struct pcb *pcb) 2275 { 2276 2277 pcb->pcb_edi = tf->tf_edi; 2278 pcb->pcb_esi = tf->tf_esi; 2279 pcb->pcb_ebp = tf->tf_ebp; 2280 pcb->pcb_ebx = tf->tf_ebx; 2281 pcb->pcb_eip = tf->tf_eip; 2282 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2283 } 2284 2285 int 2286 ptrace_set_pc(struct thread *td, u_long addr) 2287 { 2288 2289 td->td_frame->tf_eip = addr; 2290 return (0); 2291 } 2292 2293 int 2294 ptrace_single_step(struct thread *td) 2295 { 2296 td->td_frame->tf_eflags |= PSL_T; 2297 return (0); 2298 } 2299 2300 int 2301 ptrace_clear_single_step(struct thread *td) 2302 { 2303 td->td_frame->tf_eflags &= ~PSL_T; 2304 return (0); 2305 } 2306 2307 int 2308 fill_regs(struct thread *td, struct reg *regs) 2309 { 2310 struct pcb *pcb; 2311 struct trapframe *tp; 2312 2313 tp = td->td_frame; 2314 pcb = td->td_pcb; 2315 regs->r_fs = tp->tf_fs; 2316 regs->r_es = tp->tf_es; 2317 regs->r_ds = tp->tf_ds; 2318 regs->r_edi = tp->tf_edi; 2319 regs->r_esi = tp->tf_esi; 2320 regs->r_ebp = tp->tf_ebp; 2321 regs->r_ebx = tp->tf_ebx; 2322 regs->r_edx = tp->tf_edx; 2323 regs->r_ecx = tp->tf_ecx; 2324 regs->r_eax = tp->tf_eax; 2325 regs->r_eip = tp->tf_eip; 2326 regs->r_cs = tp->tf_cs; 2327 regs->r_eflags = tp->tf_eflags; 2328 regs->r_esp = tp->tf_esp; 2329 regs->r_ss = tp->tf_ss; 2330 regs->r_gs = pcb->pcb_gs; 2331 return (0); 2332 } 2333 2334 int 2335 set_regs(struct thread *td, struct reg *regs) 2336 { 2337 struct pcb *pcb; 2338 struct trapframe *tp; 2339 2340 tp = td->td_frame; 2341 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2342 !CS_SECURE(regs->r_cs)) 2343 return (EINVAL); 2344 pcb = td->td_pcb; 2345 tp->tf_fs = regs->r_fs; 2346 tp->tf_es = regs->r_es; 2347 tp->tf_ds = regs->r_ds; 2348 tp->tf_edi = regs->r_edi; 2349 tp->tf_esi = regs->r_esi; 2350 tp->tf_ebp = regs->r_ebp; 2351 tp->tf_ebx = regs->r_ebx; 2352 tp->tf_edx = regs->r_edx; 2353 tp->tf_ecx = regs->r_ecx; 2354 tp->tf_eax = regs->r_eax; 2355 tp->tf_eip = regs->r_eip; 2356 tp->tf_cs = regs->r_cs; 2357 tp->tf_eflags = regs->r_eflags; 2358 tp->tf_esp = regs->r_esp; 2359 tp->tf_ss = regs->r_ss; 2360 pcb->pcb_gs = regs->r_gs; 2361 return (0); 2362 } 2363 2364 #ifdef CPU_ENABLE_SSE 2365 static void 2366 fill_fpregs_xmm(sv_xmm, sv_87) 2367 struct savexmm *sv_xmm; 2368 struct save87 *sv_87; 2369 { 2370 register struct env87 *penv_87 = &sv_87->sv_env; 2371 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2372 int i; 2373 2374 bzero(sv_87, sizeof(*sv_87)); 2375 2376 /* FPU control/status */ 2377 penv_87->en_cw = penv_xmm->en_cw; 2378 penv_87->en_sw = penv_xmm->en_sw; 2379 penv_87->en_tw = penv_xmm->en_tw; 2380 penv_87->en_fip = penv_xmm->en_fip; 2381 penv_87->en_fcs = penv_xmm->en_fcs; 2382 penv_87->en_opcode = penv_xmm->en_opcode; 2383 penv_87->en_foo = penv_xmm->en_foo; 2384 penv_87->en_fos = penv_xmm->en_fos; 2385 2386 /* FPU registers */ 2387 for (i = 0; i < 8; ++i) 2388 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2389 } 2390 2391 static void 2392 set_fpregs_xmm(sv_87, sv_xmm) 2393 struct save87 *sv_87; 2394 struct savexmm *sv_xmm; 2395 { 2396 register struct env87 *penv_87 = &sv_87->sv_env; 2397 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2398 int i; 2399 2400 /* FPU control/status */ 2401 penv_xmm->en_cw = penv_87->en_cw; 2402 penv_xmm->en_sw = penv_87->en_sw; 2403 penv_xmm->en_tw = penv_87->en_tw; 2404 penv_xmm->en_fip = penv_87->en_fip; 2405 penv_xmm->en_fcs = penv_87->en_fcs; 2406 penv_xmm->en_opcode = penv_87->en_opcode; 2407 penv_xmm->en_foo = penv_87->en_foo; 2408 penv_xmm->en_fos = penv_87->en_fos; 2409 2410 /* FPU registers */ 2411 for (i = 0; i < 8; ++i) 2412 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2413 } 2414 #endif /* CPU_ENABLE_SSE */ 2415 2416 int 2417 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2418 { 2419 #ifdef CPU_ENABLE_SSE 2420 if (cpu_fxsr) { 2421 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm, 2422 (struct save87 *)fpregs); 2423 return (0); 2424 } 2425 #endif /* CPU_ENABLE_SSE */ 2426 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs); 2427 return (0); 2428 } 2429 2430 int 2431 set_fpregs(struct thread *td, struct fpreg *fpregs) 2432 { 2433 #ifdef CPU_ENABLE_SSE 2434 if (cpu_fxsr) { 2435 set_fpregs_xmm((struct save87 *)fpregs, 2436 &td->td_pcb->pcb_save.sv_xmm); 2437 return (0); 2438 } 2439 #endif /* CPU_ENABLE_SSE */ 2440 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs); 2441 return (0); 2442 } 2443 2444 /* 2445 * Get machine context. 2446 */ 2447 int 2448 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2449 { 2450 struct trapframe *tp; 2451 2452 tp = td->td_frame; 2453 2454 PROC_LOCK(curthread->td_proc); 2455 mcp->mc_onstack = sigonstack(tp->tf_esp); 2456 PROC_UNLOCK(curthread->td_proc); 2457 mcp->mc_gs = td->td_pcb->pcb_gs; 2458 mcp->mc_fs = tp->tf_fs; 2459 mcp->mc_es = tp->tf_es; 2460 mcp->mc_ds = tp->tf_ds; 2461 mcp->mc_edi = tp->tf_edi; 2462 mcp->mc_esi = tp->tf_esi; 2463 mcp->mc_ebp = tp->tf_ebp; 2464 mcp->mc_isp = tp->tf_isp; 2465 mcp->mc_eflags = tp->tf_eflags; 2466 if (flags & GET_MC_CLEAR_RET) { 2467 mcp->mc_eax = 0; 2468 mcp->mc_edx = 0; 2469 mcp->mc_eflags &= ~PSL_C; 2470 } else { 2471 mcp->mc_eax = tp->tf_eax; 2472 mcp->mc_edx = tp->tf_edx; 2473 } 2474 mcp->mc_ebx = tp->tf_ebx; 2475 mcp->mc_ecx = tp->tf_ecx; 2476 mcp->mc_eip = tp->tf_eip; 2477 mcp->mc_cs = tp->tf_cs; 2478 mcp->mc_esp = tp->tf_esp; 2479 mcp->mc_ss = tp->tf_ss; 2480 mcp->mc_len = sizeof(*mcp); 2481 get_fpcontext(td, mcp); 2482 bzero(mcp->mc_spare1, sizeof(mcp->mc_spare1)); 2483 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2484 return (0); 2485 } 2486 2487 /* 2488 * Set machine context. 2489 * 2490 * However, we don't set any but the user modifiable flags, and we won't 2491 * touch the cs selector. 2492 */ 2493 int 2494 set_mcontext(struct thread *td, const mcontext_t *mcp) 2495 { 2496 struct trapframe *tp; 2497 int eflags, ret; 2498 2499 tp = td->td_frame; 2500 if (mcp->mc_len != sizeof(*mcp)) 2501 return (EINVAL); 2502 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2503 (tp->tf_eflags & ~PSL_USERCHANGE); 2504 if ((ret = set_fpcontext(td, mcp)) == 0) { 2505 tp->tf_fs = mcp->mc_fs; 2506 tp->tf_es = mcp->mc_es; 2507 tp->tf_ds = mcp->mc_ds; 2508 tp->tf_edi = mcp->mc_edi; 2509 tp->tf_esi = mcp->mc_esi; 2510 tp->tf_ebp = mcp->mc_ebp; 2511 tp->tf_ebx = mcp->mc_ebx; 2512 tp->tf_edx = mcp->mc_edx; 2513 tp->tf_ecx = mcp->mc_ecx; 2514 tp->tf_eax = mcp->mc_eax; 2515 tp->tf_eip = mcp->mc_eip; 2516 tp->tf_eflags = eflags; 2517 tp->tf_esp = mcp->mc_esp; 2518 tp->tf_ss = mcp->mc_ss; 2519 td->td_pcb->pcb_gs = mcp->mc_gs; 2520 ret = 0; 2521 } 2522 return (ret); 2523 } 2524 2525 static void 2526 get_fpcontext(struct thread *td, mcontext_t *mcp) 2527 { 2528 #ifndef DEV_NPX 2529 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2530 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2531 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2532 #else 2533 union savefpu *addr; 2534 2535 /* 2536 * XXX mc_fpstate might be misaligned, since its declaration is not 2537 * unportabilized using __attribute__((aligned(16))) like the 2538 * declaration of struct savemm, and anyway, alignment doesn't work 2539 * for auto variables since we don't use gcc's pessimal stack 2540 * alignment. Work around this by abusing the spare fields after 2541 * mcp->mc_fpstate. 2542 * 2543 * XXX unpessimize most cases by only aligning when fxsave might be 2544 * called, although this requires knowing too much about 2545 * npxgetregs()'s internals. 2546 */ 2547 addr = (union savefpu *)&mcp->mc_fpstate; 2548 if (td == PCPU_GET(fpcurthread) && 2549 #ifdef CPU_ENABLE_SSE 2550 cpu_fxsr && 2551 #endif 2552 ((uintptr_t)(void *)addr & 0xF)) { 2553 do 2554 addr = (void *)((char *)addr + 4); 2555 while ((uintptr_t)(void *)addr & 0xF); 2556 } 2557 mcp->mc_ownedfp = npxgetregs(td, addr); 2558 if (addr != (union savefpu *)&mcp->mc_fpstate) { 2559 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate)); 2560 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2)); 2561 } 2562 mcp->mc_fpformat = npxformat(); 2563 #endif 2564 } 2565 2566 static int 2567 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2568 { 2569 union savefpu *addr; 2570 2571 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2572 return (0); 2573 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2574 mcp->mc_fpformat != _MC_FPFMT_XMM) 2575 return (EINVAL); 2576 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2577 /* We don't care what state is left in the FPU or PCB. */ 2578 fpstate_drop(td); 2579 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2580 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2581 /* XXX align as above. */ 2582 addr = (union savefpu *)&mcp->mc_fpstate; 2583 if (td == PCPU_GET(fpcurthread) && 2584 #ifdef CPU_ENABLE_SSE 2585 cpu_fxsr && 2586 #endif 2587 ((uintptr_t)(void *)addr & 0xF)) { 2588 do 2589 addr = (void *)((char *)addr + 4); 2590 while ((uintptr_t)(void *)addr & 0xF); 2591 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate)); 2592 } 2593 #ifdef DEV_NPX 2594 #ifdef CPU_ENABLE_SSE 2595 if (cpu_fxsr) 2596 addr->sv_xmm.sv_env.en_mxcsr &= cpu_mxcsr_mask; 2597 #endif 2598 /* 2599 * XXX we violate the dubious requirement that npxsetregs() 2600 * be called with interrupts disabled. 2601 */ 2602 npxsetregs(td, addr); 2603 #endif 2604 /* 2605 * Don't bother putting things back where they were in the 2606 * misaligned case, since we know that the caller won't use 2607 * them again. 2608 */ 2609 } else 2610 return (EINVAL); 2611 return (0); 2612 } 2613 2614 static void 2615 fpstate_drop(struct thread *td) 2616 { 2617 register_t s; 2618 2619 s = intr_disable(); 2620 #ifdef DEV_NPX 2621 if (PCPU_GET(fpcurthread) == td) 2622 npxdrop(); 2623 #endif 2624 /* 2625 * XXX force a full drop of the npx. The above only drops it if we 2626 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2627 * 2628 * XXX I don't much like npxgetregs()'s semantics of doing a full 2629 * drop. Dropping only to the pcb matches fnsave's behaviour. 2630 * We only need to drop to !PCB_INITDONE in sendsig(). But 2631 * sendsig() is the only caller of npxgetregs()... perhaps we just 2632 * have too many layers. 2633 */ 2634 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE; 2635 intr_restore(s); 2636 } 2637 2638 int 2639 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2640 { 2641 struct pcb *pcb; 2642 2643 if (td == NULL) { 2644 dbregs->dr[0] = rdr0(); 2645 dbregs->dr[1] = rdr1(); 2646 dbregs->dr[2] = rdr2(); 2647 dbregs->dr[3] = rdr3(); 2648 dbregs->dr[4] = rdr4(); 2649 dbregs->dr[5] = rdr5(); 2650 dbregs->dr[6] = rdr6(); 2651 dbregs->dr[7] = rdr7(); 2652 } else { 2653 pcb = td->td_pcb; 2654 dbregs->dr[0] = pcb->pcb_dr0; 2655 dbregs->dr[1] = pcb->pcb_dr1; 2656 dbregs->dr[2] = pcb->pcb_dr2; 2657 dbregs->dr[3] = pcb->pcb_dr3; 2658 dbregs->dr[4] = 0; 2659 dbregs->dr[5] = 0; 2660 dbregs->dr[6] = pcb->pcb_dr6; 2661 dbregs->dr[7] = pcb->pcb_dr7; 2662 } 2663 return (0); 2664 } 2665 2666 int 2667 set_dbregs(struct thread *td, struct dbreg *dbregs) 2668 { 2669 struct pcb *pcb; 2670 int i; 2671 2672 if (td == NULL) { 2673 load_dr0(dbregs->dr[0]); 2674 load_dr1(dbregs->dr[1]); 2675 load_dr2(dbregs->dr[2]); 2676 load_dr3(dbregs->dr[3]); 2677 load_dr4(dbregs->dr[4]); 2678 load_dr5(dbregs->dr[5]); 2679 load_dr6(dbregs->dr[6]); 2680 load_dr7(dbregs->dr[7]); 2681 } else { 2682 /* 2683 * Don't let an illegal value for dr7 get set. Specifically, 2684 * check for undefined settings. Setting these bit patterns 2685 * result in undefined behaviour and can lead to an unexpected 2686 * TRCTRAP. 2687 */ 2688 for (i = 0; i < 4; i++) { 2689 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2690 return (EINVAL); 2691 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02) 2692 return (EINVAL); 2693 } 2694 2695 pcb = td->td_pcb; 2696 2697 /* 2698 * Don't let a process set a breakpoint that is not within the 2699 * process's address space. If a process could do this, it 2700 * could halt the system by setting a breakpoint in the kernel 2701 * (if ddb was enabled). Thus, we need to check to make sure 2702 * that no breakpoints are being enabled for addresses outside 2703 * process's address space. 2704 * 2705 * XXX - what about when the watched area of the user's 2706 * address space is written into from within the kernel 2707 * ... wouldn't that still cause a breakpoint to be generated 2708 * from within kernel mode? 2709 */ 2710 2711 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2712 /* dr0 is enabled */ 2713 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2714 return (EINVAL); 2715 } 2716 2717 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2718 /* dr1 is enabled */ 2719 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2720 return (EINVAL); 2721 } 2722 2723 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2724 /* dr2 is enabled */ 2725 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2726 return (EINVAL); 2727 } 2728 2729 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2730 /* dr3 is enabled */ 2731 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2732 return (EINVAL); 2733 } 2734 2735 pcb->pcb_dr0 = dbregs->dr[0]; 2736 pcb->pcb_dr1 = dbregs->dr[1]; 2737 pcb->pcb_dr2 = dbregs->dr[2]; 2738 pcb->pcb_dr3 = dbregs->dr[3]; 2739 pcb->pcb_dr6 = dbregs->dr[6]; 2740 pcb->pcb_dr7 = dbregs->dr[7]; 2741 2742 pcb->pcb_flags |= PCB_DBREGS; 2743 } 2744 2745 return (0); 2746 } 2747 2748 /* 2749 * Return > 0 if a hardware breakpoint has been hit, and the 2750 * breakpoint was in user space. Return 0, otherwise. 2751 */ 2752 int 2753 user_dbreg_trap(void) 2754 { 2755 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2756 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2757 int nbp; /* number of breakpoints that triggered */ 2758 caddr_t addr[4]; /* breakpoint addresses */ 2759 int i; 2760 2761 dr7 = rdr7(); 2762 if ((dr7 & 0x000000ff) == 0) { 2763 /* 2764 * all GE and LE bits in the dr7 register are zero, 2765 * thus the trap couldn't have been caused by the 2766 * hardware debug registers 2767 */ 2768 return 0; 2769 } 2770 2771 nbp = 0; 2772 dr6 = rdr6(); 2773 bp = dr6 & 0x0000000f; 2774 2775 if (!bp) { 2776 /* 2777 * None of the breakpoint bits are set meaning this 2778 * trap was not caused by any of the debug registers 2779 */ 2780 return 0; 2781 } 2782 2783 /* 2784 * at least one of the breakpoints were hit, check to see 2785 * which ones and if any of them are user space addresses 2786 */ 2787 2788 if (bp & 0x01) { 2789 addr[nbp++] = (caddr_t)rdr0(); 2790 } 2791 if (bp & 0x02) { 2792 addr[nbp++] = (caddr_t)rdr1(); 2793 } 2794 if (bp & 0x04) { 2795 addr[nbp++] = (caddr_t)rdr2(); 2796 } 2797 if (bp & 0x08) { 2798 addr[nbp++] = (caddr_t)rdr3(); 2799 } 2800 2801 for (i = 0; i < nbp; i++) { 2802 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2803 /* 2804 * addr[i] is in user space 2805 */ 2806 return nbp; 2807 } 2808 } 2809 2810 /* 2811 * None of the breakpoints are in user space. 2812 */ 2813 return 0; 2814 } 2815 2816 #ifdef KDB 2817 2818 /* 2819 * Provide inb() and outb() as functions. They are normally only 2820 * available as macros calling inlined functions, thus cannot be 2821 * called from the debugger. 2822 * 2823 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined. 2824 */ 2825 2826 #undef inb 2827 #undef outb 2828 2829 /* silence compiler warnings */ 2830 u_char inb(u_int); 2831 void outb(u_int, u_char); 2832 2833 u_char 2834 inb(u_int port) 2835 { 2836 u_char data; 2837 /* 2838 * We use %%dx and not %1 here because i/o is done at %dx and not at 2839 * %edx, while gcc generates inferior code (movw instead of movl) 2840 * if we tell it to load (u_short) port. 2841 */ 2842 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port)); 2843 return (data); 2844 } 2845 2846 void 2847 outb(u_int port, u_char data) 2848 { 2849 u_char al; 2850 /* 2851 * Use an unnecessary assignment to help gcc's register allocator. 2852 * This make a large difference for gcc-1.40 and a tiny difference 2853 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for 2854 * best results. gcc-2.6.0 can't handle this. 2855 */ 2856 al = data; 2857 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port)); 2858 } 2859 2860 #endif /* KDB */
Cache object: 7a12cde0166ab1145237568555eff2f5
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