Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pc98/pc98/machdep.c
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1 /*- 2 * Copyright (c) 1992 Terrence R. Lambert. 3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the University of 20 * California, Berkeley and its contributors. 21 * 4. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD: releng/8.2/sys/pc98/pc98/machdep.c 217031 2011-01-05 22:14:18Z gavin $"); 42 43 #include "opt_atalk.h" 44 #include "opt_compat.h" 45 #include "opt_cpu.h" 46 #include "opt_ddb.h" 47 #include "opt_inet.h" 48 #include "opt_ipx.h" 49 #include "opt_isa.h" 50 #include "opt_kstack_pages.h" 51 #include "opt_maxmem.h" 52 #include "opt_msgbuf.h" 53 #include "opt_npx.h" 54 #include "opt_perfmon.h" 55 56 #include <sys/param.h> 57 #include <sys/proc.h> 58 #include <sys/systm.h> 59 #include <sys/bio.h> 60 #include <sys/buf.h> 61 #include <sys/bus.h> 62 #include <sys/callout.h> 63 #include <sys/cons.h> 64 #include <sys/cpu.h> 65 #include <sys/eventhandler.h> 66 #include <sys/exec.h> 67 #include <sys/imgact.h> 68 #include <sys/kdb.h> 69 #include <sys/kernel.h> 70 #include <sys/ktr.h> 71 #include <sys/linker.h> 72 #include <sys/lock.h> 73 #include <sys/malloc.h> 74 #include <sys/memrange.h> 75 #include <sys/msgbuf.h> 76 #include <sys/mutex.h> 77 #include <sys/pcpu.h> 78 #include <sys/ptrace.h> 79 #include <sys/reboot.h> 80 #include <sys/sched.h> 81 #include <sys/signalvar.h> 82 #include <sys/sysctl.h> 83 #include <sys/sysent.h> 84 #include <sys/sysproto.h> 85 #include <sys/ucontext.h> 86 #include <sys/vmmeter.h> 87 88 #include <vm/vm.h> 89 #include <vm/vm_extern.h> 90 #include <vm/vm_kern.h> 91 #include <vm/vm_page.h> 92 #include <vm/vm_map.h> 93 #include <vm/vm_object.h> 94 #include <vm/vm_pager.h> 95 #include <vm/vm_param.h> 96 97 #ifdef DDB 98 #ifndef KDB 99 #error KDB must be enabled in order for DDB to work! 100 #endif 101 #include <ddb/ddb.h> 102 #include <ddb/db_sym.h> 103 #endif 104 105 #include <pc98/pc98/pc98_machdep.h> 106 107 #include <net/netisr.h> 108 109 #include <machine/bootinfo.h> 110 #include <machine/clock.h> 111 #include <machine/cpu.h> 112 #include <machine/cputypes.h> 113 #include <machine/intr_machdep.h> 114 #include <machine/mca.h> 115 #include <machine/md_var.h> 116 #include <machine/pc/bios.h> 117 #include <machine/pcb.h> 118 #include <machine/pcb_ext.h> 119 #include <machine/proc.h> 120 #include <machine/reg.h> 121 #include <machine/sigframe.h> 122 #include <machine/specialreg.h> 123 #include <machine/vm86.h> 124 #ifdef PERFMON 125 #include <machine/perfmon.h> 126 #endif 127 #ifdef SMP 128 #include <machine/smp.h> 129 #endif 130 131 #ifdef DEV_ISA 132 #include <i386/isa/icu.h> 133 #endif 134 135 /* Sanity check for __curthread() */ 136 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0); 137 138 extern void init386(int first); 139 extern void dblfault_handler(void); 140 141 extern void printcpuinfo(void); /* XXX header file */ 142 extern void finishidentcpu(void); 143 extern void panicifcpuunsupported(void); 144 extern void initializecpu(void); 145 146 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL) 147 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0) 148 149 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU) 150 #define CPU_ENABLE_SSE 151 #endif 152 153 static void cpu_startup(void *); 154 static void fpstate_drop(struct thread *td); 155 static void get_fpcontext(struct thread *td, mcontext_t *mcp); 156 static int set_fpcontext(struct thread *td, const mcontext_t *mcp); 157 #ifdef CPU_ENABLE_SSE 158 static void set_fpregs_xmm(struct save87 *, struct savexmm *); 159 static void fill_fpregs_xmm(struct savexmm *, struct save87 *); 160 #endif /* CPU_ENABLE_SSE */ 161 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 162 163 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */ 164 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */ 165 166 #ifdef DDB 167 extern vm_offset_t ksym_start, ksym_end; 168 #endif 169 170 int _udatasel, _ucodesel; 171 u_int basemem; 172 173 static int ispc98 = 1; 174 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, ""); 175 176 int cold = 1; 177 178 #ifdef COMPAT_43 179 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 180 #endif 181 #ifdef COMPAT_FREEBSD4 182 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask); 183 #endif 184 185 long Maxmem = 0; 186 long realmem = 0; 187 188 /* 189 * The number of PHYSMAP entries must be one less than the number of 190 * PHYSSEG entries because the PHYSMAP entry that spans the largest 191 * physical address that is accessible by ISA DMA is split into two 192 * PHYSSEG entries. 193 */ 194 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1)) 195 196 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 197 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2]; 198 199 /* must be 2 less so 0 0 can signal end of chunks */ 200 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2) 201 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2) 202 203 struct kva_md_info kmi; 204 205 static struct trapframe proc0_tf; 206 struct pcpu __pcpu[MAXCPU]; 207 208 struct mtx icu_lock; 209 210 struct mem_range_softc mem_range_softc; 211 212 static void 213 cpu_startup(dummy) 214 void *dummy; 215 { 216 uintmax_t memsize; 217 218 /* 219 * Good {morning,afternoon,evening,night}. 220 */ 221 startrtclock(); 222 printcpuinfo(); 223 panicifcpuunsupported(); 224 #ifdef PERFMON 225 perfmon_init(); 226 #endif 227 realmem = Maxmem; 228 229 /* 230 * Display physical memory. 231 */ 232 memsize = ptoa((uintmax_t)Maxmem); 233 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20); 234 235 /* 236 * Display any holes after the first chunk of extended memory. 237 */ 238 if (bootverbose) { 239 int indx; 240 241 printf("Physical memory chunk(s):\n"); 242 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 243 vm_paddr_t size; 244 245 size = phys_avail[indx + 1] - phys_avail[indx]; 246 printf( 247 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n", 248 (uintmax_t)phys_avail[indx], 249 (uintmax_t)phys_avail[indx + 1] - 1, 250 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE); 251 } 252 } 253 254 vm_ksubmap_init(&kmi); 255 256 printf("avail memory = %ju (%ju MB)\n", 257 ptoa((uintmax_t)cnt.v_free_count), 258 ptoa((uintmax_t)cnt.v_free_count) / 1048576); 259 260 /* 261 * Set up buffers, so they can be used to read disk labels. 262 */ 263 bufinit(); 264 vm_pager_bufferinit(); 265 cpu_setregs(); 266 } 267 268 /* 269 * Send an interrupt to process. 270 * 271 * Stack is set up to allow sigcode stored 272 * at top to call routine, followed by kcall 273 * to sigreturn routine below. After sigreturn 274 * resets the signal mask, the stack, and the 275 * frame pointer, it returns to the user 276 * specified pc, psl. 277 */ 278 #ifdef COMPAT_43 279 static void 280 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 281 { 282 struct osigframe sf, *fp; 283 struct proc *p; 284 struct thread *td; 285 struct sigacts *psp; 286 struct trapframe *regs; 287 int sig; 288 int oonstack; 289 290 td = curthread; 291 p = td->td_proc; 292 PROC_LOCK_ASSERT(p, MA_OWNED); 293 sig = ksi->ksi_signo; 294 psp = p->p_sigacts; 295 mtx_assert(&psp->ps_mtx, MA_OWNED); 296 regs = td->td_frame; 297 oonstack = sigonstack(regs->tf_esp); 298 299 /* Allocate space for the signal handler context. */ 300 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack && 301 SIGISMEMBER(psp->ps_sigonstack, sig)) { 302 fp = (struct osigframe *)(td->td_sigstk.ss_sp + 303 td->td_sigstk.ss_size - sizeof(struct osigframe)); 304 #if defined(COMPAT_43) 305 td->td_sigstk.ss_flags |= SS_ONSTACK; 306 #endif 307 } else 308 fp = (struct osigframe *)regs->tf_esp - 1; 309 310 /* Translate the signal if appropriate. */ 311 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 312 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 313 314 /* Build the argument list for the signal handler. */ 315 sf.sf_signum = sig; 316 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc; 317 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 318 /* Signal handler installed with SA_SIGINFO. */ 319 sf.sf_arg2 = (register_t)&fp->sf_siginfo; 320 sf.sf_siginfo.si_signo = sig; 321 sf.sf_siginfo.si_code = ksi->ksi_code; 322 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher; 323 } else { 324 /* Old FreeBSD-style arguments. */ 325 sf.sf_arg2 = ksi->ksi_code; 326 sf.sf_addr = (register_t)ksi->ksi_addr; 327 sf.sf_ahu.sf_handler = catcher; 328 } 329 mtx_unlock(&psp->ps_mtx); 330 PROC_UNLOCK(p); 331 332 /* Save most if not all of trap frame. */ 333 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax; 334 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx; 335 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx; 336 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx; 337 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi; 338 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi; 339 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs; 340 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds; 341 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss; 342 sf.sf_siginfo.si_sc.sc_es = regs->tf_es; 343 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs; 344 sf.sf_siginfo.si_sc.sc_gs = rgs(); 345 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp; 346 347 /* Build the signal context to be used by osigreturn(). */ 348 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0; 349 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask); 350 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp; 351 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp; 352 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip; 353 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags; 354 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno; 355 sf.sf_siginfo.si_sc.sc_err = regs->tf_err; 356 357 /* 358 * If we're a vm86 process, we want to save the segment registers. 359 * We also change eflags to be our emulated eflags, not the actual 360 * eflags. 361 */ 362 if (regs->tf_eflags & PSL_VM) { 363 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */ 364 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 365 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 366 367 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs; 368 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs; 369 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es; 370 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds; 371 372 if (vm86->vm86_has_vme == 0) 373 sf.sf_siginfo.si_sc.sc_ps = 374 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 375 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 376 377 /* See sendsig() for comments. */ 378 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 379 } 380 381 /* 382 * Copy the sigframe out to the user's stack. 383 */ 384 if (copyout(&sf, fp, sizeof(*fp)) != 0) { 385 #ifdef DEBUG 386 printf("process %ld has trashed its stack\n", (long)p->p_pid); 387 #endif 388 PROC_LOCK(p); 389 sigexit(td, SIGILL); 390 } 391 392 regs->tf_esp = (int)fp; 393 regs->tf_eip = PS_STRINGS - szosigcode; 394 regs->tf_eflags &= ~(PSL_T | PSL_D); 395 regs->tf_cs = _ucodesel; 396 regs->tf_ds = _udatasel; 397 regs->tf_es = _udatasel; 398 regs->tf_fs = _udatasel; 399 load_gs(_udatasel); 400 regs->tf_ss = _udatasel; 401 PROC_LOCK(p); 402 mtx_lock(&psp->ps_mtx); 403 } 404 #endif /* COMPAT_43 */ 405 406 #ifdef COMPAT_FREEBSD4 407 static void 408 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 409 { 410 struct sigframe4 sf, *sfp; 411 struct proc *p; 412 struct thread *td; 413 struct sigacts *psp; 414 struct trapframe *regs; 415 int sig; 416 int oonstack; 417 418 td = curthread; 419 p = td->td_proc; 420 PROC_LOCK_ASSERT(p, MA_OWNED); 421 sig = ksi->ksi_signo; 422 psp = p->p_sigacts; 423 mtx_assert(&psp->ps_mtx, MA_OWNED); 424 regs = td->td_frame; 425 oonstack = sigonstack(regs->tf_esp); 426 427 /* Save user context. */ 428 bzero(&sf, sizeof(sf)); 429 sf.sf_uc.uc_sigmask = *mask; 430 sf.sf_uc.uc_stack = td->td_sigstk; 431 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 432 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 433 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 434 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 435 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 436 437 /* Allocate space for the signal handler context. */ 438 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 439 SIGISMEMBER(psp->ps_sigonstack, sig)) { 440 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp + 441 td->td_sigstk.ss_size - sizeof(struct sigframe4)); 442 #if defined(COMPAT_43) 443 td->td_sigstk.ss_flags |= SS_ONSTACK; 444 #endif 445 } else 446 sfp = (struct sigframe4 *)regs->tf_esp - 1; 447 448 /* Translate the signal if appropriate. */ 449 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 450 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 451 452 /* Build the argument list for the signal handler. */ 453 sf.sf_signum = sig; 454 sf.sf_ucontext = (register_t)&sfp->sf_uc; 455 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 456 /* Signal handler installed with SA_SIGINFO. */ 457 sf.sf_siginfo = (register_t)&sfp->sf_si; 458 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 459 460 /* Fill in POSIX parts */ 461 sf.sf_si.si_signo = sig; 462 sf.sf_si.si_code = ksi->ksi_code; 463 sf.sf_si.si_addr = ksi->ksi_addr; 464 } else { 465 /* Old FreeBSD-style arguments. */ 466 sf.sf_siginfo = ksi->ksi_code; 467 sf.sf_addr = (register_t)ksi->ksi_addr; 468 sf.sf_ahu.sf_handler = catcher; 469 } 470 mtx_unlock(&psp->ps_mtx); 471 PROC_UNLOCK(p); 472 473 /* 474 * If we're a vm86 process, we want to save the segment registers. 475 * We also change eflags to be our emulated eflags, not the actual 476 * eflags. 477 */ 478 if (regs->tf_eflags & PSL_VM) { 479 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 480 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 481 482 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 483 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 484 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 485 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 486 487 if (vm86->vm86_has_vme == 0) 488 sf.sf_uc.uc_mcontext.mc_eflags = 489 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 490 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 491 492 /* 493 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 494 * syscalls made by the signal handler. This just avoids 495 * wasting time for our lazy fixup of such faults. PSL_NT 496 * does nothing in vm86 mode, but vm86 programs can set it 497 * almost legitimately in probes for old cpu types. 498 */ 499 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 500 } 501 502 /* 503 * Copy the sigframe out to the user's stack. 504 */ 505 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 506 #ifdef DEBUG 507 printf("process %ld has trashed its stack\n", (long)p->p_pid); 508 #endif 509 PROC_LOCK(p); 510 sigexit(td, SIGILL); 511 } 512 513 regs->tf_esp = (int)sfp; 514 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode; 515 regs->tf_eflags &= ~(PSL_T | PSL_D); 516 regs->tf_cs = _ucodesel; 517 regs->tf_ds = _udatasel; 518 regs->tf_es = _udatasel; 519 regs->tf_fs = _udatasel; 520 regs->tf_ss = _udatasel; 521 PROC_LOCK(p); 522 mtx_lock(&psp->ps_mtx); 523 } 524 #endif /* COMPAT_FREEBSD4 */ 525 526 void 527 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 528 { 529 struct sigframe sf, *sfp; 530 struct proc *p; 531 struct thread *td; 532 struct sigacts *psp; 533 char *sp; 534 struct trapframe *regs; 535 struct segment_descriptor *sdp; 536 int sig; 537 int oonstack; 538 539 td = curthread; 540 p = td->td_proc; 541 PROC_LOCK_ASSERT(p, MA_OWNED); 542 sig = ksi->ksi_signo; 543 psp = p->p_sigacts; 544 mtx_assert(&psp->ps_mtx, MA_OWNED); 545 #ifdef COMPAT_FREEBSD4 546 if (SIGISMEMBER(psp->ps_freebsd4, sig)) { 547 freebsd4_sendsig(catcher, ksi, mask); 548 return; 549 } 550 #endif 551 #ifdef COMPAT_43 552 if (SIGISMEMBER(psp->ps_osigset, sig)) { 553 osendsig(catcher, ksi, mask); 554 return; 555 } 556 #endif 557 regs = td->td_frame; 558 oonstack = sigonstack(regs->tf_esp); 559 560 /* Save user context. */ 561 bzero(&sf, sizeof(sf)); 562 sf.sf_uc.uc_sigmask = *mask; 563 sf.sf_uc.uc_stack = td->td_sigstk; 564 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 565 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 566 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; 567 sf.sf_uc.uc_mcontext.mc_gs = rgs(); 568 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs)); 569 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */ 570 get_fpcontext(td, &sf.sf_uc.uc_mcontext); 571 fpstate_drop(td); 572 /* 573 * Unconditionally fill the fsbase and gsbase into the mcontext. 574 */ 575 sdp = &td->td_pcb->pcb_fsd; 576 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 | 577 sdp->sd_lobase; 578 sdp = &td->td_pcb->pcb_gsd; 579 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 | 580 sdp->sd_lobase; 581 582 /* Allocate space for the signal handler context. */ 583 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 584 SIGISMEMBER(psp->ps_sigonstack, sig)) { 585 sp = td->td_sigstk.ss_sp + 586 td->td_sigstk.ss_size - sizeof(struct sigframe); 587 #if defined(COMPAT_43) 588 td->td_sigstk.ss_flags |= SS_ONSTACK; 589 #endif 590 } else 591 sp = (char *)regs->tf_esp - sizeof(struct sigframe); 592 /* Align to 16 bytes. */ 593 sfp = (struct sigframe *)((unsigned int)sp & ~0xF); 594 595 /* Translate the signal if appropriate. */ 596 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize) 597 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)]; 598 599 /* Build the argument list for the signal handler. */ 600 sf.sf_signum = sig; 601 sf.sf_ucontext = (register_t)&sfp->sf_uc; 602 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 603 /* Signal handler installed with SA_SIGINFO. */ 604 sf.sf_siginfo = (register_t)&sfp->sf_si; 605 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; 606 607 /* Fill in POSIX parts */ 608 sf.sf_si = ksi->ksi_info; 609 sf.sf_si.si_signo = sig; /* maybe a translated signal */ 610 } else { 611 /* Old FreeBSD-style arguments. */ 612 sf.sf_siginfo = ksi->ksi_code; 613 sf.sf_addr = (register_t)ksi->ksi_addr; 614 sf.sf_ahu.sf_handler = catcher; 615 } 616 mtx_unlock(&psp->ps_mtx); 617 PROC_UNLOCK(p); 618 619 /* 620 * If we're a vm86 process, we want to save the segment registers. 621 * We also change eflags to be our emulated eflags, not the actual 622 * eflags. 623 */ 624 if (regs->tf_eflags & PSL_VM) { 625 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 626 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86; 627 628 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs; 629 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs; 630 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es; 631 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds; 632 633 if (vm86->vm86_has_vme == 0) 634 sf.sf_uc.uc_mcontext.mc_eflags = 635 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) | 636 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP)); 637 638 /* 639 * Clear PSL_NT to inhibit T_TSSFLT faults on return from 640 * syscalls made by the signal handler. This just avoids 641 * wasting time for our lazy fixup of such faults. PSL_NT 642 * does nothing in vm86 mode, but vm86 programs can set it 643 * almost legitimately in probes for old cpu types. 644 */ 645 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP); 646 } 647 648 /* 649 * Copy the sigframe out to the user's stack. 650 */ 651 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) { 652 #ifdef DEBUG 653 printf("process %ld has trashed its stack\n", (long)p->p_pid); 654 #endif 655 PROC_LOCK(p); 656 sigexit(td, SIGILL); 657 } 658 659 regs->tf_esp = (int)sfp; 660 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode); 661 regs->tf_eflags &= ~(PSL_T | PSL_D); 662 regs->tf_cs = _ucodesel; 663 regs->tf_ds = _udatasel; 664 regs->tf_es = _udatasel; 665 regs->tf_fs = _udatasel; 666 regs->tf_ss = _udatasel; 667 PROC_LOCK(p); 668 mtx_lock(&psp->ps_mtx); 669 } 670 671 /* 672 * System call to cleanup state after a signal 673 * has been taken. Reset signal mask and 674 * stack state from context left by sendsig (above). 675 * Return to previous pc and psl as specified by 676 * context left by sendsig. Check carefully to 677 * make sure that the user has not modified the 678 * state to gain improper privileges. 679 * 680 * MPSAFE 681 */ 682 #ifdef COMPAT_43 683 int 684 osigreturn(td, uap) 685 struct thread *td; 686 struct osigreturn_args /* { 687 struct osigcontext *sigcntxp; 688 } */ *uap; 689 { 690 struct osigcontext sc; 691 struct trapframe *regs; 692 struct osigcontext *scp; 693 int eflags, error; 694 ksiginfo_t ksi; 695 696 regs = td->td_frame; 697 error = copyin(uap->sigcntxp, &sc, sizeof(sc)); 698 if (error != 0) 699 return (error); 700 scp = ≻ 701 eflags = scp->sc_ps; 702 if (eflags & PSL_VM) { 703 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 704 struct vm86_kernel *vm86; 705 706 /* 707 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 708 * set up the vm86 area, and we can't enter vm86 mode. 709 */ 710 if (td->td_pcb->pcb_ext == 0) 711 return (EINVAL); 712 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 713 if (vm86->vm86_inited == 0) 714 return (EINVAL); 715 716 /* Go back to user mode if both flags are set. */ 717 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 718 ksiginfo_init_trap(&ksi); 719 ksi.ksi_signo = SIGBUS; 720 ksi.ksi_code = BUS_OBJERR; 721 ksi.ksi_addr = (void *)regs->tf_eip; 722 trapsignal(td, &ksi); 723 } 724 725 if (vm86->vm86_has_vme) { 726 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 727 (eflags & VME_USERCHANGE) | PSL_VM; 728 } else { 729 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 730 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 731 (eflags & VM_USERCHANGE) | PSL_VM; 732 } 733 tf->tf_vm86_ds = scp->sc_ds; 734 tf->tf_vm86_es = scp->sc_es; 735 tf->tf_vm86_fs = scp->sc_fs; 736 tf->tf_vm86_gs = scp->sc_gs; 737 tf->tf_ds = _udatasel; 738 tf->tf_es = _udatasel; 739 tf->tf_fs = _udatasel; 740 } else { 741 /* 742 * Don't allow users to change privileged or reserved flags. 743 */ 744 /* 745 * XXX do allow users to change the privileged flag PSL_RF. 746 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 747 * should sometimes set it there too. tf_eflags is kept in 748 * the signal context during signal handling and there is no 749 * other place to remember it, so the PSL_RF bit may be 750 * corrupted by the signal handler without us knowing. 751 * Corruption of the PSL_RF bit at worst causes one more or 752 * one less debugger trap, so allowing it is fairly harmless. 753 */ 754 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 755 return (EINVAL); 756 } 757 758 /* 759 * Don't allow users to load a valid privileged %cs. Let the 760 * hardware check for invalid selectors, excess privilege in 761 * other selectors, invalid %eip's and invalid %esp's. 762 */ 763 if (!CS_SECURE(scp->sc_cs)) { 764 ksiginfo_init_trap(&ksi); 765 ksi.ksi_signo = SIGBUS; 766 ksi.ksi_code = BUS_OBJERR; 767 ksi.ksi_trapno = T_PROTFLT; 768 ksi.ksi_addr = (void *)regs->tf_eip; 769 trapsignal(td, &ksi); 770 return (EINVAL); 771 } 772 regs->tf_ds = scp->sc_ds; 773 regs->tf_es = scp->sc_es; 774 regs->tf_fs = scp->sc_fs; 775 } 776 777 /* Restore remaining registers. */ 778 regs->tf_eax = scp->sc_eax; 779 regs->tf_ebx = scp->sc_ebx; 780 regs->tf_ecx = scp->sc_ecx; 781 regs->tf_edx = scp->sc_edx; 782 regs->tf_esi = scp->sc_esi; 783 regs->tf_edi = scp->sc_edi; 784 regs->tf_cs = scp->sc_cs; 785 regs->tf_ss = scp->sc_ss; 786 regs->tf_isp = scp->sc_isp; 787 regs->tf_ebp = scp->sc_fp; 788 regs->tf_esp = scp->sc_sp; 789 regs->tf_eip = scp->sc_pc; 790 regs->tf_eflags = eflags; 791 792 #if defined(COMPAT_43) 793 if (scp->sc_onstack & 1) 794 td->td_sigstk.ss_flags |= SS_ONSTACK; 795 else 796 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 797 #endif 798 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL, 799 SIGPROCMASK_OLD); 800 return (EJUSTRETURN); 801 } 802 #endif /* COMPAT_43 */ 803 804 #ifdef COMPAT_FREEBSD4 805 /* 806 * MPSAFE 807 */ 808 int 809 freebsd4_sigreturn(td, uap) 810 struct thread *td; 811 struct freebsd4_sigreturn_args /* { 812 const ucontext4 *sigcntxp; 813 } */ *uap; 814 { 815 struct ucontext4 uc; 816 struct trapframe *regs; 817 struct ucontext4 *ucp; 818 int cs, eflags, error; 819 ksiginfo_t ksi; 820 821 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 822 if (error != 0) 823 return (error); 824 ucp = &uc; 825 regs = td->td_frame; 826 eflags = ucp->uc_mcontext.mc_eflags; 827 if (eflags & PSL_VM) { 828 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 829 struct vm86_kernel *vm86; 830 831 /* 832 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 833 * set up the vm86 area, and we can't enter vm86 mode. 834 */ 835 if (td->td_pcb->pcb_ext == 0) 836 return (EINVAL); 837 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 838 if (vm86->vm86_inited == 0) 839 return (EINVAL); 840 841 /* Go back to user mode if both flags are set. */ 842 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 843 ksiginfo_init_trap(&ksi); 844 ksi.ksi_signo = SIGBUS; 845 ksi.ksi_code = BUS_OBJERR; 846 ksi.ksi_addr = (void *)regs->tf_eip; 847 trapsignal(td, &ksi); 848 } 849 if (vm86->vm86_has_vme) { 850 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 851 (eflags & VME_USERCHANGE) | PSL_VM; 852 } else { 853 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 854 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 855 (eflags & VM_USERCHANGE) | PSL_VM; 856 } 857 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 858 tf->tf_eflags = eflags; 859 tf->tf_vm86_ds = tf->tf_ds; 860 tf->tf_vm86_es = tf->tf_es; 861 tf->tf_vm86_fs = tf->tf_fs; 862 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 863 tf->tf_ds = _udatasel; 864 tf->tf_es = _udatasel; 865 tf->tf_fs = _udatasel; 866 } else { 867 /* 868 * Don't allow users to change privileged or reserved flags. 869 */ 870 /* 871 * XXX do allow users to change the privileged flag PSL_RF. 872 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 873 * should sometimes set it there too. tf_eflags is kept in 874 * the signal context during signal handling and there is no 875 * other place to remember it, so the PSL_RF bit may be 876 * corrupted by the signal handler without us knowing. 877 * Corruption of the PSL_RF bit at worst causes one more or 878 * one less debugger trap, so allowing it is fairly harmless. 879 */ 880 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 881 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n", 882 td->td_proc->p_pid, td->td_name, eflags); 883 return (EINVAL); 884 } 885 886 /* 887 * Don't allow users to load a valid privileged %cs. Let the 888 * hardware check for invalid selectors, excess privilege in 889 * other selectors, invalid %eip's and invalid %esp's. 890 */ 891 cs = ucp->uc_mcontext.mc_cs; 892 if (!CS_SECURE(cs)) { 893 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n", 894 td->td_proc->p_pid, td->td_name, cs); 895 ksiginfo_init_trap(&ksi); 896 ksi.ksi_signo = SIGBUS; 897 ksi.ksi_code = BUS_OBJERR; 898 ksi.ksi_trapno = T_PROTFLT; 899 ksi.ksi_addr = (void *)regs->tf_eip; 900 trapsignal(td, &ksi); 901 return (EINVAL); 902 } 903 904 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 905 } 906 907 #if defined(COMPAT_43) 908 if (ucp->uc_mcontext.mc_onstack & 1) 909 td->td_sigstk.ss_flags |= SS_ONSTACK; 910 else 911 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 912 #endif 913 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 914 return (EJUSTRETURN); 915 } 916 #endif /* COMPAT_FREEBSD4 */ 917 918 /* 919 * MPSAFE 920 */ 921 int 922 sigreturn(td, uap) 923 struct thread *td; 924 struct sigreturn_args /* { 925 const struct __ucontext *sigcntxp; 926 } */ *uap; 927 { 928 ucontext_t uc; 929 struct trapframe *regs; 930 ucontext_t *ucp; 931 int cs, eflags, error, ret; 932 ksiginfo_t ksi; 933 934 error = copyin(uap->sigcntxp, &uc, sizeof(uc)); 935 if (error != 0) 936 return (error); 937 ucp = &uc; 938 regs = td->td_frame; 939 eflags = ucp->uc_mcontext.mc_eflags; 940 if (eflags & PSL_VM) { 941 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs; 942 struct vm86_kernel *vm86; 943 944 /* 945 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't 946 * set up the vm86 area, and we can't enter vm86 mode. 947 */ 948 if (td->td_pcb->pcb_ext == 0) 949 return (EINVAL); 950 vm86 = &td->td_pcb->pcb_ext->ext_vm86; 951 if (vm86->vm86_inited == 0) 952 return (EINVAL); 953 954 /* Go back to user mode if both flags are set. */ 955 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) { 956 ksiginfo_init_trap(&ksi); 957 ksi.ksi_signo = SIGBUS; 958 ksi.ksi_code = BUS_OBJERR; 959 ksi.ksi_addr = (void *)regs->tf_eip; 960 trapsignal(td, &ksi); 961 } 962 963 if (vm86->vm86_has_vme) { 964 eflags = (tf->tf_eflags & ~VME_USERCHANGE) | 965 (eflags & VME_USERCHANGE) | PSL_VM; 966 } else { 967 vm86->vm86_eflags = eflags; /* save VIF, VIP */ 968 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | 969 (eflags & VM_USERCHANGE) | PSL_VM; 970 } 971 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe)); 972 tf->tf_eflags = eflags; 973 tf->tf_vm86_ds = tf->tf_ds; 974 tf->tf_vm86_es = tf->tf_es; 975 tf->tf_vm86_fs = tf->tf_fs; 976 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs; 977 tf->tf_ds = _udatasel; 978 tf->tf_es = _udatasel; 979 tf->tf_fs = _udatasel; 980 } else { 981 /* 982 * Don't allow users to change privileged or reserved flags. 983 */ 984 /* 985 * XXX do allow users to change the privileged flag PSL_RF. 986 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers 987 * should sometimes set it there too. tf_eflags is kept in 988 * the signal context during signal handling and there is no 989 * other place to remember it, so the PSL_RF bit may be 990 * corrupted by the signal handler without us knowing. 991 * Corruption of the PSL_RF bit at worst causes one more or 992 * one less debugger trap, so allowing it is fairly harmless. 993 */ 994 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) { 995 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n", 996 td->td_proc->p_pid, td->td_name, eflags); 997 return (EINVAL); 998 } 999 1000 /* 1001 * Don't allow users to load a valid privileged %cs. Let the 1002 * hardware check for invalid selectors, excess privilege in 1003 * other selectors, invalid %eip's and invalid %esp's. 1004 */ 1005 cs = ucp->uc_mcontext.mc_cs; 1006 if (!CS_SECURE(cs)) { 1007 uprintf("pid %d (%s): sigreturn cs = 0x%x\n", 1008 td->td_proc->p_pid, td->td_name, cs); 1009 ksiginfo_init_trap(&ksi); 1010 ksi.ksi_signo = SIGBUS; 1011 ksi.ksi_code = BUS_OBJERR; 1012 ksi.ksi_trapno = T_PROTFLT; 1013 ksi.ksi_addr = (void *)regs->tf_eip; 1014 trapsignal(td, &ksi); 1015 return (EINVAL); 1016 } 1017 1018 ret = set_fpcontext(td, &ucp->uc_mcontext); 1019 if (ret != 0) 1020 return (ret); 1021 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs)); 1022 } 1023 1024 #if defined(COMPAT_43) 1025 if (ucp->uc_mcontext.mc_onstack & 1) 1026 td->td_sigstk.ss_flags |= SS_ONSTACK; 1027 else 1028 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1029 #endif 1030 1031 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0); 1032 return (EJUSTRETURN); 1033 } 1034 1035 /* 1036 * Machine dependent boot() routine 1037 * 1038 * I haven't seen anything to put here yet 1039 * Possibly some stuff might be grafted back here from boot() 1040 */ 1041 void 1042 cpu_boot(int howto) 1043 { 1044 } 1045 1046 /* 1047 * Flush the D-cache for non-DMA I/O so that the I-cache can 1048 * be made coherent later. 1049 */ 1050 void 1051 cpu_flush_dcache(void *ptr, size_t len) 1052 { 1053 /* Not applicable */ 1054 } 1055 1056 /* Get current clock frequency for the given cpu id. */ 1057 int 1058 cpu_est_clockrate(int cpu_id, uint64_t *rate) 1059 { 1060 register_t reg; 1061 uint64_t tsc1, tsc2; 1062 1063 if (pcpu_find(cpu_id) == NULL || rate == NULL) 1064 return (EINVAL); 1065 if (!tsc_present) 1066 return (EOPNOTSUPP); 1067 1068 /* If we're booting, trust the rate calibrated moments ago. */ 1069 if (cold) { 1070 *rate = tsc_freq; 1071 return (0); 1072 } 1073 1074 #ifdef SMP 1075 /* Schedule ourselves on the indicated cpu. */ 1076 thread_lock(curthread); 1077 sched_bind(curthread, cpu_id); 1078 thread_unlock(curthread); 1079 #endif 1080 1081 /* Calibrate by measuring a short delay. */ 1082 reg = intr_disable(); 1083 tsc1 = rdtsc(); 1084 DELAY(1000); 1085 tsc2 = rdtsc(); 1086 intr_restore(reg); 1087 1088 #ifdef SMP 1089 thread_lock(curthread); 1090 sched_unbind(curthread); 1091 thread_unlock(curthread); 1092 #endif 1093 1094 /* 1095 * Calculate the difference in readings, convert to Mhz, and 1096 * subtract 0.5% of the total. Empirical testing has shown that 1097 * overhead in DELAY() works out to approximately this value. 1098 */ 1099 tsc2 -= tsc1; 1100 *rate = tsc2 * 1000 - tsc2 * 5; 1101 return (0); 1102 } 1103 1104 1105 /* 1106 * Shutdown the CPU as much as possible 1107 */ 1108 void 1109 cpu_halt(void) 1110 { 1111 for (;;) 1112 __asm__ ("hlt"); 1113 } 1114 1115 static void 1116 cpu_idle_hlt(int busy) 1117 { 1118 /* 1119 * we must absolutely guarentee that hlt is the next instruction 1120 * after sti or we introduce a timing window. 1121 */ 1122 disable_intr(); 1123 if (sched_runnable()) 1124 enable_intr(); 1125 else 1126 __asm __volatile("sti; hlt"); 1127 } 1128 1129 static void 1130 cpu_idle_spin(int busy) 1131 { 1132 return; 1133 } 1134 1135 void (*cpu_idle_fn)(int) = cpu_idle_hlt; 1136 1137 void 1138 cpu_idle(int busy) 1139 { 1140 #if defined(SMP) 1141 if (mp_grab_cpu_hlt()) 1142 return; 1143 #endif 1144 cpu_idle_fn(busy); 1145 } 1146 1147 /* 1148 * mwait cpu power states. Lower 4 bits are sub-states. 1149 */ 1150 #define MWAIT_C0 0xf0 1151 #define MWAIT_C1 0x00 1152 #define MWAIT_C2 0x10 1153 #define MWAIT_C3 0x20 1154 #define MWAIT_C4 0x30 1155 1156 #define MWAIT_DISABLED 0x0 1157 #define MWAIT_WOKEN 0x1 1158 #define MWAIT_WAITING 0x2 1159 1160 static void 1161 cpu_idle_mwait(int busy) 1162 { 1163 int *mwait; 1164 1165 mwait = (int *)PCPU_PTR(monitorbuf); 1166 *mwait = MWAIT_WAITING; 1167 if (sched_runnable()) 1168 return; 1169 cpu_monitor(mwait, 0, 0); 1170 if (*mwait == MWAIT_WAITING) 1171 cpu_mwait(0, MWAIT_C1); 1172 } 1173 1174 static void 1175 cpu_idle_mwait_hlt(int busy) 1176 { 1177 int *mwait; 1178 1179 mwait = (int *)PCPU_PTR(monitorbuf); 1180 if (busy == 0) { 1181 *mwait = MWAIT_DISABLED; 1182 cpu_idle_hlt(busy); 1183 return; 1184 } 1185 *mwait = MWAIT_WAITING; 1186 if (sched_runnable()) 1187 return; 1188 cpu_monitor(mwait, 0, 0); 1189 if (*mwait == MWAIT_WAITING) 1190 cpu_mwait(0, MWAIT_C1); 1191 } 1192 1193 int 1194 cpu_idle_wakeup(int cpu) 1195 { 1196 struct pcpu *pcpu; 1197 int *mwait; 1198 1199 if (cpu_idle_fn == cpu_idle_spin) 1200 return (1); 1201 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt) 1202 return (0); 1203 pcpu = pcpu_find(cpu); 1204 mwait = (int *)pcpu->pc_monitorbuf; 1205 /* 1206 * This doesn't need to be atomic since missing the race will 1207 * simply result in unnecessary IPIs. 1208 */ 1209 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED) 1210 return (0); 1211 *mwait = MWAIT_WOKEN; 1212 1213 return (1); 1214 } 1215 1216 /* 1217 * Ordered by speed/power consumption. 1218 */ 1219 struct { 1220 void *id_fn; 1221 char *id_name; 1222 } idle_tbl[] = { 1223 { cpu_idle_spin, "spin" }, 1224 { cpu_idle_mwait, "mwait" }, 1225 { cpu_idle_mwait_hlt, "mwait_hlt" }, 1226 { cpu_idle_hlt, "hlt" }, 1227 { NULL, NULL } 1228 }; 1229 1230 static int 1231 idle_sysctl_available(SYSCTL_HANDLER_ARGS) 1232 { 1233 char *avail, *p; 1234 int error; 1235 int i; 1236 1237 avail = malloc(256, M_TEMP, M_WAITOK); 1238 p = avail; 1239 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 1240 if (strstr(idle_tbl[i].id_name, "mwait") && 1241 (cpu_feature2 & CPUID2_MON) == 0) 1242 continue; 1243 p += sprintf(p, "%s, ", idle_tbl[i].id_name); 1244 } 1245 error = sysctl_handle_string(oidp, avail, 0, req); 1246 free(avail, M_TEMP); 1247 return (error); 1248 } 1249 1250 static int 1251 idle_sysctl(SYSCTL_HANDLER_ARGS) 1252 { 1253 char buf[16]; 1254 int error; 1255 char *p; 1256 int i; 1257 1258 p = "unknown"; 1259 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 1260 if (idle_tbl[i].id_fn == cpu_idle_fn) { 1261 p = idle_tbl[i].id_name; 1262 break; 1263 } 1264 } 1265 strncpy(buf, p, sizeof(buf)); 1266 error = sysctl_handle_string(oidp, buf, sizeof(buf), req); 1267 if (error != 0 || req->newptr == NULL) 1268 return (error); 1269 for (i = 0; idle_tbl[i].id_name != NULL; i++) { 1270 if (strstr(idle_tbl[i].id_name, "mwait") && 1271 (cpu_feature2 & CPUID2_MON) == 0) 1272 continue; 1273 if (strcmp(idle_tbl[i].id_name, buf)) 1274 continue; 1275 cpu_idle_fn = idle_tbl[i].id_fn; 1276 return (0); 1277 } 1278 return (EINVAL); 1279 } 1280 1281 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD, 1282 0, 0, idle_sysctl_available, "A", "list of available idle functions"); 1283 1284 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0, 1285 idle_sysctl, "A", "currently selected idle function"); 1286 1287 /* 1288 * Reset registers to default values on exec. 1289 */ 1290 void 1291 exec_setregs(td, entry, stack, ps_strings) 1292 struct thread *td; 1293 u_long entry; 1294 u_long stack; 1295 u_long ps_strings; 1296 { 1297 struct trapframe *regs = td->td_frame; 1298 struct pcb *pcb = td->td_pcb; 1299 1300 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */ 1301 pcb->pcb_gs = _udatasel; 1302 load_gs(_udatasel); 1303 1304 mtx_lock_spin(&dt_lock); 1305 if (td->td_proc->p_md.md_ldt) 1306 user_ldt_free(td); 1307 else 1308 mtx_unlock_spin(&dt_lock); 1309 1310 bzero((char *)regs, sizeof(struct trapframe)); 1311 regs->tf_eip = entry; 1312 regs->tf_esp = stack; 1313 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T); 1314 regs->tf_ss = _udatasel; 1315 regs->tf_ds = _udatasel; 1316 regs->tf_es = _udatasel; 1317 regs->tf_fs = _udatasel; 1318 regs->tf_cs = _ucodesel; 1319 1320 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */ 1321 regs->tf_ebx = ps_strings; 1322 1323 /* 1324 * Reset the hardware debug registers if they were in use. 1325 * They won't have any meaning for the newly exec'd process. 1326 */ 1327 if (pcb->pcb_flags & PCB_DBREGS) { 1328 pcb->pcb_dr0 = 0; 1329 pcb->pcb_dr1 = 0; 1330 pcb->pcb_dr2 = 0; 1331 pcb->pcb_dr3 = 0; 1332 pcb->pcb_dr6 = 0; 1333 pcb->pcb_dr7 = 0; 1334 if (pcb == PCPU_GET(curpcb)) { 1335 /* 1336 * Clear the debug registers on the running 1337 * CPU, otherwise they will end up affecting 1338 * the next process we switch to. 1339 */ 1340 reset_dbregs(); 1341 } 1342 pcb->pcb_flags &= ~PCB_DBREGS; 1343 } 1344 1345 /* 1346 * Initialize the math emulator (if any) for the current process. 1347 * Actually, just clear the bit that says that the emulator has 1348 * been initialized. Initialization is delayed until the process 1349 * traps to the emulator (if it is done at all) mainly because 1350 * emulators don't provide an entry point for initialization. 1351 */ 1352 td->td_pcb->pcb_flags &= ~FP_SOFTFP; 1353 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__; 1354 1355 /* 1356 * Drop the FP state if we hold it, so that the process gets a 1357 * clean FP state if it uses the FPU again. 1358 */ 1359 fpstate_drop(td); 1360 1361 /* 1362 * XXX - Linux emulator 1363 * Make sure sure edx is 0x0 on entry. Linux binaries depend 1364 * on it. 1365 */ 1366 td->td_retval[1] = 0; 1367 } 1368 1369 void 1370 cpu_setregs(void) 1371 { 1372 unsigned int cr0; 1373 1374 cr0 = rcr0(); 1375 1376 /* 1377 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support: 1378 * 1379 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT 1380 * instructions. We must set the CR0_MP bit and use the CR0_TS 1381 * bit to control the trap, because setting the CR0_EM bit does 1382 * not cause WAIT instructions to trap. It's important to trap 1383 * WAIT instructions - otherwise the "wait" variants of no-wait 1384 * control instructions would degenerate to the "no-wait" variants 1385 * after FP context switches but work correctly otherwise. It's 1386 * particularly important to trap WAITs when there is no NPX - 1387 * otherwise the "wait" variants would always degenerate. 1388 * 1389 * Try setting CR0_NE to get correct error reporting on 486DX's. 1390 * Setting it should fail or do nothing on lesser processors. 1391 */ 1392 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM; 1393 load_cr0(cr0); 1394 load_gs(_udatasel); 1395 } 1396 1397 u_long bootdev; /* not a struct cdev *- encoding is different */ 1398 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev, 1399 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)"); 1400 1401 /* 1402 * Initialize 386 and configure to run kernel 1403 */ 1404 1405 /* 1406 * Initialize segments & interrupt table 1407 */ 1408 1409 int _default_ldt; 1410 1411 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */ 1412 union descriptor ldt[NLDT]; /* local descriptor table */ 1413 static struct gate_descriptor idt0[NIDT]; 1414 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */ 1415 struct region_descriptor r_gdt, r_idt; /* table descriptors */ 1416 struct mtx dt_lock; /* lock for GDT and LDT */ 1417 1418 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 1419 extern int has_f00f_bug; 1420 #endif 1421 1422 static struct i386tss dblfault_tss; 1423 static char dblfault_stack[PAGE_SIZE]; 1424 1425 extern vm_offset_t proc0kstack; 1426 1427 1428 /* 1429 * software prototypes -- in more palatable form. 1430 * 1431 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret 1432 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it) 1433 */ 1434 struct soft_segment_descriptor gdt_segs[] = { 1435 /* GNULL_SEL 0 Null Descriptor */ 1436 { .ssd_base = 0x0, 1437 .ssd_limit = 0x0, 1438 .ssd_type = 0, 1439 .ssd_dpl = SEL_KPL, 1440 .ssd_p = 0, 1441 .ssd_xx = 0, .ssd_xx1 = 0, 1442 .ssd_def32 = 0, 1443 .ssd_gran = 0 }, 1444 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */ 1445 { .ssd_base = 0x0, 1446 .ssd_limit = 0xfffff, 1447 .ssd_type = SDT_MEMRWA, 1448 .ssd_dpl = SEL_KPL, 1449 .ssd_p = 1, 1450 .ssd_xx = 0, .ssd_xx1 = 0, 1451 .ssd_def32 = 1, 1452 .ssd_gran = 1 }, 1453 /* GUFS_SEL 2 %fs Descriptor for user */ 1454 { .ssd_base = 0x0, 1455 .ssd_limit = 0xfffff, 1456 .ssd_type = SDT_MEMRWA, 1457 .ssd_dpl = SEL_UPL, 1458 .ssd_p = 1, 1459 .ssd_xx = 0, .ssd_xx1 = 0, 1460 .ssd_def32 = 1, 1461 .ssd_gran = 1 }, 1462 /* GUGS_SEL 3 %gs Descriptor for user */ 1463 { .ssd_base = 0x0, 1464 .ssd_limit = 0xfffff, 1465 .ssd_type = SDT_MEMRWA, 1466 .ssd_dpl = SEL_UPL, 1467 .ssd_p = 1, 1468 .ssd_xx = 0, .ssd_xx1 = 0, 1469 .ssd_def32 = 1, 1470 .ssd_gran = 1 }, 1471 /* GCODE_SEL 4 Code Descriptor for kernel */ 1472 { .ssd_base = 0x0, 1473 .ssd_limit = 0xfffff, 1474 .ssd_type = SDT_MEMERA, 1475 .ssd_dpl = SEL_KPL, 1476 .ssd_p = 1, 1477 .ssd_xx = 0, .ssd_xx1 = 0, 1478 .ssd_def32 = 1, 1479 .ssd_gran = 1 }, 1480 /* GDATA_SEL 5 Data Descriptor for kernel */ 1481 { .ssd_base = 0x0, 1482 .ssd_limit = 0xfffff, 1483 .ssd_type = SDT_MEMRWA, 1484 .ssd_dpl = SEL_KPL, 1485 .ssd_p = 1, 1486 .ssd_xx = 0, .ssd_xx1 = 0, 1487 .ssd_def32 = 1, 1488 .ssd_gran = 1 }, 1489 /* GUCODE_SEL 6 Code Descriptor for user */ 1490 { .ssd_base = 0x0, 1491 .ssd_limit = 0xfffff, 1492 .ssd_type = SDT_MEMERA, 1493 .ssd_dpl = SEL_UPL, 1494 .ssd_p = 1, 1495 .ssd_xx = 0, .ssd_xx1 = 0, 1496 .ssd_def32 = 1, 1497 .ssd_gran = 1 }, 1498 /* GUDATA_SEL 7 Data Descriptor for user */ 1499 { .ssd_base = 0x0, 1500 .ssd_limit = 0xfffff, 1501 .ssd_type = SDT_MEMRWA, 1502 .ssd_dpl = SEL_UPL, 1503 .ssd_p = 1, 1504 .ssd_xx = 0, .ssd_xx1 = 0, 1505 .ssd_def32 = 1, 1506 .ssd_gran = 1 }, 1507 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */ 1508 { .ssd_base = 0x400, 1509 .ssd_limit = 0xfffff, 1510 .ssd_type = SDT_MEMRWA, 1511 .ssd_dpl = SEL_KPL, 1512 .ssd_p = 1, 1513 .ssd_xx = 0, .ssd_xx1 = 0, 1514 .ssd_def32 = 1, 1515 .ssd_gran = 1 }, 1516 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */ 1517 { 1518 .ssd_base = 0x0, 1519 .ssd_limit = sizeof(struct i386tss)-1, 1520 .ssd_type = SDT_SYS386TSS, 1521 .ssd_dpl = 0, 1522 .ssd_p = 1, 1523 .ssd_xx = 0, .ssd_xx1 = 0, 1524 .ssd_def32 = 0, 1525 .ssd_gran = 0 }, 1526 /* GLDT_SEL 10 LDT Descriptor */ 1527 { .ssd_base = (int) ldt, 1528 .ssd_limit = sizeof(ldt)-1, 1529 .ssd_type = SDT_SYSLDT, 1530 .ssd_dpl = SEL_UPL, 1531 .ssd_p = 1, 1532 .ssd_xx = 0, .ssd_xx1 = 0, 1533 .ssd_def32 = 0, 1534 .ssd_gran = 0 }, 1535 /* GUSERLDT_SEL 11 User LDT Descriptor per process */ 1536 { .ssd_base = (int) ldt, 1537 .ssd_limit = (512 * sizeof(union descriptor)-1), 1538 .ssd_type = SDT_SYSLDT, 1539 .ssd_dpl = 0, 1540 .ssd_p = 1, 1541 .ssd_xx = 0, .ssd_xx1 = 0, 1542 .ssd_def32 = 0, 1543 .ssd_gran = 0 }, 1544 /* GPANIC_SEL 12 Panic Tss Descriptor */ 1545 { .ssd_base = (int) &dblfault_tss, 1546 .ssd_limit = sizeof(struct i386tss)-1, 1547 .ssd_type = SDT_SYS386TSS, 1548 .ssd_dpl = 0, 1549 .ssd_p = 1, 1550 .ssd_xx = 0, .ssd_xx1 = 0, 1551 .ssd_def32 = 0, 1552 .ssd_gran = 0 }, 1553 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */ 1554 { .ssd_base = 0, 1555 .ssd_limit = 0xfffff, 1556 .ssd_type = SDT_MEMERA, 1557 .ssd_dpl = 0, 1558 .ssd_p = 1, 1559 .ssd_xx = 0, .ssd_xx1 = 0, 1560 .ssd_def32 = 0, 1561 .ssd_gran = 1 }, 1562 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */ 1563 { .ssd_base = 0, 1564 .ssd_limit = 0xfffff, 1565 .ssd_type = SDT_MEMERA, 1566 .ssd_dpl = 0, 1567 .ssd_p = 1, 1568 .ssd_xx = 0, .ssd_xx1 = 0, 1569 .ssd_def32 = 0, 1570 .ssd_gran = 1 }, 1571 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */ 1572 { .ssd_base = 0, 1573 .ssd_limit = 0xfffff, 1574 .ssd_type = SDT_MEMRWA, 1575 .ssd_dpl = 0, 1576 .ssd_p = 1, 1577 .ssd_xx = 0, .ssd_xx1 = 0, 1578 .ssd_def32 = 1, 1579 .ssd_gran = 1 }, 1580 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */ 1581 { .ssd_base = 0, 1582 .ssd_limit = 0xfffff, 1583 .ssd_type = SDT_MEMRWA, 1584 .ssd_dpl = 0, 1585 .ssd_p = 1, 1586 .ssd_xx = 0, .ssd_xx1 = 0, 1587 .ssd_def32 = 0, 1588 .ssd_gran = 1 }, 1589 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */ 1590 { .ssd_base = 0, 1591 .ssd_limit = 0xfffff, 1592 .ssd_type = SDT_MEMRWA, 1593 .ssd_dpl = 0, 1594 .ssd_p = 1, 1595 .ssd_xx = 0, .ssd_xx1 = 0, 1596 .ssd_def32 = 0, 1597 .ssd_gran = 1 }, 1598 /* GNDIS_SEL 18 NDIS Descriptor */ 1599 { .ssd_base = 0x0, 1600 .ssd_limit = 0x0, 1601 .ssd_type = 0, 1602 .ssd_dpl = 0, 1603 .ssd_p = 0, 1604 .ssd_xx = 0, .ssd_xx1 = 0, 1605 .ssd_def32 = 0, 1606 .ssd_gran = 0 }, 1607 }; 1608 1609 static struct soft_segment_descriptor ldt_segs[] = { 1610 /* Null Descriptor - overwritten by call gate */ 1611 { .ssd_base = 0x0, 1612 .ssd_limit = 0x0, 1613 .ssd_type = 0, 1614 .ssd_dpl = 0, 1615 .ssd_p = 0, 1616 .ssd_xx = 0, .ssd_xx1 = 0, 1617 .ssd_def32 = 0, 1618 .ssd_gran = 0 }, 1619 /* Null Descriptor - overwritten by call gate */ 1620 { .ssd_base = 0x0, 1621 .ssd_limit = 0x0, 1622 .ssd_type = 0, 1623 .ssd_dpl = 0, 1624 .ssd_p = 0, 1625 .ssd_xx = 0, .ssd_xx1 = 0, 1626 .ssd_def32 = 0, 1627 .ssd_gran = 0 }, 1628 /* Null Descriptor - overwritten by call gate */ 1629 { .ssd_base = 0x0, 1630 .ssd_limit = 0x0, 1631 .ssd_type = 0, 1632 .ssd_dpl = 0, 1633 .ssd_p = 0, 1634 .ssd_xx = 0, .ssd_xx1 = 0, 1635 .ssd_def32 = 0, 1636 .ssd_gran = 0 }, 1637 /* Code Descriptor for user */ 1638 { .ssd_base = 0x0, 1639 .ssd_limit = 0xfffff, 1640 .ssd_type = SDT_MEMERA, 1641 .ssd_dpl = SEL_UPL, 1642 .ssd_p = 1, 1643 .ssd_xx = 0, .ssd_xx1 = 0, 1644 .ssd_def32 = 1, 1645 .ssd_gran = 1 }, 1646 /* Null Descriptor - overwritten by call gate */ 1647 { .ssd_base = 0x0, 1648 .ssd_limit = 0x0, 1649 .ssd_type = 0, 1650 .ssd_dpl = 0, 1651 .ssd_p = 0, 1652 .ssd_xx = 0, .ssd_xx1 = 0, 1653 .ssd_def32 = 0, 1654 .ssd_gran = 0 }, 1655 /* Data Descriptor for user */ 1656 { .ssd_base = 0x0, 1657 .ssd_limit = 0xfffff, 1658 .ssd_type = SDT_MEMRWA, 1659 .ssd_dpl = SEL_UPL, 1660 .ssd_p = 1, 1661 .ssd_xx = 0, .ssd_xx1 = 0, 1662 .ssd_def32 = 1, 1663 .ssd_gran = 1 }, 1664 }; 1665 1666 void 1667 setidt(idx, func, typ, dpl, selec) 1668 int idx; 1669 inthand_t *func; 1670 int typ; 1671 int dpl; 1672 int selec; 1673 { 1674 struct gate_descriptor *ip; 1675 1676 ip = idt + idx; 1677 ip->gd_looffset = (int)func; 1678 ip->gd_selector = selec; 1679 ip->gd_stkcpy = 0; 1680 ip->gd_xx = 0; 1681 ip->gd_type = typ; 1682 ip->gd_dpl = dpl; 1683 ip->gd_p = 1; 1684 ip->gd_hioffset = ((int)func)>>16 ; 1685 } 1686 1687 extern inthand_t 1688 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl), 1689 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm), 1690 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot), 1691 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align), 1692 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall); 1693 1694 #ifdef DDB 1695 /* 1696 * Display the index and function name of any IDT entries that don't use 1697 * the default 'rsvd' entry point. 1698 */ 1699 DB_SHOW_COMMAND(idt, db_show_idt) 1700 { 1701 struct gate_descriptor *ip; 1702 int idx; 1703 uintptr_t func; 1704 1705 ip = idt; 1706 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) { 1707 func = (ip->gd_hioffset << 16 | ip->gd_looffset); 1708 if (func != (uintptr_t)&IDTVEC(rsvd)) { 1709 db_printf("%3d\t", idx); 1710 db_printsym(func, DB_STGY_PROC); 1711 db_printf("\n"); 1712 } 1713 ip++; 1714 } 1715 } 1716 1717 /* Show privileged registers. */ 1718 DB_SHOW_COMMAND(sysregs, db_show_sysregs) 1719 { 1720 uint64_t idtr, gdtr; 1721 1722 idtr = ridt(); 1723 db_printf("idtr\t0x%08x/%04x\n", 1724 (u_int)(idtr >> 16), (u_int)idtr & 0xffff); 1725 gdtr = rgdt(); 1726 db_printf("gdtr\t0x%08x/%04x\n", 1727 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff); 1728 db_printf("ldtr\t0x%04x\n", rldt()); 1729 db_printf("tr\t0x%04x\n", rtr()); 1730 db_printf("cr0\t0x%08x\n", rcr0()); 1731 db_printf("cr2\t0x%08x\n", rcr2()); 1732 db_printf("cr3\t0x%08x\n", rcr3()); 1733 db_printf("cr4\t0x%08x\n", rcr4()); 1734 } 1735 #endif 1736 1737 void 1738 sdtossd(sd, ssd) 1739 struct segment_descriptor *sd; 1740 struct soft_segment_descriptor *ssd; 1741 { 1742 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase; 1743 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit; 1744 ssd->ssd_type = sd->sd_type; 1745 ssd->ssd_dpl = sd->sd_dpl; 1746 ssd->ssd_p = sd->sd_p; 1747 ssd->ssd_def32 = sd->sd_def32; 1748 ssd->ssd_gran = sd->sd_gran; 1749 } 1750 1751 static void 1752 basemem_setup(void) 1753 { 1754 vm_paddr_t pa; 1755 pt_entry_t *pte; 1756 int i; 1757 1758 if (basemem > 640) { 1759 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n", 1760 basemem); 1761 basemem = 640; 1762 } 1763 1764 /* 1765 * XXX if biosbasemem is now < 640, there is a `hole' 1766 * between the end of base memory and the start of 1767 * ISA memory. The hole may be empty or it may 1768 * contain BIOS code or data. Map it read/write so 1769 * that the BIOS can write to it. (Memory from 0 to 1770 * the physical end of the kernel is mapped read-only 1771 * to begin with and then parts of it are remapped. 1772 * The parts that aren't remapped form holes that 1773 * remain read-only and are unused by the kernel. 1774 * The base memory area is below the physical end of 1775 * the kernel and right now forms a read-only hole. 1776 * The part of it from PAGE_SIZE to 1777 * (trunc_page(biosbasemem * 1024) - 1) will be 1778 * remapped and used by the kernel later.) 1779 * 1780 * This code is similar to the code used in 1781 * pmap_mapdev, but since no memory needs to be 1782 * allocated we simply change the mapping. 1783 */ 1784 for (pa = trunc_page(basemem * 1024); 1785 pa < ISA_HOLE_START; pa += PAGE_SIZE) 1786 pmap_kenter(KERNBASE + pa, pa); 1787 1788 /* 1789 * Map pages between basemem and ISA_HOLE_START, if any, r/w into 1790 * the vm86 page table so that vm86 can scribble on them using 1791 * the vm86 map too. XXX: why 2 ways for this and only 1 way for 1792 * page 0, at least as initialized here? 1793 */ 1794 pte = (pt_entry_t *)vm86paddr; 1795 for (i = basemem / 4; i < 160; i++) 1796 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U; 1797 } 1798 1799 /* 1800 * Populate the (physmap) array with base/bound pairs describing the 1801 * available physical memory in the system, then test this memory and 1802 * build the phys_avail array describing the actually-available memory. 1803 * 1804 * If we cannot accurately determine the physical memory map, then use 1805 * value from the 0xE801 call, and failing that, the RTC. 1806 * 1807 * Total memory size may be set by the kernel environment variable 1808 * hw.physmem or the compile-time define MAXMEM. 1809 * 1810 * XXX first should be vm_paddr_t. 1811 */ 1812 static void 1813 getmemsize(int first) 1814 { 1815 int off, physmap_idx, pa_indx, da_indx; 1816 u_long physmem_tunable; 1817 vm_paddr_t physmap[PHYSMAP_SIZE]; 1818 pt_entry_t *pte; 1819 quad_t dcons_addr, dcons_size; 1820 int i; 1821 int pg_n; 1822 u_int extmem; 1823 u_int under16; 1824 vm_paddr_t pa; 1825 1826 bzero(physmap, sizeof(physmap)); 1827 1828 /* XXX - some of EPSON machines can't use PG_N */ 1829 pg_n = PG_N; 1830 if (pc98_machine_type & M_EPSON_PC98) { 1831 switch (epson_machine_id) { 1832 #ifdef WB_CACHE 1833 default: 1834 #endif 1835 case EPSON_PC486_HX: 1836 case EPSON_PC486_HG: 1837 case EPSON_PC486_HA: 1838 pg_n = 0; 1839 break; 1840 } 1841 } 1842 1843 under16 = pc98_getmemsize(&basemem, &extmem); 1844 basemem_setup(); 1845 1846 physmap[0] = 0; 1847 physmap[1] = basemem * 1024; 1848 physmap_idx = 2; 1849 physmap[physmap_idx] = 0x100000; 1850 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024; 1851 1852 /* 1853 * Now, physmap contains a map of physical memory. 1854 */ 1855 1856 #ifdef SMP 1857 /* make hole for AP bootstrap code */ 1858 physmap[1] = mp_bootaddress(physmap[1]); 1859 #endif 1860 1861 /* 1862 * Maxmem isn't the "maximum memory", it's one larger than the 1863 * highest page of the physical address space. It should be 1864 * called something like "Maxphyspage". We may adjust this 1865 * based on ``hw.physmem'' and the results of the memory test. 1866 */ 1867 Maxmem = atop(physmap[physmap_idx + 1]); 1868 1869 #ifdef MAXMEM 1870 Maxmem = MAXMEM / 4; 1871 #endif 1872 1873 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable)) 1874 Maxmem = atop(physmem_tunable); 1875 1876 if (atop(physmap[physmap_idx + 1]) != Maxmem && 1877 (boothowto & RB_VERBOSE)) 1878 printf("Physical memory use set to %ldK\n", Maxmem * 4); 1879 1880 /* 1881 * If Maxmem has been increased beyond what the system has detected, 1882 * extend the last memory segment to the new limit. 1883 */ 1884 if (atop(physmap[physmap_idx + 1]) < Maxmem) 1885 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem); 1886 1887 /* 1888 * We need to divide chunk if Maxmem is larger than 16MB and 1889 * under 16MB area is not full of memory. 1890 * (1) system area (15-16MB region) is cut off 1891 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY") 1892 */ 1893 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) { 1894 /* 15M - 16M region is cut off, so need to divide chunk */ 1895 physmap[physmap_idx + 1] = under16 * 1024; 1896 physmap_idx += 2; 1897 physmap[physmap_idx] = 0x1000000; 1898 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024; 1899 } 1900 1901 /* call pmap initialization to make new kernel address space */ 1902 pmap_bootstrap(first); 1903 1904 /* 1905 * Size up each available chunk of physical memory. 1906 */ 1907 physmap[0] = PAGE_SIZE; /* mask off page 0 */ 1908 pa_indx = 0; 1909 da_indx = 1; 1910 phys_avail[pa_indx++] = physmap[0]; 1911 phys_avail[pa_indx] = physmap[0]; 1912 dump_avail[da_indx] = physmap[0]; 1913 pte = CMAP1; 1914 1915 /* 1916 * Get dcons buffer address 1917 */ 1918 if (getenv_quad("dcons.addr", &dcons_addr) == 0 || 1919 getenv_quad("dcons.size", &dcons_size) == 0) 1920 dcons_addr = 0; 1921 1922 /* 1923 * physmap is in bytes, so when converting to page boundaries, 1924 * round up the start address and round down the end address. 1925 */ 1926 for (i = 0; i <= physmap_idx; i += 2) { 1927 vm_paddr_t end; 1928 1929 end = ptoa((vm_paddr_t)Maxmem); 1930 if (physmap[i + 1] < end) 1931 end = trunc_page(physmap[i + 1]); 1932 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) { 1933 int tmp, page_bad, full; 1934 int *ptr = (int *)CADDR1; 1935 1936 full = FALSE; 1937 /* 1938 * block out kernel memory as not available. 1939 */ 1940 if (pa >= KERNLOAD && pa < first) 1941 goto do_dump_avail; 1942 1943 /* 1944 * block out dcons buffer 1945 */ 1946 if (dcons_addr > 0 1947 && pa >= trunc_page(dcons_addr) 1948 && pa < dcons_addr + dcons_size) 1949 goto do_dump_avail; 1950 1951 page_bad = FALSE; 1952 1953 /* 1954 * map page into kernel: valid, read/write,non-cacheable 1955 */ 1956 *pte = pa | PG_V | PG_RW | pg_n; 1957 invltlb(); 1958 1959 tmp = *(int *)ptr; 1960 /* 1961 * Test for alternating 1's and 0's 1962 */ 1963 *(volatile int *)ptr = 0xaaaaaaaa; 1964 if (*(volatile int *)ptr != 0xaaaaaaaa) 1965 page_bad = TRUE; 1966 /* 1967 * Test for alternating 0's and 1's 1968 */ 1969 *(volatile int *)ptr = 0x55555555; 1970 if (*(volatile int *)ptr != 0x55555555) 1971 page_bad = TRUE; 1972 /* 1973 * Test for all 1's 1974 */ 1975 *(volatile int *)ptr = 0xffffffff; 1976 if (*(volatile int *)ptr != 0xffffffff) 1977 page_bad = TRUE; 1978 /* 1979 * Test for all 0's 1980 */ 1981 *(volatile int *)ptr = 0x0; 1982 if (*(volatile int *)ptr != 0x0) 1983 page_bad = TRUE; 1984 /* 1985 * Restore original value. 1986 */ 1987 *(int *)ptr = tmp; 1988 1989 /* 1990 * Adjust array of valid/good pages. 1991 */ 1992 if (page_bad == TRUE) 1993 continue; 1994 /* 1995 * If this good page is a continuation of the 1996 * previous set of good pages, then just increase 1997 * the end pointer. Otherwise start a new chunk. 1998 * Note that "end" points one higher than end, 1999 * making the range >= start and < end. 2000 * If we're also doing a speculative memory 2001 * test and we at or past the end, bump up Maxmem 2002 * so that we keep going. The first bad page 2003 * will terminate the loop. 2004 */ 2005 if (phys_avail[pa_indx] == pa) { 2006 phys_avail[pa_indx] += PAGE_SIZE; 2007 } else { 2008 pa_indx++; 2009 if (pa_indx == PHYS_AVAIL_ARRAY_END) { 2010 printf( 2011 "Too many holes in the physical address space, giving up\n"); 2012 pa_indx--; 2013 full = TRUE; 2014 goto do_dump_avail; 2015 } 2016 phys_avail[pa_indx++] = pa; /* start */ 2017 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */ 2018 } 2019 physmem++; 2020 do_dump_avail: 2021 if (dump_avail[da_indx] == pa) { 2022 dump_avail[da_indx] += PAGE_SIZE; 2023 } else { 2024 da_indx++; 2025 if (da_indx == DUMP_AVAIL_ARRAY_END) { 2026 da_indx--; 2027 goto do_next; 2028 } 2029 dump_avail[da_indx++] = pa; /* start */ 2030 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */ 2031 } 2032 do_next: 2033 if (full) 2034 break; 2035 } 2036 } 2037 *pte = 0; 2038 invltlb(); 2039 2040 /* 2041 * XXX 2042 * The last chunk must contain at least one page plus the message 2043 * buffer to avoid complicating other code (message buffer address 2044 * calculation, etc.). 2045 */ 2046 while (phys_avail[pa_indx - 1] + PAGE_SIZE + 2047 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) { 2048 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]); 2049 phys_avail[pa_indx--] = 0; 2050 phys_avail[pa_indx--] = 0; 2051 } 2052 2053 Maxmem = atop(phys_avail[pa_indx]); 2054 2055 /* Trim off space for the message buffer. */ 2056 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE); 2057 2058 /* Map the message buffer. */ 2059 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE) 2060 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] + 2061 off); 2062 } 2063 2064 void 2065 init386(first) 2066 int first; 2067 { 2068 struct gate_descriptor *gdp; 2069 int gsel_tss, metadata_missing, x, pa; 2070 struct pcpu *pc; 2071 2072 thread0.td_kstack = proc0kstack; 2073 thread0.td_pcb = (struct pcb *) 2074 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1; 2075 2076 /* 2077 * This may be done better later if it gets more high level 2078 * components in it. If so just link td->td_proc here. 2079 */ 2080 proc_linkup0(&proc0, &thread0); 2081 2082 /* 2083 * Initialize DMAC 2084 */ 2085 pc98_init_dmac(); 2086 2087 metadata_missing = 0; 2088 if (bootinfo.bi_modulep) { 2089 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE; 2090 preload_bootstrap_relocate(KERNBASE); 2091 } else { 2092 metadata_missing = 1; 2093 } 2094 if (envmode == 1) 2095 kern_envp = static_env; 2096 else if (bootinfo.bi_envp) 2097 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE; 2098 2099 /* Init basic tunables, hz etc */ 2100 init_param1(); 2101 2102 /* 2103 * Make gdt memory segments. All segments cover the full 4GB 2104 * of address space and permissions are enforced at page level. 2105 */ 2106 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1); 2107 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1); 2108 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1); 2109 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1); 2110 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1); 2111 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1); 2112 2113 pc = &__pcpu[0]; 2114 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1); 2115 gdt_segs[GPRIV_SEL].ssd_base = (int) pc; 2116 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss; 2117 2118 for (x = 0; x < NGDT; x++) 2119 ssdtosd(&gdt_segs[x], &gdt[x].sd); 2120 2121 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1; 2122 r_gdt.rd_base = (int) gdt; 2123 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN); 2124 lgdt(&r_gdt); 2125 2126 pcpu_init(pc, 0, sizeof(struct pcpu)); 2127 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE) 2128 pmap_kenter(pa + KERNBASE, pa); 2129 dpcpu_init((void *)(first + KERNBASE), 0); 2130 first += DPCPU_SIZE; 2131 PCPU_SET(prvspace, pc); 2132 PCPU_SET(curthread, &thread0); 2133 PCPU_SET(curpcb, thread0.td_pcb); 2134 2135 /* 2136 * Initialize mutexes. 2137 * 2138 * icu_lock: in order to allow an interrupt to occur in a critical 2139 * section, to set pcpu->ipending (etc...) properly, we 2140 * must be able to get the icu lock, so it can't be 2141 * under witness. 2142 */ 2143 mutex_init(); 2144 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE); 2145 2146 /* make ldt memory segments */ 2147 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1); 2148 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1); 2149 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++) 2150 ssdtosd(&ldt_segs[x], &ldt[x].sd); 2151 2152 _default_ldt = GSEL(GLDT_SEL, SEL_KPL); 2153 lldt(_default_ldt); 2154 PCPU_SET(currentldt, _default_ldt); 2155 2156 /* exceptions */ 2157 for (x = 0; x < NIDT; x++) 2158 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, 2159 GSEL(GCODE_SEL, SEL_KPL)); 2160 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, 2161 GSEL(GCODE_SEL, SEL_KPL)); 2162 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL, 2163 GSEL(GCODE_SEL, SEL_KPL)); 2164 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL, 2165 GSEL(GCODE_SEL, SEL_KPL)); 2166 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL, 2167 GSEL(GCODE_SEL, SEL_KPL)); 2168 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, 2169 GSEL(GCODE_SEL, SEL_KPL)); 2170 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, 2171 GSEL(GCODE_SEL, SEL_KPL)); 2172 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2173 GSEL(GCODE_SEL, SEL_KPL)); 2174 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL 2175 , GSEL(GCODE_SEL, SEL_KPL)); 2176 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL)); 2177 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, 2178 GSEL(GCODE_SEL, SEL_KPL)); 2179 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, 2180 GSEL(GCODE_SEL, SEL_KPL)); 2181 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, 2182 GSEL(GCODE_SEL, SEL_KPL)); 2183 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, 2184 GSEL(GCODE_SEL, SEL_KPL)); 2185 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2186 GSEL(GCODE_SEL, SEL_KPL)); 2187 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, 2188 GSEL(GCODE_SEL, SEL_KPL)); 2189 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, 2190 GSEL(GCODE_SEL, SEL_KPL)); 2191 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, 2192 GSEL(GCODE_SEL, SEL_KPL)); 2193 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, 2194 GSEL(GCODE_SEL, SEL_KPL)); 2195 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, 2196 GSEL(GCODE_SEL, SEL_KPL)); 2197 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL, 2198 GSEL(GCODE_SEL, SEL_KPL)); 2199 2200 r_idt.rd_limit = sizeof(idt0) - 1; 2201 r_idt.rd_base = (int) idt; 2202 lidt(&r_idt); 2203 2204 /* 2205 * Initialize the i8254 before the console so that console 2206 * initialization can use DELAY(). 2207 */ 2208 i8254_init(); 2209 2210 /* 2211 * Initialize the console before we print anything out. 2212 */ 2213 cninit(); 2214 2215 if (metadata_missing) 2216 printf("WARNING: loader(8) metadata is missing!\n"); 2217 2218 #ifdef DEV_ISA 2219 atpic_startup(); 2220 #endif 2221 2222 #ifdef DDB 2223 ksym_start = bootinfo.bi_symtab; 2224 ksym_end = bootinfo.bi_esymtab; 2225 #endif 2226 2227 kdb_init(); 2228 2229 #ifdef KDB 2230 if (boothowto & RB_KDB) 2231 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger"); 2232 #endif 2233 2234 finishidentcpu(); /* Final stage of CPU initialization */ 2235 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, 2236 GSEL(GCODE_SEL, SEL_KPL)); 2237 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, 2238 GSEL(GCODE_SEL, SEL_KPL)); 2239 initializecpu(); /* Initialize CPU registers */ 2240 2241 /* make an initial tss so cpu can get interrupt stack on syscall! */ 2242 /* Note: -16 is so we can grow the trapframe if we came from vm86 */ 2243 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack + 2244 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16); 2245 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL)); 2246 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL); 2247 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd); 2248 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt)); 2249 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16); 2250 ltr(gsel_tss); 2251 2252 /* pointer to selector slot for %fs/%gs */ 2253 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd); 2254 2255 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 = 2256 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)]; 2257 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 = 2258 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL); 2259 dblfault_tss.tss_cr3 = (int)IdlePTD; 2260 dblfault_tss.tss_eip = (int)dblfault_handler; 2261 dblfault_tss.tss_eflags = PSL_KERNEL; 2262 dblfault_tss.tss_ds = dblfault_tss.tss_es = 2263 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL); 2264 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL); 2265 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL); 2266 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL); 2267 2268 vm86_initialize(); 2269 getmemsize(first); 2270 init_param2(physmem); 2271 2272 /* now running on new page tables, configured,and u/iom is accessible */ 2273 2274 msgbufinit(msgbufp, MSGBUF_SIZE); 2275 2276 /* make a call gate to reenter kernel with */ 2277 gdp = &ldt[LSYS5CALLS_SEL].gd; 2278 2279 x = (int) &IDTVEC(lcall_syscall); 2280 gdp->gd_looffset = x; 2281 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL); 2282 gdp->gd_stkcpy = 1; 2283 gdp->gd_type = SDT_SYS386CGT; 2284 gdp->gd_dpl = SEL_UPL; 2285 gdp->gd_p = 1; 2286 gdp->gd_hioffset = x >> 16; 2287 2288 /* XXX does this work? */ 2289 /* XXX yes! */ 2290 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2291 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL]; 2292 2293 /* transfer to user mode */ 2294 2295 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL); 2296 _udatasel = GSEL(GUDATA_SEL, SEL_UPL); 2297 2298 /* setup proc 0's pcb */ 2299 thread0.td_pcb->pcb_flags = 0; 2300 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; 2301 thread0.td_pcb->pcb_ext = 0; 2302 thread0.td_frame = &proc0_tf; 2303 } 2304 2305 void 2306 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 2307 { 2308 2309 } 2310 2311 void 2312 spinlock_enter(void) 2313 { 2314 struct thread *td; 2315 2316 td = curthread; 2317 if (td->td_md.md_spinlock_count == 0) 2318 td->td_md.md_saved_flags = intr_disable(); 2319 td->td_md.md_spinlock_count++; 2320 critical_enter(); 2321 } 2322 2323 void 2324 spinlock_exit(void) 2325 { 2326 struct thread *td; 2327 2328 td = curthread; 2329 critical_exit(); 2330 td->td_md.md_spinlock_count--; 2331 if (td->td_md.md_spinlock_count == 0) 2332 intr_restore(td->td_md.md_saved_flags); 2333 } 2334 2335 #if defined(I586_CPU) && !defined(NO_F00F_HACK) 2336 static void f00f_hack(void *unused); 2337 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL); 2338 2339 static void 2340 f00f_hack(void *unused) 2341 { 2342 struct gate_descriptor *new_idt; 2343 vm_offset_t tmp; 2344 2345 if (!has_f00f_bug) 2346 return; 2347 2348 GIANT_REQUIRED; 2349 2350 printf("Intel Pentium detected, installing workaround for F00F bug\n"); 2351 2352 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2); 2353 if (tmp == 0) 2354 panic("kmem_alloc returned 0"); 2355 2356 /* Put the problematic entry (#6) at the end of the lower page. */ 2357 new_idt = (struct gate_descriptor*) 2358 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor)); 2359 bcopy(idt, new_idt, sizeof(idt0)); 2360 r_idt.rd_base = (u_int)new_idt; 2361 lidt(&r_idt); 2362 idt = new_idt; 2363 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE, 2364 VM_PROT_READ, FALSE) != KERN_SUCCESS) 2365 panic("vm_map_protect failed"); 2366 } 2367 #endif /* defined(I586_CPU) && !NO_F00F_HACK */ 2368 2369 /* 2370 * Construct a PCB from a trapframe. This is called from kdb_trap() where 2371 * we want to start a backtrace from the function that caused us to enter 2372 * the debugger. We have the context in the trapframe, but base the trace 2373 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 2374 * enough for a backtrace. 2375 */ 2376 void 2377 makectx(struct trapframe *tf, struct pcb *pcb) 2378 { 2379 2380 pcb->pcb_edi = tf->tf_edi; 2381 pcb->pcb_esi = tf->tf_esi; 2382 pcb->pcb_ebp = tf->tf_ebp; 2383 pcb->pcb_ebx = tf->tf_ebx; 2384 pcb->pcb_eip = tf->tf_eip; 2385 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8; 2386 } 2387 2388 int 2389 ptrace_set_pc(struct thread *td, u_long addr) 2390 { 2391 2392 td->td_frame->tf_eip = addr; 2393 return (0); 2394 } 2395 2396 int 2397 ptrace_single_step(struct thread *td) 2398 { 2399 td->td_frame->tf_eflags |= PSL_T; 2400 return (0); 2401 } 2402 2403 int 2404 ptrace_clear_single_step(struct thread *td) 2405 { 2406 td->td_frame->tf_eflags &= ~PSL_T; 2407 return (0); 2408 } 2409 2410 int 2411 fill_regs(struct thread *td, struct reg *regs) 2412 { 2413 struct pcb *pcb; 2414 struct trapframe *tp; 2415 2416 tp = td->td_frame; 2417 pcb = td->td_pcb; 2418 regs->r_fs = tp->tf_fs; 2419 regs->r_es = tp->tf_es; 2420 regs->r_ds = tp->tf_ds; 2421 regs->r_edi = tp->tf_edi; 2422 regs->r_esi = tp->tf_esi; 2423 regs->r_ebp = tp->tf_ebp; 2424 regs->r_ebx = tp->tf_ebx; 2425 regs->r_edx = tp->tf_edx; 2426 regs->r_ecx = tp->tf_ecx; 2427 regs->r_eax = tp->tf_eax; 2428 regs->r_eip = tp->tf_eip; 2429 regs->r_cs = tp->tf_cs; 2430 regs->r_eflags = tp->tf_eflags; 2431 regs->r_esp = tp->tf_esp; 2432 regs->r_ss = tp->tf_ss; 2433 regs->r_gs = pcb->pcb_gs; 2434 return (0); 2435 } 2436 2437 int 2438 set_regs(struct thread *td, struct reg *regs) 2439 { 2440 struct pcb *pcb; 2441 struct trapframe *tp; 2442 2443 tp = td->td_frame; 2444 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) || 2445 !CS_SECURE(regs->r_cs)) 2446 return (EINVAL); 2447 pcb = td->td_pcb; 2448 tp->tf_fs = regs->r_fs; 2449 tp->tf_es = regs->r_es; 2450 tp->tf_ds = regs->r_ds; 2451 tp->tf_edi = regs->r_edi; 2452 tp->tf_esi = regs->r_esi; 2453 tp->tf_ebp = regs->r_ebp; 2454 tp->tf_ebx = regs->r_ebx; 2455 tp->tf_edx = regs->r_edx; 2456 tp->tf_ecx = regs->r_ecx; 2457 tp->tf_eax = regs->r_eax; 2458 tp->tf_eip = regs->r_eip; 2459 tp->tf_cs = regs->r_cs; 2460 tp->tf_eflags = regs->r_eflags; 2461 tp->tf_esp = regs->r_esp; 2462 tp->tf_ss = regs->r_ss; 2463 pcb->pcb_gs = regs->r_gs; 2464 return (0); 2465 } 2466 2467 #ifdef CPU_ENABLE_SSE 2468 static void 2469 fill_fpregs_xmm(sv_xmm, sv_87) 2470 struct savexmm *sv_xmm; 2471 struct save87 *sv_87; 2472 { 2473 register struct env87 *penv_87 = &sv_87->sv_env; 2474 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2475 int i; 2476 2477 bzero(sv_87, sizeof(*sv_87)); 2478 2479 /* FPU control/status */ 2480 penv_87->en_cw = penv_xmm->en_cw; 2481 penv_87->en_sw = penv_xmm->en_sw; 2482 penv_87->en_tw = penv_xmm->en_tw; 2483 penv_87->en_fip = penv_xmm->en_fip; 2484 penv_87->en_fcs = penv_xmm->en_fcs; 2485 penv_87->en_opcode = penv_xmm->en_opcode; 2486 penv_87->en_foo = penv_xmm->en_foo; 2487 penv_87->en_fos = penv_xmm->en_fos; 2488 2489 /* FPU registers */ 2490 for (i = 0; i < 8; ++i) 2491 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc; 2492 } 2493 2494 static void 2495 set_fpregs_xmm(sv_87, sv_xmm) 2496 struct save87 *sv_87; 2497 struct savexmm *sv_xmm; 2498 { 2499 register struct env87 *penv_87 = &sv_87->sv_env; 2500 register struct envxmm *penv_xmm = &sv_xmm->sv_env; 2501 int i; 2502 2503 /* FPU control/status */ 2504 penv_xmm->en_cw = penv_87->en_cw; 2505 penv_xmm->en_sw = penv_87->en_sw; 2506 penv_xmm->en_tw = penv_87->en_tw; 2507 penv_xmm->en_fip = penv_87->en_fip; 2508 penv_xmm->en_fcs = penv_87->en_fcs; 2509 penv_xmm->en_opcode = penv_87->en_opcode; 2510 penv_xmm->en_foo = penv_87->en_foo; 2511 penv_xmm->en_fos = penv_87->en_fos; 2512 2513 /* FPU registers */ 2514 for (i = 0; i < 8; ++i) 2515 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i]; 2516 } 2517 #endif /* CPU_ENABLE_SSE */ 2518 2519 int 2520 fill_fpregs(struct thread *td, struct fpreg *fpregs) 2521 { 2522 2523 KASSERT(td == curthread || TD_IS_SUSPENDED(td), 2524 ("not suspended thread %p", td)); 2525 npxgetregs(td); 2526 #ifdef CPU_ENABLE_SSE 2527 if (cpu_fxsr) 2528 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm, 2529 (struct save87 *)fpregs); 2530 else 2531 #endif /* CPU_ENABLE_SSE */ 2532 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs, 2533 sizeof(*fpregs)); 2534 return (0); 2535 } 2536 2537 int 2538 set_fpregs(struct thread *td, struct fpreg *fpregs) 2539 { 2540 2541 #ifdef CPU_ENABLE_SSE 2542 if (cpu_fxsr) 2543 set_fpregs_xmm((struct save87 *)fpregs, 2544 &td->td_pcb->pcb_user_save.sv_xmm); 2545 else 2546 #endif /* CPU_ENABLE_SSE */ 2547 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87, 2548 sizeof(*fpregs)); 2549 npxuserinited(td); 2550 return (0); 2551 } 2552 2553 /* 2554 * Get machine context. 2555 */ 2556 int 2557 get_mcontext(struct thread *td, mcontext_t *mcp, int flags) 2558 { 2559 struct trapframe *tp; 2560 struct segment_descriptor *sdp; 2561 2562 tp = td->td_frame; 2563 2564 PROC_LOCK(curthread->td_proc); 2565 mcp->mc_onstack = sigonstack(tp->tf_esp); 2566 PROC_UNLOCK(curthread->td_proc); 2567 mcp->mc_gs = td->td_pcb->pcb_gs; 2568 mcp->mc_fs = tp->tf_fs; 2569 mcp->mc_es = tp->tf_es; 2570 mcp->mc_ds = tp->tf_ds; 2571 mcp->mc_edi = tp->tf_edi; 2572 mcp->mc_esi = tp->tf_esi; 2573 mcp->mc_ebp = tp->tf_ebp; 2574 mcp->mc_isp = tp->tf_isp; 2575 mcp->mc_eflags = tp->tf_eflags; 2576 if (flags & GET_MC_CLEAR_RET) { 2577 mcp->mc_eax = 0; 2578 mcp->mc_edx = 0; 2579 mcp->mc_eflags &= ~PSL_C; 2580 } else { 2581 mcp->mc_eax = tp->tf_eax; 2582 mcp->mc_edx = tp->tf_edx; 2583 } 2584 mcp->mc_ebx = tp->tf_ebx; 2585 mcp->mc_ecx = tp->tf_ecx; 2586 mcp->mc_eip = tp->tf_eip; 2587 mcp->mc_cs = tp->tf_cs; 2588 mcp->mc_esp = tp->tf_esp; 2589 mcp->mc_ss = tp->tf_ss; 2590 mcp->mc_len = sizeof(*mcp); 2591 get_fpcontext(td, mcp); 2592 sdp = &td->td_pcb->pcb_fsd; 2593 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase; 2594 sdp = &td->td_pcb->pcb_gsd; 2595 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase; 2596 2597 return (0); 2598 } 2599 2600 /* 2601 * Set machine context. 2602 * 2603 * However, we don't set any but the user modifiable flags, and we won't 2604 * touch the cs selector. 2605 */ 2606 int 2607 set_mcontext(struct thread *td, const mcontext_t *mcp) 2608 { 2609 struct trapframe *tp; 2610 int eflags, ret; 2611 2612 tp = td->td_frame; 2613 if (mcp->mc_len != sizeof(*mcp)) 2614 return (EINVAL); 2615 eflags = (mcp->mc_eflags & PSL_USERCHANGE) | 2616 (tp->tf_eflags & ~PSL_USERCHANGE); 2617 if ((ret = set_fpcontext(td, mcp)) == 0) { 2618 tp->tf_fs = mcp->mc_fs; 2619 tp->tf_es = mcp->mc_es; 2620 tp->tf_ds = mcp->mc_ds; 2621 tp->tf_edi = mcp->mc_edi; 2622 tp->tf_esi = mcp->mc_esi; 2623 tp->tf_ebp = mcp->mc_ebp; 2624 tp->tf_ebx = mcp->mc_ebx; 2625 tp->tf_edx = mcp->mc_edx; 2626 tp->tf_ecx = mcp->mc_ecx; 2627 tp->tf_eax = mcp->mc_eax; 2628 tp->tf_eip = mcp->mc_eip; 2629 tp->tf_eflags = eflags; 2630 tp->tf_esp = mcp->mc_esp; 2631 tp->tf_ss = mcp->mc_ss; 2632 td->td_pcb->pcb_gs = mcp->mc_gs; 2633 ret = 0; 2634 } 2635 return (ret); 2636 } 2637 2638 static void 2639 get_fpcontext(struct thread *td, mcontext_t *mcp) 2640 { 2641 2642 #ifndef DEV_NPX 2643 mcp->mc_fpformat = _MC_FPFMT_NODEV; 2644 mcp->mc_ownedfp = _MC_FPOWNED_NONE; 2645 #else 2646 mcp->mc_ownedfp = npxgetregs(td); 2647 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate, 2648 sizeof(mcp->mc_fpstate)); 2649 mcp->mc_fpformat = npxformat(); 2650 #endif 2651 } 2652 2653 static int 2654 set_fpcontext(struct thread *td, const mcontext_t *mcp) 2655 { 2656 2657 if (mcp->mc_fpformat == _MC_FPFMT_NODEV) 2658 return (0); 2659 else if (mcp->mc_fpformat != _MC_FPFMT_387 && 2660 mcp->mc_fpformat != _MC_FPFMT_XMM) 2661 return (EINVAL); 2662 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE) 2663 /* We don't care what state is left in the FPU or PCB. */ 2664 fpstate_drop(td); 2665 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU || 2666 mcp->mc_ownedfp == _MC_FPOWNED_PCB) { 2667 #ifdef DEV_NPX 2668 #ifdef CPU_ENABLE_SSE 2669 if (cpu_fxsr) 2670 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env. 2671 en_mxcsr &= cpu_mxcsr_mask; 2672 #endif 2673 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate); 2674 #endif 2675 } else 2676 return (EINVAL); 2677 return (0); 2678 } 2679 2680 static void 2681 fpstate_drop(struct thread *td) 2682 { 2683 2684 critical_enter(); 2685 #ifdef DEV_NPX 2686 if (PCPU_GET(fpcurthread) == td) 2687 npxdrop(); 2688 #endif 2689 /* 2690 * XXX force a full drop of the npx. The above only drops it if we 2691 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case. 2692 * 2693 * XXX I don't much like npxgetregs()'s semantics of doing a full 2694 * drop. Dropping only to the pcb matches fnsave's behaviour. 2695 * We only need to drop to !PCB_INITDONE in sendsig(). But 2696 * sendsig() is the only caller of npxgetregs()... perhaps we just 2697 * have too many layers. 2698 */ 2699 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE | 2700 PCB_NPXUSERINITDONE); 2701 critical_exit(); 2702 } 2703 2704 int 2705 fill_dbregs(struct thread *td, struct dbreg *dbregs) 2706 { 2707 struct pcb *pcb; 2708 2709 if (td == NULL) { 2710 dbregs->dr[0] = rdr0(); 2711 dbregs->dr[1] = rdr1(); 2712 dbregs->dr[2] = rdr2(); 2713 dbregs->dr[3] = rdr3(); 2714 dbregs->dr[4] = rdr4(); 2715 dbregs->dr[5] = rdr5(); 2716 dbregs->dr[6] = rdr6(); 2717 dbregs->dr[7] = rdr7(); 2718 } else { 2719 pcb = td->td_pcb; 2720 dbregs->dr[0] = pcb->pcb_dr0; 2721 dbregs->dr[1] = pcb->pcb_dr1; 2722 dbregs->dr[2] = pcb->pcb_dr2; 2723 dbregs->dr[3] = pcb->pcb_dr3; 2724 dbregs->dr[4] = 0; 2725 dbregs->dr[5] = 0; 2726 dbregs->dr[6] = pcb->pcb_dr6; 2727 dbregs->dr[7] = pcb->pcb_dr7; 2728 } 2729 return (0); 2730 } 2731 2732 int 2733 set_dbregs(struct thread *td, struct dbreg *dbregs) 2734 { 2735 struct pcb *pcb; 2736 int i; 2737 2738 if (td == NULL) { 2739 load_dr0(dbregs->dr[0]); 2740 load_dr1(dbregs->dr[1]); 2741 load_dr2(dbregs->dr[2]); 2742 load_dr3(dbregs->dr[3]); 2743 load_dr4(dbregs->dr[4]); 2744 load_dr5(dbregs->dr[5]); 2745 load_dr6(dbregs->dr[6]); 2746 load_dr7(dbregs->dr[7]); 2747 } else { 2748 /* 2749 * Don't let an illegal value for dr7 get set. Specifically, 2750 * check for undefined settings. Setting these bit patterns 2751 * result in undefined behaviour and can lead to an unexpected 2752 * TRCTRAP. 2753 */ 2754 for (i = 0; i < 4; i++) { 2755 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02) 2756 return (EINVAL); 2757 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02) 2758 return (EINVAL); 2759 } 2760 2761 pcb = td->td_pcb; 2762 2763 /* 2764 * Don't let a process set a breakpoint that is not within the 2765 * process's address space. If a process could do this, it 2766 * could halt the system by setting a breakpoint in the kernel 2767 * (if ddb was enabled). Thus, we need to check to make sure 2768 * that no breakpoints are being enabled for addresses outside 2769 * process's address space. 2770 * 2771 * XXX - what about when the watched area of the user's 2772 * address space is written into from within the kernel 2773 * ... wouldn't that still cause a breakpoint to be generated 2774 * from within kernel mode? 2775 */ 2776 2777 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) { 2778 /* dr0 is enabled */ 2779 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS) 2780 return (EINVAL); 2781 } 2782 2783 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) { 2784 /* dr1 is enabled */ 2785 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS) 2786 return (EINVAL); 2787 } 2788 2789 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) { 2790 /* dr2 is enabled */ 2791 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS) 2792 return (EINVAL); 2793 } 2794 2795 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) { 2796 /* dr3 is enabled */ 2797 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS) 2798 return (EINVAL); 2799 } 2800 2801 pcb->pcb_dr0 = dbregs->dr[0]; 2802 pcb->pcb_dr1 = dbregs->dr[1]; 2803 pcb->pcb_dr2 = dbregs->dr[2]; 2804 pcb->pcb_dr3 = dbregs->dr[3]; 2805 pcb->pcb_dr6 = dbregs->dr[6]; 2806 pcb->pcb_dr7 = dbregs->dr[7]; 2807 2808 pcb->pcb_flags |= PCB_DBREGS; 2809 } 2810 2811 return (0); 2812 } 2813 2814 /* 2815 * Return > 0 if a hardware breakpoint has been hit, and the 2816 * breakpoint was in user space. Return 0, otherwise. 2817 */ 2818 int 2819 user_dbreg_trap(void) 2820 { 2821 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */ 2822 u_int32_t bp; /* breakpoint bits extracted from dr6 */ 2823 int nbp; /* number of breakpoints that triggered */ 2824 caddr_t addr[4]; /* breakpoint addresses */ 2825 int i; 2826 2827 dr7 = rdr7(); 2828 if ((dr7 & 0x000000ff) == 0) { 2829 /* 2830 * all GE and LE bits in the dr7 register are zero, 2831 * thus the trap couldn't have been caused by the 2832 * hardware debug registers 2833 */ 2834 return 0; 2835 } 2836 2837 nbp = 0; 2838 dr6 = rdr6(); 2839 bp = dr6 & 0x0000000f; 2840 2841 if (!bp) { 2842 /* 2843 * None of the breakpoint bits are set meaning this 2844 * trap was not caused by any of the debug registers 2845 */ 2846 return 0; 2847 } 2848 2849 /* 2850 * at least one of the breakpoints were hit, check to see 2851 * which ones and if any of them are user space addresses 2852 */ 2853 2854 if (bp & 0x01) { 2855 addr[nbp++] = (caddr_t)rdr0(); 2856 } 2857 if (bp & 0x02) { 2858 addr[nbp++] = (caddr_t)rdr1(); 2859 } 2860 if (bp & 0x04) { 2861 addr[nbp++] = (caddr_t)rdr2(); 2862 } 2863 if (bp & 0x08) { 2864 addr[nbp++] = (caddr_t)rdr3(); 2865 } 2866 2867 for (i = 0; i < nbp; i++) { 2868 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) { 2869 /* 2870 * addr[i] is in user space 2871 */ 2872 return nbp; 2873 } 2874 } 2875 2876 /* 2877 * None of the breakpoints are in user space. 2878 */ 2879 return 0; 2880 } 2881 2882 #ifdef KDB 2883 2884 /* 2885 * Provide inb() and outb() as functions. They are normally only available as 2886 * inline functions, thus cannot be called from the debugger. 2887 */ 2888 2889 /* silence compiler warnings */ 2890 u_char inb_(u_short); 2891 void outb_(u_short, u_char); 2892 2893 u_char 2894 inb_(u_short port) 2895 { 2896 return inb(port); 2897 } 2898 2899 void 2900 outb_(u_short port, u_char data) 2901 { 2902 outb(port, data); 2903 } 2904 2905 #endif /* KDB */
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