1 /*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 */
39
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD: releng/8.3/sys/pc98/pc98/machdep.c 230284 2012-01-17 22:08:58Z bz $");
42
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
45 #include "opt_cpu.h"
46 #include "opt_ddb.h"
47 #include "opt_inet.h"
48 #include "opt_ipx.h"
49 #include "opt_isa.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
52 #include "opt_npx.h"
53 #include "opt_perfmon.h"
54
55 #include <sys/param.h>
56 #include <sys/proc.h>
57 #include <sys/systm.h>
58 #include <sys/bio.h>
59 #include <sys/buf.h>
60 #include <sys/bus.h>
61 #include <sys/callout.h>
62 #include <sys/cons.h>
63 #include <sys/cpu.h>
64 #include <sys/eventhandler.h>
65 #include <sys/exec.h>
66 #include <sys/imgact.h>
67 #include <sys/kdb.h>
68 #include <sys/kernel.h>
69 #include <sys/ktr.h>
70 #include <sys/linker.h>
71 #include <sys/lock.h>
72 #include <sys/malloc.h>
73 #include <sys/msgbuf.h>
74 #include <sys/mutex.h>
75 #include <sys/pcpu.h>
76 #include <sys/ptrace.h>
77 #include <sys/reboot.h>
78 #include <sys/sched.h>
79 #include <sys/signalvar.h>
80 #include <sys/sysctl.h>
81 #include <sys/sysent.h>
82 #include <sys/sysproto.h>
83 #include <sys/ucontext.h>
84 #include <sys/vmmeter.h>
85
86 #include <vm/vm.h>
87 #include <vm/vm_extern.h>
88 #include <vm/vm_kern.h>
89 #include <vm/vm_page.h>
90 #include <vm/vm_map.h>
91 #include <vm/vm_object.h>
92 #include <vm/vm_pager.h>
93 #include <vm/vm_param.h>
94
95 #ifdef DDB
96 #ifndef KDB
97 #error KDB must be enabled in order for DDB to work!
98 #endif
99 #include <ddb/ddb.h>
100 #include <ddb/db_sym.h>
101 #endif
102
103 #include <pc98/pc98/pc98_machdep.h>
104
105 #include <net/netisr.h>
106
107 #include <machine/bootinfo.h>
108 #include <machine/clock.h>
109 #include <machine/cpu.h>
110 #include <machine/cputypes.h>
111 #include <machine/intr_machdep.h>
112 #include <machine/mca.h>
113 #include <machine/md_var.h>
114 #include <machine/pc/bios.h>
115 #include <machine/pcb.h>
116 #include <machine/pcb_ext.h>
117 #include <machine/proc.h>
118 #include <machine/reg.h>
119 #include <machine/sigframe.h>
120 #include <machine/specialreg.h>
121 #include <machine/vm86.h>
122 #ifdef PERFMON
123 #include <machine/perfmon.h>
124 #endif
125 #ifdef SMP
126 #include <machine/smp.h>
127 #endif
128
129 #ifdef DEV_ISA
130 #include <i386/isa/icu.h>
131 #endif
132
133 /* Sanity check for __curthread() */
134 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
135
136 extern void init386(int first);
137 extern void dblfault_handler(void);
138
139 extern void printcpuinfo(void); /* XXX header file */
140 extern void finishidentcpu(void);
141 extern void panicifcpuunsupported(void);
142 extern void initializecpu(void);
143
144 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
145 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
146
147 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
148 #define CPU_ENABLE_SSE
149 #endif
150
151 static void cpu_startup(void *);
152 static void fpstate_drop(struct thread *td);
153 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
154 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
155 #ifdef CPU_ENABLE_SSE
156 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
157 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
158 #endif /* CPU_ENABLE_SSE */
159 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
160
161 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
162 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
163
164 #ifdef DDB
165 extern vm_offset_t ksym_start, ksym_end;
166 #endif
167
168 int _udatasel, _ucodesel;
169 u_int basemem;
170
171 static int ispc98 = 1;
172 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
173
174 int cold = 1;
175
176 #ifdef COMPAT_43
177 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
178 #endif
179 #ifdef COMPAT_FREEBSD4
180 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
181 #endif
182
183 long Maxmem = 0;
184 long realmem = 0;
185
186 /*
187 * The number of PHYSMAP entries must be one less than the number of
188 * PHYSSEG entries because the PHYSMAP entry that spans the largest
189 * physical address that is accessible by ISA DMA is split into two
190 * PHYSSEG entries.
191 */
192 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
193
194 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
195 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
196
197 /* must be 2 less so 0 0 can signal end of chunks */
198 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
199 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
200
201 struct kva_md_info kmi;
202
203 static struct trapframe proc0_tf;
204 struct pcpu __pcpu[MAXCPU];
205
206 struct mtx icu_lock;
207
208 static void
209 cpu_startup(dummy)
210 void *dummy;
211 {
212 uintmax_t memsize;
213
214 /*
215 * Good {morning,afternoon,evening,night}.
216 */
217 startrtclock();
218 printcpuinfo();
219 panicifcpuunsupported();
220 #ifdef PERFMON
221 perfmon_init();
222 #endif
223 realmem = Maxmem;
224
225 /*
226 * Display physical memory.
227 */
228 memsize = ptoa((uintmax_t)Maxmem);
229 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
230
231 /*
232 * Display any holes after the first chunk of extended memory.
233 */
234 if (bootverbose) {
235 int indx;
236
237 printf("Physical memory chunk(s):\n");
238 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
239 vm_paddr_t size;
240
241 size = phys_avail[indx + 1] - phys_avail[indx];
242 printf(
243 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
244 (uintmax_t)phys_avail[indx],
245 (uintmax_t)phys_avail[indx + 1] - 1,
246 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
247 }
248 }
249
250 vm_ksubmap_init(&kmi);
251
252 printf("avail memory = %ju (%ju MB)\n",
253 ptoa((uintmax_t)cnt.v_free_count),
254 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
255
256 /*
257 * Set up buffers, so they can be used to read disk labels.
258 */
259 bufinit();
260 vm_pager_bufferinit();
261 cpu_setregs();
262 }
263
264 /*
265 * Send an interrupt to process.
266 *
267 * Stack is set up to allow sigcode stored
268 * at top to call routine, followed by kcall
269 * to sigreturn routine below. After sigreturn
270 * resets the signal mask, the stack, and the
271 * frame pointer, it returns to the user
272 * specified pc, psl.
273 */
274 #ifdef COMPAT_43
275 static void
276 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
277 {
278 struct osigframe sf, *fp;
279 struct proc *p;
280 struct thread *td;
281 struct sigacts *psp;
282 struct trapframe *regs;
283 int sig;
284 int oonstack;
285
286 td = curthread;
287 p = td->td_proc;
288 PROC_LOCK_ASSERT(p, MA_OWNED);
289 sig = ksi->ksi_signo;
290 psp = p->p_sigacts;
291 mtx_assert(&psp->ps_mtx, MA_OWNED);
292 regs = td->td_frame;
293 oonstack = sigonstack(regs->tf_esp);
294
295 /* Allocate space for the signal handler context. */
296 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
297 SIGISMEMBER(psp->ps_sigonstack, sig)) {
298 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
299 td->td_sigstk.ss_size - sizeof(struct osigframe));
300 #if defined(COMPAT_43)
301 td->td_sigstk.ss_flags |= SS_ONSTACK;
302 #endif
303 } else
304 fp = (struct osigframe *)regs->tf_esp - 1;
305
306 /* Translate the signal if appropriate. */
307 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
308 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
309
310 /* Build the argument list for the signal handler. */
311 sf.sf_signum = sig;
312 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
313 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
314 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
315 /* Signal handler installed with SA_SIGINFO. */
316 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
317 sf.sf_siginfo.si_signo = sig;
318 sf.sf_siginfo.si_code = ksi->ksi_code;
319 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
320 sf.sf_addr = 0;
321 } else {
322 /* Old FreeBSD-style arguments. */
323 sf.sf_arg2 = ksi->ksi_code;
324 sf.sf_addr = (register_t)ksi->ksi_addr;
325 sf.sf_ahu.sf_handler = catcher;
326 }
327 mtx_unlock(&psp->ps_mtx);
328 PROC_UNLOCK(p);
329
330 /* Save most if not all of trap frame. */
331 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
332 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
333 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
334 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
335 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
336 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
337 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
338 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
339 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
340 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
341 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
342 sf.sf_siginfo.si_sc.sc_gs = rgs();
343 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
344
345 /* Build the signal context to be used by osigreturn(). */
346 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
347 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
348 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
349 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
350 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
351 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
352 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
353 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
354
355 /*
356 * If we're a vm86 process, we want to save the segment registers.
357 * We also change eflags to be our emulated eflags, not the actual
358 * eflags.
359 */
360 if (regs->tf_eflags & PSL_VM) {
361 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
362 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
363 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
364
365 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
366 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
367 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
368 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
369
370 if (vm86->vm86_has_vme == 0)
371 sf.sf_siginfo.si_sc.sc_ps =
372 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
373 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
374
375 /* See sendsig() for comments. */
376 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
377 }
378
379 /*
380 * Copy the sigframe out to the user's stack.
381 */
382 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
383 #ifdef DEBUG
384 printf("process %ld has trashed its stack\n", (long)p->p_pid);
385 #endif
386 PROC_LOCK(p);
387 sigexit(td, SIGILL);
388 }
389
390 regs->tf_esp = (int)fp;
391 regs->tf_eip = PS_STRINGS - szosigcode;
392 regs->tf_eflags &= ~(PSL_T | PSL_D);
393 regs->tf_cs = _ucodesel;
394 regs->tf_ds = _udatasel;
395 regs->tf_es = _udatasel;
396 regs->tf_fs = _udatasel;
397 load_gs(_udatasel);
398 regs->tf_ss = _udatasel;
399 PROC_LOCK(p);
400 mtx_lock(&psp->ps_mtx);
401 }
402 #endif /* COMPAT_43 */
403
404 #ifdef COMPAT_FREEBSD4
405 static void
406 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
407 {
408 struct sigframe4 sf, *sfp;
409 struct proc *p;
410 struct thread *td;
411 struct sigacts *psp;
412 struct trapframe *regs;
413 int sig;
414 int oonstack;
415
416 td = curthread;
417 p = td->td_proc;
418 PROC_LOCK_ASSERT(p, MA_OWNED);
419 sig = ksi->ksi_signo;
420 psp = p->p_sigacts;
421 mtx_assert(&psp->ps_mtx, MA_OWNED);
422 regs = td->td_frame;
423 oonstack = sigonstack(regs->tf_esp);
424
425 /* Save user context. */
426 bzero(&sf, sizeof(sf));
427 sf.sf_uc.uc_sigmask = *mask;
428 sf.sf_uc.uc_stack = td->td_sigstk;
429 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
430 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
431 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
432 sf.sf_uc.uc_mcontext.mc_gs = rgs();
433 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
434 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
435 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
436 bzero(sf.sf_uc.uc_mcontext.__spare__,
437 sizeof(sf.sf_uc.uc_mcontext.__spare__));
438 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
439
440 /* Allocate space for the signal handler context. */
441 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
442 SIGISMEMBER(psp->ps_sigonstack, sig)) {
443 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
444 td->td_sigstk.ss_size - sizeof(struct sigframe4));
445 #if defined(COMPAT_43)
446 td->td_sigstk.ss_flags |= SS_ONSTACK;
447 #endif
448 } else
449 sfp = (struct sigframe4 *)regs->tf_esp - 1;
450
451 /* Translate the signal if appropriate. */
452 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
453 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
454
455 /* Build the argument list for the signal handler. */
456 sf.sf_signum = sig;
457 sf.sf_ucontext = (register_t)&sfp->sf_uc;
458 bzero(&sf.sf_si, sizeof(sf.sf_si));
459 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
460 /* Signal handler installed with SA_SIGINFO. */
461 sf.sf_siginfo = (register_t)&sfp->sf_si;
462 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
463
464 /* Fill in POSIX parts */
465 sf.sf_si.si_signo = sig;
466 sf.sf_si.si_code = ksi->ksi_code;
467 sf.sf_si.si_addr = ksi->ksi_addr;
468 } else {
469 /* Old FreeBSD-style arguments. */
470 sf.sf_siginfo = ksi->ksi_code;
471 sf.sf_addr = (register_t)ksi->ksi_addr;
472 sf.sf_ahu.sf_handler = catcher;
473 }
474 mtx_unlock(&psp->ps_mtx);
475 PROC_UNLOCK(p);
476
477 /*
478 * If we're a vm86 process, we want to save the segment registers.
479 * We also change eflags to be our emulated eflags, not the actual
480 * eflags.
481 */
482 if (regs->tf_eflags & PSL_VM) {
483 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
484 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
485
486 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
487 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
488 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
489 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
490
491 if (vm86->vm86_has_vme == 0)
492 sf.sf_uc.uc_mcontext.mc_eflags =
493 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
494 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
495
496 /*
497 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
498 * syscalls made by the signal handler. This just avoids
499 * wasting time for our lazy fixup of such faults. PSL_NT
500 * does nothing in vm86 mode, but vm86 programs can set it
501 * almost legitimately in probes for old cpu types.
502 */
503 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
504 }
505
506 /*
507 * Copy the sigframe out to the user's stack.
508 */
509 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
510 #ifdef DEBUG
511 printf("process %ld has trashed its stack\n", (long)p->p_pid);
512 #endif
513 PROC_LOCK(p);
514 sigexit(td, SIGILL);
515 }
516
517 regs->tf_esp = (int)sfp;
518 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
519 regs->tf_eflags &= ~(PSL_T | PSL_D);
520 regs->tf_cs = _ucodesel;
521 regs->tf_ds = _udatasel;
522 regs->tf_es = _udatasel;
523 regs->tf_fs = _udatasel;
524 regs->tf_ss = _udatasel;
525 PROC_LOCK(p);
526 mtx_lock(&psp->ps_mtx);
527 }
528 #endif /* COMPAT_FREEBSD4 */
529
530 void
531 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
532 {
533 struct sigframe sf, *sfp;
534 struct proc *p;
535 struct thread *td;
536 struct sigacts *psp;
537 char *sp;
538 struct trapframe *regs;
539 struct segment_descriptor *sdp;
540 int sig;
541 int oonstack;
542
543 td = curthread;
544 p = td->td_proc;
545 PROC_LOCK_ASSERT(p, MA_OWNED);
546 sig = ksi->ksi_signo;
547 psp = p->p_sigacts;
548 mtx_assert(&psp->ps_mtx, MA_OWNED);
549 #ifdef COMPAT_FREEBSD4
550 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
551 freebsd4_sendsig(catcher, ksi, mask);
552 return;
553 }
554 #endif
555 #ifdef COMPAT_43
556 if (SIGISMEMBER(psp->ps_osigset, sig)) {
557 osendsig(catcher, ksi, mask);
558 return;
559 }
560 #endif
561 regs = td->td_frame;
562 oonstack = sigonstack(regs->tf_esp);
563
564 /* Save user context. */
565 bzero(&sf, sizeof(sf));
566 sf.sf_uc.uc_sigmask = *mask;
567 sf.sf_uc.uc_stack = td->td_sigstk;
568 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
569 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
570 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
571 sf.sf_uc.uc_mcontext.mc_gs = rgs();
572 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
573 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
574 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
575 fpstate_drop(td);
576 /*
577 * Unconditionally fill the fsbase and gsbase into the mcontext.
578 */
579 sdp = &td->td_pcb->pcb_fsd;
580 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
581 sdp->sd_lobase;
582 sdp = &td->td_pcb->pcb_gsd;
583 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
584 sdp->sd_lobase;
585 bzero(sf.sf_uc.uc_mcontext.mc_spare1,
586 sizeof(sf.sf_uc.uc_mcontext.mc_spare1));
587 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
588 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
589 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
590
591 /* Allocate space for the signal handler context. */
592 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
593 SIGISMEMBER(psp->ps_sigonstack, sig)) {
594 sp = td->td_sigstk.ss_sp +
595 td->td_sigstk.ss_size - sizeof(struct sigframe);
596 #if defined(COMPAT_43)
597 td->td_sigstk.ss_flags |= SS_ONSTACK;
598 #endif
599 } else
600 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
601 /* Align to 16 bytes. */
602 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
603
604 /* Translate the signal if appropriate. */
605 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
606 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
607
608 /* Build the argument list for the signal handler. */
609 sf.sf_signum = sig;
610 sf.sf_ucontext = (register_t)&sfp->sf_uc;
611 bzero(&sf.sf_si, sizeof(sf.sf_si));
612 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
613 /* Signal handler installed with SA_SIGINFO. */
614 sf.sf_siginfo = (register_t)&sfp->sf_si;
615 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
616
617 /* Fill in POSIX parts */
618 sf.sf_si = ksi->ksi_info;
619 sf.sf_si.si_signo = sig; /* maybe a translated signal */
620 } else {
621 /* Old FreeBSD-style arguments. */
622 sf.sf_siginfo = ksi->ksi_code;
623 sf.sf_addr = (register_t)ksi->ksi_addr;
624 sf.sf_ahu.sf_handler = catcher;
625 }
626 mtx_unlock(&psp->ps_mtx);
627 PROC_UNLOCK(p);
628
629 /*
630 * If we're a vm86 process, we want to save the segment registers.
631 * We also change eflags to be our emulated eflags, not the actual
632 * eflags.
633 */
634 if (regs->tf_eflags & PSL_VM) {
635 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
636 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
637
638 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
639 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
640 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
641 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
642
643 if (vm86->vm86_has_vme == 0)
644 sf.sf_uc.uc_mcontext.mc_eflags =
645 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
646 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
647
648 /*
649 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
650 * syscalls made by the signal handler. This just avoids
651 * wasting time for our lazy fixup of such faults. PSL_NT
652 * does nothing in vm86 mode, but vm86 programs can set it
653 * almost legitimately in probes for old cpu types.
654 */
655 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
656 }
657
658 /*
659 * Copy the sigframe out to the user's stack.
660 */
661 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
662 #ifdef DEBUG
663 printf("process %ld has trashed its stack\n", (long)p->p_pid);
664 #endif
665 PROC_LOCK(p);
666 sigexit(td, SIGILL);
667 }
668
669 regs->tf_esp = (int)sfp;
670 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
671 regs->tf_eflags &= ~(PSL_T | PSL_D);
672 regs->tf_cs = _ucodesel;
673 regs->tf_ds = _udatasel;
674 regs->tf_es = _udatasel;
675 regs->tf_fs = _udatasel;
676 regs->tf_ss = _udatasel;
677 PROC_LOCK(p);
678 mtx_lock(&psp->ps_mtx);
679 }
680
681 /*
682 * System call to cleanup state after a signal
683 * has been taken. Reset signal mask and
684 * stack state from context left by sendsig (above).
685 * Return to previous pc and psl as specified by
686 * context left by sendsig. Check carefully to
687 * make sure that the user has not modified the
688 * state to gain improper privileges.
689 *
690 * MPSAFE
691 */
692 #ifdef COMPAT_43
693 int
694 osigreturn(td, uap)
695 struct thread *td;
696 struct osigreturn_args /* {
697 struct osigcontext *sigcntxp;
698 } */ *uap;
699 {
700 struct osigcontext sc;
701 struct trapframe *regs;
702 struct osigcontext *scp;
703 int eflags, error;
704 ksiginfo_t ksi;
705
706 regs = td->td_frame;
707 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
708 if (error != 0)
709 return (error);
710 scp = ≻
711 eflags = scp->sc_ps;
712 if (eflags & PSL_VM) {
713 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
714 struct vm86_kernel *vm86;
715
716 /*
717 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
718 * set up the vm86 area, and we can't enter vm86 mode.
719 */
720 if (td->td_pcb->pcb_ext == 0)
721 return (EINVAL);
722 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
723 if (vm86->vm86_inited == 0)
724 return (EINVAL);
725
726 /* Go back to user mode if both flags are set. */
727 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
728 ksiginfo_init_trap(&ksi);
729 ksi.ksi_signo = SIGBUS;
730 ksi.ksi_code = BUS_OBJERR;
731 ksi.ksi_addr = (void *)regs->tf_eip;
732 trapsignal(td, &ksi);
733 }
734
735 if (vm86->vm86_has_vme) {
736 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
737 (eflags & VME_USERCHANGE) | PSL_VM;
738 } else {
739 vm86->vm86_eflags = eflags; /* save VIF, VIP */
740 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
741 (eflags & VM_USERCHANGE) | PSL_VM;
742 }
743 tf->tf_vm86_ds = scp->sc_ds;
744 tf->tf_vm86_es = scp->sc_es;
745 tf->tf_vm86_fs = scp->sc_fs;
746 tf->tf_vm86_gs = scp->sc_gs;
747 tf->tf_ds = _udatasel;
748 tf->tf_es = _udatasel;
749 tf->tf_fs = _udatasel;
750 } else {
751 /*
752 * Don't allow users to change privileged or reserved flags.
753 */
754 /*
755 * XXX do allow users to change the privileged flag PSL_RF.
756 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
757 * should sometimes set it there too. tf_eflags is kept in
758 * the signal context during signal handling and there is no
759 * other place to remember it, so the PSL_RF bit may be
760 * corrupted by the signal handler without us knowing.
761 * Corruption of the PSL_RF bit at worst causes one more or
762 * one less debugger trap, so allowing it is fairly harmless.
763 */
764 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
765 return (EINVAL);
766 }
767
768 /*
769 * Don't allow users to load a valid privileged %cs. Let the
770 * hardware check for invalid selectors, excess privilege in
771 * other selectors, invalid %eip's and invalid %esp's.
772 */
773 if (!CS_SECURE(scp->sc_cs)) {
774 ksiginfo_init_trap(&ksi);
775 ksi.ksi_signo = SIGBUS;
776 ksi.ksi_code = BUS_OBJERR;
777 ksi.ksi_trapno = T_PROTFLT;
778 ksi.ksi_addr = (void *)regs->tf_eip;
779 trapsignal(td, &ksi);
780 return (EINVAL);
781 }
782 regs->tf_ds = scp->sc_ds;
783 regs->tf_es = scp->sc_es;
784 regs->tf_fs = scp->sc_fs;
785 }
786
787 /* Restore remaining registers. */
788 regs->tf_eax = scp->sc_eax;
789 regs->tf_ebx = scp->sc_ebx;
790 regs->tf_ecx = scp->sc_ecx;
791 regs->tf_edx = scp->sc_edx;
792 regs->tf_esi = scp->sc_esi;
793 regs->tf_edi = scp->sc_edi;
794 regs->tf_cs = scp->sc_cs;
795 regs->tf_ss = scp->sc_ss;
796 regs->tf_isp = scp->sc_isp;
797 regs->tf_ebp = scp->sc_fp;
798 regs->tf_esp = scp->sc_sp;
799 regs->tf_eip = scp->sc_pc;
800 regs->tf_eflags = eflags;
801
802 #if defined(COMPAT_43)
803 if (scp->sc_onstack & 1)
804 td->td_sigstk.ss_flags |= SS_ONSTACK;
805 else
806 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
807 #endif
808 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
809 SIGPROCMASK_OLD);
810 return (EJUSTRETURN);
811 }
812 #endif /* COMPAT_43 */
813
814 #ifdef COMPAT_FREEBSD4
815 /*
816 * MPSAFE
817 */
818 int
819 freebsd4_sigreturn(td, uap)
820 struct thread *td;
821 struct freebsd4_sigreturn_args /* {
822 const ucontext4 *sigcntxp;
823 } */ *uap;
824 {
825 struct ucontext4 uc;
826 struct trapframe *regs;
827 struct ucontext4 *ucp;
828 int cs, eflags, error;
829 ksiginfo_t ksi;
830
831 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
832 if (error != 0)
833 return (error);
834 ucp = &uc;
835 regs = td->td_frame;
836 eflags = ucp->uc_mcontext.mc_eflags;
837 if (eflags & PSL_VM) {
838 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
839 struct vm86_kernel *vm86;
840
841 /*
842 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
843 * set up the vm86 area, and we can't enter vm86 mode.
844 */
845 if (td->td_pcb->pcb_ext == 0)
846 return (EINVAL);
847 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
848 if (vm86->vm86_inited == 0)
849 return (EINVAL);
850
851 /* Go back to user mode if both flags are set. */
852 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
853 ksiginfo_init_trap(&ksi);
854 ksi.ksi_signo = SIGBUS;
855 ksi.ksi_code = BUS_OBJERR;
856 ksi.ksi_addr = (void *)regs->tf_eip;
857 trapsignal(td, &ksi);
858 }
859 if (vm86->vm86_has_vme) {
860 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
861 (eflags & VME_USERCHANGE) | PSL_VM;
862 } else {
863 vm86->vm86_eflags = eflags; /* save VIF, VIP */
864 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
865 (eflags & VM_USERCHANGE) | PSL_VM;
866 }
867 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
868 tf->tf_eflags = eflags;
869 tf->tf_vm86_ds = tf->tf_ds;
870 tf->tf_vm86_es = tf->tf_es;
871 tf->tf_vm86_fs = tf->tf_fs;
872 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
873 tf->tf_ds = _udatasel;
874 tf->tf_es = _udatasel;
875 tf->tf_fs = _udatasel;
876 } else {
877 /*
878 * Don't allow users to change privileged or reserved flags.
879 */
880 /*
881 * XXX do allow users to change the privileged flag PSL_RF.
882 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
883 * should sometimes set it there too. tf_eflags is kept in
884 * the signal context during signal handling and there is no
885 * other place to remember it, so the PSL_RF bit may be
886 * corrupted by the signal handler without us knowing.
887 * Corruption of the PSL_RF bit at worst causes one more or
888 * one less debugger trap, so allowing it is fairly harmless.
889 */
890 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
891 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
892 td->td_proc->p_pid, td->td_name, eflags);
893 return (EINVAL);
894 }
895
896 /*
897 * Don't allow users to load a valid privileged %cs. Let the
898 * hardware check for invalid selectors, excess privilege in
899 * other selectors, invalid %eip's and invalid %esp's.
900 */
901 cs = ucp->uc_mcontext.mc_cs;
902 if (!CS_SECURE(cs)) {
903 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
904 td->td_proc->p_pid, td->td_name, cs);
905 ksiginfo_init_trap(&ksi);
906 ksi.ksi_signo = SIGBUS;
907 ksi.ksi_code = BUS_OBJERR;
908 ksi.ksi_trapno = T_PROTFLT;
909 ksi.ksi_addr = (void *)regs->tf_eip;
910 trapsignal(td, &ksi);
911 return (EINVAL);
912 }
913
914 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
915 }
916
917 #if defined(COMPAT_43)
918 if (ucp->uc_mcontext.mc_onstack & 1)
919 td->td_sigstk.ss_flags |= SS_ONSTACK;
920 else
921 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
922 #endif
923 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
924 return (EJUSTRETURN);
925 }
926 #endif /* COMPAT_FREEBSD4 */
927
928 /*
929 * MPSAFE
930 */
931 int
932 sigreturn(td, uap)
933 struct thread *td;
934 struct sigreturn_args /* {
935 const struct __ucontext *sigcntxp;
936 } */ *uap;
937 {
938 ucontext_t uc;
939 struct trapframe *regs;
940 ucontext_t *ucp;
941 int cs, eflags, error, ret;
942 ksiginfo_t ksi;
943
944 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
945 if (error != 0)
946 return (error);
947 ucp = &uc;
948 regs = td->td_frame;
949 eflags = ucp->uc_mcontext.mc_eflags;
950 if (eflags & PSL_VM) {
951 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
952 struct vm86_kernel *vm86;
953
954 /*
955 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
956 * set up the vm86 area, and we can't enter vm86 mode.
957 */
958 if (td->td_pcb->pcb_ext == 0)
959 return (EINVAL);
960 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
961 if (vm86->vm86_inited == 0)
962 return (EINVAL);
963
964 /* Go back to user mode if both flags are set. */
965 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
966 ksiginfo_init_trap(&ksi);
967 ksi.ksi_signo = SIGBUS;
968 ksi.ksi_code = BUS_OBJERR;
969 ksi.ksi_addr = (void *)regs->tf_eip;
970 trapsignal(td, &ksi);
971 }
972
973 if (vm86->vm86_has_vme) {
974 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
975 (eflags & VME_USERCHANGE) | PSL_VM;
976 } else {
977 vm86->vm86_eflags = eflags; /* save VIF, VIP */
978 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
979 (eflags & VM_USERCHANGE) | PSL_VM;
980 }
981 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
982 tf->tf_eflags = eflags;
983 tf->tf_vm86_ds = tf->tf_ds;
984 tf->tf_vm86_es = tf->tf_es;
985 tf->tf_vm86_fs = tf->tf_fs;
986 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
987 tf->tf_ds = _udatasel;
988 tf->tf_es = _udatasel;
989 tf->tf_fs = _udatasel;
990 } else {
991 /*
992 * Don't allow users to change privileged or reserved flags.
993 */
994 /*
995 * XXX do allow users to change the privileged flag PSL_RF.
996 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
997 * should sometimes set it there too. tf_eflags is kept in
998 * the signal context during signal handling and there is no
999 * other place to remember it, so the PSL_RF bit may be
1000 * corrupted by the signal handler without us knowing.
1001 * Corruption of the PSL_RF bit at worst causes one more or
1002 * one less debugger trap, so allowing it is fairly harmless.
1003 */
1004 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1005 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1006 td->td_proc->p_pid, td->td_name, eflags);
1007 return (EINVAL);
1008 }
1009
1010 /*
1011 * Don't allow users to load a valid privileged %cs. Let the
1012 * hardware check for invalid selectors, excess privilege in
1013 * other selectors, invalid %eip's and invalid %esp's.
1014 */
1015 cs = ucp->uc_mcontext.mc_cs;
1016 if (!CS_SECURE(cs)) {
1017 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1018 td->td_proc->p_pid, td->td_name, cs);
1019 ksiginfo_init_trap(&ksi);
1020 ksi.ksi_signo = SIGBUS;
1021 ksi.ksi_code = BUS_OBJERR;
1022 ksi.ksi_trapno = T_PROTFLT;
1023 ksi.ksi_addr = (void *)regs->tf_eip;
1024 trapsignal(td, &ksi);
1025 return (EINVAL);
1026 }
1027
1028 ret = set_fpcontext(td, &ucp->uc_mcontext);
1029 if (ret != 0)
1030 return (ret);
1031 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1032 }
1033
1034 #if defined(COMPAT_43)
1035 if (ucp->uc_mcontext.mc_onstack & 1)
1036 td->td_sigstk.ss_flags |= SS_ONSTACK;
1037 else
1038 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1039 #endif
1040
1041 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1042 return (EJUSTRETURN);
1043 }
1044
1045 /*
1046 * Machine dependent boot() routine
1047 *
1048 * I haven't seen anything to put here yet
1049 * Possibly some stuff might be grafted back here from boot()
1050 */
1051 void
1052 cpu_boot(int howto)
1053 {
1054 }
1055
1056 /*
1057 * Flush the D-cache for non-DMA I/O so that the I-cache can
1058 * be made coherent later.
1059 */
1060 void
1061 cpu_flush_dcache(void *ptr, size_t len)
1062 {
1063 /* Not applicable */
1064 }
1065
1066 /* Get current clock frequency for the given cpu id. */
1067 int
1068 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1069 {
1070 register_t reg;
1071 uint64_t tsc1, tsc2;
1072
1073 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1074 return (EINVAL);
1075 if (!tsc_present)
1076 return (EOPNOTSUPP);
1077
1078 /* If we're booting, trust the rate calibrated moments ago. */
1079 if (cold) {
1080 *rate = tsc_freq;
1081 return (0);
1082 }
1083
1084 #ifdef SMP
1085 /* Schedule ourselves on the indicated cpu. */
1086 thread_lock(curthread);
1087 sched_bind(curthread, cpu_id);
1088 thread_unlock(curthread);
1089 #endif
1090
1091 /* Calibrate by measuring a short delay. */
1092 reg = intr_disable();
1093 tsc1 = rdtsc();
1094 DELAY(1000);
1095 tsc2 = rdtsc();
1096 intr_restore(reg);
1097
1098 #ifdef SMP
1099 thread_lock(curthread);
1100 sched_unbind(curthread);
1101 thread_unlock(curthread);
1102 #endif
1103
1104 /*
1105 * Calculate the difference in readings, convert to Mhz, and
1106 * subtract 0.5% of the total. Empirical testing has shown that
1107 * overhead in DELAY() works out to approximately this value.
1108 */
1109 tsc2 -= tsc1;
1110 *rate = tsc2 * 1000 - tsc2 * 5;
1111 return (0);
1112 }
1113
1114
1115 /*
1116 * Shutdown the CPU as much as possible
1117 */
1118 void
1119 cpu_halt(void)
1120 {
1121 for (;;)
1122 __asm__ ("hlt");
1123 }
1124
1125 static void
1126 cpu_idle_hlt(int busy)
1127 {
1128 /*
1129 * we must absolutely guarentee that hlt is the next instruction
1130 * after sti or we introduce a timing window.
1131 */
1132 disable_intr();
1133 if (sched_runnable())
1134 enable_intr();
1135 else
1136 __asm __volatile("sti; hlt");
1137 }
1138
1139 static void
1140 cpu_idle_spin(int busy)
1141 {
1142 return;
1143 }
1144
1145 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1146
1147 void
1148 cpu_idle(int busy)
1149 {
1150 #if defined(SMP)
1151 if (mp_grab_cpu_hlt())
1152 return;
1153 #endif
1154 cpu_idle_fn(busy);
1155 }
1156
1157 /*
1158 * mwait cpu power states. Lower 4 bits are sub-states.
1159 */
1160 #define MWAIT_C0 0xf0
1161 #define MWAIT_C1 0x00
1162 #define MWAIT_C2 0x10
1163 #define MWAIT_C3 0x20
1164 #define MWAIT_C4 0x30
1165
1166 #define MWAIT_DISABLED 0x0
1167 #define MWAIT_WOKEN 0x1
1168 #define MWAIT_WAITING 0x2
1169
1170 static void
1171 cpu_idle_mwait(int busy)
1172 {
1173 int *mwait;
1174
1175 mwait = (int *)PCPU_PTR(monitorbuf);
1176 *mwait = MWAIT_WAITING;
1177 if (sched_runnable())
1178 return;
1179 cpu_monitor(mwait, 0, 0);
1180 if (*mwait == MWAIT_WAITING)
1181 cpu_mwait(0, MWAIT_C1);
1182 }
1183
1184 static void
1185 cpu_idle_mwait_hlt(int busy)
1186 {
1187 int *mwait;
1188
1189 mwait = (int *)PCPU_PTR(monitorbuf);
1190 if (busy == 0) {
1191 *mwait = MWAIT_DISABLED;
1192 cpu_idle_hlt(busy);
1193 return;
1194 }
1195 *mwait = MWAIT_WAITING;
1196 if (sched_runnable())
1197 return;
1198 cpu_monitor(mwait, 0, 0);
1199 if (*mwait == MWAIT_WAITING)
1200 cpu_mwait(0, MWAIT_C1);
1201 }
1202
1203 int
1204 cpu_idle_wakeup(int cpu)
1205 {
1206 struct pcpu *pcpu;
1207 int *mwait;
1208
1209 if (cpu_idle_fn == cpu_idle_spin)
1210 return (1);
1211 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt)
1212 return (0);
1213 pcpu = pcpu_find(cpu);
1214 mwait = (int *)pcpu->pc_monitorbuf;
1215 /*
1216 * This doesn't need to be atomic since missing the race will
1217 * simply result in unnecessary IPIs.
1218 */
1219 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED)
1220 return (0);
1221 *mwait = MWAIT_WOKEN;
1222
1223 return (1);
1224 }
1225
1226 /*
1227 * Ordered by speed/power consumption.
1228 */
1229 struct {
1230 void *id_fn;
1231 char *id_name;
1232 } idle_tbl[] = {
1233 { cpu_idle_spin, "spin" },
1234 { cpu_idle_mwait, "mwait" },
1235 { cpu_idle_mwait_hlt, "mwait_hlt" },
1236 { cpu_idle_hlt, "hlt" },
1237 { NULL, NULL }
1238 };
1239
1240 static int
1241 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1242 {
1243 char *avail, *p;
1244 int error;
1245 int i;
1246
1247 avail = malloc(256, M_TEMP, M_WAITOK);
1248 p = avail;
1249 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1250 if (strstr(idle_tbl[i].id_name, "mwait") &&
1251 (cpu_feature2 & CPUID2_MON) == 0)
1252 continue;
1253 p += sprintf(p, "%s, ", idle_tbl[i].id_name);
1254 }
1255 error = sysctl_handle_string(oidp, avail, 0, req);
1256 free(avail, M_TEMP);
1257 return (error);
1258 }
1259
1260 static int
1261 idle_sysctl(SYSCTL_HANDLER_ARGS)
1262 {
1263 char buf[16];
1264 int error;
1265 char *p;
1266 int i;
1267
1268 p = "unknown";
1269 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1270 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1271 p = idle_tbl[i].id_name;
1272 break;
1273 }
1274 }
1275 strncpy(buf, p, sizeof(buf));
1276 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1277 if (error != 0 || req->newptr == NULL)
1278 return (error);
1279 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1280 if (strstr(idle_tbl[i].id_name, "mwait") &&
1281 (cpu_feature2 & CPUID2_MON) == 0)
1282 continue;
1283 if (strcmp(idle_tbl[i].id_name, buf))
1284 continue;
1285 cpu_idle_fn = idle_tbl[i].id_fn;
1286 return (0);
1287 }
1288 return (EINVAL);
1289 }
1290
1291 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1292 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1293
1294 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1295 idle_sysctl, "A", "currently selected idle function");
1296
1297 /*
1298 * Reset registers to default values on exec.
1299 */
1300 void
1301 exec_setregs(td, entry, stack, ps_strings)
1302 struct thread *td;
1303 u_long entry;
1304 u_long stack;
1305 u_long ps_strings;
1306 {
1307 struct trapframe *regs = td->td_frame;
1308 struct pcb *pcb = td->td_pcb;
1309
1310 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1311 pcb->pcb_gs = _udatasel;
1312 load_gs(_udatasel);
1313
1314 mtx_lock_spin(&dt_lock);
1315 if (td->td_proc->p_md.md_ldt)
1316 user_ldt_free(td);
1317 else
1318 mtx_unlock_spin(&dt_lock);
1319
1320 bzero((char *)regs, sizeof(struct trapframe));
1321 regs->tf_eip = entry;
1322 regs->tf_esp = stack;
1323 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1324 regs->tf_ss = _udatasel;
1325 regs->tf_ds = _udatasel;
1326 regs->tf_es = _udatasel;
1327 regs->tf_fs = _udatasel;
1328 regs->tf_cs = _ucodesel;
1329
1330 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1331 regs->tf_ebx = ps_strings;
1332
1333 /*
1334 * Reset the hardware debug registers if they were in use.
1335 * They won't have any meaning for the newly exec'd process.
1336 */
1337 if (pcb->pcb_flags & PCB_DBREGS) {
1338 pcb->pcb_dr0 = 0;
1339 pcb->pcb_dr1 = 0;
1340 pcb->pcb_dr2 = 0;
1341 pcb->pcb_dr3 = 0;
1342 pcb->pcb_dr6 = 0;
1343 pcb->pcb_dr7 = 0;
1344 if (pcb == PCPU_GET(curpcb)) {
1345 /*
1346 * Clear the debug registers on the running
1347 * CPU, otherwise they will end up affecting
1348 * the next process we switch to.
1349 */
1350 reset_dbregs();
1351 }
1352 pcb->pcb_flags &= ~PCB_DBREGS;
1353 }
1354
1355 /*
1356 * Initialize the math emulator (if any) for the current process.
1357 * Actually, just clear the bit that says that the emulator has
1358 * been initialized. Initialization is delayed until the process
1359 * traps to the emulator (if it is done at all) mainly because
1360 * emulators don't provide an entry point for initialization.
1361 */
1362 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1363 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1364
1365 /*
1366 * Drop the FP state if we hold it, so that the process gets a
1367 * clean FP state if it uses the FPU again.
1368 */
1369 fpstate_drop(td);
1370
1371 /*
1372 * XXX - Linux emulator
1373 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1374 * on it.
1375 */
1376 td->td_retval[1] = 0;
1377 }
1378
1379 void
1380 cpu_setregs(void)
1381 {
1382 unsigned int cr0;
1383
1384 cr0 = rcr0();
1385
1386 /*
1387 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1388 *
1389 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1390 * instructions. We must set the CR0_MP bit and use the CR0_TS
1391 * bit to control the trap, because setting the CR0_EM bit does
1392 * not cause WAIT instructions to trap. It's important to trap
1393 * WAIT instructions - otherwise the "wait" variants of no-wait
1394 * control instructions would degenerate to the "no-wait" variants
1395 * after FP context switches but work correctly otherwise. It's
1396 * particularly important to trap WAITs when there is no NPX -
1397 * otherwise the "wait" variants would always degenerate.
1398 *
1399 * Try setting CR0_NE to get correct error reporting on 486DX's.
1400 * Setting it should fail or do nothing on lesser processors.
1401 */
1402 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1403 load_cr0(cr0);
1404 load_gs(_udatasel);
1405 }
1406
1407 u_long bootdev; /* not a struct cdev *- encoding is different */
1408 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1409 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1410
1411 /*
1412 * Initialize 386 and configure to run kernel
1413 */
1414
1415 /*
1416 * Initialize segments & interrupt table
1417 */
1418
1419 int _default_ldt;
1420
1421 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1422 union descriptor ldt[NLDT]; /* local descriptor table */
1423 static struct gate_descriptor idt0[NIDT];
1424 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1425 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1426 struct mtx dt_lock; /* lock for GDT and LDT */
1427
1428 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1429 extern int has_f00f_bug;
1430 #endif
1431
1432 static struct i386tss dblfault_tss;
1433 static char dblfault_stack[PAGE_SIZE];
1434
1435 extern vm_offset_t proc0kstack;
1436
1437
1438 /*
1439 * software prototypes -- in more palatable form.
1440 *
1441 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1442 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1443 */
1444 struct soft_segment_descriptor gdt_segs[] = {
1445 /* GNULL_SEL 0 Null Descriptor */
1446 { .ssd_base = 0x0,
1447 .ssd_limit = 0x0,
1448 .ssd_type = 0,
1449 .ssd_dpl = SEL_KPL,
1450 .ssd_p = 0,
1451 .ssd_xx = 0, .ssd_xx1 = 0,
1452 .ssd_def32 = 0,
1453 .ssd_gran = 0 },
1454 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1455 { .ssd_base = 0x0,
1456 .ssd_limit = 0xfffff,
1457 .ssd_type = SDT_MEMRWA,
1458 .ssd_dpl = SEL_KPL,
1459 .ssd_p = 1,
1460 .ssd_xx = 0, .ssd_xx1 = 0,
1461 .ssd_def32 = 1,
1462 .ssd_gran = 1 },
1463 /* GUFS_SEL 2 %fs Descriptor for user */
1464 { .ssd_base = 0x0,
1465 .ssd_limit = 0xfffff,
1466 .ssd_type = SDT_MEMRWA,
1467 .ssd_dpl = SEL_UPL,
1468 .ssd_p = 1,
1469 .ssd_xx = 0, .ssd_xx1 = 0,
1470 .ssd_def32 = 1,
1471 .ssd_gran = 1 },
1472 /* GUGS_SEL 3 %gs Descriptor for user */
1473 { .ssd_base = 0x0,
1474 .ssd_limit = 0xfffff,
1475 .ssd_type = SDT_MEMRWA,
1476 .ssd_dpl = SEL_UPL,
1477 .ssd_p = 1,
1478 .ssd_xx = 0, .ssd_xx1 = 0,
1479 .ssd_def32 = 1,
1480 .ssd_gran = 1 },
1481 /* GCODE_SEL 4 Code Descriptor for kernel */
1482 { .ssd_base = 0x0,
1483 .ssd_limit = 0xfffff,
1484 .ssd_type = SDT_MEMERA,
1485 .ssd_dpl = SEL_KPL,
1486 .ssd_p = 1,
1487 .ssd_xx = 0, .ssd_xx1 = 0,
1488 .ssd_def32 = 1,
1489 .ssd_gran = 1 },
1490 /* GDATA_SEL 5 Data Descriptor for kernel */
1491 { .ssd_base = 0x0,
1492 .ssd_limit = 0xfffff,
1493 .ssd_type = SDT_MEMRWA,
1494 .ssd_dpl = SEL_KPL,
1495 .ssd_p = 1,
1496 .ssd_xx = 0, .ssd_xx1 = 0,
1497 .ssd_def32 = 1,
1498 .ssd_gran = 1 },
1499 /* GUCODE_SEL 6 Code Descriptor for user */
1500 { .ssd_base = 0x0,
1501 .ssd_limit = 0xfffff,
1502 .ssd_type = SDT_MEMERA,
1503 .ssd_dpl = SEL_UPL,
1504 .ssd_p = 1,
1505 .ssd_xx = 0, .ssd_xx1 = 0,
1506 .ssd_def32 = 1,
1507 .ssd_gran = 1 },
1508 /* GUDATA_SEL 7 Data Descriptor for user */
1509 { .ssd_base = 0x0,
1510 .ssd_limit = 0xfffff,
1511 .ssd_type = SDT_MEMRWA,
1512 .ssd_dpl = SEL_UPL,
1513 .ssd_p = 1,
1514 .ssd_xx = 0, .ssd_xx1 = 0,
1515 .ssd_def32 = 1,
1516 .ssd_gran = 1 },
1517 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1518 { .ssd_base = 0x400,
1519 .ssd_limit = 0xfffff,
1520 .ssd_type = SDT_MEMRWA,
1521 .ssd_dpl = SEL_KPL,
1522 .ssd_p = 1,
1523 .ssd_xx = 0, .ssd_xx1 = 0,
1524 .ssd_def32 = 1,
1525 .ssd_gran = 1 },
1526 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1527 {
1528 .ssd_base = 0x0,
1529 .ssd_limit = sizeof(struct i386tss)-1,
1530 .ssd_type = SDT_SYS386TSS,
1531 .ssd_dpl = 0,
1532 .ssd_p = 1,
1533 .ssd_xx = 0, .ssd_xx1 = 0,
1534 .ssd_def32 = 0,
1535 .ssd_gran = 0 },
1536 /* GLDT_SEL 10 LDT Descriptor */
1537 { .ssd_base = (int) ldt,
1538 .ssd_limit = sizeof(ldt)-1,
1539 .ssd_type = SDT_SYSLDT,
1540 .ssd_dpl = SEL_UPL,
1541 .ssd_p = 1,
1542 .ssd_xx = 0, .ssd_xx1 = 0,
1543 .ssd_def32 = 0,
1544 .ssd_gran = 0 },
1545 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1546 { .ssd_base = (int) ldt,
1547 .ssd_limit = (512 * sizeof(union descriptor)-1),
1548 .ssd_type = SDT_SYSLDT,
1549 .ssd_dpl = 0,
1550 .ssd_p = 1,
1551 .ssd_xx = 0, .ssd_xx1 = 0,
1552 .ssd_def32 = 0,
1553 .ssd_gran = 0 },
1554 /* GPANIC_SEL 12 Panic Tss Descriptor */
1555 { .ssd_base = (int) &dblfault_tss,
1556 .ssd_limit = sizeof(struct i386tss)-1,
1557 .ssd_type = SDT_SYS386TSS,
1558 .ssd_dpl = 0,
1559 .ssd_p = 1,
1560 .ssd_xx = 0, .ssd_xx1 = 0,
1561 .ssd_def32 = 0,
1562 .ssd_gran = 0 },
1563 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1564 { .ssd_base = 0,
1565 .ssd_limit = 0xfffff,
1566 .ssd_type = SDT_MEMERA,
1567 .ssd_dpl = 0,
1568 .ssd_p = 1,
1569 .ssd_xx = 0, .ssd_xx1 = 0,
1570 .ssd_def32 = 0,
1571 .ssd_gran = 1 },
1572 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1573 { .ssd_base = 0,
1574 .ssd_limit = 0xfffff,
1575 .ssd_type = SDT_MEMERA,
1576 .ssd_dpl = 0,
1577 .ssd_p = 1,
1578 .ssd_xx = 0, .ssd_xx1 = 0,
1579 .ssd_def32 = 0,
1580 .ssd_gran = 1 },
1581 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1582 { .ssd_base = 0,
1583 .ssd_limit = 0xfffff,
1584 .ssd_type = SDT_MEMRWA,
1585 .ssd_dpl = 0,
1586 .ssd_p = 1,
1587 .ssd_xx = 0, .ssd_xx1 = 0,
1588 .ssd_def32 = 1,
1589 .ssd_gran = 1 },
1590 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1591 { .ssd_base = 0,
1592 .ssd_limit = 0xfffff,
1593 .ssd_type = SDT_MEMRWA,
1594 .ssd_dpl = 0,
1595 .ssd_p = 1,
1596 .ssd_xx = 0, .ssd_xx1 = 0,
1597 .ssd_def32 = 0,
1598 .ssd_gran = 1 },
1599 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1600 { .ssd_base = 0,
1601 .ssd_limit = 0xfffff,
1602 .ssd_type = SDT_MEMRWA,
1603 .ssd_dpl = 0,
1604 .ssd_p = 1,
1605 .ssd_xx = 0, .ssd_xx1 = 0,
1606 .ssd_def32 = 0,
1607 .ssd_gran = 1 },
1608 /* GNDIS_SEL 18 NDIS Descriptor */
1609 { .ssd_base = 0x0,
1610 .ssd_limit = 0x0,
1611 .ssd_type = 0,
1612 .ssd_dpl = 0,
1613 .ssd_p = 0,
1614 .ssd_xx = 0, .ssd_xx1 = 0,
1615 .ssd_def32 = 0,
1616 .ssd_gran = 0 },
1617 };
1618
1619 static struct soft_segment_descriptor ldt_segs[] = {
1620 /* Null Descriptor - overwritten by call gate */
1621 { .ssd_base = 0x0,
1622 .ssd_limit = 0x0,
1623 .ssd_type = 0,
1624 .ssd_dpl = 0,
1625 .ssd_p = 0,
1626 .ssd_xx = 0, .ssd_xx1 = 0,
1627 .ssd_def32 = 0,
1628 .ssd_gran = 0 },
1629 /* Null Descriptor - overwritten by call gate */
1630 { .ssd_base = 0x0,
1631 .ssd_limit = 0x0,
1632 .ssd_type = 0,
1633 .ssd_dpl = 0,
1634 .ssd_p = 0,
1635 .ssd_xx = 0, .ssd_xx1 = 0,
1636 .ssd_def32 = 0,
1637 .ssd_gran = 0 },
1638 /* Null Descriptor - overwritten by call gate */
1639 { .ssd_base = 0x0,
1640 .ssd_limit = 0x0,
1641 .ssd_type = 0,
1642 .ssd_dpl = 0,
1643 .ssd_p = 0,
1644 .ssd_xx = 0, .ssd_xx1 = 0,
1645 .ssd_def32 = 0,
1646 .ssd_gran = 0 },
1647 /* Code Descriptor for user */
1648 { .ssd_base = 0x0,
1649 .ssd_limit = 0xfffff,
1650 .ssd_type = SDT_MEMERA,
1651 .ssd_dpl = SEL_UPL,
1652 .ssd_p = 1,
1653 .ssd_xx = 0, .ssd_xx1 = 0,
1654 .ssd_def32 = 1,
1655 .ssd_gran = 1 },
1656 /* Null Descriptor - overwritten by call gate */
1657 { .ssd_base = 0x0,
1658 .ssd_limit = 0x0,
1659 .ssd_type = 0,
1660 .ssd_dpl = 0,
1661 .ssd_p = 0,
1662 .ssd_xx = 0, .ssd_xx1 = 0,
1663 .ssd_def32 = 0,
1664 .ssd_gran = 0 },
1665 /* Data Descriptor for user */
1666 { .ssd_base = 0x0,
1667 .ssd_limit = 0xfffff,
1668 .ssd_type = SDT_MEMRWA,
1669 .ssd_dpl = SEL_UPL,
1670 .ssd_p = 1,
1671 .ssd_xx = 0, .ssd_xx1 = 0,
1672 .ssd_def32 = 1,
1673 .ssd_gran = 1 },
1674 };
1675
1676 void
1677 setidt(idx, func, typ, dpl, selec)
1678 int idx;
1679 inthand_t *func;
1680 int typ;
1681 int dpl;
1682 int selec;
1683 {
1684 struct gate_descriptor *ip;
1685
1686 ip = idt + idx;
1687 ip->gd_looffset = (int)func;
1688 ip->gd_selector = selec;
1689 ip->gd_stkcpy = 0;
1690 ip->gd_xx = 0;
1691 ip->gd_type = typ;
1692 ip->gd_dpl = dpl;
1693 ip->gd_p = 1;
1694 ip->gd_hioffset = ((int)func)>>16 ;
1695 }
1696
1697 extern inthand_t
1698 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1699 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1700 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1701 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1702 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1703
1704 #ifdef DDB
1705 /*
1706 * Display the index and function name of any IDT entries that don't use
1707 * the default 'rsvd' entry point.
1708 */
1709 DB_SHOW_COMMAND(idt, db_show_idt)
1710 {
1711 struct gate_descriptor *ip;
1712 int idx;
1713 uintptr_t func;
1714
1715 ip = idt;
1716 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1717 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1718 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1719 db_printf("%3d\t", idx);
1720 db_printsym(func, DB_STGY_PROC);
1721 db_printf("\n");
1722 }
1723 ip++;
1724 }
1725 }
1726
1727 /* Show privileged registers. */
1728 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1729 {
1730 uint64_t idtr, gdtr;
1731
1732 idtr = ridt();
1733 db_printf("idtr\t0x%08x/%04x\n",
1734 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1735 gdtr = rgdt();
1736 db_printf("gdtr\t0x%08x/%04x\n",
1737 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1738 db_printf("ldtr\t0x%04x\n", rldt());
1739 db_printf("tr\t0x%04x\n", rtr());
1740 db_printf("cr0\t0x%08x\n", rcr0());
1741 db_printf("cr2\t0x%08x\n", rcr2());
1742 db_printf("cr3\t0x%08x\n", rcr3());
1743 db_printf("cr4\t0x%08x\n", rcr4());
1744 }
1745 #endif
1746
1747 void
1748 sdtossd(sd, ssd)
1749 struct segment_descriptor *sd;
1750 struct soft_segment_descriptor *ssd;
1751 {
1752 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1753 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1754 ssd->ssd_type = sd->sd_type;
1755 ssd->ssd_dpl = sd->sd_dpl;
1756 ssd->ssd_p = sd->sd_p;
1757 ssd->ssd_def32 = sd->sd_def32;
1758 ssd->ssd_gran = sd->sd_gran;
1759 }
1760
1761 static void
1762 basemem_setup(void)
1763 {
1764 vm_paddr_t pa;
1765 pt_entry_t *pte;
1766 int i;
1767
1768 if (basemem > 640) {
1769 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1770 basemem);
1771 basemem = 640;
1772 }
1773
1774 /*
1775 * XXX if biosbasemem is now < 640, there is a `hole'
1776 * between the end of base memory and the start of
1777 * ISA memory. The hole may be empty or it may
1778 * contain BIOS code or data. Map it read/write so
1779 * that the BIOS can write to it. (Memory from 0 to
1780 * the physical end of the kernel is mapped read-only
1781 * to begin with and then parts of it are remapped.
1782 * The parts that aren't remapped form holes that
1783 * remain read-only and are unused by the kernel.
1784 * The base memory area is below the physical end of
1785 * the kernel and right now forms a read-only hole.
1786 * The part of it from PAGE_SIZE to
1787 * (trunc_page(biosbasemem * 1024) - 1) will be
1788 * remapped and used by the kernel later.)
1789 *
1790 * This code is similar to the code used in
1791 * pmap_mapdev, but since no memory needs to be
1792 * allocated we simply change the mapping.
1793 */
1794 for (pa = trunc_page(basemem * 1024);
1795 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1796 pmap_kenter(KERNBASE + pa, pa);
1797
1798 /*
1799 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1800 * the vm86 page table so that vm86 can scribble on them using
1801 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1802 * page 0, at least as initialized here?
1803 */
1804 pte = (pt_entry_t *)vm86paddr;
1805 for (i = basemem / 4; i < 160; i++)
1806 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1807 }
1808
1809 /*
1810 * Populate the (physmap) array with base/bound pairs describing the
1811 * available physical memory in the system, then test this memory and
1812 * build the phys_avail array describing the actually-available memory.
1813 *
1814 * If we cannot accurately determine the physical memory map, then use
1815 * value from the 0xE801 call, and failing that, the RTC.
1816 *
1817 * Total memory size may be set by the kernel environment variable
1818 * hw.physmem or the compile-time define MAXMEM.
1819 *
1820 * XXX first should be vm_paddr_t.
1821 */
1822 static void
1823 getmemsize(int first)
1824 {
1825 int off, physmap_idx, pa_indx, da_indx;
1826 u_long physmem_tunable, memtest;
1827 vm_paddr_t physmap[PHYSMAP_SIZE];
1828 pt_entry_t *pte;
1829 quad_t dcons_addr, dcons_size;
1830 int i;
1831 int pg_n;
1832 u_int extmem;
1833 u_int under16;
1834 vm_paddr_t pa;
1835
1836 bzero(physmap, sizeof(physmap));
1837
1838 /* XXX - some of EPSON machines can't use PG_N */
1839 pg_n = PG_N;
1840 if (pc98_machine_type & M_EPSON_PC98) {
1841 switch (epson_machine_id) {
1842 #ifdef WB_CACHE
1843 default:
1844 #endif
1845 case EPSON_PC486_HX:
1846 case EPSON_PC486_HG:
1847 case EPSON_PC486_HA:
1848 pg_n = 0;
1849 break;
1850 }
1851 }
1852
1853 under16 = pc98_getmemsize(&basemem, &extmem);
1854 basemem_setup();
1855
1856 physmap[0] = 0;
1857 physmap[1] = basemem * 1024;
1858 physmap_idx = 2;
1859 physmap[physmap_idx] = 0x100000;
1860 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1861
1862 /*
1863 * Now, physmap contains a map of physical memory.
1864 */
1865
1866 #ifdef SMP
1867 /* make hole for AP bootstrap code */
1868 physmap[1] = mp_bootaddress(physmap[1]);
1869 #endif
1870
1871 /*
1872 * Maxmem isn't the "maximum memory", it's one larger than the
1873 * highest page of the physical address space. It should be
1874 * called something like "Maxphyspage". We may adjust this
1875 * based on ``hw.physmem'' and the results of the memory test.
1876 */
1877 Maxmem = atop(physmap[physmap_idx + 1]);
1878
1879 #ifdef MAXMEM
1880 Maxmem = MAXMEM / 4;
1881 #endif
1882
1883 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1884 Maxmem = atop(physmem_tunable);
1885
1886 /*
1887 * By default keep the memtest enabled. Use a general name so that
1888 * one could eventually do more with the code than just disable it.
1889 */
1890 memtest = 1;
1891 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1892
1893 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1894 (boothowto & RB_VERBOSE))
1895 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1896
1897 /*
1898 * If Maxmem has been increased beyond what the system has detected,
1899 * extend the last memory segment to the new limit.
1900 */
1901 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1902 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1903
1904 /*
1905 * We need to divide chunk if Maxmem is larger than 16MB and
1906 * under 16MB area is not full of memory.
1907 * (1) system area (15-16MB region) is cut off
1908 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
1909 */
1910 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1911 /* 15M - 16M region is cut off, so need to divide chunk */
1912 physmap[physmap_idx + 1] = under16 * 1024;
1913 physmap_idx += 2;
1914 physmap[physmap_idx] = 0x1000000;
1915 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1916 }
1917
1918 /* call pmap initialization to make new kernel address space */
1919 pmap_bootstrap(first);
1920
1921 /*
1922 * Size up each available chunk of physical memory.
1923 */
1924 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1925 pa_indx = 0;
1926 da_indx = 1;
1927 phys_avail[pa_indx++] = physmap[0];
1928 phys_avail[pa_indx] = physmap[0];
1929 dump_avail[da_indx] = physmap[0];
1930 pte = CMAP1;
1931
1932 /*
1933 * Get dcons buffer address
1934 */
1935 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1936 getenv_quad("dcons.size", &dcons_size) == 0)
1937 dcons_addr = 0;
1938
1939 /*
1940 * physmap is in bytes, so when converting to page boundaries,
1941 * round up the start address and round down the end address.
1942 */
1943 for (i = 0; i <= physmap_idx; i += 2) {
1944 vm_paddr_t end;
1945
1946 end = ptoa((vm_paddr_t)Maxmem);
1947 if (physmap[i + 1] < end)
1948 end = trunc_page(physmap[i + 1]);
1949 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1950 int tmp, page_bad, full;
1951 int *ptr = (int *)CADDR1;
1952
1953 full = FALSE;
1954 /*
1955 * block out kernel memory as not available.
1956 */
1957 if (pa >= KERNLOAD && pa < first)
1958 goto do_dump_avail;
1959
1960 /*
1961 * block out dcons buffer
1962 */
1963 if (dcons_addr > 0
1964 && pa >= trunc_page(dcons_addr)
1965 && pa < dcons_addr + dcons_size)
1966 goto do_dump_avail;
1967
1968 page_bad = FALSE;
1969 if (memtest == 0)
1970 goto skip_memtest;
1971
1972 /*
1973 * map page into kernel: valid, read/write,non-cacheable
1974 */
1975 *pte = pa | PG_V | PG_RW | pg_n;
1976 invltlb();
1977
1978 tmp = *(int *)ptr;
1979 /*
1980 * Test for alternating 1's and 0's
1981 */
1982 *(volatile int *)ptr = 0xaaaaaaaa;
1983 if (*(volatile int *)ptr != 0xaaaaaaaa)
1984 page_bad = TRUE;
1985 /*
1986 * Test for alternating 0's and 1's
1987 */
1988 *(volatile int *)ptr = 0x55555555;
1989 if (*(volatile int *)ptr != 0x55555555)
1990 page_bad = TRUE;
1991 /*
1992 * Test for all 1's
1993 */
1994 *(volatile int *)ptr = 0xffffffff;
1995 if (*(volatile int *)ptr != 0xffffffff)
1996 page_bad = TRUE;
1997 /*
1998 * Test for all 0's
1999 */
2000 *(volatile int *)ptr = 0x0;
2001 if (*(volatile int *)ptr != 0x0)
2002 page_bad = TRUE;
2003 /*
2004 * Restore original value.
2005 */
2006 *(int *)ptr = tmp;
2007
2008 skip_memtest:
2009 /*
2010 * Adjust array of valid/good pages.
2011 */
2012 if (page_bad == TRUE)
2013 continue;
2014 /*
2015 * If this good page is a continuation of the
2016 * previous set of good pages, then just increase
2017 * the end pointer. Otherwise start a new chunk.
2018 * Note that "end" points one higher than end,
2019 * making the range >= start and < end.
2020 * If we're also doing a speculative memory
2021 * test and we at or past the end, bump up Maxmem
2022 * so that we keep going. The first bad page
2023 * will terminate the loop.
2024 */
2025 if (phys_avail[pa_indx] == pa) {
2026 phys_avail[pa_indx] += PAGE_SIZE;
2027 } else {
2028 pa_indx++;
2029 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2030 printf(
2031 "Too many holes in the physical address space, giving up\n");
2032 pa_indx--;
2033 full = TRUE;
2034 goto do_dump_avail;
2035 }
2036 phys_avail[pa_indx++] = pa; /* start */
2037 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2038 }
2039 physmem++;
2040 do_dump_avail:
2041 if (dump_avail[da_indx] == pa) {
2042 dump_avail[da_indx] += PAGE_SIZE;
2043 } else {
2044 da_indx++;
2045 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2046 da_indx--;
2047 goto do_next;
2048 }
2049 dump_avail[da_indx++] = pa; /* start */
2050 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2051 }
2052 do_next:
2053 if (full)
2054 break;
2055 }
2056 }
2057 *pte = 0;
2058 invltlb();
2059
2060 /*
2061 * XXX
2062 * The last chunk must contain at least one page plus the message
2063 * buffer to avoid complicating other code (message buffer address
2064 * calculation, etc.).
2065 */
2066 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2067 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2068 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2069 phys_avail[pa_indx--] = 0;
2070 phys_avail[pa_indx--] = 0;
2071 }
2072
2073 Maxmem = atop(phys_avail[pa_indx]);
2074
2075 /* Trim off space for the message buffer. */
2076 phys_avail[pa_indx] -= round_page(msgbufsize);
2077
2078 /* Map the message buffer. */
2079 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2080 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2081 off);
2082 }
2083
2084 void
2085 init386(first)
2086 int first;
2087 {
2088 struct gate_descriptor *gdp;
2089 int gsel_tss, metadata_missing, x, pa;
2090 struct pcpu *pc;
2091
2092 thread0.td_kstack = proc0kstack;
2093 thread0.td_pcb = (struct pcb *)
2094 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2095
2096 /*
2097 * This may be done better later if it gets more high level
2098 * components in it. If so just link td->td_proc here.
2099 */
2100 proc_linkup0(&proc0, &thread0);
2101
2102 /*
2103 * Initialize DMAC
2104 */
2105 pc98_init_dmac();
2106
2107 metadata_missing = 0;
2108 if (bootinfo.bi_modulep) {
2109 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2110 preload_bootstrap_relocate(KERNBASE);
2111 } else {
2112 metadata_missing = 1;
2113 }
2114 if (envmode == 1)
2115 kern_envp = static_env;
2116 else if (bootinfo.bi_envp)
2117 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2118
2119 /* Init basic tunables, hz etc */
2120 init_param1();
2121
2122 /*
2123 * Make gdt memory segments. All segments cover the full 4GB
2124 * of address space and permissions are enforced at page level.
2125 */
2126 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2127 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2128 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2129 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2130 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2131 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2132
2133 pc = &__pcpu[0];
2134 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2135 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2136 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2137
2138 for (x = 0; x < NGDT; x++)
2139 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2140
2141 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2142 r_gdt.rd_base = (int) gdt;
2143 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2144 lgdt(&r_gdt);
2145
2146 pcpu_init(pc, 0, sizeof(struct pcpu));
2147 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2148 pmap_kenter(pa + KERNBASE, pa);
2149 dpcpu_init((void *)(first + KERNBASE), 0);
2150 first += DPCPU_SIZE;
2151 PCPU_SET(prvspace, pc);
2152 PCPU_SET(curthread, &thread0);
2153 PCPU_SET(curpcb, thread0.td_pcb);
2154
2155 /*
2156 * Initialize mutexes.
2157 *
2158 * icu_lock: in order to allow an interrupt to occur in a critical
2159 * section, to set pcpu->ipending (etc...) properly, we
2160 * must be able to get the icu lock, so it can't be
2161 * under witness.
2162 */
2163 mutex_init();
2164 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2165
2166 /* make ldt memory segments */
2167 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2168 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2169 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2170 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2171
2172 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2173 lldt(_default_ldt);
2174 PCPU_SET(currentldt, _default_ldt);
2175
2176 /* exceptions */
2177 for (x = 0; x < NIDT; x++)
2178 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2179 GSEL(GCODE_SEL, SEL_KPL));
2180 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2181 GSEL(GCODE_SEL, SEL_KPL));
2182 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2183 GSEL(GCODE_SEL, SEL_KPL));
2184 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2185 GSEL(GCODE_SEL, SEL_KPL));
2186 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2187 GSEL(GCODE_SEL, SEL_KPL));
2188 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2189 GSEL(GCODE_SEL, SEL_KPL));
2190 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2191 GSEL(GCODE_SEL, SEL_KPL));
2192 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2193 GSEL(GCODE_SEL, SEL_KPL));
2194 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2195 , GSEL(GCODE_SEL, SEL_KPL));
2196 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2197 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2198 GSEL(GCODE_SEL, SEL_KPL));
2199 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2200 GSEL(GCODE_SEL, SEL_KPL));
2201 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2202 GSEL(GCODE_SEL, SEL_KPL));
2203 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2204 GSEL(GCODE_SEL, SEL_KPL));
2205 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2206 GSEL(GCODE_SEL, SEL_KPL));
2207 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2208 GSEL(GCODE_SEL, SEL_KPL));
2209 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2210 GSEL(GCODE_SEL, SEL_KPL));
2211 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2212 GSEL(GCODE_SEL, SEL_KPL));
2213 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2214 GSEL(GCODE_SEL, SEL_KPL));
2215 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2216 GSEL(GCODE_SEL, SEL_KPL));
2217 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2218 GSEL(GCODE_SEL, SEL_KPL));
2219
2220 r_idt.rd_limit = sizeof(idt0) - 1;
2221 r_idt.rd_base = (int) idt;
2222 lidt(&r_idt);
2223
2224 /*
2225 * Initialize the i8254 before the console so that console
2226 * initialization can use DELAY().
2227 */
2228 i8254_init();
2229
2230 /*
2231 * Initialize the console before we print anything out.
2232 */
2233 cninit();
2234
2235 if (metadata_missing)
2236 printf("WARNING: loader(8) metadata is missing!\n");
2237
2238 #ifdef DEV_ISA
2239 atpic_startup();
2240 #endif
2241
2242 #ifdef DDB
2243 ksym_start = bootinfo.bi_symtab;
2244 ksym_end = bootinfo.bi_esymtab;
2245 #endif
2246
2247 kdb_init();
2248
2249 #ifdef KDB
2250 if (boothowto & RB_KDB)
2251 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2252 #endif
2253
2254 finishidentcpu(); /* Final stage of CPU initialization */
2255 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2256 GSEL(GCODE_SEL, SEL_KPL));
2257 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2258 GSEL(GCODE_SEL, SEL_KPL));
2259 initializecpu(); /* Initialize CPU registers */
2260
2261 /* make an initial tss so cpu can get interrupt stack on syscall! */
2262 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2263 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2264 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2265 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2266 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2267 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2268 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2269 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2270 ltr(gsel_tss);
2271
2272 /* pointer to selector slot for %fs/%gs */
2273 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2274
2275 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2276 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2277 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2278 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2279 dblfault_tss.tss_cr3 = (int)IdlePTD;
2280 dblfault_tss.tss_eip = (int)dblfault_handler;
2281 dblfault_tss.tss_eflags = PSL_KERNEL;
2282 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2283 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2284 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2285 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2286 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2287
2288 vm86_initialize();
2289 getmemsize(first);
2290 init_param2(physmem);
2291
2292 /* now running on new page tables, configured,and u/iom is accessible */
2293
2294 msgbufinit(msgbufp, msgbufsize);
2295
2296 /* make a call gate to reenter kernel with */
2297 gdp = &ldt[LSYS5CALLS_SEL].gd;
2298
2299 x = (int) &IDTVEC(lcall_syscall);
2300 gdp->gd_looffset = x;
2301 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2302 gdp->gd_stkcpy = 1;
2303 gdp->gd_type = SDT_SYS386CGT;
2304 gdp->gd_dpl = SEL_UPL;
2305 gdp->gd_p = 1;
2306 gdp->gd_hioffset = x >> 16;
2307
2308 /* XXX does this work? */
2309 /* XXX yes! */
2310 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2311 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2312
2313 /* transfer to user mode */
2314
2315 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2316 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2317
2318 /* setup proc 0's pcb */
2319 thread0.td_pcb->pcb_flags = 0;
2320 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2321 thread0.td_pcb->pcb_ext = 0;
2322 thread0.td_frame = &proc0_tf;
2323 }
2324
2325 void
2326 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2327 {
2328
2329 }
2330
2331 void
2332 spinlock_enter(void)
2333 {
2334 struct thread *td;
2335 register_t flags;
2336
2337 td = curthread;
2338 if (td->td_md.md_spinlock_count == 0) {
2339 flags = intr_disable();
2340 td->td_md.md_spinlock_count = 1;
2341 td->td_md.md_saved_flags = flags;
2342 } else
2343 td->td_md.md_spinlock_count++;
2344 critical_enter();
2345 }
2346
2347 void
2348 spinlock_exit(void)
2349 {
2350 struct thread *td;
2351 register_t flags;
2352
2353 td = curthread;
2354 critical_exit();
2355 flags = td->td_md.md_saved_flags;
2356 td->td_md.md_spinlock_count--;
2357 if (td->td_md.md_spinlock_count == 0)
2358 intr_restore(flags);
2359 }
2360
2361 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2362 static void f00f_hack(void *unused);
2363 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2364
2365 static void
2366 f00f_hack(void *unused)
2367 {
2368 struct gate_descriptor *new_idt;
2369 vm_offset_t tmp;
2370
2371 if (!has_f00f_bug)
2372 return;
2373
2374 GIANT_REQUIRED;
2375
2376 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2377
2378 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2379 if (tmp == 0)
2380 panic("kmem_alloc returned 0");
2381
2382 /* Put the problematic entry (#6) at the end of the lower page. */
2383 new_idt = (struct gate_descriptor*)
2384 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2385 bcopy(idt, new_idt, sizeof(idt0));
2386 r_idt.rd_base = (u_int)new_idt;
2387 lidt(&r_idt);
2388 idt = new_idt;
2389 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2390 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2391 panic("vm_map_protect failed");
2392 }
2393 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2394
2395 /*
2396 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2397 * we want to start a backtrace from the function that caused us to enter
2398 * the debugger. We have the context in the trapframe, but base the trace
2399 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2400 * enough for a backtrace.
2401 */
2402 void
2403 makectx(struct trapframe *tf, struct pcb *pcb)
2404 {
2405
2406 pcb->pcb_edi = tf->tf_edi;
2407 pcb->pcb_esi = tf->tf_esi;
2408 pcb->pcb_ebp = tf->tf_ebp;
2409 pcb->pcb_ebx = tf->tf_ebx;
2410 pcb->pcb_eip = tf->tf_eip;
2411 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2412 }
2413
2414 int
2415 ptrace_set_pc(struct thread *td, u_long addr)
2416 {
2417
2418 td->td_frame->tf_eip = addr;
2419 return (0);
2420 }
2421
2422 int
2423 ptrace_single_step(struct thread *td)
2424 {
2425 td->td_frame->tf_eflags |= PSL_T;
2426 return (0);
2427 }
2428
2429 int
2430 ptrace_clear_single_step(struct thread *td)
2431 {
2432 td->td_frame->tf_eflags &= ~PSL_T;
2433 return (0);
2434 }
2435
2436 int
2437 fill_regs(struct thread *td, struct reg *regs)
2438 {
2439 struct pcb *pcb;
2440 struct trapframe *tp;
2441
2442 tp = td->td_frame;
2443 pcb = td->td_pcb;
2444 regs->r_gs = pcb->pcb_gs;
2445 return (fill_frame_regs(tp, regs));
2446 }
2447
2448 int
2449 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2450 {
2451 regs->r_fs = tp->tf_fs;
2452 regs->r_es = tp->tf_es;
2453 regs->r_ds = tp->tf_ds;
2454 regs->r_edi = tp->tf_edi;
2455 regs->r_esi = tp->tf_esi;
2456 regs->r_ebp = tp->tf_ebp;
2457 regs->r_ebx = tp->tf_ebx;
2458 regs->r_edx = tp->tf_edx;
2459 regs->r_ecx = tp->tf_ecx;
2460 regs->r_eax = tp->tf_eax;
2461 regs->r_eip = tp->tf_eip;
2462 regs->r_cs = tp->tf_cs;
2463 regs->r_eflags = tp->tf_eflags;
2464 regs->r_esp = tp->tf_esp;
2465 regs->r_ss = tp->tf_ss;
2466 return (0);
2467 }
2468
2469 int
2470 set_regs(struct thread *td, struct reg *regs)
2471 {
2472 struct pcb *pcb;
2473 struct trapframe *tp;
2474
2475 tp = td->td_frame;
2476 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2477 !CS_SECURE(regs->r_cs))
2478 return (EINVAL);
2479 pcb = td->td_pcb;
2480 tp->tf_fs = regs->r_fs;
2481 tp->tf_es = regs->r_es;
2482 tp->tf_ds = regs->r_ds;
2483 tp->tf_edi = regs->r_edi;
2484 tp->tf_esi = regs->r_esi;
2485 tp->tf_ebp = regs->r_ebp;
2486 tp->tf_ebx = regs->r_ebx;
2487 tp->tf_edx = regs->r_edx;
2488 tp->tf_ecx = regs->r_ecx;
2489 tp->tf_eax = regs->r_eax;
2490 tp->tf_eip = regs->r_eip;
2491 tp->tf_cs = regs->r_cs;
2492 tp->tf_eflags = regs->r_eflags;
2493 tp->tf_esp = regs->r_esp;
2494 tp->tf_ss = regs->r_ss;
2495 pcb->pcb_gs = regs->r_gs;
2496 return (0);
2497 }
2498
2499 #ifdef CPU_ENABLE_SSE
2500 static void
2501 fill_fpregs_xmm(sv_xmm, sv_87)
2502 struct savexmm *sv_xmm;
2503 struct save87 *sv_87;
2504 {
2505 register struct env87 *penv_87 = &sv_87->sv_env;
2506 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2507 int i;
2508
2509 bzero(sv_87, sizeof(*sv_87));
2510
2511 /* FPU control/status */
2512 penv_87->en_cw = penv_xmm->en_cw;
2513 penv_87->en_sw = penv_xmm->en_sw;
2514 penv_87->en_tw = penv_xmm->en_tw;
2515 penv_87->en_fip = penv_xmm->en_fip;
2516 penv_87->en_fcs = penv_xmm->en_fcs;
2517 penv_87->en_opcode = penv_xmm->en_opcode;
2518 penv_87->en_foo = penv_xmm->en_foo;
2519 penv_87->en_fos = penv_xmm->en_fos;
2520
2521 /* FPU registers */
2522 for (i = 0; i < 8; ++i)
2523 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2524 }
2525
2526 static void
2527 set_fpregs_xmm(sv_87, sv_xmm)
2528 struct save87 *sv_87;
2529 struct savexmm *sv_xmm;
2530 {
2531 register struct env87 *penv_87 = &sv_87->sv_env;
2532 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2533 int i;
2534
2535 /* FPU control/status */
2536 penv_xmm->en_cw = penv_87->en_cw;
2537 penv_xmm->en_sw = penv_87->en_sw;
2538 penv_xmm->en_tw = penv_87->en_tw;
2539 penv_xmm->en_fip = penv_87->en_fip;
2540 penv_xmm->en_fcs = penv_87->en_fcs;
2541 penv_xmm->en_opcode = penv_87->en_opcode;
2542 penv_xmm->en_foo = penv_87->en_foo;
2543 penv_xmm->en_fos = penv_87->en_fos;
2544
2545 /* FPU registers */
2546 for (i = 0; i < 8; ++i)
2547 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2548 }
2549 #endif /* CPU_ENABLE_SSE */
2550
2551 int
2552 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2553 {
2554
2555 KASSERT(td == curthread || TD_IS_SUSPENDED(td),
2556 ("not suspended thread %p", td));
2557 #ifdef DEV_NPX
2558 npxgetregs(td);
2559 #else
2560 bzero(fpregs, sizeof(*fpregs));
2561 #endif
2562 #ifdef CPU_ENABLE_SSE
2563 if (cpu_fxsr)
2564 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
2565 (struct save87 *)fpregs);
2566 else
2567 #endif /* CPU_ENABLE_SSE */
2568 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
2569 sizeof(*fpregs));
2570 return (0);
2571 }
2572
2573 int
2574 set_fpregs(struct thread *td, struct fpreg *fpregs)
2575 {
2576
2577 #ifdef CPU_ENABLE_SSE
2578 if (cpu_fxsr)
2579 set_fpregs_xmm((struct save87 *)fpregs,
2580 &td->td_pcb->pcb_user_save.sv_xmm);
2581 else
2582 #endif /* CPU_ENABLE_SSE */
2583 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
2584 sizeof(*fpregs));
2585 #ifdef DEV_NPX
2586 npxuserinited(td);
2587 #endif
2588 return (0);
2589 }
2590
2591 /*
2592 * Get machine context.
2593 */
2594 int
2595 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2596 {
2597 struct trapframe *tp;
2598 struct segment_descriptor *sdp;
2599
2600 tp = td->td_frame;
2601
2602 PROC_LOCK(curthread->td_proc);
2603 mcp->mc_onstack = sigonstack(tp->tf_esp);
2604 PROC_UNLOCK(curthread->td_proc);
2605 mcp->mc_gs = td->td_pcb->pcb_gs;
2606 mcp->mc_fs = tp->tf_fs;
2607 mcp->mc_es = tp->tf_es;
2608 mcp->mc_ds = tp->tf_ds;
2609 mcp->mc_edi = tp->tf_edi;
2610 mcp->mc_esi = tp->tf_esi;
2611 mcp->mc_ebp = tp->tf_ebp;
2612 mcp->mc_isp = tp->tf_isp;
2613 mcp->mc_eflags = tp->tf_eflags;
2614 if (flags & GET_MC_CLEAR_RET) {
2615 mcp->mc_eax = 0;
2616 mcp->mc_edx = 0;
2617 mcp->mc_eflags &= ~PSL_C;
2618 } else {
2619 mcp->mc_eax = tp->tf_eax;
2620 mcp->mc_edx = tp->tf_edx;
2621 }
2622 mcp->mc_ebx = tp->tf_ebx;
2623 mcp->mc_ecx = tp->tf_ecx;
2624 mcp->mc_eip = tp->tf_eip;
2625 mcp->mc_cs = tp->tf_cs;
2626 mcp->mc_esp = tp->tf_esp;
2627 mcp->mc_ss = tp->tf_ss;
2628 mcp->mc_len = sizeof(*mcp);
2629 get_fpcontext(td, mcp);
2630 sdp = &td->td_pcb->pcb_fsd;
2631 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2632 sdp = &td->td_pcb->pcb_gsd;
2633 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2634 bzero(mcp->mc_spare1, sizeof(mcp->mc_spare1));
2635 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
2636 return (0);
2637 }
2638
2639 /*
2640 * Set machine context.
2641 *
2642 * However, we don't set any but the user modifiable flags, and we won't
2643 * touch the cs selector.
2644 */
2645 int
2646 set_mcontext(struct thread *td, const mcontext_t *mcp)
2647 {
2648 struct trapframe *tp;
2649 int eflags, ret;
2650
2651 tp = td->td_frame;
2652 if (mcp->mc_len != sizeof(*mcp))
2653 return (EINVAL);
2654 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2655 (tp->tf_eflags & ~PSL_USERCHANGE);
2656 if ((ret = set_fpcontext(td, mcp)) == 0) {
2657 tp->tf_fs = mcp->mc_fs;
2658 tp->tf_es = mcp->mc_es;
2659 tp->tf_ds = mcp->mc_ds;
2660 tp->tf_edi = mcp->mc_edi;
2661 tp->tf_esi = mcp->mc_esi;
2662 tp->tf_ebp = mcp->mc_ebp;
2663 tp->tf_ebx = mcp->mc_ebx;
2664 tp->tf_edx = mcp->mc_edx;
2665 tp->tf_ecx = mcp->mc_ecx;
2666 tp->tf_eax = mcp->mc_eax;
2667 tp->tf_eip = mcp->mc_eip;
2668 tp->tf_eflags = eflags;
2669 tp->tf_esp = mcp->mc_esp;
2670 tp->tf_ss = mcp->mc_ss;
2671 td->td_pcb->pcb_gs = mcp->mc_gs;
2672 ret = 0;
2673 }
2674 return (ret);
2675 }
2676
2677 static void
2678 get_fpcontext(struct thread *td, mcontext_t *mcp)
2679 {
2680
2681 #ifndef DEV_NPX
2682 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2683 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2684 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2685 #else
2686 mcp->mc_ownedfp = npxgetregs(td);
2687 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
2688 sizeof(mcp->mc_fpstate));
2689 mcp->mc_fpformat = npxformat();
2690 #endif
2691 }
2692
2693 static int
2694 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2695 {
2696
2697 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2698 return (0);
2699 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2700 mcp->mc_fpformat != _MC_FPFMT_XMM)
2701 return (EINVAL);
2702 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2703 /* We don't care what state is left in the FPU or PCB. */
2704 fpstate_drop(td);
2705 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2706 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2707 #ifdef DEV_NPX
2708 #ifdef CPU_ENABLE_SSE
2709 if (cpu_fxsr)
2710 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
2711 en_mxcsr &= cpu_mxcsr_mask;
2712 #endif
2713 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
2714 #endif
2715 } else
2716 return (EINVAL);
2717 return (0);
2718 }
2719
2720 static void
2721 fpstate_drop(struct thread *td)
2722 {
2723
2724 critical_enter();
2725 #ifdef DEV_NPX
2726 if (PCPU_GET(fpcurthread) == td)
2727 npxdrop();
2728 #endif
2729 /*
2730 * XXX force a full drop of the npx. The above only drops it if we
2731 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2732 *
2733 * XXX I don't much like npxgetregs()'s semantics of doing a full
2734 * drop. Dropping only to the pcb matches fnsave's behaviour.
2735 * We only need to drop to !PCB_INITDONE in sendsig(). But
2736 * sendsig() is the only caller of npxgetregs()... perhaps we just
2737 * have too many layers.
2738 */
2739 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
2740 PCB_NPXUSERINITDONE);
2741 critical_exit();
2742 }
2743
2744 int
2745 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2746 {
2747 struct pcb *pcb;
2748
2749 if (td == NULL) {
2750 dbregs->dr[0] = rdr0();
2751 dbregs->dr[1] = rdr1();
2752 dbregs->dr[2] = rdr2();
2753 dbregs->dr[3] = rdr3();
2754 dbregs->dr[4] = rdr4();
2755 dbregs->dr[5] = rdr5();
2756 dbregs->dr[6] = rdr6();
2757 dbregs->dr[7] = rdr7();
2758 } else {
2759 pcb = td->td_pcb;
2760 dbregs->dr[0] = pcb->pcb_dr0;
2761 dbregs->dr[1] = pcb->pcb_dr1;
2762 dbregs->dr[2] = pcb->pcb_dr2;
2763 dbregs->dr[3] = pcb->pcb_dr3;
2764 dbregs->dr[4] = 0;
2765 dbregs->dr[5] = 0;
2766 dbregs->dr[6] = pcb->pcb_dr6;
2767 dbregs->dr[7] = pcb->pcb_dr7;
2768 }
2769 return (0);
2770 }
2771
2772 int
2773 set_dbregs(struct thread *td, struct dbreg *dbregs)
2774 {
2775 struct pcb *pcb;
2776 int i;
2777
2778 if (td == NULL) {
2779 load_dr0(dbregs->dr[0]);
2780 load_dr1(dbregs->dr[1]);
2781 load_dr2(dbregs->dr[2]);
2782 load_dr3(dbregs->dr[3]);
2783 load_dr4(dbregs->dr[4]);
2784 load_dr5(dbregs->dr[5]);
2785 load_dr6(dbregs->dr[6]);
2786 load_dr7(dbregs->dr[7]);
2787 } else {
2788 /*
2789 * Don't let an illegal value for dr7 get set. Specifically,
2790 * check for undefined settings. Setting these bit patterns
2791 * result in undefined behaviour and can lead to an unexpected
2792 * TRCTRAP.
2793 */
2794 for (i = 0; i < 4; i++) {
2795 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2796 return (EINVAL);
2797 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
2798 return (EINVAL);
2799 }
2800
2801 pcb = td->td_pcb;
2802
2803 /*
2804 * Don't let a process set a breakpoint that is not within the
2805 * process's address space. If a process could do this, it
2806 * could halt the system by setting a breakpoint in the kernel
2807 * (if ddb was enabled). Thus, we need to check to make sure
2808 * that no breakpoints are being enabled for addresses outside
2809 * process's address space.
2810 *
2811 * XXX - what about when the watched area of the user's
2812 * address space is written into from within the kernel
2813 * ... wouldn't that still cause a breakpoint to be generated
2814 * from within kernel mode?
2815 */
2816
2817 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2818 /* dr0 is enabled */
2819 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2820 return (EINVAL);
2821 }
2822
2823 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2824 /* dr1 is enabled */
2825 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2826 return (EINVAL);
2827 }
2828
2829 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2830 /* dr2 is enabled */
2831 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2832 return (EINVAL);
2833 }
2834
2835 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2836 /* dr3 is enabled */
2837 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2838 return (EINVAL);
2839 }
2840
2841 pcb->pcb_dr0 = dbregs->dr[0];
2842 pcb->pcb_dr1 = dbregs->dr[1];
2843 pcb->pcb_dr2 = dbregs->dr[2];
2844 pcb->pcb_dr3 = dbregs->dr[3];
2845 pcb->pcb_dr6 = dbregs->dr[6];
2846 pcb->pcb_dr7 = dbregs->dr[7];
2847
2848 pcb->pcb_flags |= PCB_DBREGS;
2849 }
2850
2851 return (0);
2852 }
2853
2854 /*
2855 * Return > 0 if a hardware breakpoint has been hit, and the
2856 * breakpoint was in user space. Return 0, otherwise.
2857 */
2858 int
2859 user_dbreg_trap(void)
2860 {
2861 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2862 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2863 int nbp; /* number of breakpoints that triggered */
2864 caddr_t addr[4]; /* breakpoint addresses */
2865 int i;
2866
2867 dr7 = rdr7();
2868 if ((dr7 & 0x000000ff) == 0) {
2869 /*
2870 * all GE and LE bits in the dr7 register are zero,
2871 * thus the trap couldn't have been caused by the
2872 * hardware debug registers
2873 */
2874 return 0;
2875 }
2876
2877 nbp = 0;
2878 dr6 = rdr6();
2879 bp = dr6 & 0x0000000f;
2880
2881 if (!bp) {
2882 /*
2883 * None of the breakpoint bits are set meaning this
2884 * trap was not caused by any of the debug registers
2885 */
2886 return 0;
2887 }
2888
2889 /*
2890 * at least one of the breakpoints were hit, check to see
2891 * which ones and if any of them are user space addresses
2892 */
2893
2894 if (bp & 0x01) {
2895 addr[nbp++] = (caddr_t)rdr0();
2896 }
2897 if (bp & 0x02) {
2898 addr[nbp++] = (caddr_t)rdr1();
2899 }
2900 if (bp & 0x04) {
2901 addr[nbp++] = (caddr_t)rdr2();
2902 }
2903 if (bp & 0x08) {
2904 addr[nbp++] = (caddr_t)rdr3();
2905 }
2906
2907 for (i = 0; i < nbp; i++) {
2908 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2909 /*
2910 * addr[i] is in user space
2911 */
2912 return nbp;
2913 }
2914 }
2915
2916 /*
2917 * None of the breakpoints are in user space.
2918 */
2919 return 0;
2920 }
2921
2922 #ifdef KDB
2923
2924 /*
2925 * Provide inb() and outb() as functions. They are normally only available as
2926 * inline functions, thus cannot be called from the debugger.
2927 */
2928
2929 /* silence compiler warnings */
2930 u_char inb_(u_short);
2931 void outb_(u_short, u_char);
2932
2933 u_char
2934 inb_(u_short port)
2935 {
2936 return inb(port);
2937 }
2938
2939 void
2940 outb_(u_short port, u_char data)
2941 {
2942 outb(port, data);
2943 }
2944
2945 #endif /* KDB */
Cache object: 5fddd5a8f9176117058831ed4a51dfd1
|