1 /*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 */
39
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD: releng/8.4/sys/pc98/pc98/machdep.c 243461 2012-11-23 15:44:04Z nyan $");
42
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
45 #include "opt_cpu.h"
46 #include "opt_ddb.h"
47 #include "opt_inet.h"
48 #include "opt_ipx.h"
49 #include "opt_isa.h"
50 #include "opt_kstack_pages.h"
51 #include "opt_maxmem.h"
52 #include "opt_npx.h"
53 #include "opt_perfmon.h"
54 #include "opt_kdtrace.h"
55
56 #include <sys/param.h>
57 #include <sys/proc.h>
58 #include <sys/systm.h>
59 #include <sys/bio.h>
60 #include <sys/buf.h>
61 #include <sys/bus.h>
62 #include <sys/callout.h>
63 #include <sys/cons.h>
64 #include <sys/cpu.h>
65 #include <sys/eventhandler.h>
66 #include <sys/exec.h>
67 #include <sys/imgact.h>
68 #include <sys/kdb.h>
69 #include <sys/kernel.h>
70 #include <sys/ktr.h>
71 #include <sys/linker.h>
72 #include <sys/lock.h>
73 #include <sys/malloc.h>
74 #include <sys/memrange.h>
75 #include <sys/msgbuf.h>
76 #include <sys/mutex.h>
77 #include <sys/pcpu.h>
78 #include <sys/ptrace.h>
79 #include <sys/reboot.h>
80 #include <sys/sched.h>
81 #include <sys/signalvar.h>
82 #include <sys/syscallsubr.h>
83 #include <sys/sysctl.h>
84 #include <sys/sysent.h>
85 #include <sys/sysproto.h>
86 #include <sys/ucontext.h>
87 #include <sys/vmmeter.h>
88
89 #include <vm/vm.h>
90 #include <vm/vm_extern.h>
91 #include <vm/vm_kern.h>
92 #include <vm/vm_page.h>
93 #include <vm/vm_map.h>
94 #include <vm/vm_object.h>
95 #include <vm/vm_pager.h>
96 #include <vm/vm_param.h>
97
98 #ifdef DDB
99 #ifndef KDB
100 #error KDB must be enabled in order for DDB to work!
101 #endif
102 #include <ddb/ddb.h>
103 #include <ddb/db_sym.h>
104 #endif
105
106 #include <pc98/pc98/pc98_machdep.h>
107
108 #include <net/netisr.h>
109
110 #include <machine/bootinfo.h>
111 #include <machine/clock.h>
112 #include <machine/cpu.h>
113 #include <machine/cputypes.h>
114 #include <machine/intr_machdep.h>
115 #include <machine/mca.h>
116 #include <machine/md_var.h>
117 #include <machine/pc/bios.h>
118 #include <machine/pcb.h>
119 #include <machine/pcb_ext.h>
120 #include <machine/proc.h>
121 #include <machine/reg.h>
122 #include <machine/sigframe.h>
123 #include <machine/specialreg.h>
124 #include <machine/vm86.h>
125 #ifdef PERFMON
126 #include <machine/perfmon.h>
127 #endif
128 #ifdef SMP
129 #include <machine/smp.h>
130 #endif
131
132 #ifdef DEV_ISA
133 #include <i386/isa/icu.h>
134 #endif
135
136 /* Sanity check for __curthread() */
137 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
138
139 extern void init386(int first);
140 extern void dblfault_handler(void);
141
142 extern void printcpuinfo(void); /* XXX header file */
143 extern void finishidentcpu(void);
144 extern void panicifcpuunsupported(void);
145 extern void initializecpu(void);
146
147 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
148 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
149
150 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
151 #define CPU_ENABLE_SSE
152 #endif
153
154 static void cpu_startup(void *);
155 static void fpstate_drop(struct thread *td);
156 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
157 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
158 #ifdef CPU_ENABLE_SSE
159 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
160 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
161 #endif /* CPU_ENABLE_SSE */
162 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
163
164 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
165 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
166
167 #ifdef DDB
168 extern vm_offset_t ksym_start, ksym_end;
169 #endif
170
171 int _udatasel, _ucodesel;
172 u_int basemem;
173
174 static int ispc98 = 1;
175 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
176
177 int cold = 1;
178
179 #ifdef COMPAT_43
180 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
181 #endif
182 #ifdef COMPAT_FREEBSD4
183 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
184 #endif
185
186 long Maxmem = 0;
187 long realmem = 0;
188
189 /*
190 * The number of PHYSMAP entries must be one less than the number of
191 * PHYSSEG entries because the PHYSMAP entry that spans the largest
192 * physical address that is accessible by ISA DMA is split into two
193 * PHYSSEG entries.
194 */
195 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
196
197 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
198 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
199
200 /* must be 2 less so 0 0 can signal end of chunks */
201 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
202 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
203
204 struct kva_md_info kmi;
205
206 static struct trapframe proc0_tf;
207 struct pcpu __pcpu[MAXCPU];
208
209 struct mtx icu_lock;
210
211 struct mem_range_softc mem_range_softc;
212
213 static void
214 cpu_startup(dummy)
215 void *dummy;
216 {
217 uintmax_t memsize;
218
219 /*
220 * Good {morning,afternoon,evening,night}.
221 */
222 startrtclock();
223 printcpuinfo();
224 panicifcpuunsupported();
225 #ifdef PERFMON
226 perfmon_init();
227 #endif
228 realmem = Maxmem;
229
230 /*
231 * Display physical memory.
232 */
233 memsize = ptoa((uintmax_t)Maxmem);
234 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
235
236 /*
237 * Display any holes after the first chunk of extended memory.
238 */
239 if (bootverbose) {
240 int indx;
241
242 printf("Physical memory chunk(s):\n");
243 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
244 vm_paddr_t size;
245
246 size = phys_avail[indx + 1] - phys_avail[indx];
247 printf(
248 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
249 (uintmax_t)phys_avail[indx],
250 (uintmax_t)phys_avail[indx + 1] - 1,
251 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
252 }
253 }
254
255 vm_ksubmap_init(&kmi);
256
257 printf("avail memory = %ju (%ju MB)\n",
258 ptoa((uintmax_t)cnt.v_free_count),
259 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
260
261 /*
262 * Set up buffers, so they can be used to read disk labels.
263 */
264 bufinit();
265 vm_pager_bufferinit();
266 cpu_setregs();
267 }
268
269 /*
270 * Send an interrupt to process.
271 *
272 * Stack is set up to allow sigcode stored
273 * at top to call routine, followed by kcall
274 * to sigreturn routine below. After sigreturn
275 * resets the signal mask, the stack, and the
276 * frame pointer, it returns to the user
277 * specified pc, psl.
278 */
279 #ifdef COMPAT_43
280 static void
281 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
282 {
283 struct osigframe sf, *fp;
284 struct proc *p;
285 struct thread *td;
286 struct sigacts *psp;
287 struct trapframe *regs;
288 int sig;
289 int oonstack;
290
291 td = curthread;
292 p = td->td_proc;
293 PROC_LOCK_ASSERT(p, MA_OWNED);
294 sig = ksi->ksi_signo;
295 psp = p->p_sigacts;
296 mtx_assert(&psp->ps_mtx, MA_OWNED);
297 regs = td->td_frame;
298 oonstack = sigonstack(regs->tf_esp);
299
300 /* Allocate space for the signal handler context. */
301 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
302 SIGISMEMBER(psp->ps_sigonstack, sig)) {
303 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
304 td->td_sigstk.ss_size - sizeof(struct osigframe));
305 #if defined(COMPAT_43)
306 td->td_sigstk.ss_flags |= SS_ONSTACK;
307 #endif
308 } else
309 fp = (struct osigframe *)regs->tf_esp - 1;
310
311 /* Translate the signal if appropriate. */
312 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
313 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
314
315 /* Build the argument list for the signal handler. */
316 sf.sf_signum = sig;
317 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
318 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
319 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
320 /* Signal handler installed with SA_SIGINFO. */
321 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
322 sf.sf_siginfo.si_signo = sig;
323 sf.sf_siginfo.si_code = ksi->ksi_code;
324 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
325 sf.sf_addr = 0;
326 } else {
327 /* Old FreeBSD-style arguments. */
328 sf.sf_arg2 = ksi->ksi_code;
329 sf.sf_addr = (register_t)ksi->ksi_addr;
330 sf.sf_ahu.sf_handler = catcher;
331 }
332 mtx_unlock(&psp->ps_mtx);
333 PROC_UNLOCK(p);
334
335 /* Save most if not all of trap frame. */
336 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
337 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
338 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
339 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
340 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
341 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
342 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
343 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
344 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
345 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
346 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
347 sf.sf_siginfo.si_sc.sc_gs = rgs();
348 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
349
350 /* Build the signal context to be used by osigreturn(). */
351 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
352 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
353 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
354 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
355 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
356 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
357 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
358 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
359
360 /*
361 * If we're a vm86 process, we want to save the segment registers.
362 * We also change eflags to be our emulated eflags, not the actual
363 * eflags.
364 */
365 if (regs->tf_eflags & PSL_VM) {
366 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
367 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
368 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
369
370 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
371 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
372 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
373 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
374
375 if (vm86->vm86_has_vme == 0)
376 sf.sf_siginfo.si_sc.sc_ps =
377 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
378 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
379
380 /* See sendsig() for comments. */
381 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
382 }
383
384 /*
385 * Copy the sigframe out to the user's stack.
386 */
387 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
388 #ifdef DEBUG
389 printf("process %ld has trashed its stack\n", (long)p->p_pid);
390 #endif
391 PROC_LOCK(p);
392 sigexit(td, SIGILL);
393 }
394
395 regs->tf_esp = (int)fp;
396 regs->tf_eip = PS_STRINGS - szosigcode;
397 regs->tf_eflags &= ~(PSL_T | PSL_D);
398 regs->tf_cs = _ucodesel;
399 regs->tf_ds = _udatasel;
400 regs->tf_es = _udatasel;
401 regs->tf_fs = _udatasel;
402 load_gs(_udatasel);
403 regs->tf_ss = _udatasel;
404 PROC_LOCK(p);
405 mtx_lock(&psp->ps_mtx);
406 }
407 #endif /* COMPAT_43 */
408
409 #ifdef COMPAT_FREEBSD4
410 static void
411 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
412 {
413 struct sigframe4 sf, *sfp;
414 struct proc *p;
415 struct thread *td;
416 struct sigacts *psp;
417 struct trapframe *regs;
418 int sig;
419 int oonstack;
420
421 td = curthread;
422 p = td->td_proc;
423 PROC_LOCK_ASSERT(p, MA_OWNED);
424 sig = ksi->ksi_signo;
425 psp = p->p_sigacts;
426 mtx_assert(&psp->ps_mtx, MA_OWNED);
427 regs = td->td_frame;
428 oonstack = sigonstack(regs->tf_esp);
429
430 /* Save user context. */
431 bzero(&sf, sizeof(sf));
432 sf.sf_uc.uc_sigmask = *mask;
433 sf.sf_uc.uc_stack = td->td_sigstk;
434 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
435 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
436 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
437 sf.sf_uc.uc_mcontext.mc_gs = rgs();
438 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
439 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
440 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
441 bzero(sf.sf_uc.uc_mcontext.__spare__,
442 sizeof(sf.sf_uc.uc_mcontext.__spare__));
443 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
444
445 /* Allocate space for the signal handler context. */
446 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
447 SIGISMEMBER(psp->ps_sigonstack, sig)) {
448 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
449 td->td_sigstk.ss_size - sizeof(struct sigframe4));
450 #if defined(COMPAT_43)
451 td->td_sigstk.ss_flags |= SS_ONSTACK;
452 #endif
453 } else
454 sfp = (struct sigframe4 *)regs->tf_esp - 1;
455
456 /* Translate the signal if appropriate. */
457 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
458 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
459
460 /* Build the argument list for the signal handler. */
461 sf.sf_signum = sig;
462 sf.sf_ucontext = (register_t)&sfp->sf_uc;
463 bzero(&sf.sf_si, sizeof(sf.sf_si));
464 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
465 /* Signal handler installed with SA_SIGINFO. */
466 sf.sf_siginfo = (register_t)&sfp->sf_si;
467 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
468
469 /* Fill in POSIX parts */
470 sf.sf_si.si_signo = sig;
471 sf.sf_si.si_code = ksi->ksi_code;
472 sf.sf_si.si_addr = ksi->ksi_addr;
473 } else {
474 /* Old FreeBSD-style arguments. */
475 sf.sf_siginfo = ksi->ksi_code;
476 sf.sf_addr = (register_t)ksi->ksi_addr;
477 sf.sf_ahu.sf_handler = catcher;
478 }
479 mtx_unlock(&psp->ps_mtx);
480 PROC_UNLOCK(p);
481
482 /*
483 * If we're a vm86 process, we want to save the segment registers.
484 * We also change eflags to be our emulated eflags, not the actual
485 * eflags.
486 */
487 if (regs->tf_eflags & PSL_VM) {
488 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
489 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
490
491 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
492 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
493 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
494 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
495
496 if (vm86->vm86_has_vme == 0)
497 sf.sf_uc.uc_mcontext.mc_eflags =
498 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
499 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
500
501 /*
502 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
503 * syscalls made by the signal handler. This just avoids
504 * wasting time for our lazy fixup of such faults. PSL_NT
505 * does nothing in vm86 mode, but vm86 programs can set it
506 * almost legitimately in probes for old cpu types.
507 */
508 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
509 }
510
511 /*
512 * Copy the sigframe out to the user's stack.
513 */
514 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
515 #ifdef DEBUG
516 printf("process %ld has trashed its stack\n", (long)p->p_pid);
517 #endif
518 PROC_LOCK(p);
519 sigexit(td, SIGILL);
520 }
521
522 regs->tf_esp = (int)sfp;
523 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
524 regs->tf_eflags &= ~(PSL_T | PSL_D);
525 regs->tf_cs = _ucodesel;
526 regs->tf_ds = _udatasel;
527 regs->tf_es = _udatasel;
528 regs->tf_fs = _udatasel;
529 regs->tf_ss = _udatasel;
530 PROC_LOCK(p);
531 mtx_lock(&psp->ps_mtx);
532 }
533 #endif /* COMPAT_FREEBSD4 */
534
535 void
536 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
537 {
538 struct sigframe sf, *sfp;
539 struct proc *p;
540 struct thread *td;
541 struct sigacts *psp;
542 char *sp;
543 struct trapframe *regs;
544 struct segment_descriptor *sdp;
545 int sig;
546 int oonstack;
547
548 td = curthread;
549 p = td->td_proc;
550 PROC_LOCK_ASSERT(p, MA_OWNED);
551 sig = ksi->ksi_signo;
552 psp = p->p_sigacts;
553 mtx_assert(&psp->ps_mtx, MA_OWNED);
554 #ifdef COMPAT_FREEBSD4
555 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
556 freebsd4_sendsig(catcher, ksi, mask);
557 return;
558 }
559 #endif
560 #ifdef COMPAT_43
561 if (SIGISMEMBER(psp->ps_osigset, sig)) {
562 osendsig(catcher, ksi, mask);
563 return;
564 }
565 #endif
566 regs = td->td_frame;
567 oonstack = sigonstack(regs->tf_esp);
568
569 /* Save user context. */
570 bzero(&sf, sizeof(sf));
571 sf.sf_uc.uc_sigmask = *mask;
572 sf.sf_uc.uc_stack = td->td_sigstk;
573 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
574 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
575 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
576 sf.sf_uc.uc_mcontext.mc_gs = rgs();
577 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
578 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
579 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
580 fpstate_drop(td);
581 /*
582 * Unconditionally fill the fsbase and gsbase into the mcontext.
583 */
584 sdp = &td->td_pcb->pcb_fsd;
585 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
586 sdp->sd_lobase;
587 sdp = &td->td_pcb->pcb_gsd;
588 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
589 sdp->sd_lobase;
590 sf.sf_uc.uc_mcontext.mc_flags = 0;
591 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
592 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
593 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
594
595 /* Allocate space for the signal handler context. */
596 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
597 SIGISMEMBER(psp->ps_sigonstack, sig)) {
598 sp = td->td_sigstk.ss_sp +
599 td->td_sigstk.ss_size - sizeof(struct sigframe);
600 #if defined(COMPAT_43)
601 td->td_sigstk.ss_flags |= SS_ONSTACK;
602 #endif
603 } else
604 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
605 /* Align to 16 bytes. */
606 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
607
608 /* Translate the signal if appropriate. */
609 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
610 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
611
612 /* Build the argument list for the signal handler. */
613 sf.sf_signum = sig;
614 sf.sf_ucontext = (register_t)&sfp->sf_uc;
615 bzero(&sf.sf_si, sizeof(sf.sf_si));
616 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
617 /* Signal handler installed with SA_SIGINFO. */
618 sf.sf_siginfo = (register_t)&sfp->sf_si;
619 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
620
621 /* Fill in POSIX parts */
622 sf.sf_si = ksi->ksi_info;
623 sf.sf_si.si_signo = sig; /* maybe a translated signal */
624 } else {
625 /* Old FreeBSD-style arguments. */
626 sf.sf_siginfo = ksi->ksi_code;
627 sf.sf_addr = (register_t)ksi->ksi_addr;
628 sf.sf_ahu.sf_handler = catcher;
629 }
630 mtx_unlock(&psp->ps_mtx);
631 PROC_UNLOCK(p);
632
633 /*
634 * If we're a vm86 process, we want to save the segment registers.
635 * We also change eflags to be our emulated eflags, not the actual
636 * eflags.
637 */
638 if (regs->tf_eflags & PSL_VM) {
639 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
640 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
641
642 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
643 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
644 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
645 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
646
647 if (vm86->vm86_has_vme == 0)
648 sf.sf_uc.uc_mcontext.mc_eflags =
649 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
650 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
651
652 /*
653 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
654 * syscalls made by the signal handler. This just avoids
655 * wasting time for our lazy fixup of such faults. PSL_NT
656 * does nothing in vm86 mode, but vm86 programs can set it
657 * almost legitimately in probes for old cpu types.
658 */
659 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
660 }
661
662 /*
663 * Copy the sigframe out to the user's stack.
664 */
665 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
666 #ifdef DEBUG
667 printf("process %ld has trashed its stack\n", (long)p->p_pid);
668 #endif
669 PROC_LOCK(p);
670 sigexit(td, SIGILL);
671 }
672
673 regs->tf_esp = (int)sfp;
674 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
675 regs->tf_eflags &= ~(PSL_T | PSL_D);
676 regs->tf_cs = _ucodesel;
677 regs->tf_ds = _udatasel;
678 regs->tf_es = _udatasel;
679 regs->tf_fs = _udatasel;
680 regs->tf_ss = _udatasel;
681 PROC_LOCK(p);
682 mtx_lock(&psp->ps_mtx);
683 }
684
685 /*
686 * System call to cleanup state after a signal
687 * has been taken. Reset signal mask and
688 * stack state from context left by sendsig (above).
689 * Return to previous pc and psl as specified by
690 * context left by sendsig. Check carefully to
691 * make sure that the user has not modified the
692 * state to gain improper privileges.
693 *
694 * MPSAFE
695 */
696 #ifdef COMPAT_43
697 int
698 osigreturn(td, uap)
699 struct thread *td;
700 struct osigreturn_args /* {
701 struct osigcontext *sigcntxp;
702 } */ *uap;
703 {
704 struct osigcontext sc;
705 struct trapframe *regs;
706 struct osigcontext *scp;
707 int eflags, error;
708 ksiginfo_t ksi;
709
710 regs = td->td_frame;
711 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
712 if (error != 0)
713 return (error);
714 scp = ≻
715 eflags = scp->sc_ps;
716 if (eflags & PSL_VM) {
717 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
718 struct vm86_kernel *vm86;
719
720 /*
721 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
722 * set up the vm86 area, and we can't enter vm86 mode.
723 */
724 if (td->td_pcb->pcb_ext == 0)
725 return (EINVAL);
726 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
727 if (vm86->vm86_inited == 0)
728 return (EINVAL);
729
730 /* Go back to user mode if both flags are set. */
731 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
732 ksiginfo_init_trap(&ksi);
733 ksi.ksi_signo = SIGBUS;
734 ksi.ksi_code = BUS_OBJERR;
735 ksi.ksi_addr = (void *)regs->tf_eip;
736 trapsignal(td, &ksi);
737 }
738
739 if (vm86->vm86_has_vme) {
740 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
741 (eflags & VME_USERCHANGE) | PSL_VM;
742 } else {
743 vm86->vm86_eflags = eflags; /* save VIF, VIP */
744 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
745 (eflags & VM_USERCHANGE) | PSL_VM;
746 }
747 tf->tf_vm86_ds = scp->sc_ds;
748 tf->tf_vm86_es = scp->sc_es;
749 tf->tf_vm86_fs = scp->sc_fs;
750 tf->tf_vm86_gs = scp->sc_gs;
751 tf->tf_ds = _udatasel;
752 tf->tf_es = _udatasel;
753 tf->tf_fs = _udatasel;
754 } else {
755 /*
756 * Don't allow users to change privileged or reserved flags.
757 */
758 /*
759 * XXX do allow users to change the privileged flag PSL_RF.
760 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
761 * should sometimes set it there too. tf_eflags is kept in
762 * the signal context during signal handling and there is no
763 * other place to remember it, so the PSL_RF bit may be
764 * corrupted by the signal handler without us knowing.
765 * Corruption of the PSL_RF bit at worst causes one more or
766 * one less debugger trap, so allowing it is fairly harmless.
767 */
768 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
769 return (EINVAL);
770 }
771
772 /*
773 * Don't allow users to load a valid privileged %cs. Let the
774 * hardware check for invalid selectors, excess privilege in
775 * other selectors, invalid %eip's and invalid %esp's.
776 */
777 if (!CS_SECURE(scp->sc_cs)) {
778 ksiginfo_init_trap(&ksi);
779 ksi.ksi_signo = SIGBUS;
780 ksi.ksi_code = BUS_OBJERR;
781 ksi.ksi_trapno = T_PROTFLT;
782 ksi.ksi_addr = (void *)regs->tf_eip;
783 trapsignal(td, &ksi);
784 return (EINVAL);
785 }
786 regs->tf_ds = scp->sc_ds;
787 regs->tf_es = scp->sc_es;
788 regs->tf_fs = scp->sc_fs;
789 }
790
791 /* Restore remaining registers. */
792 regs->tf_eax = scp->sc_eax;
793 regs->tf_ebx = scp->sc_ebx;
794 regs->tf_ecx = scp->sc_ecx;
795 regs->tf_edx = scp->sc_edx;
796 regs->tf_esi = scp->sc_esi;
797 regs->tf_edi = scp->sc_edi;
798 regs->tf_cs = scp->sc_cs;
799 regs->tf_ss = scp->sc_ss;
800 regs->tf_isp = scp->sc_isp;
801 regs->tf_ebp = scp->sc_fp;
802 regs->tf_esp = scp->sc_sp;
803 regs->tf_eip = scp->sc_pc;
804 regs->tf_eflags = eflags;
805
806 #if defined(COMPAT_43)
807 if (scp->sc_onstack & 1)
808 td->td_sigstk.ss_flags |= SS_ONSTACK;
809 else
810 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
811 #endif
812 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
813 SIGPROCMASK_OLD);
814 return (EJUSTRETURN);
815 }
816 #endif /* COMPAT_43 */
817
818 #ifdef COMPAT_FREEBSD4
819 /*
820 * MPSAFE
821 */
822 int
823 freebsd4_sigreturn(td, uap)
824 struct thread *td;
825 struct freebsd4_sigreturn_args /* {
826 const ucontext4 *sigcntxp;
827 } */ *uap;
828 {
829 struct ucontext4 uc;
830 struct trapframe *regs;
831 struct ucontext4 *ucp;
832 int cs, eflags, error;
833 ksiginfo_t ksi;
834
835 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
836 if (error != 0)
837 return (error);
838 ucp = &uc;
839 regs = td->td_frame;
840 eflags = ucp->uc_mcontext.mc_eflags;
841 if (eflags & PSL_VM) {
842 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
843 struct vm86_kernel *vm86;
844
845 /*
846 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
847 * set up the vm86 area, and we can't enter vm86 mode.
848 */
849 if (td->td_pcb->pcb_ext == 0)
850 return (EINVAL);
851 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
852 if (vm86->vm86_inited == 0)
853 return (EINVAL);
854
855 /* Go back to user mode if both flags are set. */
856 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
857 ksiginfo_init_trap(&ksi);
858 ksi.ksi_signo = SIGBUS;
859 ksi.ksi_code = BUS_OBJERR;
860 ksi.ksi_addr = (void *)regs->tf_eip;
861 trapsignal(td, &ksi);
862 }
863 if (vm86->vm86_has_vme) {
864 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
865 (eflags & VME_USERCHANGE) | PSL_VM;
866 } else {
867 vm86->vm86_eflags = eflags; /* save VIF, VIP */
868 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
869 (eflags & VM_USERCHANGE) | PSL_VM;
870 }
871 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
872 tf->tf_eflags = eflags;
873 tf->tf_vm86_ds = tf->tf_ds;
874 tf->tf_vm86_es = tf->tf_es;
875 tf->tf_vm86_fs = tf->tf_fs;
876 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
877 tf->tf_ds = _udatasel;
878 tf->tf_es = _udatasel;
879 tf->tf_fs = _udatasel;
880 } else {
881 /*
882 * Don't allow users to change privileged or reserved flags.
883 */
884 /*
885 * XXX do allow users to change the privileged flag PSL_RF.
886 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
887 * should sometimes set it there too. tf_eflags is kept in
888 * the signal context during signal handling and there is no
889 * other place to remember it, so the PSL_RF bit may be
890 * corrupted by the signal handler without us knowing.
891 * Corruption of the PSL_RF bit at worst causes one more or
892 * one less debugger trap, so allowing it is fairly harmless.
893 */
894 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
895 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
896 td->td_proc->p_pid, td->td_name, eflags);
897 return (EINVAL);
898 }
899
900 /*
901 * Don't allow users to load a valid privileged %cs. Let the
902 * hardware check for invalid selectors, excess privilege in
903 * other selectors, invalid %eip's and invalid %esp's.
904 */
905 cs = ucp->uc_mcontext.mc_cs;
906 if (!CS_SECURE(cs)) {
907 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
908 td->td_proc->p_pid, td->td_name, cs);
909 ksiginfo_init_trap(&ksi);
910 ksi.ksi_signo = SIGBUS;
911 ksi.ksi_code = BUS_OBJERR;
912 ksi.ksi_trapno = T_PROTFLT;
913 ksi.ksi_addr = (void *)regs->tf_eip;
914 trapsignal(td, &ksi);
915 return (EINVAL);
916 }
917
918 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
919 }
920
921 #if defined(COMPAT_43)
922 if (ucp->uc_mcontext.mc_onstack & 1)
923 td->td_sigstk.ss_flags |= SS_ONSTACK;
924 else
925 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
926 #endif
927 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
928 return (EJUSTRETURN);
929 }
930 #endif /* COMPAT_FREEBSD4 */
931
932 /*
933 * MPSAFE
934 */
935 int
936 sigreturn(td, uap)
937 struct thread *td;
938 struct sigreturn_args /* {
939 const struct __ucontext *sigcntxp;
940 } */ *uap;
941 {
942 ucontext_t uc;
943 struct trapframe *regs;
944 ucontext_t *ucp;
945 int cs, eflags, error, ret;
946 ksiginfo_t ksi;
947
948 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
949 if (error != 0)
950 return (error);
951 ucp = &uc;
952 regs = td->td_frame;
953 eflags = ucp->uc_mcontext.mc_eflags;
954 if (eflags & PSL_VM) {
955 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
956 struct vm86_kernel *vm86;
957
958 /*
959 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
960 * set up the vm86 area, and we can't enter vm86 mode.
961 */
962 if (td->td_pcb->pcb_ext == 0)
963 return (EINVAL);
964 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
965 if (vm86->vm86_inited == 0)
966 return (EINVAL);
967
968 /* Go back to user mode if both flags are set. */
969 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
970 ksiginfo_init_trap(&ksi);
971 ksi.ksi_signo = SIGBUS;
972 ksi.ksi_code = BUS_OBJERR;
973 ksi.ksi_addr = (void *)regs->tf_eip;
974 trapsignal(td, &ksi);
975 }
976
977 if (vm86->vm86_has_vme) {
978 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
979 (eflags & VME_USERCHANGE) | PSL_VM;
980 } else {
981 vm86->vm86_eflags = eflags; /* save VIF, VIP */
982 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
983 (eflags & VM_USERCHANGE) | PSL_VM;
984 }
985 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
986 tf->tf_eflags = eflags;
987 tf->tf_vm86_ds = tf->tf_ds;
988 tf->tf_vm86_es = tf->tf_es;
989 tf->tf_vm86_fs = tf->tf_fs;
990 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
991 tf->tf_ds = _udatasel;
992 tf->tf_es = _udatasel;
993 tf->tf_fs = _udatasel;
994 } else {
995 /*
996 * Don't allow users to change privileged or reserved flags.
997 */
998 /*
999 * XXX do allow users to change the privileged flag PSL_RF.
1000 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1001 * should sometimes set it there too. tf_eflags is kept in
1002 * the signal context during signal handling and there is no
1003 * other place to remember it, so the PSL_RF bit may be
1004 * corrupted by the signal handler without us knowing.
1005 * Corruption of the PSL_RF bit at worst causes one more or
1006 * one less debugger trap, so allowing it is fairly harmless.
1007 */
1008 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1009 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1010 td->td_proc->p_pid, td->td_name, eflags);
1011 return (EINVAL);
1012 }
1013
1014 /*
1015 * Don't allow users to load a valid privileged %cs. Let the
1016 * hardware check for invalid selectors, excess privilege in
1017 * other selectors, invalid %eip's and invalid %esp's.
1018 */
1019 cs = ucp->uc_mcontext.mc_cs;
1020 if (!CS_SECURE(cs)) {
1021 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1022 td->td_proc->p_pid, td->td_name, cs);
1023 ksiginfo_init_trap(&ksi);
1024 ksi.ksi_signo = SIGBUS;
1025 ksi.ksi_code = BUS_OBJERR;
1026 ksi.ksi_trapno = T_PROTFLT;
1027 ksi.ksi_addr = (void *)regs->tf_eip;
1028 trapsignal(td, &ksi);
1029 return (EINVAL);
1030 }
1031
1032 ret = set_fpcontext(td, &ucp->uc_mcontext);
1033 if (ret != 0)
1034 return (ret);
1035 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1036 }
1037
1038 #if defined(COMPAT_43)
1039 if (ucp->uc_mcontext.mc_onstack & 1)
1040 td->td_sigstk.ss_flags |= SS_ONSTACK;
1041 else
1042 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1043 #endif
1044
1045 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1046 return (EJUSTRETURN);
1047 }
1048
1049 /*
1050 * Machine dependent boot() routine
1051 *
1052 * I haven't seen anything to put here yet
1053 * Possibly some stuff might be grafted back here from boot()
1054 */
1055 void
1056 cpu_boot(int howto)
1057 {
1058 }
1059
1060 /*
1061 * Flush the D-cache for non-DMA I/O so that the I-cache can
1062 * be made coherent later.
1063 */
1064 void
1065 cpu_flush_dcache(void *ptr, size_t len)
1066 {
1067 /* Not applicable */
1068 }
1069
1070 /* Get current clock frequency for the given cpu id. */
1071 int
1072 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1073 {
1074 register_t reg;
1075 uint64_t tsc1, tsc2;
1076
1077 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1078 return (EINVAL);
1079 if (!tsc_present)
1080 return (EOPNOTSUPP);
1081
1082 /* If we're booting, trust the rate calibrated moments ago. */
1083 if (cold) {
1084 *rate = tsc_freq;
1085 return (0);
1086 }
1087
1088 #ifdef SMP
1089 /* Schedule ourselves on the indicated cpu. */
1090 thread_lock(curthread);
1091 sched_bind(curthread, cpu_id);
1092 thread_unlock(curthread);
1093 #endif
1094
1095 /* Calibrate by measuring a short delay. */
1096 reg = intr_disable();
1097 tsc1 = rdtsc();
1098 DELAY(1000);
1099 tsc2 = rdtsc();
1100 intr_restore(reg);
1101
1102 #ifdef SMP
1103 thread_lock(curthread);
1104 sched_unbind(curthread);
1105 thread_unlock(curthread);
1106 #endif
1107
1108 /*
1109 * Calculate the difference in readings, convert to Mhz, and
1110 * subtract 0.5% of the total. Empirical testing has shown that
1111 * overhead in DELAY() works out to approximately this value.
1112 */
1113 tsc2 -= tsc1;
1114 *rate = tsc2 * 1000 - tsc2 * 5;
1115 return (0);
1116 }
1117
1118
1119 /*
1120 * Shutdown the CPU as much as possible
1121 */
1122 void
1123 cpu_halt(void)
1124 {
1125 for (;;)
1126 halt();
1127 }
1128
1129 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1130 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1131 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1132 0, "Use MONITOR/MWAIT for short idle");
1133
1134 #define STATE_RUNNING 0x0
1135 #define STATE_MWAIT 0x1
1136 #define STATE_SLEEPING 0x2
1137
1138 static void
1139 cpu_idle_hlt(int busy)
1140 {
1141 int *state;
1142
1143 state = (int *)PCPU_PTR(monitorbuf);
1144 *state = STATE_SLEEPING;
1145
1146 /*
1147 * Since we may be in a critical section from cpu_idle(), if
1148 * an interrupt fires during that critical section we may have
1149 * a pending preemption. If the CPU halts, then that thread
1150 * may not execute until a later interrupt awakens the CPU.
1151 * To handle this race, check for a runnable thread after
1152 * disabling interrupts and immediately return if one is
1153 * found. Also, we must absolutely guarentee that hlt is
1154 * the next instruction after sti. This ensures that any
1155 * interrupt that fires after the call to disable_intr() will
1156 * immediately awaken the CPU from hlt. Finally, please note
1157 * that on x86 this works fine because of interrupts enabled only
1158 * after the instruction following sti takes place, while IF is set
1159 * to 1 immediately, allowing hlt instruction to acknowledge the
1160 * interrupt.
1161 */
1162 disable_intr();
1163 if (sched_runnable())
1164 enable_intr();
1165 else
1166 __asm __volatile("sti; hlt");
1167 *state = STATE_RUNNING;
1168 }
1169
1170 /*
1171 * MWAIT cpu power states. Lower 4 bits are sub-states.
1172 */
1173 #define MWAIT_C0 0xf0
1174 #define MWAIT_C1 0x00
1175 #define MWAIT_C2 0x10
1176 #define MWAIT_C3 0x20
1177 #define MWAIT_C4 0x30
1178
1179 static void
1180 cpu_idle_mwait(int busy)
1181 {
1182 int *state;
1183
1184 state = (int *)PCPU_PTR(monitorbuf);
1185 *state = STATE_MWAIT;
1186
1187 /* See comments in cpu_idle_hlt(). */
1188 disable_intr();
1189 if (sched_runnable()) {
1190 enable_intr();
1191 *state = STATE_RUNNING;
1192 return;
1193 }
1194 cpu_monitor(state, 0, 0);
1195 if (*state == STATE_MWAIT)
1196 __asm __volatile("sti; mwait" : : "a" (MWAIT_C1), "c" (0));
1197 else
1198 enable_intr();
1199 *state = STATE_RUNNING;
1200 }
1201
1202 static void
1203 cpu_idle_spin(int busy)
1204 {
1205 int *state;
1206 int i;
1207
1208 state = (int *)PCPU_PTR(monitorbuf);
1209 *state = STATE_RUNNING;
1210
1211 /*
1212 * The sched_runnable() call is racy but as long as there is
1213 * a loop missing it one time will have just a little impact if any
1214 * (and it is much better than missing the check at all).
1215 */
1216 for (i = 0; i < 1000; i++) {
1217 if (sched_runnable())
1218 return;
1219 cpu_spinwait();
1220 }
1221 }
1222
1223 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1224
1225 void
1226 cpu_idle(int busy)
1227 {
1228
1229 #if defined(SMP)
1230 if (mp_grab_cpu_hlt())
1231 return;
1232 #endif
1233 /* If we are busy - try to use fast methods. */
1234 if (busy) {
1235 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1236 cpu_idle_mwait(busy);
1237 return;
1238 }
1239 }
1240
1241 /* Call main idle method. */
1242 cpu_idle_fn(busy);
1243 }
1244
1245 int
1246 cpu_idle_wakeup(int cpu)
1247 {
1248 struct pcpu *pcpu;
1249 int *state;
1250
1251 pcpu = pcpu_find(cpu);
1252 state = (int *)pcpu->pc_monitorbuf;
1253 /*
1254 * This doesn't need to be atomic since missing the race will
1255 * simply result in unnecessary IPIs.
1256 */
1257 if (*state == STATE_SLEEPING)
1258 return (0);
1259 if (*state == STATE_MWAIT)
1260 *state = STATE_RUNNING;
1261 return (1);
1262 }
1263
1264 /*
1265 * Ordered by speed/power consumption.
1266 */
1267 struct {
1268 void *id_fn;
1269 char *id_name;
1270 } idle_tbl[] = {
1271 { cpu_idle_spin, "spin" },
1272 { cpu_idle_mwait, "mwait" },
1273 { cpu_idle_hlt, "hlt" },
1274 { NULL, NULL }
1275 };
1276
1277 static int
1278 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1279 {
1280 char *avail, *p;
1281 int error;
1282 int i;
1283
1284 avail = malloc(256, M_TEMP, M_WAITOK);
1285 p = avail;
1286 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1287 if (strstr(idle_tbl[i].id_name, "mwait") &&
1288 (cpu_feature2 & CPUID2_MON) == 0)
1289 continue;
1290 p += sprintf(p, "%s, ", idle_tbl[i].id_name);
1291 }
1292 error = sysctl_handle_string(oidp, avail, 0, req);
1293 free(avail, M_TEMP);
1294 return (error);
1295 }
1296
1297 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1298 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1299
1300 static int
1301 idle_sysctl(SYSCTL_HANDLER_ARGS)
1302 {
1303 char buf[16];
1304 int error;
1305 char *p;
1306 int i;
1307
1308 p = "unknown";
1309 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1310 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1311 p = idle_tbl[i].id_name;
1312 break;
1313 }
1314 }
1315 strncpy(buf, p, sizeof(buf));
1316 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1317 if (error != 0 || req->newptr == NULL)
1318 return (error);
1319 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1320 if (strstr(idle_tbl[i].id_name, "mwait") &&
1321 (cpu_feature2 & CPUID2_MON) == 0)
1322 continue;
1323 if (strcmp(idle_tbl[i].id_name, buf))
1324 continue;
1325 cpu_idle_fn = idle_tbl[i].id_fn;
1326 return (0);
1327 }
1328 return (EINVAL);
1329 }
1330
1331 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1332 idle_sysctl, "A", "currently selected idle function");
1333
1334 /*
1335 * Reset registers to default values on exec.
1336 */
1337 void
1338 exec_setregs(td, entry, stack, ps_strings)
1339 struct thread *td;
1340 u_long entry;
1341 u_long stack;
1342 u_long ps_strings;
1343 {
1344 struct trapframe *regs = td->td_frame;
1345 struct pcb *pcb = td->td_pcb;
1346
1347 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1348 pcb->pcb_gs = _udatasel;
1349 load_gs(_udatasel);
1350
1351 mtx_lock_spin(&dt_lock);
1352 if (td->td_proc->p_md.md_ldt)
1353 user_ldt_free(td);
1354 else
1355 mtx_unlock_spin(&dt_lock);
1356
1357 bzero((char *)regs, sizeof(struct trapframe));
1358 regs->tf_eip = entry;
1359 regs->tf_esp = stack;
1360 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1361 regs->tf_ss = _udatasel;
1362 regs->tf_ds = _udatasel;
1363 regs->tf_es = _udatasel;
1364 regs->tf_fs = _udatasel;
1365 regs->tf_cs = _ucodesel;
1366
1367 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1368 regs->tf_ebx = ps_strings;
1369
1370 /*
1371 * Reset the hardware debug registers if they were in use.
1372 * They won't have any meaning for the newly exec'd process.
1373 */
1374 if (pcb->pcb_flags & PCB_DBREGS) {
1375 pcb->pcb_dr0 = 0;
1376 pcb->pcb_dr1 = 0;
1377 pcb->pcb_dr2 = 0;
1378 pcb->pcb_dr3 = 0;
1379 pcb->pcb_dr6 = 0;
1380 pcb->pcb_dr7 = 0;
1381 if (pcb == PCPU_GET(curpcb)) {
1382 /*
1383 * Clear the debug registers on the running
1384 * CPU, otherwise they will end up affecting
1385 * the next process we switch to.
1386 */
1387 reset_dbregs();
1388 }
1389 pcb->pcb_flags &= ~PCB_DBREGS;
1390 }
1391
1392 /*
1393 * Initialize the math emulator (if any) for the current process.
1394 * Actually, just clear the bit that says that the emulator has
1395 * been initialized. Initialization is delayed until the process
1396 * traps to the emulator (if it is done at all) mainly because
1397 * emulators don't provide an entry point for initialization.
1398 */
1399 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1400 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1401
1402 /*
1403 * Drop the FP state if we hold it, so that the process gets a
1404 * clean FP state if it uses the FPU again.
1405 */
1406 fpstate_drop(td);
1407
1408 /*
1409 * XXX - Linux emulator
1410 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1411 * on it.
1412 */
1413 td->td_retval[1] = 0;
1414 }
1415
1416 void
1417 cpu_setregs(void)
1418 {
1419 unsigned int cr0;
1420
1421 cr0 = rcr0();
1422
1423 /*
1424 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1425 *
1426 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1427 * instructions. We must set the CR0_MP bit and use the CR0_TS
1428 * bit to control the trap, because setting the CR0_EM bit does
1429 * not cause WAIT instructions to trap. It's important to trap
1430 * WAIT instructions - otherwise the "wait" variants of no-wait
1431 * control instructions would degenerate to the "no-wait" variants
1432 * after FP context switches but work correctly otherwise. It's
1433 * particularly important to trap WAITs when there is no NPX -
1434 * otherwise the "wait" variants would always degenerate.
1435 *
1436 * Try setting CR0_NE to get correct error reporting on 486DX's.
1437 * Setting it should fail or do nothing on lesser processors.
1438 */
1439 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1440 load_cr0(cr0);
1441 load_gs(_udatasel);
1442 }
1443
1444 u_long bootdev; /* not a struct cdev *- encoding is different */
1445 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1446 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1447
1448 /*
1449 * Initialize 386 and configure to run kernel
1450 */
1451
1452 /*
1453 * Initialize segments & interrupt table
1454 */
1455
1456 int _default_ldt;
1457
1458 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1459 union descriptor ldt[NLDT]; /* local descriptor table */
1460 static struct gate_descriptor idt0[NIDT];
1461 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1462 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1463 struct mtx dt_lock; /* lock for GDT and LDT */
1464
1465 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1466 extern int has_f00f_bug;
1467 #endif
1468
1469 static struct i386tss dblfault_tss;
1470 static char dblfault_stack[PAGE_SIZE];
1471
1472 extern vm_offset_t proc0kstack;
1473
1474
1475 /*
1476 * software prototypes -- in more palatable form.
1477 *
1478 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1479 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1480 */
1481 struct soft_segment_descriptor gdt_segs[] = {
1482 /* GNULL_SEL 0 Null Descriptor */
1483 { .ssd_base = 0x0,
1484 .ssd_limit = 0x0,
1485 .ssd_type = 0,
1486 .ssd_dpl = SEL_KPL,
1487 .ssd_p = 0,
1488 .ssd_xx = 0, .ssd_xx1 = 0,
1489 .ssd_def32 = 0,
1490 .ssd_gran = 0 },
1491 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1492 { .ssd_base = 0x0,
1493 .ssd_limit = 0xfffff,
1494 .ssd_type = SDT_MEMRWA,
1495 .ssd_dpl = SEL_KPL,
1496 .ssd_p = 1,
1497 .ssd_xx = 0, .ssd_xx1 = 0,
1498 .ssd_def32 = 1,
1499 .ssd_gran = 1 },
1500 /* GUFS_SEL 2 %fs Descriptor for user */
1501 { .ssd_base = 0x0,
1502 .ssd_limit = 0xfffff,
1503 .ssd_type = SDT_MEMRWA,
1504 .ssd_dpl = SEL_UPL,
1505 .ssd_p = 1,
1506 .ssd_xx = 0, .ssd_xx1 = 0,
1507 .ssd_def32 = 1,
1508 .ssd_gran = 1 },
1509 /* GUGS_SEL 3 %gs Descriptor for user */
1510 { .ssd_base = 0x0,
1511 .ssd_limit = 0xfffff,
1512 .ssd_type = SDT_MEMRWA,
1513 .ssd_dpl = SEL_UPL,
1514 .ssd_p = 1,
1515 .ssd_xx = 0, .ssd_xx1 = 0,
1516 .ssd_def32 = 1,
1517 .ssd_gran = 1 },
1518 /* GCODE_SEL 4 Code Descriptor for kernel */
1519 { .ssd_base = 0x0,
1520 .ssd_limit = 0xfffff,
1521 .ssd_type = SDT_MEMERA,
1522 .ssd_dpl = SEL_KPL,
1523 .ssd_p = 1,
1524 .ssd_xx = 0, .ssd_xx1 = 0,
1525 .ssd_def32 = 1,
1526 .ssd_gran = 1 },
1527 /* GDATA_SEL 5 Data Descriptor for kernel */
1528 { .ssd_base = 0x0,
1529 .ssd_limit = 0xfffff,
1530 .ssd_type = SDT_MEMRWA,
1531 .ssd_dpl = SEL_KPL,
1532 .ssd_p = 1,
1533 .ssd_xx = 0, .ssd_xx1 = 0,
1534 .ssd_def32 = 1,
1535 .ssd_gran = 1 },
1536 /* GUCODE_SEL 6 Code Descriptor for user */
1537 { .ssd_base = 0x0,
1538 .ssd_limit = 0xfffff,
1539 .ssd_type = SDT_MEMERA,
1540 .ssd_dpl = SEL_UPL,
1541 .ssd_p = 1,
1542 .ssd_xx = 0, .ssd_xx1 = 0,
1543 .ssd_def32 = 1,
1544 .ssd_gran = 1 },
1545 /* GUDATA_SEL 7 Data Descriptor for user */
1546 { .ssd_base = 0x0,
1547 .ssd_limit = 0xfffff,
1548 .ssd_type = SDT_MEMRWA,
1549 .ssd_dpl = SEL_UPL,
1550 .ssd_p = 1,
1551 .ssd_xx = 0, .ssd_xx1 = 0,
1552 .ssd_def32 = 1,
1553 .ssd_gran = 1 },
1554 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1555 { .ssd_base = 0x400,
1556 .ssd_limit = 0xfffff,
1557 .ssd_type = SDT_MEMRWA,
1558 .ssd_dpl = SEL_KPL,
1559 .ssd_p = 1,
1560 .ssd_xx = 0, .ssd_xx1 = 0,
1561 .ssd_def32 = 1,
1562 .ssd_gran = 1 },
1563 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1564 {
1565 .ssd_base = 0x0,
1566 .ssd_limit = sizeof(struct i386tss)-1,
1567 .ssd_type = SDT_SYS386TSS,
1568 .ssd_dpl = 0,
1569 .ssd_p = 1,
1570 .ssd_xx = 0, .ssd_xx1 = 0,
1571 .ssd_def32 = 0,
1572 .ssd_gran = 0 },
1573 /* GLDT_SEL 10 LDT Descriptor */
1574 { .ssd_base = (int) ldt,
1575 .ssd_limit = sizeof(ldt)-1,
1576 .ssd_type = SDT_SYSLDT,
1577 .ssd_dpl = SEL_UPL,
1578 .ssd_p = 1,
1579 .ssd_xx = 0, .ssd_xx1 = 0,
1580 .ssd_def32 = 0,
1581 .ssd_gran = 0 },
1582 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1583 { .ssd_base = (int) ldt,
1584 .ssd_limit = (512 * sizeof(union descriptor)-1),
1585 .ssd_type = SDT_SYSLDT,
1586 .ssd_dpl = 0,
1587 .ssd_p = 1,
1588 .ssd_xx = 0, .ssd_xx1 = 0,
1589 .ssd_def32 = 0,
1590 .ssd_gran = 0 },
1591 /* GPANIC_SEL 12 Panic Tss Descriptor */
1592 { .ssd_base = (int) &dblfault_tss,
1593 .ssd_limit = sizeof(struct i386tss)-1,
1594 .ssd_type = SDT_SYS386TSS,
1595 .ssd_dpl = 0,
1596 .ssd_p = 1,
1597 .ssd_xx = 0, .ssd_xx1 = 0,
1598 .ssd_def32 = 0,
1599 .ssd_gran = 0 },
1600 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1601 { .ssd_base = 0,
1602 .ssd_limit = 0xfffff,
1603 .ssd_type = SDT_MEMERA,
1604 .ssd_dpl = 0,
1605 .ssd_p = 1,
1606 .ssd_xx = 0, .ssd_xx1 = 0,
1607 .ssd_def32 = 0,
1608 .ssd_gran = 1 },
1609 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1610 { .ssd_base = 0,
1611 .ssd_limit = 0xfffff,
1612 .ssd_type = SDT_MEMERA,
1613 .ssd_dpl = 0,
1614 .ssd_p = 1,
1615 .ssd_xx = 0, .ssd_xx1 = 0,
1616 .ssd_def32 = 0,
1617 .ssd_gran = 1 },
1618 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1619 { .ssd_base = 0,
1620 .ssd_limit = 0xfffff,
1621 .ssd_type = SDT_MEMRWA,
1622 .ssd_dpl = 0,
1623 .ssd_p = 1,
1624 .ssd_xx = 0, .ssd_xx1 = 0,
1625 .ssd_def32 = 1,
1626 .ssd_gran = 1 },
1627 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1628 { .ssd_base = 0,
1629 .ssd_limit = 0xfffff,
1630 .ssd_type = SDT_MEMRWA,
1631 .ssd_dpl = 0,
1632 .ssd_p = 1,
1633 .ssd_xx = 0, .ssd_xx1 = 0,
1634 .ssd_def32 = 0,
1635 .ssd_gran = 1 },
1636 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1637 { .ssd_base = 0,
1638 .ssd_limit = 0xfffff,
1639 .ssd_type = SDT_MEMRWA,
1640 .ssd_dpl = 0,
1641 .ssd_p = 1,
1642 .ssd_xx = 0, .ssd_xx1 = 0,
1643 .ssd_def32 = 0,
1644 .ssd_gran = 1 },
1645 /* GNDIS_SEL 18 NDIS Descriptor */
1646 { .ssd_base = 0x0,
1647 .ssd_limit = 0x0,
1648 .ssd_type = 0,
1649 .ssd_dpl = 0,
1650 .ssd_p = 0,
1651 .ssd_xx = 0, .ssd_xx1 = 0,
1652 .ssd_def32 = 0,
1653 .ssd_gran = 0 },
1654 };
1655
1656 static struct soft_segment_descriptor ldt_segs[] = {
1657 /* Null Descriptor - overwritten by call gate */
1658 { .ssd_base = 0x0,
1659 .ssd_limit = 0x0,
1660 .ssd_type = 0,
1661 .ssd_dpl = 0,
1662 .ssd_p = 0,
1663 .ssd_xx = 0, .ssd_xx1 = 0,
1664 .ssd_def32 = 0,
1665 .ssd_gran = 0 },
1666 /* Null Descriptor - overwritten by call gate */
1667 { .ssd_base = 0x0,
1668 .ssd_limit = 0x0,
1669 .ssd_type = 0,
1670 .ssd_dpl = 0,
1671 .ssd_p = 0,
1672 .ssd_xx = 0, .ssd_xx1 = 0,
1673 .ssd_def32 = 0,
1674 .ssd_gran = 0 },
1675 /* Null Descriptor - overwritten by call gate */
1676 { .ssd_base = 0x0,
1677 .ssd_limit = 0x0,
1678 .ssd_type = 0,
1679 .ssd_dpl = 0,
1680 .ssd_p = 0,
1681 .ssd_xx = 0, .ssd_xx1 = 0,
1682 .ssd_def32 = 0,
1683 .ssd_gran = 0 },
1684 /* Code Descriptor for user */
1685 { .ssd_base = 0x0,
1686 .ssd_limit = 0xfffff,
1687 .ssd_type = SDT_MEMERA,
1688 .ssd_dpl = SEL_UPL,
1689 .ssd_p = 1,
1690 .ssd_xx = 0, .ssd_xx1 = 0,
1691 .ssd_def32 = 1,
1692 .ssd_gran = 1 },
1693 /* Null Descriptor - overwritten by call gate */
1694 { .ssd_base = 0x0,
1695 .ssd_limit = 0x0,
1696 .ssd_type = 0,
1697 .ssd_dpl = 0,
1698 .ssd_p = 0,
1699 .ssd_xx = 0, .ssd_xx1 = 0,
1700 .ssd_def32 = 0,
1701 .ssd_gran = 0 },
1702 /* Data Descriptor for user */
1703 { .ssd_base = 0x0,
1704 .ssd_limit = 0xfffff,
1705 .ssd_type = SDT_MEMRWA,
1706 .ssd_dpl = SEL_UPL,
1707 .ssd_p = 1,
1708 .ssd_xx = 0, .ssd_xx1 = 0,
1709 .ssd_def32 = 1,
1710 .ssd_gran = 1 },
1711 };
1712
1713 void
1714 setidt(idx, func, typ, dpl, selec)
1715 int idx;
1716 inthand_t *func;
1717 int typ;
1718 int dpl;
1719 int selec;
1720 {
1721 struct gate_descriptor *ip;
1722
1723 ip = idt + idx;
1724 ip->gd_looffset = (int)func;
1725 ip->gd_selector = selec;
1726 ip->gd_stkcpy = 0;
1727 ip->gd_xx = 0;
1728 ip->gd_type = typ;
1729 ip->gd_dpl = dpl;
1730 ip->gd_p = 1;
1731 ip->gd_hioffset = ((int)func)>>16 ;
1732 }
1733
1734 extern inthand_t
1735 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1736 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1737 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1738 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1739 IDTVEC(xmm),
1740 #ifdef KDTRACE_HOOKS
1741 IDTVEC(dtrace_ret),
1742 #endif
1743 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1744
1745 #ifdef DDB
1746 /*
1747 * Display the index and function name of any IDT entries that don't use
1748 * the default 'rsvd' entry point.
1749 */
1750 DB_SHOW_COMMAND(idt, db_show_idt)
1751 {
1752 struct gate_descriptor *ip;
1753 int idx;
1754 uintptr_t func;
1755
1756 ip = idt;
1757 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1758 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1759 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1760 db_printf("%3d\t", idx);
1761 db_printsym(func, DB_STGY_PROC);
1762 db_printf("\n");
1763 }
1764 ip++;
1765 }
1766 }
1767
1768 /* Show privileged registers. */
1769 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1770 {
1771 uint64_t idtr, gdtr;
1772
1773 idtr = ridt();
1774 db_printf("idtr\t0x%08x/%04x\n",
1775 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1776 gdtr = rgdt();
1777 db_printf("gdtr\t0x%08x/%04x\n",
1778 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1779 db_printf("ldtr\t0x%04x\n", rldt());
1780 db_printf("tr\t0x%04x\n", rtr());
1781 db_printf("cr0\t0x%08x\n", rcr0());
1782 db_printf("cr2\t0x%08x\n", rcr2());
1783 db_printf("cr3\t0x%08x\n", rcr3());
1784 db_printf("cr4\t0x%08x\n", rcr4());
1785 }
1786 #endif
1787
1788 void
1789 sdtossd(sd, ssd)
1790 struct segment_descriptor *sd;
1791 struct soft_segment_descriptor *ssd;
1792 {
1793 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1794 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1795 ssd->ssd_type = sd->sd_type;
1796 ssd->ssd_dpl = sd->sd_dpl;
1797 ssd->ssd_p = sd->sd_p;
1798 ssd->ssd_def32 = sd->sd_def32;
1799 ssd->ssd_gran = sd->sd_gran;
1800 }
1801
1802 static void
1803 basemem_setup(void)
1804 {
1805 vm_paddr_t pa;
1806 pt_entry_t *pte;
1807 int i;
1808
1809 if (basemem > 640) {
1810 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1811 basemem);
1812 basemem = 640;
1813 }
1814
1815 /*
1816 * XXX if biosbasemem is now < 640, there is a `hole'
1817 * between the end of base memory and the start of
1818 * ISA memory. The hole may be empty or it may
1819 * contain BIOS code or data. Map it read/write so
1820 * that the BIOS can write to it. (Memory from 0 to
1821 * the physical end of the kernel is mapped read-only
1822 * to begin with and then parts of it are remapped.
1823 * The parts that aren't remapped form holes that
1824 * remain read-only and are unused by the kernel.
1825 * The base memory area is below the physical end of
1826 * the kernel and right now forms a read-only hole.
1827 * The part of it from PAGE_SIZE to
1828 * (trunc_page(biosbasemem * 1024) - 1) will be
1829 * remapped and used by the kernel later.)
1830 *
1831 * This code is similar to the code used in
1832 * pmap_mapdev, but since no memory needs to be
1833 * allocated we simply change the mapping.
1834 */
1835 for (pa = trunc_page(basemem * 1024);
1836 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1837 pmap_kenter(KERNBASE + pa, pa);
1838
1839 /*
1840 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1841 * the vm86 page table so that vm86 can scribble on them using
1842 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1843 * page 0, at least as initialized here?
1844 */
1845 pte = (pt_entry_t *)vm86paddr;
1846 for (i = basemem / 4; i < 160; i++)
1847 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1848 }
1849
1850 /*
1851 * Populate the (physmap) array with base/bound pairs describing the
1852 * available physical memory in the system, then test this memory and
1853 * build the phys_avail array describing the actually-available memory.
1854 *
1855 * If we cannot accurately determine the physical memory map, then use
1856 * value from the 0xE801 call, and failing that, the RTC.
1857 *
1858 * Total memory size may be set by the kernel environment variable
1859 * hw.physmem or the compile-time define MAXMEM.
1860 *
1861 * XXX first should be vm_paddr_t.
1862 */
1863 static void
1864 getmemsize(int first)
1865 {
1866 int off, physmap_idx, pa_indx, da_indx;
1867 u_long physmem_tunable, memtest;
1868 vm_paddr_t physmap[PHYSMAP_SIZE];
1869 pt_entry_t *pte;
1870 quad_t dcons_addr, dcons_size;
1871 int i;
1872 int pg_n;
1873 u_int extmem;
1874 u_int under16;
1875 vm_paddr_t pa;
1876
1877 bzero(physmap, sizeof(physmap));
1878
1879 /* XXX - some of EPSON machines can't use PG_N */
1880 pg_n = PG_N;
1881 if (pc98_machine_type & M_EPSON_PC98) {
1882 switch (epson_machine_id) {
1883 #ifdef WB_CACHE
1884 default:
1885 #endif
1886 case EPSON_PC486_HX:
1887 case EPSON_PC486_HG:
1888 case EPSON_PC486_HA:
1889 pg_n = 0;
1890 break;
1891 }
1892 }
1893
1894 under16 = pc98_getmemsize(&basemem, &extmem);
1895 basemem_setup();
1896
1897 physmap[0] = 0;
1898 physmap[1] = basemem * 1024;
1899 physmap_idx = 2;
1900 physmap[physmap_idx] = 0x100000;
1901 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1902
1903 /*
1904 * Now, physmap contains a map of physical memory.
1905 */
1906
1907 #ifdef SMP
1908 /* make hole for AP bootstrap code */
1909 physmap[1] = mp_bootaddress(physmap[1]);
1910 #endif
1911
1912 /*
1913 * Maxmem isn't the "maximum memory", it's one larger than the
1914 * highest page of the physical address space. It should be
1915 * called something like "Maxphyspage". We may adjust this
1916 * based on ``hw.physmem'' and the results of the memory test.
1917 */
1918 Maxmem = atop(physmap[physmap_idx + 1]);
1919
1920 #ifdef MAXMEM
1921 Maxmem = MAXMEM / 4;
1922 #endif
1923
1924 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1925 Maxmem = atop(physmem_tunable);
1926
1927 /*
1928 * By default keep the memtest enabled. Use a general name so that
1929 * one could eventually do more with the code than just disable it.
1930 */
1931 memtest = 1;
1932 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1933
1934 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1935 (boothowto & RB_VERBOSE))
1936 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1937
1938 /*
1939 * If Maxmem has been increased beyond what the system has detected,
1940 * extend the last memory segment to the new limit.
1941 */
1942 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1943 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1944
1945 /*
1946 * We need to divide chunk if Maxmem is larger than 16MB and
1947 * under 16MB area is not full of memory.
1948 * (1) system area (15-16MB region) is cut off
1949 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
1950 */
1951 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1952 /* 15M - 16M region is cut off, so need to divide chunk */
1953 physmap[physmap_idx + 1] = under16 * 1024;
1954 physmap_idx += 2;
1955 physmap[physmap_idx] = 0x1000000;
1956 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1957 }
1958
1959 /* call pmap initialization to make new kernel address space */
1960 pmap_bootstrap(first);
1961
1962 /*
1963 * Size up each available chunk of physical memory.
1964 */
1965 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1966 pa_indx = 0;
1967 da_indx = 1;
1968 phys_avail[pa_indx++] = physmap[0];
1969 phys_avail[pa_indx] = physmap[0];
1970 dump_avail[da_indx] = physmap[0];
1971 pte = CMAP1;
1972
1973 /*
1974 * Get dcons buffer address
1975 */
1976 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1977 getenv_quad("dcons.size", &dcons_size) == 0)
1978 dcons_addr = 0;
1979
1980 /*
1981 * physmap is in bytes, so when converting to page boundaries,
1982 * round up the start address and round down the end address.
1983 */
1984 for (i = 0; i <= physmap_idx; i += 2) {
1985 vm_paddr_t end;
1986
1987 end = ptoa((vm_paddr_t)Maxmem);
1988 if (physmap[i + 1] < end)
1989 end = trunc_page(physmap[i + 1]);
1990 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1991 int tmp, page_bad, full;
1992 int *ptr = (int *)CADDR1;
1993
1994 full = FALSE;
1995 /*
1996 * block out kernel memory as not available.
1997 */
1998 if (pa >= KERNLOAD && pa < first)
1999 goto do_dump_avail;
2000
2001 /*
2002 * block out dcons buffer
2003 */
2004 if (dcons_addr > 0
2005 && pa >= trunc_page(dcons_addr)
2006 && pa < dcons_addr + dcons_size)
2007 goto do_dump_avail;
2008
2009 page_bad = FALSE;
2010 if (memtest == 0)
2011 goto skip_memtest;
2012
2013 /*
2014 * map page into kernel: valid, read/write,non-cacheable
2015 */
2016 *pte = pa | PG_V | PG_RW | pg_n;
2017 invltlb();
2018
2019 tmp = *(int *)ptr;
2020 /*
2021 * Test for alternating 1's and 0's
2022 */
2023 *(volatile int *)ptr = 0xaaaaaaaa;
2024 if (*(volatile int *)ptr != 0xaaaaaaaa)
2025 page_bad = TRUE;
2026 /*
2027 * Test for alternating 0's and 1's
2028 */
2029 *(volatile int *)ptr = 0x55555555;
2030 if (*(volatile int *)ptr != 0x55555555)
2031 page_bad = TRUE;
2032 /*
2033 * Test for all 1's
2034 */
2035 *(volatile int *)ptr = 0xffffffff;
2036 if (*(volatile int *)ptr != 0xffffffff)
2037 page_bad = TRUE;
2038 /*
2039 * Test for all 0's
2040 */
2041 *(volatile int *)ptr = 0x0;
2042 if (*(volatile int *)ptr != 0x0)
2043 page_bad = TRUE;
2044 /*
2045 * Restore original value.
2046 */
2047 *(int *)ptr = tmp;
2048
2049 skip_memtest:
2050 /*
2051 * Adjust array of valid/good pages.
2052 */
2053 if (page_bad == TRUE)
2054 continue;
2055 /*
2056 * If this good page is a continuation of the
2057 * previous set of good pages, then just increase
2058 * the end pointer. Otherwise start a new chunk.
2059 * Note that "end" points one higher than end,
2060 * making the range >= start and < end.
2061 * If we're also doing a speculative memory
2062 * test and we at or past the end, bump up Maxmem
2063 * so that we keep going. The first bad page
2064 * will terminate the loop.
2065 */
2066 if (phys_avail[pa_indx] == pa) {
2067 phys_avail[pa_indx] += PAGE_SIZE;
2068 } else {
2069 pa_indx++;
2070 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2071 printf(
2072 "Too many holes in the physical address space, giving up\n");
2073 pa_indx--;
2074 full = TRUE;
2075 goto do_dump_avail;
2076 }
2077 phys_avail[pa_indx++] = pa; /* start */
2078 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2079 }
2080 physmem++;
2081 do_dump_avail:
2082 if (dump_avail[da_indx] == pa) {
2083 dump_avail[da_indx] += PAGE_SIZE;
2084 } else {
2085 da_indx++;
2086 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2087 da_indx--;
2088 goto do_next;
2089 }
2090 dump_avail[da_indx++] = pa; /* start */
2091 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2092 }
2093 do_next:
2094 if (full)
2095 break;
2096 }
2097 }
2098 *pte = 0;
2099 invltlb();
2100
2101 /*
2102 * XXX
2103 * The last chunk must contain at least one page plus the message
2104 * buffer to avoid complicating other code (message buffer address
2105 * calculation, etc.).
2106 */
2107 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2108 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2109 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2110 phys_avail[pa_indx--] = 0;
2111 phys_avail[pa_indx--] = 0;
2112 }
2113
2114 Maxmem = atop(phys_avail[pa_indx]);
2115
2116 /* Trim off space for the message buffer. */
2117 phys_avail[pa_indx] -= round_page(msgbufsize);
2118
2119 /* Map the message buffer. */
2120 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2121 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2122 off);
2123
2124 PT_UPDATES_FLUSH();
2125 }
2126
2127 void
2128 init386(first)
2129 int first;
2130 {
2131 struct gate_descriptor *gdp;
2132 int gsel_tss, metadata_missing, x, pa;
2133 size_t kstack0_sz;
2134 struct pcpu *pc;
2135
2136 thread0.td_kstack = proc0kstack;
2137 thread0.td_kstack_pages = KSTACK_PAGES;
2138 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2139 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2140
2141 /*
2142 * This may be done better later if it gets more high level
2143 * components in it. If so just link td->td_proc here.
2144 */
2145 proc_linkup0(&proc0, &thread0);
2146
2147 /*
2148 * Initialize DMAC
2149 */
2150 pc98_init_dmac();
2151
2152 metadata_missing = 0;
2153 if (bootinfo.bi_modulep) {
2154 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2155 preload_bootstrap_relocate(KERNBASE);
2156 } else {
2157 metadata_missing = 1;
2158 }
2159 if (envmode == 1)
2160 kern_envp = static_env;
2161 else if (bootinfo.bi_envp)
2162 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2163
2164 /* Init basic tunables, hz etc */
2165 init_param1();
2166
2167 /*
2168 * Make gdt memory segments. All segments cover the full 4GB
2169 * of address space and permissions are enforced at page level.
2170 */
2171 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2172 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2173 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2174 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2175 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2176 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2177
2178 pc = &__pcpu[0];
2179 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2180 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2181 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2182
2183 for (x = 0; x < NGDT; x++)
2184 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2185
2186 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2187 r_gdt.rd_base = (int) gdt;
2188 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2189 lgdt(&r_gdt);
2190
2191 pcpu_init(pc, 0, sizeof(struct pcpu));
2192 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2193 pmap_kenter(pa + KERNBASE, pa);
2194 dpcpu_init((void *)(first + KERNBASE), 0);
2195 first += DPCPU_SIZE;
2196 PCPU_SET(prvspace, pc);
2197 PCPU_SET(curthread, &thread0);
2198 PCPU_SET(curpcb, thread0.td_pcb);
2199
2200 /*
2201 * Initialize mutexes.
2202 *
2203 * icu_lock: in order to allow an interrupt to occur in a critical
2204 * section, to set pcpu->ipending (etc...) properly, we
2205 * must be able to get the icu lock, so it can't be
2206 * under witness.
2207 */
2208 mutex_init();
2209 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2210
2211 /* make ldt memory segments */
2212 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2213 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2214 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2215 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2216
2217 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2218 lldt(_default_ldt);
2219 PCPU_SET(currentldt, _default_ldt);
2220
2221 /* exceptions */
2222 for (x = 0; x < NIDT; x++)
2223 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2224 GSEL(GCODE_SEL, SEL_KPL));
2225 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2226 GSEL(GCODE_SEL, SEL_KPL));
2227 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2228 GSEL(GCODE_SEL, SEL_KPL));
2229 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2230 GSEL(GCODE_SEL, SEL_KPL));
2231 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2232 GSEL(GCODE_SEL, SEL_KPL));
2233 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2234 GSEL(GCODE_SEL, SEL_KPL));
2235 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2236 GSEL(GCODE_SEL, SEL_KPL));
2237 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2238 GSEL(GCODE_SEL, SEL_KPL));
2239 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2240 , GSEL(GCODE_SEL, SEL_KPL));
2241 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2242 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2243 GSEL(GCODE_SEL, SEL_KPL));
2244 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2245 GSEL(GCODE_SEL, SEL_KPL));
2246 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2247 GSEL(GCODE_SEL, SEL_KPL));
2248 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2249 GSEL(GCODE_SEL, SEL_KPL));
2250 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2251 GSEL(GCODE_SEL, SEL_KPL));
2252 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2253 GSEL(GCODE_SEL, SEL_KPL));
2254 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2255 GSEL(GCODE_SEL, SEL_KPL));
2256 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2257 GSEL(GCODE_SEL, SEL_KPL));
2258 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2259 GSEL(GCODE_SEL, SEL_KPL));
2260 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2261 GSEL(GCODE_SEL, SEL_KPL));
2262 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2263 GSEL(GCODE_SEL, SEL_KPL));
2264 #ifdef KDTRACE_HOOKS
2265 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2266 GSEL(GCODE_SEL, SEL_KPL));
2267 #endif
2268
2269 r_idt.rd_limit = sizeof(idt0) - 1;
2270 r_idt.rd_base = (int) idt;
2271 lidt(&r_idt);
2272
2273 /*
2274 * Initialize the i8254 before the console so that console
2275 * initialization can use DELAY().
2276 */
2277 i8254_init();
2278
2279 /*
2280 * Initialize the console before we print anything out.
2281 */
2282 cninit();
2283
2284 if (metadata_missing)
2285 printf("WARNING: loader(8) metadata is missing!\n");
2286
2287 #ifdef DEV_ISA
2288 atpic_startup();
2289 #endif
2290
2291 #ifdef DDB
2292 ksym_start = bootinfo.bi_symtab;
2293 ksym_end = bootinfo.bi_esymtab;
2294 #endif
2295
2296 kdb_init();
2297
2298 #ifdef KDB
2299 if (boothowto & RB_KDB)
2300 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2301 #endif
2302
2303 finishidentcpu(); /* Final stage of CPU initialization */
2304 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2305 GSEL(GCODE_SEL, SEL_KPL));
2306 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2307 GSEL(GCODE_SEL, SEL_KPL));
2308 initializecpu(); /* Initialize CPU registers */
2309
2310 /* make an initial tss so cpu can get interrupt stack on syscall! */
2311 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2312 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2313 kstack0_sz - sizeof(struct pcb) - 16);
2314 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2315 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2316 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2317 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2318 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2319 ltr(gsel_tss);
2320
2321 /* pointer to selector slot for %fs/%gs */
2322 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2323
2324 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2325 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2326 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2327 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2328 dblfault_tss.tss_cr3 = (int)IdlePTD;
2329 dblfault_tss.tss_eip = (int)dblfault_handler;
2330 dblfault_tss.tss_eflags = PSL_KERNEL;
2331 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2332 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2333 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2334 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2335 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2336
2337 vm86_initialize();
2338 getmemsize(first);
2339 init_param2(physmem);
2340
2341 /* now running on new page tables, configured,and u/iom is accessible */
2342
2343 msgbufinit(msgbufp, msgbufsize);
2344
2345 /* make a call gate to reenter kernel with */
2346 gdp = &ldt[LSYS5CALLS_SEL].gd;
2347
2348 x = (int) &IDTVEC(lcall_syscall);
2349 gdp->gd_looffset = x;
2350 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2351 gdp->gd_stkcpy = 1;
2352 gdp->gd_type = SDT_SYS386CGT;
2353 gdp->gd_dpl = SEL_UPL;
2354 gdp->gd_p = 1;
2355 gdp->gd_hioffset = x >> 16;
2356
2357 /* XXX does this work? */
2358 /* XXX yes! */
2359 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2360 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2361
2362 /* transfer to user mode */
2363
2364 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2365 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2366
2367 /* setup proc 0's pcb */
2368 thread0.td_pcb->pcb_flags = 0;
2369 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2370 thread0.td_pcb->pcb_ext = 0;
2371 thread0.td_frame = &proc0_tf;
2372 }
2373
2374 void
2375 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2376 {
2377
2378 }
2379
2380 void
2381 spinlock_enter(void)
2382 {
2383 struct thread *td;
2384 register_t flags;
2385
2386 td = curthread;
2387 if (td->td_md.md_spinlock_count == 0) {
2388 flags = intr_disable();
2389 td->td_md.md_spinlock_count = 1;
2390 td->td_md.md_saved_flags = flags;
2391 } else
2392 td->td_md.md_spinlock_count++;
2393 critical_enter();
2394 }
2395
2396 void
2397 spinlock_exit(void)
2398 {
2399 struct thread *td;
2400 register_t flags;
2401
2402 td = curthread;
2403 critical_exit();
2404 flags = td->td_md.md_saved_flags;
2405 td->td_md.md_spinlock_count--;
2406 if (td->td_md.md_spinlock_count == 0)
2407 intr_restore(flags);
2408 }
2409
2410 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2411 static void f00f_hack(void *unused);
2412 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2413
2414 static void
2415 f00f_hack(void *unused)
2416 {
2417 struct gate_descriptor *new_idt;
2418 vm_offset_t tmp;
2419
2420 if (!has_f00f_bug)
2421 return;
2422
2423 GIANT_REQUIRED;
2424
2425 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2426
2427 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2428 if (tmp == 0)
2429 panic("kmem_alloc returned 0");
2430
2431 /* Put the problematic entry (#6) at the end of the lower page. */
2432 new_idt = (struct gate_descriptor*)
2433 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2434 bcopy(idt, new_idt, sizeof(idt0));
2435 r_idt.rd_base = (u_int)new_idt;
2436 lidt(&r_idt);
2437 idt = new_idt;
2438 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2439 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2440 panic("vm_map_protect failed");
2441 }
2442 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2443
2444 /*
2445 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2446 * we want to start a backtrace from the function that caused us to enter
2447 * the debugger. We have the context in the trapframe, but base the trace
2448 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2449 * enough for a backtrace.
2450 */
2451 void
2452 makectx(struct trapframe *tf, struct pcb *pcb)
2453 {
2454
2455 pcb->pcb_edi = tf->tf_edi;
2456 pcb->pcb_esi = tf->tf_esi;
2457 pcb->pcb_ebp = tf->tf_ebp;
2458 pcb->pcb_ebx = tf->tf_ebx;
2459 pcb->pcb_eip = tf->tf_eip;
2460 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2461 }
2462
2463 int
2464 ptrace_set_pc(struct thread *td, u_long addr)
2465 {
2466
2467 td->td_frame->tf_eip = addr;
2468 return (0);
2469 }
2470
2471 int
2472 ptrace_single_step(struct thread *td)
2473 {
2474 td->td_frame->tf_eflags |= PSL_T;
2475 return (0);
2476 }
2477
2478 int
2479 ptrace_clear_single_step(struct thread *td)
2480 {
2481 td->td_frame->tf_eflags &= ~PSL_T;
2482 return (0);
2483 }
2484
2485 int
2486 fill_regs(struct thread *td, struct reg *regs)
2487 {
2488 struct pcb *pcb;
2489 struct trapframe *tp;
2490
2491 tp = td->td_frame;
2492 pcb = td->td_pcb;
2493 regs->r_gs = pcb->pcb_gs;
2494 return (fill_frame_regs(tp, regs));
2495 }
2496
2497 int
2498 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2499 {
2500 regs->r_fs = tp->tf_fs;
2501 regs->r_es = tp->tf_es;
2502 regs->r_ds = tp->tf_ds;
2503 regs->r_edi = tp->tf_edi;
2504 regs->r_esi = tp->tf_esi;
2505 regs->r_ebp = tp->tf_ebp;
2506 regs->r_ebx = tp->tf_ebx;
2507 regs->r_edx = tp->tf_edx;
2508 regs->r_ecx = tp->tf_ecx;
2509 regs->r_eax = tp->tf_eax;
2510 regs->r_eip = tp->tf_eip;
2511 regs->r_cs = tp->tf_cs;
2512 regs->r_eflags = tp->tf_eflags;
2513 regs->r_esp = tp->tf_esp;
2514 regs->r_ss = tp->tf_ss;
2515 return (0);
2516 }
2517
2518 int
2519 set_regs(struct thread *td, struct reg *regs)
2520 {
2521 struct pcb *pcb;
2522 struct trapframe *tp;
2523
2524 tp = td->td_frame;
2525 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2526 !CS_SECURE(regs->r_cs))
2527 return (EINVAL);
2528 pcb = td->td_pcb;
2529 tp->tf_fs = regs->r_fs;
2530 tp->tf_es = regs->r_es;
2531 tp->tf_ds = regs->r_ds;
2532 tp->tf_edi = regs->r_edi;
2533 tp->tf_esi = regs->r_esi;
2534 tp->tf_ebp = regs->r_ebp;
2535 tp->tf_ebx = regs->r_ebx;
2536 tp->tf_edx = regs->r_edx;
2537 tp->tf_ecx = regs->r_ecx;
2538 tp->tf_eax = regs->r_eax;
2539 tp->tf_eip = regs->r_eip;
2540 tp->tf_cs = regs->r_cs;
2541 tp->tf_eflags = regs->r_eflags;
2542 tp->tf_esp = regs->r_esp;
2543 tp->tf_ss = regs->r_ss;
2544 pcb->pcb_gs = regs->r_gs;
2545 return (0);
2546 }
2547
2548 #ifdef CPU_ENABLE_SSE
2549 static void
2550 fill_fpregs_xmm(sv_xmm, sv_87)
2551 struct savexmm *sv_xmm;
2552 struct save87 *sv_87;
2553 {
2554 register struct env87 *penv_87 = &sv_87->sv_env;
2555 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2556 int i;
2557
2558 bzero(sv_87, sizeof(*sv_87));
2559
2560 /* FPU control/status */
2561 penv_87->en_cw = penv_xmm->en_cw;
2562 penv_87->en_sw = penv_xmm->en_sw;
2563 penv_87->en_tw = penv_xmm->en_tw;
2564 penv_87->en_fip = penv_xmm->en_fip;
2565 penv_87->en_fcs = penv_xmm->en_fcs;
2566 penv_87->en_opcode = penv_xmm->en_opcode;
2567 penv_87->en_foo = penv_xmm->en_foo;
2568 penv_87->en_fos = penv_xmm->en_fos;
2569
2570 /* FPU registers */
2571 for (i = 0; i < 8; ++i)
2572 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2573 }
2574
2575 static void
2576 set_fpregs_xmm(sv_87, sv_xmm)
2577 struct save87 *sv_87;
2578 struct savexmm *sv_xmm;
2579 {
2580 register struct env87 *penv_87 = &sv_87->sv_env;
2581 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2582 int i;
2583
2584 /* FPU control/status */
2585 penv_xmm->en_cw = penv_87->en_cw;
2586 penv_xmm->en_sw = penv_87->en_sw;
2587 penv_xmm->en_tw = penv_87->en_tw;
2588 penv_xmm->en_fip = penv_87->en_fip;
2589 penv_xmm->en_fcs = penv_87->en_fcs;
2590 penv_xmm->en_opcode = penv_87->en_opcode;
2591 penv_xmm->en_foo = penv_87->en_foo;
2592 penv_xmm->en_fos = penv_87->en_fos;
2593
2594 /* FPU registers */
2595 for (i = 0; i < 8; ++i)
2596 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2597 }
2598 #endif /* CPU_ENABLE_SSE */
2599
2600 int
2601 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2602 {
2603
2604 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2605 P_SHOULDSTOP(td->td_proc),
2606 ("not suspended thread %p", td));
2607 #ifdef DEV_NPX
2608 npxgetregs(td);
2609 #else
2610 bzero(fpregs, sizeof(*fpregs));
2611 #endif
2612 #ifdef CPU_ENABLE_SSE
2613 if (cpu_fxsr)
2614 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
2615 (struct save87 *)fpregs);
2616 else
2617 #endif /* CPU_ENABLE_SSE */
2618 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
2619 sizeof(*fpregs));
2620 return (0);
2621 }
2622
2623 int
2624 set_fpregs(struct thread *td, struct fpreg *fpregs)
2625 {
2626
2627 #ifdef CPU_ENABLE_SSE
2628 if (cpu_fxsr)
2629 set_fpregs_xmm((struct save87 *)fpregs,
2630 &td->td_pcb->pcb_user_save.sv_xmm);
2631 else
2632 #endif /* CPU_ENABLE_SSE */
2633 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
2634 sizeof(*fpregs));
2635 #ifdef DEV_NPX
2636 npxuserinited(td);
2637 #endif
2638 return (0);
2639 }
2640
2641 /*
2642 * Get machine context.
2643 */
2644 int
2645 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2646 {
2647 struct trapframe *tp;
2648 struct segment_descriptor *sdp;
2649
2650 tp = td->td_frame;
2651
2652 PROC_LOCK(curthread->td_proc);
2653 mcp->mc_onstack = sigonstack(tp->tf_esp);
2654 PROC_UNLOCK(curthread->td_proc);
2655 mcp->mc_gs = td->td_pcb->pcb_gs;
2656 mcp->mc_fs = tp->tf_fs;
2657 mcp->mc_es = tp->tf_es;
2658 mcp->mc_ds = tp->tf_ds;
2659 mcp->mc_edi = tp->tf_edi;
2660 mcp->mc_esi = tp->tf_esi;
2661 mcp->mc_ebp = tp->tf_ebp;
2662 mcp->mc_isp = tp->tf_isp;
2663 mcp->mc_eflags = tp->tf_eflags;
2664 if (flags & GET_MC_CLEAR_RET) {
2665 mcp->mc_eax = 0;
2666 mcp->mc_edx = 0;
2667 mcp->mc_eflags &= ~PSL_C;
2668 } else {
2669 mcp->mc_eax = tp->tf_eax;
2670 mcp->mc_edx = tp->tf_edx;
2671 }
2672 mcp->mc_ebx = tp->tf_ebx;
2673 mcp->mc_ecx = tp->tf_ecx;
2674 mcp->mc_eip = tp->tf_eip;
2675 mcp->mc_cs = tp->tf_cs;
2676 mcp->mc_esp = tp->tf_esp;
2677 mcp->mc_ss = tp->tf_ss;
2678 mcp->mc_len = sizeof(*mcp);
2679 get_fpcontext(td, mcp);
2680 sdp = &td->td_pcb->pcb_fsd;
2681 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2682 sdp = &td->td_pcb->pcb_gsd;
2683 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2684 mcp->mc_flags = 0;
2685 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
2686 return (0);
2687 }
2688
2689 /*
2690 * Set machine context.
2691 *
2692 * However, we don't set any but the user modifiable flags, and we won't
2693 * touch the cs selector.
2694 */
2695 int
2696 set_mcontext(struct thread *td, const mcontext_t *mcp)
2697 {
2698 struct trapframe *tp;
2699 int eflags, ret;
2700
2701 tp = td->td_frame;
2702 if (mcp->mc_len != sizeof(*mcp))
2703 return (EINVAL);
2704 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2705 (tp->tf_eflags & ~PSL_USERCHANGE);
2706 if ((ret = set_fpcontext(td, mcp)) == 0) {
2707 tp->tf_fs = mcp->mc_fs;
2708 tp->tf_es = mcp->mc_es;
2709 tp->tf_ds = mcp->mc_ds;
2710 tp->tf_edi = mcp->mc_edi;
2711 tp->tf_esi = mcp->mc_esi;
2712 tp->tf_ebp = mcp->mc_ebp;
2713 tp->tf_ebx = mcp->mc_ebx;
2714 tp->tf_edx = mcp->mc_edx;
2715 tp->tf_ecx = mcp->mc_ecx;
2716 tp->tf_eax = mcp->mc_eax;
2717 tp->tf_eip = mcp->mc_eip;
2718 tp->tf_eflags = eflags;
2719 tp->tf_esp = mcp->mc_esp;
2720 tp->tf_ss = mcp->mc_ss;
2721 td->td_pcb->pcb_gs = mcp->mc_gs;
2722 ret = 0;
2723 }
2724 return (ret);
2725 }
2726
2727 static void
2728 get_fpcontext(struct thread *td, mcontext_t *mcp)
2729 {
2730
2731 #ifndef DEV_NPX
2732 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2733 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2734 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2735 #else
2736 mcp->mc_ownedfp = npxgetregs(td);
2737 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
2738 sizeof(mcp->mc_fpstate));
2739 mcp->mc_fpformat = npxformat();
2740 #endif
2741 }
2742
2743 static int
2744 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2745 {
2746
2747 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2748 return (0);
2749 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2750 mcp->mc_fpformat != _MC_FPFMT_XMM)
2751 return (EINVAL);
2752 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2753 /* We don't care what state is left in the FPU or PCB. */
2754 fpstate_drop(td);
2755 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2756 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2757 #ifdef DEV_NPX
2758 #ifdef CPU_ENABLE_SSE
2759 if (cpu_fxsr)
2760 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
2761 en_mxcsr &= cpu_mxcsr_mask;
2762 #endif
2763 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
2764 #endif
2765 } else
2766 return (EINVAL);
2767 return (0);
2768 }
2769
2770 static void
2771 fpstate_drop(struct thread *td)
2772 {
2773
2774 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2775 critical_enter();
2776 #ifdef DEV_NPX
2777 if (PCPU_GET(fpcurthread) == td)
2778 npxdrop();
2779 #endif
2780 /*
2781 * XXX force a full drop of the npx. The above only drops it if we
2782 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2783 *
2784 * XXX I don't much like npxgetregs()'s semantics of doing a full
2785 * drop. Dropping only to the pcb matches fnsave's behaviour.
2786 * We only need to drop to !PCB_INITDONE in sendsig(). But
2787 * sendsig() is the only caller of npxgetregs()... perhaps we just
2788 * have too many layers.
2789 */
2790 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
2791 PCB_NPXUSERINITDONE);
2792 critical_exit();
2793 }
2794
2795 int
2796 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2797 {
2798 struct pcb *pcb;
2799
2800 if (td == NULL) {
2801 dbregs->dr[0] = rdr0();
2802 dbregs->dr[1] = rdr1();
2803 dbregs->dr[2] = rdr2();
2804 dbregs->dr[3] = rdr3();
2805 dbregs->dr[4] = rdr4();
2806 dbregs->dr[5] = rdr5();
2807 dbregs->dr[6] = rdr6();
2808 dbregs->dr[7] = rdr7();
2809 } else {
2810 pcb = td->td_pcb;
2811 dbregs->dr[0] = pcb->pcb_dr0;
2812 dbregs->dr[1] = pcb->pcb_dr1;
2813 dbregs->dr[2] = pcb->pcb_dr2;
2814 dbregs->dr[3] = pcb->pcb_dr3;
2815 dbregs->dr[4] = 0;
2816 dbregs->dr[5] = 0;
2817 dbregs->dr[6] = pcb->pcb_dr6;
2818 dbregs->dr[7] = pcb->pcb_dr7;
2819 }
2820 return (0);
2821 }
2822
2823 int
2824 set_dbregs(struct thread *td, struct dbreg *dbregs)
2825 {
2826 struct pcb *pcb;
2827 int i;
2828
2829 if (td == NULL) {
2830 load_dr0(dbregs->dr[0]);
2831 load_dr1(dbregs->dr[1]);
2832 load_dr2(dbregs->dr[2]);
2833 load_dr3(dbregs->dr[3]);
2834 load_dr4(dbregs->dr[4]);
2835 load_dr5(dbregs->dr[5]);
2836 load_dr6(dbregs->dr[6]);
2837 load_dr7(dbregs->dr[7]);
2838 } else {
2839 /*
2840 * Don't let an illegal value for dr7 get set. Specifically,
2841 * check for undefined settings. Setting these bit patterns
2842 * result in undefined behaviour and can lead to an unexpected
2843 * TRCTRAP.
2844 */
2845 for (i = 0; i < 4; i++) {
2846 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2847 return (EINVAL);
2848 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
2849 return (EINVAL);
2850 }
2851
2852 pcb = td->td_pcb;
2853
2854 /*
2855 * Don't let a process set a breakpoint that is not within the
2856 * process's address space. If a process could do this, it
2857 * could halt the system by setting a breakpoint in the kernel
2858 * (if ddb was enabled). Thus, we need to check to make sure
2859 * that no breakpoints are being enabled for addresses outside
2860 * process's address space.
2861 *
2862 * XXX - what about when the watched area of the user's
2863 * address space is written into from within the kernel
2864 * ... wouldn't that still cause a breakpoint to be generated
2865 * from within kernel mode?
2866 */
2867
2868 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2869 /* dr0 is enabled */
2870 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2871 return (EINVAL);
2872 }
2873
2874 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2875 /* dr1 is enabled */
2876 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2877 return (EINVAL);
2878 }
2879
2880 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2881 /* dr2 is enabled */
2882 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2883 return (EINVAL);
2884 }
2885
2886 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2887 /* dr3 is enabled */
2888 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2889 return (EINVAL);
2890 }
2891
2892 pcb->pcb_dr0 = dbregs->dr[0];
2893 pcb->pcb_dr1 = dbregs->dr[1];
2894 pcb->pcb_dr2 = dbregs->dr[2];
2895 pcb->pcb_dr3 = dbregs->dr[3];
2896 pcb->pcb_dr6 = dbregs->dr[6];
2897 pcb->pcb_dr7 = dbregs->dr[7];
2898
2899 pcb->pcb_flags |= PCB_DBREGS;
2900 }
2901
2902 return (0);
2903 }
2904
2905 /*
2906 * Return > 0 if a hardware breakpoint has been hit, and the
2907 * breakpoint was in user space. Return 0, otherwise.
2908 */
2909 int
2910 user_dbreg_trap(void)
2911 {
2912 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2913 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2914 int nbp; /* number of breakpoints that triggered */
2915 caddr_t addr[4]; /* breakpoint addresses */
2916 int i;
2917
2918 dr7 = rdr7();
2919 if ((dr7 & 0x000000ff) == 0) {
2920 /*
2921 * all GE and LE bits in the dr7 register are zero,
2922 * thus the trap couldn't have been caused by the
2923 * hardware debug registers
2924 */
2925 return 0;
2926 }
2927
2928 nbp = 0;
2929 dr6 = rdr6();
2930 bp = dr6 & 0x0000000f;
2931
2932 if (!bp) {
2933 /*
2934 * None of the breakpoint bits are set meaning this
2935 * trap was not caused by any of the debug registers
2936 */
2937 return 0;
2938 }
2939
2940 /*
2941 * at least one of the breakpoints were hit, check to see
2942 * which ones and if any of them are user space addresses
2943 */
2944
2945 if (bp & 0x01) {
2946 addr[nbp++] = (caddr_t)rdr0();
2947 }
2948 if (bp & 0x02) {
2949 addr[nbp++] = (caddr_t)rdr1();
2950 }
2951 if (bp & 0x04) {
2952 addr[nbp++] = (caddr_t)rdr2();
2953 }
2954 if (bp & 0x08) {
2955 addr[nbp++] = (caddr_t)rdr3();
2956 }
2957
2958 for (i = 0; i < nbp; i++) {
2959 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2960 /*
2961 * addr[i] is in user space
2962 */
2963 return nbp;
2964 }
2965 }
2966
2967 /*
2968 * None of the breakpoints are in user space.
2969 */
2970 return 0;
2971 }
2972
2973 #ifdef KDB
2974
2975 /*
2976 * Provide inb() and outb() as functions. They are normally only available as
2977 * inline functions, thus cannot be called from the debugger.
2978 */
2979
2980 /* silence compiler warnings */
2981 u_char inb_(u_short);
2982 void outb_(u_short, u_char);
2983
2984 u_char
2985 inb_(u_short port)
2986 {
2987 return inb(port);
2988 }
2989
2990 void
2991 outb_(u_short port, u_char data)
2992 {
2993 outb(port, data);
2994 }
2995
2996 #endif /* KDB */
Cache object: 0d0ed4d80c16b4ebd960bbe8d36a566f
|