1 /*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 */
39
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD: releng/9.1/sys/pc98/pc98/machdep.c 235796 2012-05-22 17:44:01Z iwasaki $");
42
43 #include "opt_apic.h"
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
47 #include "opt_cpu.h"
48 #include "opt_ddb.h"
49 #include "opt_inet.h"
50 #include "opt_ipx.h"
51 #include "opt_isa.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_npx.h"
56 #include "opt_perfmon.h"
57
58 #include <sys/param.h>
59 #include <sys/proc.h>
60 #include <sys/systm.h>
61 #include <sys/bio.h>
62 #include <sys/buf.h>
63 #include <sys/bus.h>
64 #include <sys/callout.h>
65 #include <sys/cons.h>
66 #include <sys/cpu.h>
67 #include <sys/eventhandler.h>
68 #include <sys/exec.h>
69 #include <sys/imgact.h>
70 #include <sys/kdb.h>
71 #include <sys/kernel.h>
72 #include <sys/ktr.h>
73 #include <sys/linker.h>
74 #include <sys/lock.h>
75 #include <sys/malloc.h>
76 #include <sys/msgbuf.h>
77 #include <sys/mutex.h>
78 #include <sys/pcpu.h>
79 #include <sys/ptrace.h>
80 #include <sys/reboot.h>
81 #include <sys/sched.h>
82 #include <sys/signalvar.h>
83 #ifdef SMP
84 #include <sys/smp.h>
85 #endif
86 #include <sys/syscallsubr.h>
87 #include <sys/sysctl.h>
88 #include <sys/sysent.h>
89 #include <sys/sysproto.h>
90 #include <sys/ucontext.h>
91 #include <sys/vmmeter.h>
92
93 #include <vm/vm.h>
94 #include <vm/vm_extern.h>
95 #include <vm/vm_kern.h>
96 #include <vm/vm_page.h>
97 #include <vm/vm_map.h>
98 #include <vm/vm_object.h>
99 #include <vm/vm_pager.h>
100 #include <vm/vm_param.h>
101
102 #ifdef DDB
103 #ifndef KDB
104 #error KDB must be enabled in order for DDB to work!
105 #endif
106 #include <ddb/ddb.h>
107 #include <ddb/db_sym.h>
108 #endif
109
110 #include <pc98/pc98/pc98_machdep.h>
111
112 #include <net/netisr.h>
113
114 #include <machine/bootinfo.h>
115 #include <machine/clock.h>
116 #include <machine/cpu.h>
117 #include <machine/cputypes.h>
118 #include <machine/intr_machdep.h>
119 #include <x86/mca.h>
120 #include <machine/md_var.h>
121 #include <machine/mp_watchdog.h>
122 #include <machine/pc/bios.h>
123 #include <machine/pcb.h>
124 #include <machine/pcb_ext.h>
125 #include <machine/proc.h>
126 #include <machine/reg.h>
127 #include <machine/sigframe.h>
128 #include <machine/specialreg.h>
129 #include <machine/vm86.h>
130 #ifdef PERFMON
131 #include <machine/perfmon.h>
132 #endif
133 #ifdef SMP
134 #include <machine/smp.h>
135 #endif
136
137 #ifdef DEV_APIC
138 #include <machine/apicvar.h>
139 #endif
140
141 #ifdef DEV_ISA
142 #include <x86/isa/icu.h>
143 #endif
144
145 /* Sanity check for __curthread() */
146 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
147
148 extern void init386(int first);
149 extern void dblfault_handler(void);
150
151 extern void printcpuinfo(void); /* XXX header file */
152 extern void finishidentcpu(void);
153 extern void panicifcpuunsupported(void);
154
155 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
156 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
157
158 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
159 #define CPU_ENABLE_SSE
160 #endif
161
162 static void cpu_startup(void *);
163 static void fpstate_drop(struct thread *td);
164 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
165 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
166 #ifdef CPU_ENABLE_SSE
167 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
168 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
169 #endif /* CPU_ENABLE_SSE */
170 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
171
172 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
173 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
174
175 #ifdef DDB
176 extern vm_offset_t ksym_start, ksym_end;
177 #endif
178
179 int _udatasel, _ucodesel;
180 u_int basemem;
181
182 static int ispc98 = 1;
183 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
184
185 int cold = 1;
186
187 #ifdef COMPAT_43
188 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
189 #endif
190 #ifdef COMPAT_FREEBSD4
191 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
192 #endif
193
194 long Maxmem = 0;
195 long realmem = 0;
196
197 /*
198 * The number of PHYSMAP entries must be one less than the number of
199 * PHYSSEG entries because the PHYSMAP entry that spans the largest
200 * physical address that is accessible by ISA DMA is split into two
201 * PHYSSEG entries.
202 */
203 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
204
205 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
206 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
207
208 /* must be 2 less so 0 0 can signal end of chunks */
209 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
210 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
211
212 struct kva_md_info kmi;
213
214 static struct trapframe proc0_tf;
215 struct pcpu __pcpu[MAXCPU];
216
217 struct mtx icu_lock;
218
219 static void
220 cpu_startup(dummy)
221 void *dummy;
222 {
223 uintmax_t memsize;
224
225 /*
226 * Good {morning,afternoon,evening,night}.
227 */
228 startrtclock();
229 printcpuinfo();
230 panicifcpuunsupported();
231 #ifdef PERFMON
232 perfmon_init();
233 #endif
234 realmem = Maxmem;
235
236 /*
237 * Display physical memory.
238 */
239 memsize = ptoa((uintmax_t)Maxmem);
240 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
241
242 /*
243 * Display any holes after the first chunk of extended memory.
244 */
245 if (bootverbose) {
246 int indx;
247
248 printf("Physical memory chunk(s):\n");
249 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
250 vm_paddr_t size;
251
252 size = phys_avail[indx + 1] - phys_avail[indx];
253 printf(
254 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
255 (uintmax_t)phys_avail[indx],
256 (uintmax_t)phys_avail[indx + 1] - 1,
257 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
258 }
259 }
260
261 vm_ksubmap_init(&kmi);
262
263 printf("avail memory = %ju (%ju MB)\n",
264 ptoa((uintmax_t)cnt.v_free_count),
265 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
266
267 /*
268 * Set up buffers, so they can be used to read disk labels.
269 */
270 bufinit();
271 vm_pager_bufferinit();
272 cpu_setregs();
273
274 /*
275 * Add BSP as an interrupt target.
276 */
277 intr_add_cpu(0);
278 }
279
280 /*
281 * Send an interrupt to process.
282 *
283 * Stack is set up to allow sigcode stored
284 * at top to call routine, followed by kcall
285 * to sigreturn routine below. After sigreturn
286 * resets the signal mask, the stack, and the
287 * frame pointer, it returns to the user
288 * specified pc, psl.
289 */
290 #ifdef COMPAT_43
291 static void
292 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
293 {
294 struct osigframe sf, *fp;
295 struct proc *p;
296 struct thread *td;
297 struct sigacts *psp;
298 struct trapframe *regs;
299 int sig;
300 int oonstack;
301
302 td = curthread;
303 p = td->td_proc;
304 PROC_LOCK_ASSERT(p, MA_OWNED);
305 sig = ksi->ksi_signo;
306 psp = p->p_sigacts;
307 mtx_assert(&psp->ps_mtx, MA_OWNED);
308 regs = td->td_frame;
309 oonstack = sigonstack(regs->tf_esp);
310
311 /* Allocate space for the signal handler context. */
312 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
313 SIGISMEMBER(psp->ps_sigonstack, sig)) {
314 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
315 td->td_sigstk.ss_size - sizeof(struct osigframe));
316 #if defined(COMPAT_43)
317 td->td_sigstk.ss_flags |= SS_ONSTACK;
318 #endif
319 } else
320 fp = (struct osigframe *)regs->tf_esp - 1;
321
322 /* Translate the signal if appropriate. */
323 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
324 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
325
326 /* Build the argument list for the signal handler. */
327 sf.sf_signum = sig;
328 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
329 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
330 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
331 /* Signal handler installed with SA_SIGINFO. */
332 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
333 sf.sf_siginfo.si_signo = sig;
334 sf.sf_siginfo.si_code = ksi->ksi_code;
335 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
336 sf.sf_addr = 0;
337 } else {
338 /* Old FreeBSD-style arguments. */
339 sf.sf_arg2 = ksi->ksi_code;
340 sf.sf_addr = (register_t)ksi->ksi_addr;
341 sf.sf_ahu.sf_handler = catcher;
342 }
343 mtx_unlock(&psp->ps_mtx);
344 PROC_UNLOCK(p);
345
346 /* Save most if not all of trap frame. */
347 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
348 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
349 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
350 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
351 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
352 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
353 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
354 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
355 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
356 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
357 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
358 sf.sf_siginfo.si_sc.sc_gs = rgs();
359 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
360
361 /* Build the signal context to be used by osigreturn(). */
362 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
363 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
364 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
365 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
366 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
367 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
368 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
369 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
370
371 /*
372 * If we're a vm86 process, we want to save the segment registers.
373 * We also change eflags to be our emulated eflags, not the actual
374 * eflags.
375 */
376 if (regs->tf_eflags & PSL_VM) {
377 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
378 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
379 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
380
381 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
382 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
383 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
384 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
385
386 if (vm86->vm86_has_vme == 0)
387 sf.sf_siginfo.si_sc.sc_ps =
388 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
389 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
390
391 /* See sendsig() for comments. */
392 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
393 }
394
395 /*
396 * Copy the sigframe out to the user's stack.
397 */
398 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
399 #ifdef DEBUG
400 printf("process %ld has trashed its stack\n", (long)p->p_pid);
401 #endif
402 PROC_LOCK(p);
403 sigexit(td, SIGILL);
404 }
405
406 regs->tf_esp = (int)fp;
407 regs->tf_eip = PS_STRINGS - szosigcode;
408 regs->tf_eflags &= ~(PSL_T | PSL_D);
409 regs->tf_cs = _ucodesel;
410 regs->tf_ds = _udatasel;
411 regs->tf_es = _udatasel;
412 regs->tf_fs = _udatasel;
413 load_gs(_udatasel);
414 regs->tf_ss = _udatasel;
415 PROC_LOCK(p);
416 mtx_lock(&psp->ps_mtx);
417 }
418 #endif /* COMPAT_43 */
419
420 #ifdef COMPAT_FREEBSD4
421 static void
422 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
423 {
424 struct sigframe4 sf, *sfp;
425 struct proc *p;
426 struct thread *td;
427 struct sigacts *psp;
428 struct trapframe *regs;
429 int sig;
430 int oonstack;
431
432 td = curthread;
433 p = td->td_proc;
434 PROC_LOCK_ASSERT(p, MA_OWNED);
435 sig = ksi->ksi_signo;
436 psp = p->p_sigacts;
437 mtx_assert(&psp->ps_mtx, MA_OWNED);
438 regs = td->td_frame;
439 oonstack = sigonstack(regs->tf_esp);
440
441 /* Save user context. */
442 bzero(&sf, sizeof(sf));
443 sf.sf_uc.uc_sigmask = *mask;
444 sf.sf_uc.uc_stack = td->td_sigstk;
445 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
446 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
447 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
448 sf.sf_uc.uc_mcontext.mc_gs = rgs();
449 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
450 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
451 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
452 bzero(sf.sf_uc.uc_mcontext.__spare__,
453 sizeof(sf.sf_uc.uc_mcontext.__spare__));
454 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
455
456 /* Allocate space for the signal handler context. */
457 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
458 SIGISMEMBER(psp->ps_sigonstack, sig)) {
459 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
460 td->td_sigstk.ss_size - sizeof(struct sigframe4));
461 #if defined(COMPAT_43)
462 td->td_sigstk.ss_flags |= SS_ONSTACK;
463 #endif
464 } else
465 sfp = (struct sigframe4 *)regs->tf_esp - 1;
466
467 /* Translate the signal if appropriate. */
468 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
469 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
470
471 /* Build the argument list for the signal handler. */
472 sf.sf_signum = sig;
473 sf.sf_ucontext = (register_t)&sfp->sf_uc;
474 bzero(&sf.sf_si, sizeof(sf.sf_si));
475 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
476 /* Signal handler installed with SA_SIGINFO. */
477 sf.sf_siginfo = (register_t)&sfp->sf_si;
478 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
479
480 /* Fill in POSIX parts */
481 sf.sf_si.si_signo = sig;
482 sf.sf_si.si_code = ksi->ksi_code;
483 sf.sf_si.si_addr = ksi->ksi_addr;
484 } else {
485 /* Old FreeBSD-style arguments. */
486 sf.sf_siginfo = ksi->ksi_code;
487 sf.sf_addr = (register_t)ksi->ksi_addr;
488 sf.sf_ahu.sf_handler = catcher;
489 }
490 mtx_unlock(&psp->ps_mtx);
491 PROC_UNLOCK(p);
492
493 /*
494 * If we're a vm86 process, we want to save the segment registers.
495 * We also change eflags to be our emulated eflags, not the actual
496 * eflags.
497 */
498 if (regs->tf_eflags & PSL_VM) {
499 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
500 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
501
502 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
503 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
504 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
505 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
506
507 if (vm86->vm86_has_vme == 0)
508 sf.sf_uc.uc_mcontext.mc_eflags =
509 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
510 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
511
512 /*
513 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
514 * syscalls made by the signal handler. This just avoids
515 * wasting time for our lazy fixup of such faults. PSL_NT
516 * does nothing in vm86 mode, but vm86 programs can set it
517 * almost legitimately in probes for old cpu types.
518 */
519 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
520 }
521
522 /*
523 * Copy the sigframe out to the user's stack.
524 */
525 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
526 #ifdef DEBUG
527 printf("process %ld has trashed its stack\n", (long)p->p_pid);
528 #endif
529 PROC_LOCK(p);
530 sigexit(td, SIGILL);
531 }
532
533 regs->tf_esp = (int)sfp;
534 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
535 regs->tf_eflags &= ~(PSL_T | PSL_D);
536 regs->tf_cs = _ucodesel;
537 regs->tf_ds = _udatasel;
538 regs->tf_es = _udatasel;
539 regs->tf_fs = _udatasel;
540 regs->tf_ss = _udatasel;
541 PROC_LOCK(p);
542 mtx_lock(&psp->ps_mtx);
543 }
544 #endif /* COMPAT_FREEBSD4 */
545
546 void
547 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
548 {
549 struct sigframe sf, *sfp;
550 struct proc *p;
551 struct thread *td;
552 struct sigacts *psp;
553 char *sp;
554 struct trapframe *regs;
555 struct segment_descriptor *sdp;
556 int sig;
557 int oonstack;
558
559 td = curthread;
560 p = td->td_proc;
561 PROC_LOCK_ASSERT(p, MA_OWNED);
562 sig = ksi->ksi_signo;
563 psp = p->p_sigacts;
564 mtx_assert(&psp->ps_mtx, MA_OWNED);
565 #ifdef COMPAT_FREEBSD4
566 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
567 freebsd4_sendsig(catcher, ksi, mask);
568 return;
569 }
570 #endif
571 #ifdef COMPAT_43
572 if (SIGISMEMBER(psp->ps_osigset, sig)) {
573 osendsig(catcher, ksi, mask);
574 return;
575 }
576 #endif
577 regs = td->td_frame;
578 oonstack = sigonstack(regs->tf_esp);
579
580 /* Save user context. */
581 bzero(&sf, sizeof(sf));
582 sf.sf_uc.uc_sigmask = *mask;
583 sf.sf_uc.uc_stack = td->td_sigstk;
584 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
585 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
586 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
587 sf.sf_uc.uc_mcontext.mc_gs = rgs();
588 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
589 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
590 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
591 fpstate_drop(td);
592 /*
593 * Unconditionally fill the fsbase and gsbase into the mcontext.
594 */
595 sdp = &td->td_pcb->pcb_fsd;
596 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
597 sdp->sd_lobase;
598 sdp = &td->td_pcb->pcb_gsd;
599 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
600 sdp->sd_lobase;
601 sf.sf_uc.uc_mcontext.mc_flags = 0;
602 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
603 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
604 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
605
606 /* Allocate space for the signal handler context. */
607 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
608 SIGISMEMBER(psp->ps_sigonstack, sig)) {
609 sp = td->td_sigstk.ss_sp +
610 td->td_sigstk.ss_size - sizeof(struct sigframe);
611 #if defined(COMPAT_43)
612 td->td_sigstk.ss_flags |= SS_ONSTACK;
613 #endif
614 } else
615 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
616 /* Align to 16 bytes. */
617 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
618
619 /* Translate the signal if appropriate. */
620 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
621 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
622
623 /* Build the argument list for the signal handler. */
624 sf.sf_signum = sig;
625 sf.sf_ucontext = (register_t)&sfp->sf_uc;
626 bzero(&sf.sf_si, sizeof(sf.sf_si));
627 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
628 /* Signal handler installed with SA_SIGINFO. */
629 sf.sf_siginfo = (register_t)&sfp->sf_si;
630 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
631
632 /* Fill in POSIX parts */
633 sf.sf_si = ksi->ksi_info;
634 sf.sf_si.si_signo = sig; /* maybe a translated signal */
635 } else {
636 /* Old FreeBSD-style arguments. */
637 sf.sf_siginfo = ksi->ksi_code;
638 sf.sf_addr = (register_t)ksi->ksi_addr;
639 sf.sf_ahu.sf_handler = catcher;
640 }
641 mtx_unlock(&psp->ps_mtx);
642 PROC_UNLOCK(p);
643
644 /*
645 * If we're a vm86 process, we want to save the segment registers.
646 * We also change eflags to be our emulated eflags, not the actual
647 * eflags.
648 */
649 if (regs->tf_eflags & PSL_VM) {
650 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
651 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
652
653 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
654 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
655 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
656 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
657
658 if (vm86->vm86_has_vme == 0)
659 sf.sf_uc.uc_mcontext.mc_eflags =
660 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
661 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
662
663 /*
664 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
665 * syscalls made by the signal handler. This just avoids
666 * wasting time for our lazy fixup of such faults. PSL_NT
667 * does nothing in vm86 mode, but vm86 programs can set it
668 * almost legitimately in probes for old cpu types.
669 */
670 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
671 }
672
673 /*
674 * Copy the sigframe out to the user's stack.
675 */
676 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
677 #ifdef DEBUG
678 printf("process %ld has trashed its stack\n", (long)p->p_pid);
679 #endif
680 PROC_LOCK(p);
681 sigexit(td, SIGILL);
682 }
683
684 regs->tf_esp = (int)sfp;
685 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
686 regs->tf_eflags &= ~(PSL_T | PSL_D);
687 regs->tf_cs = _ucodesel;
688 regs->tf_ds = _udatasel;
689 regs->tf_es = _udatasel;
690 regs->tf_fs = _udatasel;
691 regs->tf_ss = _udatasel;
692 PROC_LOCK(p);
693 mtx_lock(&psp->ps_mtx);
694 }
695
696 /*
697 * System call to cleanup state after a signal
698 * has been taken. Reset signal mask and
699 * stack state from context left by sendsig (above).
700 * Return to previous pc and psl as specified by
701 * context left by sendsig. Check carefully to
702 * make sure that the user has not modified the
703 * state to gain improper privileges.
704 *
705 * MPSAFE
706 */
707 #ifdef COMPAT_43
708 int
709 osigreturn(td, uap)
710 struct thread *td;
711 struct osigreturn_args /* {
712 struct osigcontext *sigcntxp;
713 } */ *uap;
714 {
715 struct osigcontext sc;
716 struct trapframe *regs;
717 struct osigcontext *scp;
718 int eflags, error;
719 ksiginfo_t ksi;
720
721 regs = td->td_frame;
722 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
723 if (error != 0)
724 return (error);
725 scp = ≻
726 eflags = scp->sc_ps;
727 if (eflags & PSL_VM) {
728 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
729 struct vm86_kernel *vm86;
730
731 /*
732 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
733 * set up the vm86 area, and we can't enter vm86 mode.
734 */
735 if (td->td_pcb->pcb_ext == 0)
736 return (EINVAL);
737 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
738 if (vm86->vm86_inited == 0)
739 return (EINVAL);
740
741 /* Go back to user mode if both flags are set. */
742 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
743 ksiginfo_init_trap(&ksi);
744 ksi.ksi_signo = SIGBUS;
745 ksi.ksi_code = BUS_OBJERR;
746 ksi.ksi_addr = (void *)regs->tf_eip;
747 trapsignal(td, &ksi);
748 }
749
750 if (vm86->vm86_has_vme) {
751 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
752 (eflags & VME_USERCHANGE) | PSL_VM;
753 } else {
754 vm86->vm86_eflags = eflags; /* save VIF, VIP */
755 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
756 (eflags & VM_USERCHANGE) | PSL_VM;
757 }
758 tf->tf_vm86_ds = scp->sc_ds;
759 tf->tf_vm86_es = scp->sc_es;
760 tf->tf_vm86_fs = scp->sc_fs;
761 tf->tf_vm86_gs = scp->sc_gs;
762 tf->tf_ds = _udatasel;
763 tf->tf_es = _udatasel;
764 tf->tf_fs = _udatasel;
765 } else {
766 /*
767 * Don't allow users to change privileged or reserved flags.
768 */
769 /*
770 * XXX do allow users to change the privileged flag PSL_RF.
771 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
772 * should sometimes set it there too. tf_eflags is kept in
773 * the signal context during signal handling and there is no
774 * other place to remember it, so the PSL_RF bit may be
775 * corrupted by the signal handler without us knowing.
776 * Corruption of the PSL_RF bit at worst causes one more or
777 * one less debugger trap, so allowing it is fairly harmless.
778 */
779 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
780 return (EINVAL);
781 }
782
783 /*
784 * Don't allow users to load a valid privileged %cs. Let the
785 * hardware check for invalid selectors, excess privilege in
786 * other selectors, invalid %eip's and invalid %esp's.
787 */
788 if (!CS_SECURE(scp->sc_cs)) {
789 ksiginfo_init_trap(&ksi);
790 ksi.ksi_signo = SIGBUS;
791 ksi.ksi_code = BUS_OBJERR;
792 ksi.ksi_trapno = T_PROTFLT;
793 ksi.ksi_addr = (void *)regs->tf_eip;
794 trapsignal(td, &ksi);
795 return (EINVAL);
796 }
797 regs->tf_ds = scp->sc_ds;
798 regs->tf_es = scp->sc_es;
799 regs->tf_fs = scp->sc_fs;
800 }
801
802 /* Restore remaining registers. */
803 regs->tf_eax = scp->sc_eax;
804 regs->tf_ebx = scp->sc_ebx;
805 regs->tf_ecx = scp->sc_ecx;
806 regs->tf_edx = scp->sc_edx;
807 regs->tf_esi = scp->sc_esi;
808 regs->tf_edi = scp->sc_edi;
809 regs->tf_cs = scp->sc_cs;
810 regs->tf_ss = scp->sc_ss;
811 regs->tf_isp = scp->sc_isp;
812 regs->tf_ebp = scp->sc_fp;
813 regs->tf_esp = scp->sc_sp;
814 regs->tf_eip = scp->sc_pc;
815 regs->tf_eflags = eflags;
816
817 #if defined(COMPAT_43)
818 if (scp->sc_onstack & 1)
819 td->td_sigstk.ss_flags |= SS_ONSTACK;
820 else
821 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
822 #endif
823 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
824 SIGPROCMASK_OLD);
825 return (EJUSTRETURN);
826 }
827 #endif /* COMPAT_43 */
828
829 #ifdef COMPAT_FREEBSD4
830 /*
831 * MPSAFE
832 */
833 int
834 freebsd4_sigreturn(td, uap)
835 struct thread *td;
836 struct freebsd4_sigreturn_args /* {
837 const ucontext4 *sigcntxp;
838 } */ *uap;
839 {
840 struct ucontext4 uc;
841 struct trapframe *regs;
842 struct ucontext4 *ucp;
843 int cs, eflags, error;
844 ksiginfo_t ksi;
845
846 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
847 if (error != 0)
848 return (error);
849 ucp = &uc;
850 regs = td->td_frame;
851 eflags = ucp->uc_mcontext.mc_eflags;
852 if (eflags & PSL_VM) {
853 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
854 struct vm86_kernel *vm86;
855
856 /*
857 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
858 * set up the vm86 area, and we can't enter vm86 mode.
859 */
860 if (td->td_pcb->pcb_ext == 0)
861 return (EINVAL);
862 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
863 if (vm86->vm86_inited == 0)
864 return (EINVAL);
865
866 /* Go back to user mode if both flags are set. */
867 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
868 ksiginfo_init_trap(&ksi);
869 ksi.ksi_signo = SIGBUS;
870 ksi.ksi_code = BUS_OBJERR;
871 ksi.ksi_addr = (void *)regs->tf_eip;
872 trapsignal(td, &ksi);
873 }
874 if (vm86->vm86_has_vme) {
875 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
876 (eflags & VME_USERCHANGE) | PSL_VM;
877 } else {
878 vm86->vm86_eflags = eflags; /* save VIF, VIP */
879 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
880 (eflags & VM_USERCHANGE) | PSL_VM;
881 }
882 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
883 tf->tf_eflags = eflags;
884 tf->tf_vm86_ds = tf->tf_ds;
885 tf->tf_vm86_es = tf->tf_es;
886 tf->tf_vm86_fs = tf->tf_fs;
887 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
888 tf->tf_ds = _udatasel;
889 tf->tf_es = _udatasel;
890 tf->tf_fs = _udatasel;
891 } else {
892 /*
893 * Don't allow users to change privileged or reserved flags.
894 */
895 /*
896 * XXX do allow users to change the privileged flag PSL_RF.
897 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
898 * should sometimes set it there too. tf_eflags is kept in
899 * the signal context during signal handling and there is no
900 * other place to remember it, so the PSL_RF bit may be
901 * corrupted by the signal handler without us knowing.
902 * Corruption of the PSL_RF bit at worst causes one more or
903 * one less debugger trap, so allowing it is fairly harmless.
904 */
905 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
906 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
907 td->td_proc->p_pid, td->td_name, eflags);
908 return (EINVAL);
909 }
910
911 /*
912 * Don't allow users to load a valid privileged %cs. Let the
913 * hardware check for invalid selectors, excess privilege in
914 * other selectors, invalid %eip's and invalid %esp's.
915 */
916 cs = ucp->uc_mcontext.mc_cs;
917 if (!CS_SECURE(cs)) {
918 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
919 td->td_proc->p_pid, td->td_name, cs);
920 ksiginfo_init_trap(&ksi);
921 ksi.ksi_signo = SIGBUS;
922 ksi.ksi_code = BUS_OBJERR;
923 ksi.ksi_trapno = T_PROTFLT;
924 ksi.ksi_addr = (void *)regs->tf_eip;
925 trapsignal(td, &ksi);
926 return (EINVAL);
927 }
928
929 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
930 }
931
932 #if defined(COMPAT_43)
933 if (ucp->uc_mcontext.mc_onstack & 1)
934 td->td_sigstk.ss_flags |= SS_ONSTACK;
935 else
936 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
937 #endif
938 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
939 return (EJUSTRETURN);
940 }
941 #endif /* COMPAT_FREEBSD4 */
942
943 /*
944 * MPSAFE
945 */
946 int
947 sys_sigreturn(td, uap)
948 struct thread *td;
949 struct sigreturn_args /* {
950 const struct __ucontext *sigcntxp;
951 } */ *uap;
952 {
953 ucontext_t uc;
954 struct trapframe *regs;
955 ucontext_t *ucp;
956 int cs, eflags, error, ret;
957 ksiginfo_t ksi;
958
959 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
960 if (error != 0)
961 return (error);
962 ucp = &uc;
963 regs = td->td_frame;
964 eflags = ucp->uc_mcontext.mc_eflags;
965 if (eflags & PSL_VM) {
966 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
967 struct vm86_kernel *vm86;
968
969 /*
970 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
971 * set up the vm86 area, and we can't enter vm86 mode.
972 */
973 if (td->td_pcb->pcb_ext == 0)
974 return (EINVAL);
975 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
976 if (vm86->vm86_inited == 0)
977 return (EINVAL);
978
979 /* Go back to user mode if both flags are set. */
980 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
981 ksiginfo_init_trap(&ksi);
982 ksi.ksi_signo = SIGBUS;
983 ksi.ksi_code = BUS_OBJERR;
984 ksi.ksi_addr = (void *)regs->tf_eip;
985 trapsignal(td, &ksi);
986 }
987
988 if (vm86->vm86_has_vme) {
989 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
990 (eflags & VME_USERCHANGE) | PSL_VM;
991 } else {
992 vm86->vm86_eflags = eflags; /* save VIF, VIP */
993 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
994 (eflags & VM_USERCHANGE) | PSL_VM;
995 }
996 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
997 tf->tf_eflags = eflags;
998 tf->tf_vm86_ds = tf->tf_ds;
999 tf->tf_vm86_es = tf->tf_es;
1000 tf->tf_vm86_fs = tf->tf_fs;
1001 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1002 tf->tf_ds = _udatasel;
1003 tf->tf_es = _udatasel;
1004 tf->tf_fs = _udatasel;
1005 } else {
1006 /*
1007 * Don't allow users to change privileged or reserved flags.
1008 */
1009 /*
1010 * XXX do allow users to change the privileged flag PSL_RF.
1011 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1012 * should sometimes set it there too. tf_eflags is kept in
1013 * the signal context during signal handling and there is no
1014 * other place to remember it, so the PSL_RF bit may be
1015 * corrupted by the signal handler without us knowing.
1016 * Corruption of the PSL_RF bit at worst causes one more or
1017 * one less debugger trap, so allowing it is fairly harmless.
1018 */
1019 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1020 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1021 td->td_proc->p_pid, td->td_name, eflags);
1022 return (EINVAL);
1023 }
1024
1025 /*
1026 * Don't allow users to load a valid privileged %cs. Let the
1027 * hardware check for invalid selectors, excess privilege in
1028 * other selectors, invalid %eip's and invalid %esp's.
1029 */
1030 cs = ucp->uc_mcontext.mc_cs;
1031 if (!CS_SECURE(cs)) {
1032 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1033 td->td_proc->p_pid, td->td_name, cs);
1034 ksiginfo_init_trap(&ksi);
1035 ksi.ksi_signo = SIGBUS;
1036 ksi.ksi_code = BUS_OBJERR;
1037 ksi.ksi_trapno = T_PROTFLT;
1038 ksi.ksi_addr = (void *)regs->tf_eip;
1039 trapsignal(td, &ksi);
1040 return (EINVAL);
1041 }
1042
1043 ret = set_fpcontext(td, &ucp->uc_mcontext);
1044 if (ret != 0)
1045 return (ret);
1046 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1047 }
1048
1049 #if defined(COMPAT_43)
1050 if (ucp->uc_mcontext.mc_onstack & 1)
1051 td->td_sigstk.ss_flags |= SS_ONSTACK;
1052 else
1053 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1054 #endif
1055
1056 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1057 return (EJUSTRETURN);
1058 }
1059
1060 /*
1061 * Machine dependent boot() routine
1062 *
1063 * I haven't seen anything to put here yet
1064 * Possibly some stuff might be grafted back here from boot()
1065 */
1066 void
1067 cpu_boot(int howto)
1068 {
1069 }
1070
1071 /*
1072 * Flush the D-cache for non-DMA I/O so that the I-cache can
1073 * be made coherent later.
1074 */
1075 void
1076 cpu_flush_dcache(void *ptr, size_t len)
1077 {
1078 /* Not applicable */
1079 }
1080
1081 /* Get current clock frequency for the given cpu id. */
1082 int
1083 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1084 {
1085 uint64_t tsc1, tsc2;
1086 register_t reg;
1087
1088 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1089 return (EINVAL);
1090 if ((cpu_feature & CPUID_TSC) == 0)
1091 return (EOPNOTSUPP);
1092
1093 #ifdef SMP
1094 if (smp_cpus > 1) {
1095 /* Schedule ourselves on the indicated cpu. */
1096 thread_lock(curthread);
1097 sched_bind(curthread, cpu_id);
1098 thread_unlock(curthread);
1099 }
1100 #endif
1101
1102 /* Calibrate by measuring a short delay. */
1103 reg = intr_disable();
1104 tsc1 = rdtsc();
1105 DELAY(1000);
1106 tsc2 = rdtsc();
1107 intr_restore(reg);
1108 *rate = (tsc2 - tsc1) * 1000;
1109
1110 #ifdef SMP
1111 if (smp_cpus > 1) {
1112 thread_lock(curthread);
1113 sched_unbind(curthread);
1114 thread_unlock(curthread);
1115 }
1116 #endif
1117
1118 return (0);
1119 }
1120
1121
1122 /*
1123 * Shutdown the CPU as much as possible
1124 */
1125 void
1126 cpu_halt(void)
1127 {
1128 for (;;)
1129 __asm__ ("hlt");
1130 }
1131
1132 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1133 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1134 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1135 0, "Use MONITOR/MWAIT for short idle");
1136
1137 #define STATE_RUNNING 0x0
1138 #define STATE_MWAIT 0x1
1139 #define STATE_SLEEPING 0x2
1140
1141 static void
1142 cpu_idle_hlt(int busy)
1143 {
1144 int *state;
1145
1146 state = (int *)PCPU_PTR(monitorbuf);
1147 *state = STATE_SLEEPING;
1148 /*
1149 * We must absolutely guarentee that hlt is the next instruction
1150 * after sti or we introduce a timing window.
1151 */
1152 disable_intr();
1153 if (sched_runnable())
1154 enable_intr();
1155 else
1156 __asm __volatile("sti; hlt");
1157 *state = STATE_RUNNING;
1158 }
1159
1160 /*
1161 * MWAIT cpu power states. Lower 4 bits are sub-states.
1162 */
1163 #define MWAIT_C0 0xf0
1164 #define MWAIT_C1 0x00
1165 #define MWAIT_C2 0x10
1166 #define MWAIT_C3 0x20
1167 #define MWAIT_C4 0x30
1168
1169 static void
1170 cpu_idle_mwait(int busy)
1171 {
1172 int *state;
1173
1174 state = (int *)PCPU_PTR(monitorbuf);
1175 *state = STATE_MWAIT;
1176 if (!sched_runnable()) {
1177 cpu_monitor(state, 0, 0);
1178 if (*state == STATE_MWAIT)
1179 cpu_mwait(0, MWAIT_C1);
1180 }
1181 *state = STATE_RUNNING;
1182 }
1183
1184 static void
1185 cpu_idle_spin(int busy)
1186 {
1187 int *state;
1188 int i;
1189
1190 state = (int *)PCPU_PTR(monitorbuf);
1191 *state = STATE_RUNNING;
1192 for (i = 0; i < 1000; i++) {
1193 if (sched_runnable())
1194 return;
1195 cpu_spinwait();
1196 }
1197 }
1198
1199 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1200
1201 void
1202 cpu_idle(int busy)
1203 {
1204
1205 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1206 busy, curcpu);
1207 #ifdef MP_WATCHDOG
1208 ap_watchdog(PCPU_GET(cpuid));
1209 #endif
1210 /* If we are busy - try to use fast methods. */
1211 if (busy) {
1212 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1213 cpu_idle_mwait(busy);
1214 goto out;
1215 }
1216 }
1217
1218 /* If we have time - switch timers into idle mode. */
1219 if (!busy) {
1220 critical_enter();
1221 cpu_idleclock();
1222 }
1223
1224 /* Call main idle method. */
1225 cpu_idle_fn(busy);
1226
1227 /* Switch timers mack into active mode. */
1228 if (!busy) {
1229 cpu_activeclock();
1230 critical_exit();
1231 }
1232 out:
1233 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1234 busy, curcpu);
1235 }
1236
1237 int
1238 cpu_idle_wakeup(int cpu)
1239 {
1240 struct pcpu *pcpu;
1241 int *state;
1242
1243 pcpu = pcpu_find(cpu);
1244 state = (int *)pcpu->pc_monitorbuf;
1245 /*
1246 * This doesn't need to be atomic since missing the race will
1247 * simply result in unnecessary IPIs.
1248 */
1249 if (*state == STATE_SLEEPING)
1250 return (0);
1251 if (*state == STATE_MWAIT)
1252 *state = STATE_RUNNING;
1253 return (1);
1254 }
1255
1256 /*
1257 * Ordered by speed/power consumption.
1258 */
1259 struct {
1260 void *id_fn;
1261 char *id_name;
1262 } idle_tbl[] = {
1263 { cpu_idle_spin, "spin" },
1264 { cpu_idle_mwait, "mwait" },
1265 { cpu_idle_hlt, "hlt" },
1266 { NULL, NULL }
1267 };
1268
1269 static int
1270 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1271 {
1272 char *avail, *p;
1273 int error;
1274 int i;
1275
1276 avail = malloc(256, M_TEMP, M_WAITOK);
1277 p = avail;
1278 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1279 if (strstr(idle_tbl[i].id_name, "mwait") &&
1280 (cpu_feature2 & CPUID2_MON) == 0)
1281 continue;
1282 p += sprintf(p, "%s%s", p != avail ? ", " : "",
1283 idle_tbl[i].id_name);
1284 }
1285 error = sysctl_handle_string(oidp, avail, 0, req);
1286 free(avail, M_TEMP);
1287 return (error);
1288 }
1289
1290 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1291 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1292
1293 static int
1294 idle_sysctl(SYSCTL_HANDLER_ARGS)
1295 {
1296 char buf[16];
1297 int error;
1298 char *p;
1299 int i;
1300
1301 p = "unknown";
1302 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1303 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1304 p = idle_tbl[i].id_name;
1305 break;
1306 }
1307 }
1308 strncpy(buf, p, sizeof(buf));
1309 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1310 if (error != 0 || req->newptr == NULL)
1311 return (error);
1312 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1313 if (strstr(idle_tbl[i].id_name, "mwait") &&
1314 (cpu_feature2 & CPUID2_MON) == 0)
1315 continue;
1316 if (strcmp(idle_tbl[i].id_name, buf))
1317 continue;
1318 cpu_idle_fn = idle_tbl[i].id_fn;
1319 return (0);
1320 }
1321 return (EINVAL);
1322 }
1323
1324 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1325 idle_sysctl, "A", "currently selected idle function");
1326
1327 uint64_t (*atomic_load_acq_64)(volatile uint64_t *) =
1328 atomic_load_acq_64_i386;
1329 void (*atomic_store_rel_64)(volatile uint64_t *, uint64_t) =
1330 atomic_store_rel_64_i386;
1331
1332 static void
1333 cpu_probe_cmpxchg8b(void)
1334 {
1335
1336 if ((cpu_feature & CPUID_CX8) != 0) {
1337 atomic_load_acq_64 = atomic_load_acq_64_i586;
1338 atomic_store_rel_64 = atomic_store_rel_64_i586;
1339 }
1340 }
1341
1342 /*
1343 * Reset registers to default values on exec.
1344 */
1345 void
1346 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1347 {
1348 struct trapframe *regs = td->td_frame;
1349 struct pcb *pcb = td->td_pcb;
1350
1351 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1352 pcb->pcb_gs = _udatasel;
1353 load_gs(_udatasel);
1354
1355 mtx_lock_spin(&dt_lock);
1356 if (td->td_proc->p_md.md_ldt)
1357 user_ldt_free(td);
1358 else
1359 mtx_unlock_spin(&dt_lock);
1360
1361 bzero((char *)regs, sizeof(struct trapframe));
1362 regs->tf_eip = imgp->entry_addr;
1363 regs->tf_esp = stack;
1364 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1365 regs->tf_ss = _udatasel;
1366 regs->tf_ds = _udatasel;
1367 regs->tf_es = _udatasel;
1368 regs->tf_fs = _udatasel;
1369 regs->tf_cs = _ucodesel;
1370
1371 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1372 regs->tf_ebx = imgp->ps_strings;
1373
1374 /*
1375 * Reset the hardware debug registers if they were in use.
1376 * They won't have any meaning for the newly exec'd process.
1377 */
1378 if (pcb->pcb_flags & PCB_DBREGS) {
1379 pcb->pcb_dr0 = 0;
1380 pcb->pcb_dr1 = 0;
1381 pcb->pcb_dr2 = 0;
1382 pcb->pcb_dr3 = 0;
1383 pcb->pcb_dr6 = 0;
1384 pcb->pcb_dr7 = 0;
1385 if (pcb == PCPU_GET(curpcb)) {
1386 /*
1387 * Clear the debug registers on the running
1388 * CPU, otherwise they will end up affecting
1389 * the next process we switch to.
1390 */
1391 reset_dbregs();
1392 }
1393 pcb->pcb_flags &= ~PCB_DBREGS;
1394 }
1395
1396 /*
1397 * Initialize the math emulator (if any) for the current process.
1398 * Actually, just clear the bit that says that the emulator has
1399 * been initialized. Initialization is delayed until the process
1400 * traps to the emulator (if it is done at all) mainly because
1401 * emulators don't provide an entry point for initialization.
1402 */
1403 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1404 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1405
1406 /*
1407 * Drop the FP state if we hold it, so that the process gets a
1408 * clean FP state if it uses the FPU again.
1409 */
1410 fpstate_drop(td);
1411
1412 /*
1413 * XXX - Linux emulator
1414 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1415 * on it.
1416 */
1417 td->td_retval[1] = 0;
1418 }
1419
1420 void
1421 cpu_setregs(void)
1422 {
1423 unsigned int cr0;
1424
1425 cr0 = rcr0();
1426
1427 /*
1428 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1429 *
1430 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1431 * instructions. We must set the CR0_MP bit and use the CR0_TS
1432 * bit to control the trap, because setting the CR0_EM bit does
1433 * not cause WAIT instructions to trap. It's important to trap
1434 * WAIT instructions - otherwise the "wait" variants of no-wait
1435 * control instructions would degenerate to the "no-wait" variants
1436 * after FP context switches but work correctly otherwise. It's
1437 * particularly important to trap WAITs when there is no NPX -
1438 * otherwise the "wait" variants would always degenerate.
1439 *
1440 * Try setting CR0_NE to get correct error reporting on 486DX's.
1441 * Setting it should fail or do nothing on lesser processors.
1442 */
1443 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1444 load_cr0(cr0);
1445 load_gs(_udatasel);
1446 }
1447
1448 u_long bootdev; /* not a struct cdev *- encoding is different */
1449 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1450 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1451
1452 /*
1453 * Initialize 386 and configure to run kernel
1454 */
1455
1456 /*
1457 * Initialize segments & interrupt table
1458 */
1459
1460 int _default_ldt;
1461
1462 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1463 union descriptor ldt[NLDT]; /* local descriptor table */
1464 static struct gate_descriptor idt0[NIDT];
1465 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1466 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1467 struct mtx dt_lock; /* lock for GDT and LDT */
1468
1469 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1470 extern int has_f00f_bug;
1471 #endif
1472
1473 static struct i386tss dblfault_tss;
1474 static char dblfault_stack[PAGE_SIZE];
1475
1476 extern vm_offset_t proc0kstack;
1477
1478
1479 /*
1480 * software prototypes -- in more palatable form.
1481 *
1482 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1483 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1484 */
1485 struct soft_segment_descriptor gdt_segs[] = {
1486 /* GNULL_SEL 0 Null Descriptor */
1487 { .ssd_base = 0x0,
1488 .ssd_limit = 0x0,
1489 .ssd_type = 0,
1490 .ssd_dpl = SEL_KPL,
1491 .ssd_p = 0,
1492 .ssd_xx = 0, .ssd_xx1 = 0,
1493 .ssd_def32 = 0,
1494 .ssd_gran = 0 },
1495 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1496 { .ssd_base = 0x0,
1497 .ssd_limit = 0xfffff,
1498 .ssd_type = SDT_MEMRWA,
1499 .ssd_dpl = SEL_KPL,
1500 .ssd_p = 1,
1501 .ssd_xx = 0, .ssd_xx1 = 0,
1502 .ssd_def32 = 1,
1503 .ssd_gran = 1 },
1504 /* GUFS_SEL 2 %fs Descriptor for user */
1505 { .ssd_base = 0x0,
1506 .ssd_limit = 0xfffff,
1507 .ssd_type = SDT_MEMRWA,
1508 .ssd_dpl = SEL_UPL,
1509 .ssd_p = 1,
1510 .ssd_xx = 0, .ssd_xx1 = 0,
1511 .ssd_def32 = 1,
1512 .ssd_gran = 1 },
1513 /* GUGS_SEL 3 %gs Descriptor for user */
1514 { .ssd_base = 0x0,
1515 .ssd_limit = 0xfffff,
1516 .ssd_type = SDT_MEMRWA,
1517 .ssd_dpl = SEL_UPL,
1518 .ssd_p = 1,
1519 .ssd_xx = 0, .ssd_xx1 = 0,
1520 .ssd_def32 = 1,
1521 .ssd_gran = 1 },
1522 /* GCODE_SEL 4 Code Descriptor for kernel */
1523 { .ssd_base = 0x0,
1524 .ssd_limit = 0xfffff,
1525 .ssd_type = SDT_MEMERA,
1526 .ssd_dpl = SEL_KPL,
1527 .ssd_p = 1,
1528 .ssd_xx = 0, .ssd_xx1 = 0,
1529 .ssd_def32 = 1,
1530 .ssd_gran = 1 },
1531 /* GDATA_SEL 5 Data Descriptor for kernel */
1532 { .ssd_base = 0x0,
1533 .ssd_limit = 0xfffff,
1534 .ssd_type = SDT_MEMRWA,
1535 .ssd_dpl = SEL_KPL,
1536 .ssd_p = 1,
1537 .ssd_xx = 0, .ssd_xx1 = 0,
1538 .ssd_def32 = 1,
1539 .ssd_gran = 1 },
1540 /* GUCODE_SEL 6 Code Descriptor for user */
1541 { .ssd_base = 0x0,
1542 .ssd_limit = 0xfffff,
1543 .ssd_type = SDT_MEMERA,
1544 .ssd_dpl = SEL_UPL,
1545 .ssd_p = 1,
1546 .ssd_xx = 0, .ssd_xx1 = 0,
1547 .ssd_def32 = 1,
1548 .ssd_gran = 1 },
1549 /* GUDATA_SEL 7 Data Descriptor for user */
1550 { .ssd_base = 0x0,
1551 .ssd_limit = 0xfffff,
1552 .ssd_type = SDT_MEMRWA,
1553 .ssd_dpl = SEL_UPL,
1554 .ssd_p = 1,
1555 .ssd_xx = 0, .ssd_xx1 = 0,
1556 .ssd_def32 = 1,
1557 .ssd_gran = 1 },
1558 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1559 { .ssd_base = 0x400,
1560 .ssd_limit = 0xfffff,
1561 .ssd_type = SDT_MEMRWA,
1562 .ssd_dpl = SEL_KPL,
1563 .ssd_p = 1,
1564 .ssd_xx = 0, .ssd_xx1 = 0,
1565 .ssd_def32 = 1,
1566 .ssd_gran = 1 },
1567 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1568 {
1569 .ssd_base = 0x0,
1570 .ssd_limit = sizeof(struct i386tss)-1,
1571 .ssd_type = SDT_SYS386TSS,
1572 .ssd_dpl = 0,
1573 .ssd_p = 1,
1574 .ssd_xx = 0, .ssd_xx1 = 0,
1575 .ssd_def32 = 0,
1576 .ssd_gran = 0 },
1577 /* GLDT_SEL 10 LDT Descriptor */
1578 { .ssd_base = (int) ldt,
1579 .ssd_limit = sizeof(ldt)-1,
1580 .ssd_type = SDT_SYSLDT,
1581 .ssd_dpl = SEL_UPL,
1582 .ssd_p = 1,
1583 .ssd_xx = 0, .ssd_xx1 = 0,
1584 .ssd_def32 = 0,
1585 .ssd_gran = 0 },
1586 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1587 { .ssd_base = (int) ldt,
1588 .ssd_limit = (512 * sizeof(union descriptor)-1),
1589 .ssd_type = SDT_SYSLDT,
1590 .ssd_dpl = 0,
1591 .ssd_p = 1,
1592 .ssd_xx = 0, .ssd_xx1 = 0,
1593 .ssd_def32 = 0,
1594 .ssd_gran = 0 },
1595 /* GPANIC_SEL 12 Panic Tss Descriptor */
1596 { .ssd_base = (int) &dblfault_tss,
1597 .ssd_limit = sizeof(struct i386tss)-1,
1598 .ssd_type = SDT_SYS386TSS,
1599 .ssd_dpl = 0,
1600 .ssd_p = 1,
1601 .ssd_xx = 0, .ssd_xx1 = 0,
1602 .ssd_def32 = 0,
1603 .ssd_gran = 0 },
1604 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1605 { .ssd_base = 0,
1606 .ssd_limit = 0xfffff,
1607 .ssd_type = SDT_MEMERA,
1608 .ssd_dpl = 0,
1609 .ssd_p = 1,
1610 .ssd_xx = 0, .ssd_xx1 = 0,
1611 .ssd_def32 = 0,
1612 .ssd_gran = 1 },
1613 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1614 { .ssd_base = 0,
1615 .ssd_limit = 0xfffff,
1616 .ssd_type = SDT_MEMERA,
1617 .ssd_dpl = 0,
1618 .ssd_p = 1,
1619 .ssd_xx = 0, .ssd_xx1 = 0,
1620 .ssd_def32 = 0,
1621 .ssd_gran = 1 },
1622 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1623 { .ssd_base = 0,
1624 .ssd_limit = 0xfffff,
1625 .ssd_type = SDT_MEMRWA,
1626 .ssd_dpl = 0,
1627 .ssd_p = 1,
1628 .ssd_xx = 0, .ssd_xx1 = 0,
1629 .ssd_def32 = 1,
1630 .ssd_gran = 1 },
1631 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1632 { .ssd_base = 0,
1633 .ssd_limit = 0xfffff,
1634 .ssd_type = SDT_MEMRWA,
1635 .ssd_dpl = 0,
1636 .ssd_p = 1,
1637 .ssd_xx = 0, .ssd_xx1 = 0,
1638 .ssd_def32 = 0,
1639 .ssd_gran = 1 },
1640 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1641 { .ssd_base = 0,
1642 .ssd_limit = 0xfffff,
1643 .ssd_type = SDT_MEMRWA,
1644 .ssd_dpl = 0,
1645 .ssd_p = 1,
1646 .ssd_xx = 0, .ssd_xx1 = 0,
1647 .ssd_def32 = 0,
1648 .ssd_gran = 1 },
1649 /* GNDIS_SEL 18 NDIS Descriptor */
1650 { .ssd_base = 0x0,
1651 .ssd_limit = 0x0,
1652 .ssd_type = 0,
1653 .ssd_dpl = 0,
1654 .ssd_p = 0,
1655 .ssd_xx = 0, .ssd_xx1 = 0,
1656 .ssd_def32 = 0,
1657 .ssd_gran = 0 },
1658 };
1659
1660 static struct soft_segment_descriptor ldt_segs[] = {
1661 /* Null Descriptor - overwritten by call gate */
1662 { .ssd_base = 0x0,
1663 .ssd_limit = 0x0,
1664 .ssd_type = 0,
1665 .ssd_dpl = 0,
1666 .ssd_p = 0,
1667 .ssd_xx = 0, .ssd_xx1 = 0,
1668 .ssd_def32 = 0,
1669 .ssd_gran = 0 },
1670 /* Null Descriptor - overwritten by call gate */
1671 { .ssd_base = 0x0,
1672 .ssd_limit = 0x0,
1673 .ssd_type = 0,
1674 .ssd_dpl = 0,
1675 .ssd_p = 0,
1676 .ssd_xx = 0, .ssd_xx1 = 0,
1677 .ssd_def32 = 0,
1678 .ssd_gran = 0 },
1679 /* Null Descriptor - overwritten by call gate */
1680 { .ssd_base = 0x0,
1681 .ssd_limit = 0x0,
1682 .ssd_type = 0,
1683 .ssd_dpl = 0,
1684 .ssd_p = 0,
1685 .ssd_xx = 0, .ssd_xx1 = 0,
1686 .ssd_def32 = 0,
1687 .ssd_gran = 0 },
1688 /* Code Descriptor for user */
1689 { .ssd_base = 0x0,
1690 .ssd_limit = 0xfffff,
1691 .ssd_type = SDT_MEMERA,
1692 .ssd_dpl = SEL_UPL,
1693 .ssd_p = 1,
1694 .ssd_xx = 0, .ssd_xx1 = 0,
1695 .ssd_def32 = 1,
1696 .ssd_gran = 1 },
1697 /* Null Descriptor - overwritten by call gate */
1698 { .ssd_base = 0x0,
1699 .ssd_limit = 0x0,
1700 .ssd_type = 0,
1701 .ssd_dpl = 0,
1702 .ssd_p = 0,
1703 .ssd_xx = 0, .ssd_xx1 = 0,
1704 .ssd_def32 = 0,
1705 .ssd_gran = 0 },
1706 /* Data Descriptor for user */
1707 { .ssd_base = 0x0,
1708 .ssd_limit = 0xfffff,
1709 .ssd_type = SDT_MEMRWA,
1710 .ssd_dpl = SEL_UPL,
1711 .ssd_p = 1,
1712 .ssd_xx = 0, .ssd_xx1 = 0,
1713 .ssd_def32 = 1,
1714 .ssd_gran = 1 },
1715 };
1716
1717 void
1718 setidt(idx, func, typ, dpl, selec)
1719 int idx;
1720 inthand_t *func;
1721 int typ;
1722 int dpl;
1723 int selec;
1724 {
1725 struct gate_descriptor *ip;
1726
1727 ip = idt + idx;
1728 ip->gd_looffset = (int)func;
1729 ip->gd_selector = selec;
1730 ip->gd_stkcpy = 0;
1731 ip->gd_xx = 0;
1732 ip->gd_type = typ;
1733 ip->gd_dpl = dpl;
1734 ip->gd_p = 1;
1735 ip->gd_hioffset = ((int)func)>>16 ;
1736 }
1737
1738 extern inthand_t
1739 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1740 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1741 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1742 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1743 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1744
1745 #ifdef DDB
1746 /*
1747 * Display the index and function name of any IDT entries that don't use
1748 * the default 'rsvd' entry point.
1749 */
1750 DB_SHOW_COMMAND(idt, db_show_idt)
1751 {
1752 struct gate_descriptor *ip;
1753 int idx;
1754 uintptr_t func;
1755
1756 ip = idt;
1757 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1758 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1759 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1760 db_printf("%3d\t", idx);
1761 db_printsym(func, DB_STGY_PROC);
1762 db_printf("\n");
1763 }
1764 ip++;
1765 }
1766 }
1767
1768 /* Show privileged registers. */
1769 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1770 {
1771 uint64_t idtr, gdtr;
1772
1773 idtr = ridt();
1774 db_printf("idtr\t0x%08x/%04x\n",
1775 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1776 gdtr = rgdt();
1777 db_printf("gdtr\t0x%08x/%04x\n",
1778 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1779 db_printf("ldtr\t0x%04x\n", rldt());
1780 db_printf("tr\t0x%04x\n", rtr());
1781 db_printf("cr0\t0x%08x\n", rcr0());
1782 db_printf("cr2\t0x%08x\n", rcr2());
1783 db_printf("cr3\t0x%08x\n", rcr3());
1784 db_printf("cr4\t0x%08x\n", rcr4());
1785 }
1786 #endif
1787
1788 void
1789 sdtossd(sd, ssd)
1790 struct segment_descriptor *sd;
1791 struct soft_segment_descriptor *ssd;
1792 {
1793 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1794 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1795 ssd->ssd_type = sd->sd_type;
1796 ssd->ssd_dpl = sd->sd_dpl;
1797 ssd->ssd_p = sd->sd_p;
1798 ssd->ssd_def32 = sd->sd_def32;
1799 ssd->ssd_gran = sd->sd_gran;
1800 }
1801
1802 static void
1803 basemem_setup(void)
1804 {
1805 vm_paddr_t pa;
1806 pt_entry_t *pte;
1807 int i;
1808
1809 if (basemem > 640) {
1810 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1811 basemem);
1812 basemem = 640;
1813 }
1814
1815 /*
1816 * XXX if biosbasemem is now < 640, there is a `hole'
1817 * between the end of base memory and the start of
1818 * ISA memory. The hole may be empty or it may
1819 * contain BIOS code or data. Map it read/write so
1820 * that the BIOS can write to it. (Memory from 0 to
1821 * the physical end of the kernel is mapped read-only
1822 * to begin with and then parts of it are remapped.
1823 * The parts that aren't remapped form holes that
1824 * remain read-only and are unused by the kernel.
1825 * The base memory area is below the physical end of
1826 * the kernel and right now forms a read-only hole.
1827 * The part of it from PAGE_SIZE to
1828 * (trunc_page(biosbasemem * 1024) - 1) will be
1829 * remapped and used by the kernel later.)
1830 *
1831 * This code is similar to the code used in
1832 * pmap_mapdev, but since no memory needs to be
1833 * allocated we simply change the mapping.
1834 */
1835 for (pa = trunc_page(basemem * 1024);
1836 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1837 pmap_kenter(KERNBASE + pa, pa);
1838
1839 /*
1840 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1841 * the vm86 page table so that vm86 can scribble on them using
1842 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1843 * page 0, at least as initialized here?
1844 */
1845 pte = (pt_entry_t *)vm86paddr;
1846 for (i = basemem / 4; i < 160; i++)
1847 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1848 }
1849
1850 /*
1851 * Populate the (physmap) array with base/bound pairs describing the
1852 * available physical memory in the system, then test this memory and
1853 * build the phys_avail array describing the actually-available memory.
1854 *
1855 * If we cannot accurately determine the physical memory map, then use
1856 * value from the 0xE801 call, and failing that, the RTC.
1857 *
1858 * Total memory size may be set by the kernel environment variable
1859 * hw.physmem or the compile-time define MAXMEM.
1860 *
1861 * XXX first should be vm_paddr_t.
1862 */
1863 static void
1864 getmemsize(int first)
1865 {
1866 int off, physmap_idx, pa_indx, da_indx;
1867 u_long physmem_tunable, memtest;
1868 vm_paddr_t physmap[PHYSMAP_SIZE];
1869 pt_entry_t *pte;
1870 quad_t dcons_addr, dcons_size;
1871 int i;
1872 int pg_n;
1873 u_int extmem;
1874 u_int under16;
1875 vm_paddr_t pa;
1876
1877 bzero(physmap, sizeof(physmap));
1878
1879 /* XXX - some of EPSON machines can't use PG_N */
1880 pg_n = PG_N;
1881 if (pc98_machine_type & M_EPSON_PC98) {
1882 switch (epson_machine_id) {
1883 #ifdef WB_CACHE
1884 default:
1885 #endif
1886 case EPSON_PC486_HX:
1887 case EPSON_PC486_HG:
1888 case EPSON_PC486_HA:
1889 pg_n = 0;
1890 break;
1891 }
1892 }
1893
1894 under16 = pc98_getmemsize(&basemem, &extmem);
1895 basemem_setup();
1896
1897 physmap[0] = 0;
1898 physmap[1] = basemem * 1024;
1899 physmap_idx = 2;
1900 physmap[physmap_idx] = 0x100000;
1901 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1902
1903 /*
1904 * Now, physmap contains a map of physical memory.
1905 */
1906
1907 #ifdef SMP
1908 /* make hole for AP bootstrap code */
1909 physmap[1] = mp_bootaddress(physmap[1]);
1910 #endif
1911
1912 /*
1913 * Maxmem isn't the "maximum memory", it's one larger than the
1914 * highest page of the physical address space. It should be
1915 * called something like "Maxphyspage". We may adjust this
1916 * based on ``hw.physmem'' and the results of the memory test.
1917 */
1918 Maxmem = atop(physmap[physmap_idx + 1]);
1919
1920 #ifdef MAXMEM
1921 Maxmem = MAXMEM / 4;
1922 #endif
1923
1924 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1925 Maxmem = atop(physmem_tunable);
1926
1927 /*
1928 * By default keep the memtest enabled. Use a general name so that
1929 * one could eventually do more with the code than just disable it.
1930 */
1931 memtest = 1;
1932 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1933
1934 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1935 (boothowto & RB_VERBOSE))
1936 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1937
1938 /*
1939 * If Maxmem has been increased beyond what the system has detected,
1940 * extend the last memory segment to the new limit.
1941 */
1942 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1943 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1944
1945 /*
1946 * We need to divide chunk if Maxmem is larger than 16MB and
1947 * under 16MB area is not full of memory.
1948 * (1) system area (15-16MB region) is cut off
1949 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
1950 */
1951 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1952 /* 15M - 16M region is cut off, so need to divide chunk */
1953 physmap[physmap_idx + 1] = under16 * 1024;
1954 physmap_idx += 2;
1955 physmap[physmap_idx] = 0x1000000;
1956 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1957 }
1958
1959 /* call pmap initialization to make new kernel address space */
1960 pmap_bootstrap(first);
1961
1962 /*
1963 * Size up each available chunk of physical memory.
1964 */
1965 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1966 pa_indx = 0;
1967 da_indx = 1;
1968 phys_avail[pa_indx++] = physmap[0];
1969 phys_avail[pa_indx] = physmap[0];
1970 dump_avail[da_indx] = physmap[0];
1971 pte = CMAP1;
1972
1973 /*
1974 * Get dcons buffer address
1975 */
1976 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1977 getenv_quad("dcons.size", &dcons_size) == 0)
1978 dcons_addr = 0;
1979
1980 /*
1981 * physmap is in bytes, so when converting to page boundaries,
1982 * round up the start address and round down the end address.
1983 */
1984 for (i = 0; i <= physmap_idx; i += 2) {
1985 vm_paddr_t end;
1986
1987 end = ptoa((vm_paddr_t)Maxmem);
1988 if (physmap[i + 1] < end)
1989 end = trunc_page(physmap[i + 1]);
1990 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1991 int tmp, page_bad, full;
1992 int *ptr = (int *)CADDR1;
1993
1994 full = FALSE;
1995 /*
1996 * block out kernel memory as not available.
1997 */
1998 if (pa >= KERNLOAD && pa < first)
1999 goto do_dump_avail;
2000
2001 /*
2002 * block out dcons buffer
2003 */
2004 if (dcons_addr > 0
2005 && pa >= trunc_page(dcons_addr)
2006 && pa < dcons_addr + dcons_size)
2007 goto do_dump_avail;
2008
2009 page_bad = FALSE;
2010 if (memtest == 0)
2011 goto skip_memtest;
2012
2013 /*
2014 * map page into kernel: valid, read/write,non-cacheable
2015 */
2016 *pte = pa | PG_V | PG_RW | pg_n;
2017 invltlb();
2018
2019 tmp = *(int *)ptr;
2020 /*
2021 * Test for alternating 1's and 0's
2022 */
2023 *(volatile int *)ptr = 0xaaaaaaaa;
2024 if (*(volatile int *)ptr != 0xaaaaaaaa)
2025 page_bad = TRUE;
2026 /*
2027 * Test for alternating 0's and 1's
2028 */
2029 *(volatile int *)ptr = 0x55555555;
2030 if (*(volatile int *)ptr != 0x55555555)
2031 page_bad = TRUE;
2032 /*
2033 * Test for all 1's
2034 */
2035 *(volatile int *)ptr = 0xffffffff;
2036 if (*(volatile int *)ptr != 0xffffffff)
2037 page_bad = TRUE;
2038 /*
2039 * Test for all 0's
2040 */
2041 *(volatile int *)ptr = 0x0;
2042 if (*(volatile int *)ptr != 0x0)
2043 page_bad = TRUE;
2044 /*
2045 * Restore original value.
2046 */
2047 *(int *)ptr = tmp;
2048
2049 skip_memtest:
2050 /*
2051 * Adjust array of valid/good pages.
2052 */
2053 if (page_bad == TRUE)
2054 continue;
2055 /*
2056 * If this good page is a continuation of the
2057 * previous set of good pages, then just increase
2058 * the end pointer. Otherwise start a new chunk.
2059 * Note that "end" points one higher than end,
2060 * making the range >= start and < end.
2061 * If we're also doing a speculative memory
2062 * test and we at or past the end, bump up Maxmem
2063 * so that we keep going. The first bad page
2064 * will terminate the loop.
2065 */
2066 if (phys_avail[pa_indx] == pa) {
2067 phys_avail[pa_indx] += PAGE_SIZE;
2068 } else {
2069 pa_indx++;
2070 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2071 printf(
2072 "Too many holes in the physical address space, giving up\n");
2073 pa_indx--;
2074 full = TRUE;
2075 goto do_dump_avail;
2076 }
2077 phys_avail[pa_indx++] = pa; /* start */
2078 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2079 }
2080 physmem++;
2081 do_dump_avail:
2082 if (dump_avail[da_indx] == pa) {
2083 dump_avail[da_indx] += PAGE_SIZE;
2084 } else {
2085 da_indx++;
2086 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2087 da_indx--;
2088 goto do_next;
2089 }
2090 dump_avail[da_indx++] = pa; /* start */
2091 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2092 }
2093 do_next:
2094 if (full)
2095 break;
2096 }
2097 }
2098 *pte = 0;
2099 invltlb();
2100
2101 /*
2102 * XXX
2103 * The last chunk must contain at least one page plus the message
2104 * buffer to avoid complicating other code (message buffer address
2105 * calculation, etc.).
2106 */
2107 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2108 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2109 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2110 phys_avail[pa_indx--] = 0;
2111 phys_avail[pa_indx--] = 0;
2112 }
2113
2114 Maxmem = atop(phys_avail[pa_indx]);
2115
2116 /* Trim off space for the message buffer. */
2117 phys_avail[pa_indx] -= round_page(msgbufsize);
2118
2119 /* Map the message buffer. */
2120 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2121 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2122 off);
2123 }
2124
2125 void
2126 init386(first)
2127 int first;
2128 {
2129 struct gate_descriptor *gdp;
2130 int gsel_tss, metadata_missing, x, pa;
2131 size_t kstack0_sz;
2132 struct pcpu *pc;
2133
2134 thread0.td_kstack = proc0kstack;
2135 thread0.td_kstack_pages = KSTACK_PAGES;
2136 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2137 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2138
2139 /*
2140 * This may be done better later if it gets more high level
2141 * components in it. If so just link td->td_proc here.
2142 */
2143 proc_linkup0(&proc0, &thread0);
2144
2145 /*
2146 * Initialize DMAC
2147 */
2148 pc98_init_dmac();
2149
2150 metadata_missing = 0;
2151 if (bootinfo.bi_modulep) {
2152 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2153 preload_bootstrap_relocate(KERNBASE);
2154 } else {
2155 metadata_missing = 1;
2156 }
2157 if (envmode == 1)
2158 kern_envp = static_env;
2159 else if (bootinfo.bi_envp)
2160 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2161
2162 /* Init basic tunables, hz etc */
2163 init_param1();
2164
2165 /*
2166 * Make gdt memory segments. All segments cover the full 4GB
2167 * of address space and permissions are enforced at page level.
2168 */
2169 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2170 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2171 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2172 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2173 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2174 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2175
2176 pc = &__pcpu[0];
2177 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2178 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2179 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2180
2181 for (x = 0; x < NGDT; x++)
2182 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2183
2184 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2185 r_gdt.rd_base = (int) gdt;
2186 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2187 lgdt(&r_gdt);
2188
2189 pcpu_init(pc, 0, sizeof(struct pcpu));
2190 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2191 pmap_kenter(pa + KERNBASE, pa);
2192 dpcpu_init((void *)(first + KERNBASE), 0);
2193 first += DPCPU_SIZE;
2194 PCPU_SET(prvspace, pc);
2195 PCPU_SET(curthread, &thread0);
2196 PCPU_SET(curpcb, thread0.td_pcb);
2197
2198 /*
2199 * Initialize mutexes.
2200 *
2201 * icu_lock: in order to allow an interrupt to occur in a critical
2202 * section, to set pcpu->ipending (etc...) properly, we
2203 * must be able to get the icu lock, so it can't be
2204 * under witness.
2205 */
2206 mutex_init();
2207 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2208
2209 /* make ldt memory segments */
2210 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2211 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2212 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2213 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2214
2215 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2216 lldt(_default_ldt);
2217 PCPU_SET(currentldt, _default_ldt);
2218
2219 /* exceptions */
2220 for (x = 0; x < NIDT; x++)
2221 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2222 GSEL(GCODE_SEL, SEL_KPL));
2223 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2224 GSEL(GCODE_SEL, SEL_KPL));
2225 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2226 GSEL(GCODE_SEL, SEL_KPL));
2227 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2228 GSEL(GCODE_SEL, SEL_KPL));
2229 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2230 GSEL(GCODE_SEL, SEL_KPL));
2231 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2232 GSEL(GCODE_SEL, SEL_KPL));
2233 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2234 GSEL(GCODE_SEL, SEL_KPL));
2235 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2236 GSEL(GCODE_SEL, SEL_KPL));
2237 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2238 , GSEL(GCODE_SEL, SEL_KPL));
2239 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2240 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2241 GSEL(GCODE_SEL, SEL_KPL));
2242 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2243 GSEL(GCODE_SEL, SEL_KPL));
2244 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2245 GSEL(GCODE_SEL, SEL_KPL));
2246 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2247 GSEL(GCODE_SEL, SEL_KPL));
2248 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2249 GSEL(GCODE_SEL, SEL_KPL));
2250 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2251 GSEL(GCODE_SEL, SEL_KPL));
2252 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2253 GSEL(GCODE_SEL, SEL_KPL));
2254 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2255 GSEL(GCODE_SEL, SEL_KPL));
2256 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2257 GSEL(GCODE_SEL, SEL_KPL));
2258 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2259 GSEL(GCODE_SEL, SEL_KPL));
2260 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2261 GSEL(GCODE_SEL, SEL_KPL));
2262
2263 r_idt.rd_limit = sizeof(idt0) - 1;
2264 r_idt.rd_base = (int) idt;
2265 lidt(&r_idt);
2266
2267 /*
2268 * Initialize the i8254 before the console so that console
2269 * initialization can use DELAY().
2270 */
2271 i8254_init();
2272
2273 /*
2274 * Initialize the console before we print anything out.
2275 */
2276 cninit();
2277
2278 if (metadata_missing)
2279 printf("WARNING: loader(8) metadata is missing!\n");
2280
2281 #ifdef DEV_ISA
2282 #ifdef DEV_ATPIC
2283 atpic_startup();
2284 #else
2285 /* Reset and mask the atpics and leave them shut down. */
2286 atpic_reset();
2287
2288 /*
2289 * Point the ICU spurious interrupt vectors at the APIC spurious
2290 * interrupt handler.
2291 */
2292 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2293 GSEL(GCODE_SEL, SEL_KPL));
2294 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2295 GSEL(GCODE_SEL, SEL_KPL));
2296 #endif
2297 #endif
2298
2299 #ifdef DDB
2300 ksym_start = bootinfo.bi_symtab;
2301 ksym_end = bootinfo.bi_esymtab;
2302 #endif
2303
2304 kdb_init();
2305
2306 #ifdef KDB
2307 if (boothowto & RB_KDB)
2308 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2309 #endif
2310
2311 finishidentcpu(); /* Final stage of CPU initialization */
2312 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2313 GSEL(GCODE_SEL, SEL_KPL));
2314 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2315 GSEL(GCODE_SEL, SEL_KPL));
2316 initializecpu(); /* Initialize CPU registers */
2317
2318 /* make an initial tss so cpu can get interrupt stack on syscall! */
2319 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2320 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2321 kstack0_sz - sizeof(struct pcb) - 16);
2322 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2323 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2324 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2325 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2326 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2327 ltr(gsel_tss);
2328
2329 /* pointer to selector slot for %fs/%gs */
2330 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2331
2332 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2333 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2334 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2335 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2336 dblfault_tss.tss_cr3 = (int)IdlePTD;
2337 dblfault_tss.tss_eip = (int)dblfault_handler;
2338 dblfault_tss.tss_eflags = PSL_KERNEL;
2339 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2340 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2341 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2342 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2343 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2344
2345 vm86_initialize();
2346 getmemsize(first);
2347 init_param2(physmem);
2348
2349 /* now running on new page tables, configured,and u/iom is accessible */
2350
2351 msgbufinit(msgbufp, msgbufsize);
2352
2353 /* make a call gate to reenter kernel with */
2354 gdp = &ldt[LSYS5CALLS_SEL].gd;
2355
2356 x = (int) &IDTVEC(lcall_syscall);
2357 gdp->gd_looffset = x;
2358 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2359 gdp->gd_stkcpy = 1;
2360 gdp->gd_type = SDT_SYS386CGT;
2361 gdp->gd_dpl = SEL_UPL;
2362 gdp->gd_p = 1;
2363 gdp->gd_hioffset = x >> 16;
2364
2365 /* XXX does this work? */
2366 /* XXX yes! */
2367 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2368 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2369
2370 /* transfer to user mode */
2371
2372 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2373 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2374
2375 /* setup proc 0's pcb */
2376 thread0.td_pcb->pcb_flags = 0;
2377 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2378 thread0.td_pcb->pcb_ext = 0;
2379 thread0.td_frame = &proc0_tf;
2380
2381 cpu_probe_cmpxchg8b();
2382 }
2383
2384 void
2385 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2386 {
2387
2388 }
2389
2390 void
2391 spinlock_enter(void)
2392 {
2393 struct thread *td;
2394 register_t flags;
2395
2396 td = curthread;
2397 if (td->td_md.md_spinlock_count == 0) {
2398 flags = intr_disable();
2399 td->td_md.md_spinlock_count = 1;
2400 td->td_md.md_saved_flags = flags;
2401 } else
2402 td->td_md.md_spinlock_count++;
2403 critical_enter();
2404 }
2405
2406 void
2407 spinlock_exit(void)
2408 {
2409 struct thread *td;
2410 register_t flags;
2411
2412 td = curthread;
2413 critical_exit();
2414 flags = td->td_md.md_saved_flags;
2415 td->td_md.md_spinlock_count--;
2416 if (td->td_md.md_spinlock_count == 0)
2417 intr_restore(flags);
2418 }
2419
2420 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2421 static void f00f_hack(void *unused);
2422 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2423
2424 static void
2425 f00f_hack(void *unused)
2426 {
2427 struct gate_descriptor *new_idt;
2428 vm_offset_t tmp;
2429
2430 if (!has_f00f_bug)
2431 return;
2432
2433 GIANT_REQUIRED;
2434
2435 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2436
2437 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2438 if (tmp == 0)
2439 panic("kmem_alloc returned 0");
2440
2441 /* Put the problematic entry (#6) at the end of the lower page. */
2442 new_idt = (struct gate_descriptor*)
2443 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2444 bcopy(idt, new_idt, sizeof(idt0));
2445 r_idt.rd_base = (u_int)new_idt;
2446 lidt(&r_idt);
2447 idt = new_idt;
2448 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2449 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2450 panic("vm_map_protect failed");
2451 }
2452 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2453
2454 /*
2455 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2456 * we want to start a backtrace from the function that caused us to enter
2457 * the debugger. We have the context in the trapframe, but base the trace
2458 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2459 * enough for a backtrace.
2460 */
2461 void
2462 makectx(struct trapframe *tf, struct pcb *pcb)
2463 {
2464
2465 pcb->pcb_edi = tf->tf_edi;
2466 pcb->pcb_esi = tf->tf_esi;
2467 pcb->pcb_ebp = tf->tf_ebp;
2468 pcb->pcb_ebx = tf->tf_ebx;
2469 pcb->pcb_eip = tf->tf_eip;
2470 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2471 }
2472
2473 int
2474 ptrace_set_pc(struct thread *td, u_long addr)
2475 {
2476
2477 td->td_frame->tf_eip = addr;
2478 return (0);
2479 }
2480
2481 int
2482 ptrace_single_step(struct thread *td)
2483 {
2484 td->td_frame->tf_eflags |= PSL_T;
2485 return (0);
2486 }
2487
2488 int
2489 ptrace_clear_single_step(struct thread *td)
2490 {
2491 td->td_frame->tf_eflags &= ~PSL_T;
2492 return (0);
2493 }
2494
2495 int
2496 fill_regs(struct thread *td, struct reg *regs)
2497 {
2498 struct pcb *pcb;
2499 struct trapframe *tp;
2500
2501 tp = td->td_frame;
2502 pcb = td->td_pcb;
2503 regs->r_gs = pcb->pcb_gs;
2504 return (fill_frame_regs(tp, regs));
2505 }
2506
2507 int
2508 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2509 {
2510 regs->r_fs = tp->tf_fs;
2511 regs->r_es = tp->tf_es;
2512 regs->r_ds = tp->tf_ds;
2513 regs->r_edi = tp->tf_edi;
2514 regs->r_esi = tp->tf_esi;
2515 regs->r_ebp = tp->tf_ebp;
2516 regs->r_ebx = tp->tf_ebx;
2517 regs->r_edx = tp->tf_edx;
2518 regs->r_ecx = tp->tf_ecx;
2519 regs->r_eax = tp->tf_eax;
2520 regs->r_eip = tp->tf_eip;
2521 regs->r_cs = tp->tf_cs;
2522 regs->r_eflags = tp->tf_eflags;
2523 regs->r_esp = tp->tf_esp;
2524 regs->r_ss = tp->tf_ss;
2525 return (0);
2526 }
2527
2528 int
2529 set_regs(struct thread *td, struct reg *regs)
2530 {
2531 struct pcb *pcb;
2532 struct trapframe *tp;
2533
2534 tp = td->td_frame;
2535 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2536 !CS_SECURE(regs->r_cs))
2537 return (EINVAL);
2538 pcb = td->td_pcb;
2539 tp->tf_fs = regs->r_fs;
2540 tp->tf_es = regs->r_es;
2541 tp->tf_ds = regs->r_ds;
2542 tp->tf_edi = regs->r_edi;
2543 tp->tf_esi = regs->r_esi;
2544 tp->tf_ebp = regs->r_ebp;
2545 tp->tf_ebx = regs->r_ebx;
2546 tp->tf_edx = regs->r_edx;
2547 tp->tf_ecx = regs->r_ecx;
2548 tp->tf_eax = regs->r_eax;
2549 tp->tf_eip = regs->r_eip;
2550 tp->tf_cs = regs->r_cs;
2551 tp->tf_eflags = regs->r_eflags;
2552 tp->tf_esp = regs->r_esp;
2553 tp->tf_ss = regs->r_ss;
2554 pcb->pcb_gs = regs->r_gs;
2555 return (0);
2556 }
2557
2558 #ifdef CPU_ENABLE_SSE
2559 static void
2560 fill_fpregs_xmm(sv_xmm, sv_87)
2561 struct savexmm *sv_xmm;
2562 struct save87 *sv_87;
2563 {
2564 register struct env87 *penv_87 = &sv_87->sv_env;
2565 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2566 int i;
2567
2568 bzero(sv_87, sizeof(*sv_87));
2569
2570 /* FPU control/status */
2571 penv_87->en_cw = penv_xmm->en_cw;
2572 penv_87->en_sw = penv_xmm->en_sw;
2573 penv_87->en_tw = penv_xmm->en_tw;
2574 penv_87->en_fip = penv_xmm->en_fip;
2575 penv_87->en_fcs = penv_xmm->en_fcs;
2576 penv_87->en_opcode = penv_xmm->en_opcode;
2577 penv_87->en_foo = penv_xmm->en_foo;
2578 penv_87->en_fos = penv_xmm->en_fos;
2579
2580 /* FPU registers */
2581 for (i = 0; i < 8; ++i)
2582 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2583 }
2584
2585 static void
2586 set_fpregs_xmm(sv_87, sv_xmm)
2587 struct save87 *sv_87;
2588 struct savexmm *sv_xmm;
2589 {
2590 register struct env87 *penv_87 = &sv_87->sv_env;
2591 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2592 int i;
2593
2594 /* FPU control/status */
2595 penv_xmm->en_cw = penv_87->en_cw;
2596 penv_xmm->en_sw = penv_87->en_sw;
2597 penv_xmm->en_tw = penv_87->en_tw;
2598 penv_xmm->en_fip = penv_87->en_fip;
2599 penv_xmm->en_fcs = penv_87->en_fcs;
2600 penv_xmm->en_opcode = penv_87->en_opcode;
2601 penv_xmm->en_foo = penv_87->en_foo;
2602 penv_xmm->en_fos = penv_87->en_fos;
2603
2604 /* FPU registers */
2605 for (i = 0; i < 8; ++i)
2606 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2607 }
2608 #endif /* CPU_ENABLE_SSE */
2609
2610 int
2611 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2612 {
2613
2614 KASSERT(td == curthread || TD_IS_SUSPENDED(td),
2615 ("not suspended thread %p", td));
2616 #ifdef DEV_NPX
2617 npxgetregs(td);
2618 #else
2619 bzero(fpregs, sizeof(*fpregs));
2620 #endif
2621 #ifdef CPU_ENABLE_SSE
2622 if (cpu_fxsr)
2623 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
2624 (struct save87 *)fpregs);
2625 else
2626 #endif /* CPU_ENABLE_SSE */
2627 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
2628 sizeof(*fpregs));
2629 return (0);
2630 }
2631
2632 int
2633 set_fpregs(struct thread *td, struct fpreg *fpregs)
2634 {
2635
2636 #ifdef CPU_ENABLE_SSE
2637 if (cpu_fxsr)
2638 set_fpregs_xmm((struct save87 *)fpregs,
2639 &td->td_pcb->pcb_user_save.sv_xmm);
2640 else
2641 #endif /* CPU_ENABLE_SSE */
2642 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
2643 sizeof(*fpregs));
2644 #ifdef DEV_NPX
2645 npxuserinited(td);
2646 #endif
2647 return (0);
2648 }
2649
2650 /*
2651 * Get machine context.
2652 */
2653 int
2654 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2655 {
2656 struct trapframe *tp;
2657 struct segment_descriptor *sdp;
2658
2659 tp = td->td_frame;
2660
2661 PROC_LOCK(curthread->td_proc);
2662 mcp->mc_onstack = sigonstack(tp->tf_esp);
2663 PROC_UNLOCK(curthread->td_proc);
2664 mcp->mc_gs = td->td_pcb->pcb_gs;
2665 mcp->mc_fs = tp->tf_fs;
2666 mcp->mc_es = tp->tf_es;
2667 mcp->mc_ds = tp->tf_ds;
2668 mcp->mc_edi = tp->tf_edi;
2669 mcp->mc_esi = tp->tf_esi;
2670 mcp->mc_ebp = tp->tf_ebp;
2671 mcp->mc_isp = tp->tf_isp;
2672 mcp->mc_eflags = tp->tf_eflags;
2673 if (flags & GET_MC_CLEAR_RET) {
2674 mcp->mc_eax = 0;
2675 mcp->mc_edx = 0;
2676 mcp->mc_eflags &= ~PSL_C;
2677 } else {
2678 mcp->mc_eax = tp->tf_eax;
2679 mcp->mc_edx = tp->tf_edx;
2680 }
2681 mcp->mc_ebx = tp->tf_ebx;
2682 mcp->mc_ecx = tp->tf_ecx;
2683 mcp->mc_eip = tp->tf_eip;
2684 mcp->mc_cs = tp->tf_cs;
2685 mcp->mc_esp = tp->tf_esp;
2686 mcp->mc_ss = tp->tf_ss;
2687 mcp->mc_len = sizeof(*mcp);
2688 get_fpcontext(td, mcp);
2689 sdp = &td->td_pcb->pcb_fsd;
2690 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2691 sdp = &td->td_pcb->pcb_gsd;
2692 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2693 mcp->mc_flags = 0;
2694 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
2695 return (0);
2696 }
2697
2698 /*
2699 * Set machine context.
2700 *
2701 * However, we don't set any but the user modifiable flags, and we won't
2702 * touch the cs selector.
2703 */
2704 int
2705 set_mcontext(struct thread *td, const mcontext_t *mcp)
2706 {
2707 struct trapframe *tp;
2708 int eflags, ret;
2709
2710 tp = td->td_frame;
2711 if (mcp->mc_len != sizeof(*mcp))
2712 return (EINVAL);
2713 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2714 (tp->tf_eflags & ~PSL_USERCHANGE);
2715 if ((ret = set_fpcontext(td, mcp)) == 0) {
2716 tp->tf_fs = mcp->mc_fs;
2717 tp->tf_es = mcp->mc_es;
2718 tp->tf_ds = mcp->mc_ds;
2719 tp->tf_edi = mcp->mc_edi;
2720 tp->tf_esi = mcp->mc_esi;
2721 tp->tf_ebp = mcp->mc_ebp;
2722 tp->tf_ebx = mcp->mc_ebx;
2723 tp->tf_edx = mcp->mc_edx;
2724 tp->tf_ecx = mcp->mc_ecx;
2725 tp->tf_eax = mcp->mc_eax;
2726 tp->tf_eip = mcp->mc_eip;
2727 tp->tf_eflags = eflags;
2728 tp->tf_esp = mcp->mc_esp;
2729 tp->tf_ss = mcp->mc_ss;
2730 td->td_pcb->pcb_gs = mcp->mc_gs;
2731 ret = 0;
2732 }
2733 return (ret);
2734 }
2735
2736 static void
2737 get_fpcontext(struct thread *td, mcontext_t *mcp)
2738 {
2739
2740 #ifndef DEV_NPX
2741 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2742 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2743 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2744 #else
2745 mcp->mc_ownedfp = npxgetregs(td);
2746 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
2747 sizeof(mcp->mc_fpstate));
2748 mcp->mc_fpformat = npxformat();
2749 #endif
2750 }
2751
2752 static int
2753 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2754 {
2755
2756 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2757 return (0);
2758 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2759 mcp->mc_fpformat != _MC_FPFMT_XMM)
2760 return (EINVAL);
2761 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2762 /* We don't care what state is left in the FPU or PCB. */
2763 fpstate_drop(td);
2764 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2765 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2766 #ifdef DEV_NPX
2767 #ifdef CPU_ENABLE_SSE
2768 if (cpu_fxsr)
2769 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
2770 en_mxcsr &= cpu_mxcsr_mask;
2771 #endif
2772 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
2773 #endif
2774 } else
2775 return (EINVAL);
2776 return (0);
2777 }
2778
2779 static void
2780 fpstate_drop(struct thread *td)
2781 {
2782
2783 critical_enter();
2784 #ifdef DEV_NPX
2785 if (PCPU_GET(fpcurthread) == td)
2786 npxdrop();
2787 #endif
2788 /*
2789 * XXX force a full drop of the npx. The above only drops it if we
2790 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2791 *
2792 * XXX I don't much like npxgetregs()'s semantics of doing a full
2793 * drop. Dropping only to the pcb matches fnsave's behaviour.
2794 * We only need to drop to !PCB_INITDONE in sendsig(). But
2795 * sendsig() is the only caller of npxgetregs()... perhaps we just
2796 * have too many layers.
2797 */
2798 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
2799 PCB_NPXUSERINITDONE);
2800 critical_exit();
2801 }
2802
2803 int
2804 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2805 {
2806 struct pcb *pcb;
2807
2808 if (td == NULL) {
2809 dbregs->dr[0] = rdr0();
2810 dbregs->dr[1] = rdr1();
2811 dbregs->dr[2] = rdr2();
2812 dbregs->dr[3] = rdr3();
2813 dbregs->dr[4] = rdr4();
2814 dbregs->dr[5] = rdr5();
2815 dbregs->dr[6] = rdr6();
2816 dbregs->dr[7] = rdr7();
2817 } else {
2818 pcb = td->td_pcb;
2819 dbregs->dr[0] = pcb->pcb_dr0;
2820 dbregs->dr[1] = pcb->pcb_dr1;
2821 dbregs->dr[2] = pcb->pcb_dr2;
2822 dbregs->dr[3] = pcb->pcb_dr3;
2823 dbregs->dr[4] = 0;
2824 dbregs->dr[5] = 0;
2825 dbregs->dr[6] = pcb->pcb_dr6;
2826 dbregs->dr[7] = pcb->pcb_dr7;
2827 }
2828 return (0);
2829 }
2830
2831 int
2832 set_dbregs(struct thread *td, struct dbreg *dbregs)
2833 {
2834 struct pcb *pcb;
2835 int i;
2836
2837 if (td == NULL) {
2838 load_dr0(dbregs->dr[0]);
2839 load_dr1(dbregs->dr[1]);
2840 load_dr2(dbregs->dr[2]);
2841 load_dr3(dbregs->dr[3]);
2842 load_dr4(dbregs->dr[4]);
2843 load_dr5(dbregs->dr[5]);
2844 load_dr6(dbregs->dr[6]);
2845 load_dr7(dbregs->dr[7]);
2846 } else {
2847 /*
2848 * Don't let an illegal value for dr7 get set. Specifically,
2849 * check for undefined settings. Setting these bit patterns
2850 * result in undefined behaviour and can lead to an unexpected
2851 * TRCTRAP.
2852 */
2853 for (i = 0; i < 4; i++) {
2854 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2855 return (EINVAL);
2856 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
2857 return (EINVAL);
2858 }
2859
2860 pcb = td->td_pcb;
2861
2862 /*
2863 * Don't let a process set a breakpoint that is not within the
2864 * process's address space. If a process could do this, it
2865 * could halt the system by setting a breakpoint in the kernel
2866 * (if ddb was enabled). Thus, we need to check to make sure
2867 * that no breakpoints are being enabled for addresses outside
2868 * process's address space.
2869 *
2870 * XXX - what about when the watched area of the user's
2871 * address space is written into from within the kernel
2872 * ... wouldn't that still cause a breakpoint to be generated
2873 * from within kernel mode?
2874 */
2875
2876 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2877 /* dr0 is enabled */
2878 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2879 return (EINVAL);
2880 }
2881
2882 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2883 /* dr1 is enabled */
2884 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2885 return (EINVAL);
2886 }
2887
2888 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2889 /* dr2 is enabled */
2890 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2891 return (EINVAL);
2892 }
2893
2894 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2895 /* dr3 is enabled */
2896 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2897 return (EINVAL);
2898 }
2899
2900 pcb->pcb_dr0 = dbregs->dr[0];
2901 pcb->pcb_dr1 = dbregs->dr[1];
2902 pcb->pcb_dr2 = dbregs->dr[2];
2903 pcb->pcb_dr3 = dbregs->dr[3];
2904 pcb->pcb_dr6 = dbregs->dr[6];
2905 pcb->pcb_dr7 = dbregs->dr[7];
2906
2907 pcb->pcb_flags |= PCB_DBREGS;
2908 }
2909
2910 return (0);
2911 }
2912
2913 /*
2914 * Return > 0 if a hardware breakpoint has been hit, and the
2915 * breakpoint was in user space. Return 0, otherwise.
2916 */
2917 int
2918 user_dbreg_trap(void)
2919 {
2920 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2921 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2922 int nbp; /* number of breakpoints that triggered */
2923 caddr_t addr[4]; /* breakpoint addresses */
2924 int i;
2925
2926 dr7 = rdr7();
2927 if ((dr7 & 0x000000ff) == 0) {
2928 /*
2929 * all GE and LE bits in the dr7 register are zero,
2930 * thus the trap couldn't have been caused by the
2931 * hardware debug registers
2932 */
2933 return 0;
2934 }
2935
2936 nbp = 0;
2937 dr6 = rdr6();
2938 bp = dr6 & 0x0000000f;
2939
2940 if (!bp) {
2941 /*
2942 * None of the breakpoint bits are set meaning this
2943 * trap was not caused by any of the debug registers
2944 */
2945 return 0;
2946 }
2947
2948 /*
2949 * at least one of the breakpoints were hit, check to see
2950 * which ones and if any of them are user space addresses
2951 */
2952
2953 if (bp & 0x01) {
2954 addr[nbp++] = (caddr_t)rdr0();
2955 }
2956 if (bp & 0x02) {
2957 addr[nbp++] = (caddr_t)rdr1();
2958 }
2959 if (bp & 0x04) {
2960 addr[nbp++] = (caddr_t)rdr2();
2961 }
2962 if (bp & 0x08) {
2963 addr[nbp++] = (caddr_t)rdr3();
2964 }
2965
2966 for (i = 0; i < nbp; i++) {
2967 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2968 /*
2969 * addr[i] is in user space
2970 */
2971 return nbp;
2972 }
2973 }
2974
2975 /*
2976 * None of the breakpoints are in user space.
2977 */
2978 return 0;
2979 }
2980
2981 #ifdef KDB
2982
2983 /*
2984 * Provide inb() and outb() as functions. They are normally only available as
2985 * inline functions, thus cannot be called from the debugger.
2986 */
2987
2988 /* silence compiler warnings */
2989 u_char inb_(u_short);
2990 void outb_(u_short, u_char);
2991
2992 u_char
2993 inb_(u_short port)
2994 {
2995 return inb(port);
2996 }
2997
2998 void
2999 outb_(u_short port, u_char data)
3000 {
3001 outb(port, data);
3002 }
3003
3004 #endif /* KDB */
Cache object: 55372157351e014414e0d47abcd338de
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