1 /*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 */
39
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD: releng/9.2/sys/pc98/pc98/machdep.c 243460 2012-11-23 15:42:25Z nyan $");
42
43 #include "opt_apic.h"
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
47 #include "opt_cpu.h"
48 #include "opt_ddb.h"
49 #include "opt_inet.h"
50 #include "opt_ipx.h"
51 #include "opt_isa.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_npx.h"
56 #include "opt_perfmon.h"
57 #include "opt_kdtrace.h"
58
59 #include <sys/param.h>
60 #include <sys/proc.h>
61 #include <sys/systm.h>
62 #include <sys/bio.h>
63 #include <sys/buf.h>
64 #include <sys/bus.h>
65 #include <sys/callout.h>
66 #include <sys/cons.h>
67 #include <sys/cpu.h>
68 #include <sys/eventhandler.h>
69 #include <sys/exec.h>
70 #include <sys/imgact.h>
71 #include <sys/kdb.h>
72 #include <sys/kernel.h>
73 #include <sys/ktr.h>
74 #include <sys/linker.h>
75 #include <sys/lock.h>
76 #include <sys/malloc.h>
77 #include <sys/memrange.h>
78 #include <sys/msgbuf.h>
79 #include <sys/mutex.h>
80 #include <sys/pcpu.h>
81 #include <sys/ptrace.h>
82 #include <sys/reboot.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
85 #ifdef SMP
86 #include <sys/smp.h>
87 #endif
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
94
95 #include <vm/vm.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
103
104 #ifdef DDB
105 #ifndef KDB
106 #error KDB must be enabled in order for DDB to work!
107 #endif
108 #include <ddb/ddb.h>
109 #include <ddb/db_sym.h>
110 #endif
111
112 #include <pc98/pc98/pc98_machdep.h>
113
114 #include <net/netisr.h>
115
116 #include <machine/bootinfo.h>
117 #include <machine/clock.h>
118 #include <machine/cpu.h>
119 #include <machine/cputypes.h>
120 #include <machine/intr_machdep.h>
121 #include <x86/mca.h>
122 #include <machine/md_var.h>
123 #include <machine/mp_watchdog.h>
124 #include <machine/pc/bios.h>
125 #include <machine/pcb.h>
126 #include <machine/pcb_ext.h>
127 #include <machine/proc.h>
128 #include <machine/reg.h>
129 #include <machine/sigframe.h>
130 #include <machine/specialreg.h>
131 #include <machine/vm86.h>
132 #ifdef PERFMON
133 #include <machine/perfmon.h>
134 #endif
135 #ifdef SMP
136 #include <machine/smp.h>
137 #endif
138
139 #ifdef DEV_APIC
140 #include <machine/apicvar.h>
141 #endif
142
143 #ifdef DEV_ISA
144 #include <x86/isa/icu.h>
145 #endif
146
147 /* Sanity check for __curthread() */
148 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
149
150 extern void init386(int first);
151 extern void dblfault_handler(void);
152
153 extern void printcpuinfo(void); /* XXX header file */
154 extern void finishidentcpu(void);
155 extern void panicifcpuunsupported(void);
156
157 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
158 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
159
160 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
161 #define CPU_ENABLE_SSE
162 #endif
163
164 static void cpu_startup(void *);
165 static void fpstate_drop(struct thread *td);
166 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
167 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
168 #ifdef CPU_ENABLE_SSE
169 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
170 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
171 #endif /* CPU_ENABLE_SSE */
172 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
173
174 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
175 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
176
177 #ifdef DDB
178 extern vm_offset_t ksym_start, ksym_end;
179 #endif
180
181 int _udatasel, _ucodesel;
182 u_int basemem;
183
184 static int ispc98 = 1;
185 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
186
187 int cold = 1;
188
189 #ifdef COMPAT_43
190 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
191 #endif
192 #ifdef COMPAT_FREEBSD4
193 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
194 #endif
195
196 long Maxmem = 0;
197 long realmem = 0;
198
199 /*
200 * The number of PHYSMAP entries must be one less than the number of
201 * PHYSSEG entries because the PHYSMAP entry that spans the largest
202 * physical address that is accessible by ISA DMA is split into two
203 * PHYSSEG entries.
204 */
205 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
206
207 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
208 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
209
210 /* must be 2 less so 0 0 can signal end of chunks */
211 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
212 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
213
214 struct kva_md_info kmi;
215
216 static struct trapframe proc0_tf;
217 struct pcpu __pcpu[MAXCPU];
218
219 struct mtx icu_lock;
220
221 struct mem_range_softc mem_range_softc;
222
223 static void
224 cpu_startup(dummy)
225 void *dummy;
226 {
227 uintmax_t memsize;
228
229 /*
230 * Good {morning,afternoon,evening,night}.
231 */
232 startrtclock();
233 printcpuinfo();
234 panicifcpuunsupported();
235 #ifdef PERFMON
236 perfmon_init();
237 #endif
238 realmem = Maxmem;
239
240 /*
241 * Display physical memory.
242 */
243 memsize = ptoa((uintmax_t)Maxmem);
244 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
245
246 /*
247 * Display any holes after the first chunk of extended memory.
248 */
249 if (bootverbose) {
250 int indx;
251
252 printf("Physical memory chunk(s):\n");
253 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
254 vm_paddr_t size;
255
256 size = phys_avail[indx + 1] - phys_avail[indx];
257 printf(
258 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
259 (uintmax_t)phys_avail[indx],
260 (uintmax_t)phys_avail[indx + 1] - 1,
261 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
262 }
263 }
264
265 vm_ksubmap_init(&kmi);
266
267 printf("avail memory = %ju (%ju MB)\n",
268 ptoa((uintmax_t)cnt.v_free_count),
269 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
270
271 /*
272 * Set up buffers, so they can be used to read disk labels.
273 */
274 bufinit();
275 vm_pager_bufferinit();
276 cpu_setregs();
277
278 /*
279 * Add BSP as an interrupt target.
280 */
281 intr_add_cpu(0);
282 }
283
284 /*
285 * Send an interrupt to process.
286 *
287 * Stack is set up to allow sigcode stored
288 * at top to call routine, followed by kcall
289 * to sigreturn routine below. After sigreturn
290 * resets the signal mask, the stack, and the
291 * frame pointer, it returns to the user
292 * specified pc, psl.
293 */
294 #ifdef COMPAT_43
295 static void
296 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
297 {
298 struct osigframe sf, *fp;
299 struct proc *p;
300 struct thread *td;
301 struct sigacts *psp;
302 struct trapframe *regs;
303 int sig;
304 int oonstack;
305
306 td = curthread;
307 p = td->td_proc;
308 PROC_LOCK_ASSERT(p, MA_OWNED);
309 sig = ksi->ksi_signo;
310 psp = p->p_sigacts;
311 mtx_assert(&psp->ps_mtx, MA_OWNED);
312 regs = td->td_frame;
313 oonstack = sigonstack(regs->tf_esp);
314
315 /* Allocate space for the signal handler context. */
316 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
317 SIGISMEMBER(psp->ps_sigonstack, sig)) {
318 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
319 td->td_sigstk.ss_size - sizeof(struct osigframe));
320 #if defined(COMPAT_43)
321 td->td_sigstk.ss_flags |= SS_ONSTACK;
322 #endif
323 } else
324 fp = (struct osigframe *)regs->tf_esp - 1;
325
326 /* Translate the signal if appropriate. */
327 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
328 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
329
330 /* Build the argument list for the signal handler. */
331 sf.sf_signum = sig;
332 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
333 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
334 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
335 /* Signal handler installed with SA_SIGINFO. */
336 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
337 sf.sf_siginfo.si_signo = sig;
338 sf.sf_siginfo.si_code = ksi->ksi_code;
339 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
340 sf.sf_addr = 0;
341 } else {
342 /* Old FreeBSD-style arguments. */
343 sf.sf_arg2 = ksi->ksi_code;
344 sf.sf_addr = (register_t)ksi->ksi_addr;
345 sf.sf_ahu.sf_handler = catcher;
346 }
347 mtx_unlock(&psp->ps_mtx);
348 PROC_UNLOCK(p);
349
350 /* Save most if not all of trap frame. */
351 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
352 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
353 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
354 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
355 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
356 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
357 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
358 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
359 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
360 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
361 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
362 sf.sf_siginfo.si_sc.sc_gs = rgs();
363 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
364
365 /* Build the signal context to be used by osigreturn(). */
366 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
367 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
368 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
369 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
370 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
371 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
372 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
373 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
374
375 /*
376 * If we're a vm86 process, we want to save the segment registers.
377 * We also change eflags to be our emulated eflags, not the actual
378 * eflags.
379 */
380 if (regs->tf_eflags & PSL_VM) {
381 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
382 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
383 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
384
385 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
386 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
387 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
388 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
389
390 if (vm86->vm86_has_vme == 0)
391 sf.sf_siginfo.si_sc.sc_ps =
392 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
393 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
394
395 /* See sendsig() for comments. */
396 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
397 }
398
399 /*
400 * Copy the sigframe out to the user's stack.
401 */
402 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
403 #ifdef DEBUG
404 printf("process %ld has trashed its stack\n", (long)p->p_pid);
405 #endif
406 PROC_LOCK(p);
407 sigexit(td, SIGILL);
408 }
409
410 regs->tf_esp = (int)fp;
411 if (p->p_sysent->sv_sigcode_base != 0) {
412 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
413 szosigcode;
414 } else {
415 /* a.out sysentvec does not use shared page */
416 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
417 }
418 regs->tf_eflags &= ~(PSL_T | PSL_D);
419 regs->tf_cs = _ucodesel;
420 regs->tf_ds = _udatasel;
421 regs->tf_es = _udatasel;
422 regs->tf_fs = _udatasel;
423 load_gs(_udatasel);
424 regs->tf_ss = _udatasel;
425 PROC_LOCK(p);
426 mtx_lock(&psp->ps_mtx);
427 }
428 #endif /* COMPAT_43 */
429
430 #ifdef COMPAT_FREEBSD4
431 static void
432 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
433 {
434 struct sigframe4 sf, *sfp;
435 struct proc *p;
436 struct thread *td;
437 struct sigacts *psp;
438 struct trapframe *regs;
439 int sig;
440 int oonstack;
441
442 td = curthread;
443 p = td->td_proc;
444 PROC_LOCK_ASSERT(p, MA_OWNED);
445 sig = ksi->ksi_signo;
446 psp = p->p_sigacts;
447 mtx_assert(&psp->ps_mtx, MA_OWNED);
448 regs = td->td_frame;
449 oonstack = sigonstack(regs->tf_esp);
450
451 /* Save user context. */
452 bzero(&sf, sizeof(sf));
453 sf.sf_uc.uc_sigmask = *mask;
454 sf.sf_uc.uc_stack = td->td_sigstk;
455 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
456 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
457 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
458 sf.sf_uc.uc_mcontext.mc_gs = rgs();
459 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
460 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
461 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
462 bzero(sf.sf_uc.uc_mcontext.__spare__,
463 sizeof(sf.sf_uc.uc_mcontext.__spare__));
464 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
465
466 /* Allocate space for the signal handler context. */
467 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
468 SIGISMEMBER(psp->ps_sigonstack, sig)) {
469 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
470 td->td_sigstk.ss_size - sizeof(struct sigframe4));
471 #if defined(COMPAT_43)
472 td->td_sigstk.ss_flags |= SS_ONSTACK;
473 #endif
474 } else
475 sfp = (struct sigframe4 *)regs->tf_esp - 1;
476
477 /* Translate the signal if appropriate. */
478 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
479 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
480
481 /* Build the argument list for the signal handler. */
482 sf.sf_signum = sig;
483 sf.sf_ucontext = (register_t)&sfp->sf_uc;
484 bzero(&sf.sf_si, sizeof(sf.sf_si));
485 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
486 /* Signal handler installed with SA_SIGINFO. */
487 sf.sf_siginfo = (register_t)&sfp->sf_si;
488 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
489
490 /* Fill in POSIX parts */
491 sf.sf_si.si_signo = sig;
492 sf.sf_si.si_code = ksi->ksi_code;
493 sf.sf_si.si_addr = ksi->ksi_addr;
494 } else {
495 /* Old FreeBSD-style arguments. */
496 sf.sf_siginfo = ksi->ksi_code;
497 sf.sf_addr = (register_t)ksi->ksi_addr;
498 sf.sf_ahu.sf_handler = catcher;
499 }
500 mtx_unlock(&psp->ps_mtx);
501 PROC_UNLOCK(p);
502
503 /*
504 * If we're a vm86 process, we want to save the segment registers.
505 * We also change eflags to be our emulated eflags, not the actual
506 * eflags.
507 */
508 if (regs->tf_eflags & PSL_VM) {
509 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
510 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
511
512 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
513 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
514 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
515 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
516
517 if (vm86->vm86_has_vme == 0)
518 sf.sf_uc.uc_mcontext.mc_eflags =
519 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
520 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
521
522 /*
523 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
524 * syscalls made by the signal handler. This just avoids
525 * wasting time for our lazy fixup of such faults. PSL_NT
526 * does nothing in vm86 mode, but vm86 programs can set it
527 * almost legitimately in probes for old cpu types.
528 */
529 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
530 }
531
532 /*
533 * Copy the sigframe out to the user's stack.
534 */
535 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
536 #ifdef DEBUG
537 printf("process %ld has trashed its stack\n", (long)p->p_pid);
538 #endif
539 PROC_LOCK(p);
540 sigexit(td, SIGILL);
541 }
542
543 regs->tf_esp = (int)sfp;
544 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
545 szfreebsd4_sigcode;
546 regs->tf_eflags &= ~(PSL_T | PSL_D);
547 regs->tf_cs = _ucodesel;
548 regs->tf_ds = _udatasel;
549 regs->tf_es = _udatasel;
550 regs->tf_fs = _udatasel;
551 regs->tf_ss = _udatasel;
552 PROC_LOCK(p);
553 mtx_lock(&psp->ps_mtx);
554 }
555 #endif /* COMPAT_FREEBSD4 */
556
557 void
558 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
559 {
560 struct sigframe sf, *sfp;
561 struct proc *p;
562 struct thread *td;
563 struct sigacts *psp;
564 char *sp;
565 struct trapframe *regs;
566 struct segment_descriptor *sdp;
567 int sig;
568 int oonstack;
569
570 td = curthread;
571 p = td->td_proc;
572 PROC_LOCK_ASSERT(p, MA_OWNED);
573 sig = ksi->ksi_signo;
574 psp = p->p_sigacts;
575 mtx_assert(&psp->ps_mtx, MA_OWNED);
576 #ifdef COMPAT_FREEBSD4
577 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
578 freebsd4_sendsig(catcher, ksi, mask);
579 return;
580 }
581 #endif
582 #ifdef COMPAT_43
583 if (SIGISMEMBER(psp->ps_osigset, sig)) {
584 osendsig(catcher, ksi, mask);
585 return;
586 }
587 #endif
588 regs = td->td_frame;
589 oonstack = sigonstack(regs->tf_esp);
590
591 /* Save user context. */
592 bzero(&sf, sizeof(sf));
593 sf.sf_uc.uc_sigmask = *mask;
594 sf.sf_uc.uc_stack = td->td_sigstk;
595 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
596 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
597 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
598 sf.sf_uc.uc_mcontext.mc_gs = rgs();
599 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
600 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
601 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
602 fpstate_drop(td);
603 /*
604 * Unconditionally fill the fsbase and gsbase into the mcontext.
605 */
606 sdp = &td->td_pcb->pcb_fsd;
607 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
608 sdp->sd_lobase;
609 sdp = &td->td_pcb->pcb_gsd;
610 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
611 sdp->sd_lobase;
612 sf.sf_uc.uc_mcontext.mc_flags = 0;
613 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
614 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
615 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
616
617 /* Allocate space for the signal handler context. */
618 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
619 SIGISMEMBER(psp->ps_sigonstack, sig)) {
620 sp = td->td_sigstk.ss_sp +
621 td->td_sigstk.ss_size - sizeof(struct sigframe);
622 #if defined(COMPAT_43)
623 td->td_sigstk.ss_flags |= SS_ONSTACK;
624 #endif
625 } else
626 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
627 /* Align to 16 bytes. */
628 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
629
630 /* Translate the signal if appropriate. */
631 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
632 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
633
634 /* Build the argument list for the signal handler. */
635 sf.sf_signum = sig;
636 sf.sf_ucontext = (register_t)&sfp->sf_uc;
637 bzero(&sf.sf_si, sizeof(sf.sf_si));
638 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
639 /* Signal handler installed with SA_SIGINFO. */
640 sf.sf_siginfo = (register_t)&sfp->sf_si;
641 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
642
643 /* Fill in POSIX parts */
644 sf.sf_si = ksi->ksi_info;
645 sf.sf_si.si_signo = sig; /* maybe a translated signal */
646 } else {
647 /* Old FreeBSD-style arguments. */
648 sf.sf_siginfo = ksi->ksi_code;
649 sf.sf_addr = (register_t)ksi->ksi_addr;
650 sf.sf_ahu.sf_handler = catcher;
651 }
652 mtx_unlock(&psp->ps_mtx);
653 PROC_UNLOCK(p);
654
655 /*
656 * If we're a vm86 process, we want to save the segment registers.
657 * We also change eflags to be our emulated eflags, not the actual
658 * eflags.
659 */
660 if (regs->tf_eflags & PSL_VM) {
661 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
662 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
663
664 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
665 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
666 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
667 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
668
669 if (vm86->vm86_has_vme == 0)
670 sf.sf_uc.uc_mcontext.mc_eflags =
671 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
672 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
673
674 /*
675 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
676 * syscalls made by the signal handler. This just avoids
677 * wasting time for our lazy fixup of such faults. PSL_NT
678 * does nothing in vm86 mode, but vm86 programs can set it
679 * almost legitimately in probes for old cpu types.
680 */
681 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
682 }
683
684 /*
685 * Copy the sigframe out to the user's stack.
686 */
687 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
688 #ifdef DEBUG
689 printf("process %ld has trashed its stack\n", (long)p->p_pid);
690 #endif
691 PROC_LOCK(p);
692 sigexit(td, SIGILL);
693 }
694
695 regs->tf_esp = (int)sfp;
696 regs->tf_eip = p->p_sysent->sv_sigcode_base;
697 regs->tf_eflags &= ~(PSL_T | PSL_D);
698 regs->tf_cs = _ucodesel;
699 regs->tf_ds = _udatasel;
700 regs->tf_es = _udatasel;
701 regs->tf_fs = _udatasel;
702 regs->tf_ss = _udatasel;
703 PROC_LOCK(p);
704 mtx_lock(&psp->ps_mtx);
705 }
706
707 /*
708 * System call to cleanup state after a signal
709 * has been taken. Reset signal mask and
710 * stack state from context left by sendsig (above).
711 * Return to previous pc and psl as specified by
712 * context left by sendsig. Check carefully to
713 * make sure that the user has not modified the
714 * state to gain improper privileges.
715 *
716 * MPSAFE
717 */
718 #ifdef COMPAT_43
719 int
720 osigreturn(td, uap)
721 struct thread *td;
722 struct osigreturn_args /* {
723 struct osigcontext *sigcntxp;
724 } */ *uap;
725 {
726 struct osigcontext sc;
727 struct trapframe *regs;
728 struct osigcontext *scp;
729 int eflags, error;
730 ksiginfo_t ksi;
731
732 regs = td->td_frame;
733 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
734 if (error != 0)
735 return (error);
736 scp = ≻
737 eflags = scp->sc_ps;
738 if (eflags & PSL_VM) {
739 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
740 struct vm86_kernel *vm86;
741
742 /*
743 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
744 * set up the vm86 area, and we can't enter vm86 mode.
745 */
746 if (td->td_pcb->pcb_ext == 0)
747 return (EINVAL);
748 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
749 if (vm86->vm86_inited == 0)
750 return (EINVAL);
751
752 /* Go back to user mode if both flags are set. */
753 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
754 ksiginfo_init_trap(&ksi);
755 ksi.ksi_signo = SIGBUS;
756 ksi.ksi_code = BUS_OBJERR;
757 ksi.ksi_addr = (void *)regs->tf_eip;
758 trapsignal(td, &ksi);
759 }
760
761 if (vm86->vm86_has_vme) {
762 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
763 (eflags & VME_USERCHANGE) | PSL_VM;
764 } else {
765 vm86->vm86_eflags = eflags; /* save VIF, VIP */
766 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
767 (eflags & VM_USERCHANGE) | PSL_VM;
768 }
769 tf->tf_vm86_ds = scp->sc_ds;
770 tf->tf_vm86_es = scp->sc_es;
771 tf->tf_vm86_fs = scp->sc_fs;
772 tf->tf_vm86_gs = scp->sc_gs;
773 tf->tf_ds = _udatasel;
774 tf->tf_es = _udatasel;
775 tf->tf_fs = _udatasel;
776 } else {
777 /*
778 * Don't allow users to change privileged or reserved flags.
779 */
780 /*
781 * XXX do allow users to change the privileged flag PSL_RF.
782 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
783 * should sometimes set it there too. tf_eflags is kept in
784 * the signal context during signal handling and there is no
785 * other place to remember it, so the PSL_RF bit may be
786 * corrupted by the signal handler without us knowing.
787 * Corruption of the PSL_RF bit at worst causes one more or
788 * one less debugger trap, so allowing it is fairly harmless.
789 */
790 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
791 return (EINVAL);
792 }
793
794 /*
795 * Don't allow users to load a valid privileged %cs. Let the
796 * hardware check for invalid selectors, excess privilege in
797 * other selectors, invalid %eip's and invalid %esp's.
798 */
799 if (!CS_SECURE(scp->sc_cs)) {
800 ksiginfo_init_trap(&ksi);
801 ksi.ksi_signo = SIGBUS;
802 ksi.ksi_code = BUS_OBJERR;
803 ksi.ksi_trapno = T_PROTFLT;
804 ksi.ksi_addr = (void *)regs->tf_eip;
805 trapsignal(td, &ksi);
806 return (EINVAL);
807 }
808 regs->tf_ds = scp->sc_ds;
809 regs->tf_es = scp->sc_es;
810 regs->tf_fs = scp->sc_fs;
811 }
812
813 /* Restore remaining registers. */
814 regs->tf_eax = scp->sc_eax;
815 regs->tf_ebx = scp->sc_ebx;
816 regs->tf_ecx = scp->sc_ecx;
817 regs->tf_edx = scp->sc_edx;
818 regs->tf_esi = scp->sc_esi;
819 regs->tf_edi = scp->sc_edi;
820 regs->tf_cs = scp->sc_cs;
821 regs->tf_ss = scp->sc_ss;
822 regs->tf_isp = scp->sc_isp;
823 regs->tf_ebp = scp->sc_fp;
824 regs->tf_esp = scp->sc_sp;
825 regs->tf_eip = scp->sc_pc;
826 regs->tf_eflags = eflags;
827
828 #if defined(COMPAT_43)
829 if (scp->sc_onstack & 1)
830 td->td_sigstk.ss_flags |= SS_ONSTACK;
831 else
832 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
833 #endif
834 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
835 SIGPROCMASK_OLD);
836 return (EJUSTRETURN);
837 }
838 #endif /* COMPAT_43 */
839
840 #ifdef COMPAT_FREEBSD4
841 /*
842 * MPSAFE
843 */
844 int
845 freebsd4_sigreturn(td, uap)
846 struct thread *td;
847 struct freebsd4_sigreturn_args /* {
848 const ucontext4 *sigcntxp;
849 } */ *uap;
850 {
851 struct ucontext4 uc;
852 struct trapframe *regs;
853 struct ucontext4 *ucp;
854 int cs, eflags, error;
855 ksiginfo_t ksi;
856
857 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
858 if (error != 0)
859 return (error);
860 ucp = &uc;
861 regs = td->td_frame;
862 eflags = ucp->uc_mcontext.mc_eflags;
863 if (eflags & PSL_VM) {
864 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
865 struct vm86_kernel *vm86;
866
867 /*
868 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
869 * set up the vm86 area, and we can't enter vm86 mode.
870 */
871 if (td->td_pcb->pcb_ext == 0)
872 return (EINVAL);
873 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
874 if (vm86->vm86_inited == 0)
875 return (EINVAL);
876
877 /* Go back to user mode if both flags are set. */
878 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
879 ksiginfo_init_trap(&ksi);
880 ksi.ksi_signo = SIGBUS;
881 ksi.ksi_code = BUS_OBJERR;
882 ksi.ksi_addr = (void *)regs->tf_eip;
883 trapsignal(td, &ksi);
884 }
885 if (vm86->vm86_has_vme) {
886 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
887 (eflags & VME_USERCHANGE) | PSL_VM;
888 } else {
889 vm86->vm86_eflags = eflags; /* save VIF, VIP */
890 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
891 (eflags & VM_USERCHANGE) | PSL_VM;
892 }
893 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
894 tf->tf_eflags = eflags;
895 tf->tf_vm86_ds = tf->tf_ds;
896 tf->tf_vm86_es = tf->tf_es;
897 tf->tf_vm86_fs = tf->tf_fs;
898 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
899 tf->tf_ds = _udatasel;
900 tf->tf_es = _udatasel;
901 tf->tf_fs = _udatasel;
902 } else {
903 /*
904 * Don't allow users to change privileged or reserved flags.
905 */
906 /*
907 * XXX do allow users to change the privileged flag PSL_RF.
908 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
909 * should sometimes set it there too. tf_eflags is kept in
910 * the signal context during signal handling and there is no
911 * other place to remember it, so the PSL_RF bit may be
912 * corrupted by the signal handler without us knowing.
913 * Corruption of the PSL_RF bit at worst causes one more or
914 * one less debugger trap, so allowing it is fairly harmless.
915 */
916 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
917 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
918 td->td_proc->p_pid, td->td_name, eflags);
919 return (EINVAL);
920 }
921
922 /*
923 * Don't allow users to load a valid privileged %cs. Let the
924 * hardware check for invalid selectors, excess privilege in
925 * other selectors, invalid %eip's and invalid %esp's.
926 */
927 cs = ucp->uc_mcontext.mc_cs;
928 if (!CS_SECURE(cs)) {
929 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
930 td->td_proc->p_pid, td->td_name, cs);
931 ksiginfo_init_trap(&ksi);
932 ksi.ksi_signo = SIGBUS;
933 ksi.ksi_code = BUS_OBJERR;
934 ksi.ksi_trapno = T_PROTFLT;
935 ksi.ksi_addr = (void *)regs->tf_eip;
936 trapsignal(td, &ksi);
937 return (EINVAL);
938 }
939
940 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
941 }
942
943 #if defined(COMPAT_43)
944 if (ucp->uc_mcontext.mc_onstack & 1)
945 td->td_sigstk.ss_flags |= SS_ONSTACK;
946 else
947 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
948 #endif
949 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
950 return (EJUSTRETURN);
951 }
952 #endif /* COMPAT_FREEBSD4 */
953
954 /*
955 * MPSAFE
956 */
957 int
958 sys_sigreturn(td, uap)
959 struct thread *td;
960 struct sigreturn_args /* {
961 const struct __ucontext *sigcntxp;
962 } */ *uap;
963 {
964 ucontext_t uc;
965 struct trapframe *regs;
966 ucontext_t *ucp;
967 int cs, eflags, error, ret;
968 ksiginfo_t ksi;
969
970 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
971 if (error != 0)
972 return (error);
973 ucp = &uc;
974 regs = td->td_frame;
975 eflags = ucp->uc_mcontext.mc_eflags;
976 if (eflags & PSL_VM) {
977 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
978 struct vm86_kernel *vm86;
979
980 /*
981 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
982 * set up the vm86 area, and we can't enter vm86 mode.
983 */
984 if (td->td_pcb->pcb_ext == 0)
985 return (EINVAL);
986 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
987 if (vm86->vm86_inited == 0)
988 return (EINVAL);
989
990 /* Go back to user mode if both flags are set. */
991 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
992 ksiginfo_init_trap(&ksi);
993 ksi.ksi_signo = SIGBUS;
994 ksi.ksi_code = BUS_OBJERR;
995 ksi.ksi_addr = (void *)regs->tf_eip;
996 trapsignal(td, &ksi);
997 }
998
999 if (vm86->vm86_has_vme) {
1000 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1001 (eflags & VME_USERCHANGE) | PSL_VM;
1002 } else {
1003 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1004 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1005 (eflags & VM_USERCHANGE) | PSL_VM;
1006 }
1007 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1008 tf->tf_eflags = eflags;
1009 tf->tf_vm86_ds = tf->tf_ds;
1010 tf->tf_vm86_es = tf->tf_es;
1011 tf->tf_vm86_fs = tf->tf_fs;
1012 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1013 tf->tf_ds = _udatasel;
1014 tf->tf_es = _udatasel;
1015 tf->tf_fs = _udatasel;
1016 } else {
1017 /*
1018 * Don't allow users to change privileged or reserved flags.
1019 */
1020 /*
1021 * XXX do allow users to change the privileged flag PSL_RF.
1022 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1023 * should sometimes set it there too. tf_eflags is kept in
1024 * the signal context during signal handling and there is no
1025 * other place to remember it, so the PSL_RF bit may be
1026 * corrupted by the signal handler without us knowing.
1027 * Corruption of the PSL_RF bit at worst causes one more or
1028 * one less debugger trap, so allowing it is fairly harmless.
1029 */
1030 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1031 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1032 td->td_proc->p_pid, td->td_name, eflags);
1033 return (EINVAL);
1034 }
1035
1036 /*
1037 * Don't allow users to load a valid privileged %cs. Let the
1038 * hardware check for invalid selectors, excess privilege in
1039 * other selectors, invalid %eip's and invalid %esp's.
1040 */
1041 cs = ucp->uc_mcontext.mc_cs;
1042 if (!CS_SECURE(cs)) {
1043 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1044 td->td_proc->p_pid, td->td_name, cs);
1045 ksiginfo_init_trap(&ksi);
1046 ksi.ksi_signo = SIGBUS;
1047 ksi.ksi_code = BUS_OBJERR;
1048 ksi.ksi_trapno = T_PROTFLT;
1049 ksi.ksi_addr = (void *)regs->tf_eip;
1050 trapsignal(td, &ksi);
1051 return (EINVAL);
1052 }
1053
1054 ret = set_fpcontext(td, &ucp->uc_mcontext);
1055 if (ret != 0)
1056 return (ret);
1057 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1058 }
1059
1060 #if defined(COMPAT_43)
1061 if (ucp->uc_mcontext.mc_onstack & 1)
1062 td->td_sigstk.ss_flags |= SS_ONSTACK;
1063 else
1064 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1065 #endif
1066
1067 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1068 return (EJUSTRETURN);
1069 }
1070
1071 /*
1072 * Machine dependent boot() routine
1073 *
1074 * I haven't seen anything to put here yet
1075 * Possibly some stuff might be grafted back here from boot()
1076 */
1077 void
1078 cpu_boot(int howto)
1079 {
1080 }
1081
1082 /*
1083 * Flush the D-cache for non-DMA I/O so that the I-cache can
1084 * be made coherent later.
1085 */
1086 void
1087 cpu_flush_dcache(void *ptr, size_t len)
1088 {
1089 /* Not applicable */
1090 }
1091
1092 /* Get current clock frequency for the given cpu id. */
1093 int
1094 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1095 {
1096 uint64_t tsc1, tsc2;
1097 register_t reg;
1098
1099 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1100 return (EINVAL);
1101 if ((cpu_feature & CPUID_TSC) == 0)
1102 return (EOPNOTSUPP);
1103
1104 #ifdef SMP
1105 if (smp_cpus > 1) {
1106 /* Schedule ourselves on the indicated cpu. */
1107 thread_lock(curthread);
1108 sched_bind(curthread, cpu_id);
1109 thread_unlock(curthread);
1110 }
1111 #endif
1112
1113 /* Calibrate by measuring a short delay. */
1114 reg = intr_disable();
1115 tsc1 = rdtsc();
1116 DELAY(1000);
1117 tsc2 = rdtsc();
1118 intr_restore(reg);
1119 *rate = (tsc2 - tsc1) * 1000;
1120
1121 #ifdef SMP
1122 if (smp_cpus > 1) {
1123 thread_lock(curthread);
1124 sched_unbind(curthread);
1125 thread_unlock(curthread);
1126 }
1127 #endif
1128
1129 return (0);
1130 }
1131
1132
1133 /*
1134 * Shutdown the CPU as much as possible
1135 */
1136 void
1137 cpu_halt(void)
1138 {
1139 for (;;)
1140 __asm__ ("hlt");
1141 }
1142
1143 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1144 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1145 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1146 0, "Use MONITOR/MWAIT for short idle");
1147
1148 #define STATE_RUNNING 0x0
1149 #define STATE_MWAIT 0x1
1150 #define STATE_SLEEPING 0x2
1151
1152 static void
1153 cpu_idle_hlt(int busy)
1154 {
1155 int *state;
1156
1157 state = (int *)PCPU_PTR(monitorbuf);
1158 *state = STATE_SLEEPING;
1159 /*
1160 * We must absolutely guarentee that hlt is the next instruction
1161 * after sti or we introduce a timing window.
1162 */
1163 disable_intr();
1164 if (sched_runnable())
1165 enable_intr();
1166 else
1167 __asm __volatile("sti; hlt");
1168 *state = STATE_RUNNING;
1169 }
1170
1171 /*
1172 * MWAIT cpu power states. Lower 4 bits are sub-states.
1173 */
1174 #define MWAIT_C0 0xf0
1175 #define MWAIT_C1 0x00
1176 #define MWAIT_C2 0x10
1177 #define MWAIT_C3 0x20
1178 #define MWAIT_C4 0x30
1179
1180 static void
1181 cpu_idle_mwait(int busy)
1182 {
1183 int *state;
1184
1185 state = (int *)PCPU_PTR(monitorbuf);
1186 *state = STATE_MWAIT;
1187 if (!sched_runnable()) {
1188 cpu_monitor(state, 0, 0);
1189 if (*state == STATE_MWAIT)
1190 cpu_mwait(0, MWAIT_C1);
1191 }
1192 *state = STATE_RUNNING;
1193 }
1194
1195 static void
1196 cpu_idle_spin(int busy)
1197 {
1198 int *state;
1199 int i;
1200
1201 state = (int *)PCPU_PTR(monitorbuf);
1202 *state = STATE_RUNNING;
1203 for (i = 0; i < 1000; i++) {
1204 if (sched_runnable())
1205 return;
1206 cpu_spinwait();
1207 }
1208 }
1209
1210 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1211
1212 void
1213 cpu_idle(int busy)
1214 {
1215
1216 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1217 busy, curcpu);
1218 #if defined(MP_WATCHDOG)
1219 ap_watchdog(PCPU_GET(cpuid));
1220 #endif
1221 /* If we are busy - try to use fast methods. */
1222 if (busy) {
1223 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1224 cpu_idle_mwait(busy);
1225 goto out;
1226 }
1227 }
1228
1229 /* If we have time - switch timers into idle mode. */
1230 if (!busy) {
1231 critical_enter();
1232 cpu_idleclock();
1233 }
1234
1235 /* Call main idle method. */
1236 cpu_idle_fn(busy);
1237
1238 /* Switch timers mack into active mode. */
1239 if (!busy) {
1240 cpu_activeclock();
1241 critical_exit();
1242 }
1243 out:
1244 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1245 busy, curcpu);
1246 }
1247
1248 int
1249 cpu_idle_wakeup(int cpu)
1250 {
1251 struct pcpu *pcpu;
1252 int *state;
1253
1254 pcpu = pcpu_find(cpu);
1255 state = (int *)pcpu->pc_monitorbuf;
1256 /*
1257 * This doesn't need to be atomic since missing the race will
1258 * simply result in unnecessary IPIs.
1259 */
1260 if (*state == STATE_SLEEPING)
1261 return (0);
1262 if (*state == STATE_MWAIT)
1263 *state = STATE_RUNNING;
1264 return (1);
1265 }
1266
1267 /*
1268 * Ordered by speed/power consumption.
1269 */
1270 struct {
1271 void *id_fn;
1272 char *id_name;
1273 } idle_tbl[] = {
1274 { cpu_idle_spin, "spin" },
1275 { cpu_idle_mwait, "mwait" },
1276 { cpu_idle_hlt, "hlt" },
1277 { NULL, NULL }
1278 };
1279
1280 static int
1281 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1282 {
1283 char *avail, *p;
1284 int error;
1285 int i;
1286
1287 avail = malloc(256, M_TEMP, M_WAITOK);
1288 p = avail;
1289 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1290 if (strstr(idle_tbl[i].id_name, "mwait") &&
1291 (cpu_feature2 & CPUID2_MON) == 0)
1292 continue;
1293 p += sprintf(p, "%s%s", p != avail ? ", " : "",
1294 idle_tbl[i].id_name);
1295 }
1296 error = sysctl_handle_string(oidp, avail, 0, req);
1297 free(avail, M_TEMP);
1298 return (error);
1299 }
1300
1301 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1302 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1303
1304 static int
1305 idle_sysctl(SYSCTL_HANDLER_ARGS)
1306 {
1307 char buf[16];
1308 int error;
1309 char *p;
1310 int i;
1311
1312 p = "unknown";
1313 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1314 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1315 p = idle_tbl[i].id_name;
1316 break;
1317 }
1318 }
1319 strncpy(buf, p, sizeof(buf));
1320 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1321 if (error != 0 || req->newptr == NULL)
1322 return (error);
1323 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1324 if (strstr(idle_tbl[i].id_name, "mwait") &&
1325 (cpu_feature2 & CPUID2_MON) == 0)
1326 continue;
1327 if (strcmp(idle_tbl[i].id_name, buf))
1328 continue;
1329 cpu_idle_fn = idle_tbl[i].id_fn;
1330 return (0);
1331 }
1332 return (EINVAL);
1333 }
1334
1335 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1336 idle_sysctl, "A", "currently selected idle function");
1337
1338 uint64_t (*atomic_load_acq_64)(volatile uint64_t *) =
1339 atomic_load_acq_64_i386;
1340 void (*atomic_store_rel_64)(volatile uint64_t *, uint64_t) =
1341 atomic_store_rel_64_i386;
1342
1343 static void
1344 cpu_probe_cmpxchg8b(void)
1345 {
1346
1347 if ((cpu_feature & CPUID_CX8) != 0) {
1348 atomic_load_acq_64 = atomic_load_acq_64_i586;
1349 atomic_store_rel_64 = atomic_store_rel_64_i586;
1350 }
1351 }
1352
1353 /*
1354 * Reset registers to default values on exec.
1355 */
1356 void
1357 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1358 {
1359 struct trapframe *regs = td->td_frame;
1360 struct pcb *pcb = td->td_pcb;
1361
1362 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1363 pcb->pcb_gs = _udatasel;
1364 load_gs(_udatasel);
1365
1366 mtx_lock_spin(&dt_lock);
1367 if (td->td_proc->p_md.md_ldt)
1368 user_ldt_free(td);
1369 else
1370 mtx_unlock_spin(&dt_lock);
1371
1372 bzero((char *)regs, sizeof(struct trapframe));
1373 regs->tf_eip = imgp->entry_addr;
1374 regs->tf_esp = stack;
1375 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1376 regs->tf_ss = _udatasel;
1377 regs->tf_ds = _udatasel;
1378 regs->tf_es = _udatasel;
1379 regs->tf_fs = _udatasel;
1380 regs->tf_cs = _ucodesel;
1381
1382 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1383 regs->tf_ebx = imgp->ps_strings;
1384
1385 /*
1386 * Reset the hardware debug registers if they were in use.
1387 * They won't have any meaning for the newly exec'd process.
1388 */
1389 if (pcb->pcb_flags & PCB_DBREGS) {
1390 pcb->pcb_dr0 = 0;
1391 pcb->pcb_dr1 = 0;
1392 pcb->pcb_dr2 = 0;
1393 pcb->pcb_dr3 = 0;
1394 pcb->pcb_dr6 = 0;
1395 pcb->pcb_dr7 = 0;
1396 if (pcb == curpcb) {
1397 /*
1398 * Clear the debug registers on the running
1399 * CPU, otherwise they will end up affecting
1400 * the next process we switch to.
1401 */
1402 reset_dbregs();
1403 }
1404 pcb->pcb_flags &= ~PCB_DBREGS;
1405 }
1406
1407 /*
1408 * Initialize the math emulator (if any) for the current process.
1409 * Actually, just clear the bit that says that the emulator has
1410 * been initialized. Initialization is delayed until the process
1411 * traps to the emulator (if it is done at all) mainly because
1412 * emulators don't provide an entry point for initialization.
1413 */
1414 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1415 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1416
1417 /*
1418 * Drop the FP state if we hold it, so that the process gets a
1419 * clean FP state if it uses the FPU again.
1420 */
1421 fpstate_drop(td);
1422
1423 /*
1424 * XXX - Linux emulator
1425 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1426 * on it.
1427 */
1428 td->td_retval[1] = 0;
1429 }
1430
1431 void
1432 cpu_setregs(void)
1433 {
1434 unsigned int cr0;
1435
1436 cr0 = rcr0();
1437
1438 /*
1439 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1440 *
1441 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1442 * instructions. We must set the CR0_MP bit and use the CR0_TS
1443 * bit to control the trap, because setting the CR0_EM bit does
1444 * not cause WAIT instructions to trap. It's important to trap
1445 * WAIT instructions - otherwise the "wait" variants of no-wait
1446 * control instructions would degenerate to the "no-wait" variants
1447 * after FP context switches but work correctly otherwise. It's
1448 * particularly important to trap WAITs when there is no NPX -
1449 * otherwise the "wait" variants would always degenerate.
1450 *
1451 * Try setting CR0_NE to get correct error reporting on 486DX's.
1452 * Setting it should fail or do nothing on lesser processors.
1453 */
1454 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1455 load_cr0(cr0);
1456 load_gs(_udatasel);
1457 }
1458
1459 u_long bootdev; /* not a struct cdev *- encoding is different */
1460 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1461 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1462
1463 /*
1464 * Initialize 386 and configure to run kernel
1465 */
1466
1467 /*
1468 * Initialize segments & interrupt table
1469 */
1470
1471 int _default_ldt;
1472
1473 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1474 union descriptor ldt[NLDT]; /* local descriptor table */
1475 static struct gate_descriptor idt0[NIDT];
1476 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1477 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1478 struct mtx dt_lock; /* lock for GDT and LDT */
1479
1480 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1481 extern int has_f00f_bug;
1482 #endif
1483
1484 static struct i386tss dblfault_tss;
1485 static char dblfault_stack[PAGE_SIZE];
1486
1487 extern vm_offset_t proc0kstack;
1488
1489
1490 /*
1491 * software prototypes -- in more palatable form.
1492 *
1493 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1494 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1495 */
1496 struct soft_segment_descriptor gdt_segs[] = {
1497 /* GNULL_SEL 0 Null Descriptor */
1498 { .ssd_base = 0x0,
1499 .ssd_limit = 0x0,
1500 .ssd_type = 0,
1501 .ssd_dpl = SEL_KPL,
1502 .ssd_p = 0,
1503 .ssd_xx = 0, .ssd_xx1 = 0,
1504 .ssd_def32 = 0,
1505 .ssd_gran = 0 },
1506 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1507 { .ssd_base = 0x0,
1508 .ssd_limit = 0xfffff,
1509 .ssd_type = SDT_MEMRWA,
1510 .ssd_dpl = SEL_KPL,
1511 .ssd_p = 1,
1512 .ssd_xx = 0, .ssd_xx1 = 0,
1513 .ssd_def32 = 1,
1514 .ssd_gran = 1 },
1515 /* GUFS_SEL 2 %fs Descriptor for user */
1516 { .ssd_base = 0x0,
1517 .ssd_limit = 0xfffff,
1518 .ssd_type = SDT_MEMRWA,
1519 .ssd_dpl = SEL_UPL,
1520 .ssd_p = 1,
1521 .ssd_xx = 0, .ssd_xx1 = 0,
1522 .ssd_def32 = 1,
1523 .ssd_gran = 1 },
1524 /* GUGS_SEL 3 %gs Descriptor for user */
1525 { .ssd_base = 0x0,
1526 .ssd_limit = 0xfffff,
1527 .ssd_type = SDT_MEMRWA,
1528 .ssd_dpl = SEL_UPL,
1529 .ssd_p = 1,
1530 .ssd_xx = 0, .ssd_xx1 = 0,
1531 .ssd_def32 = 1,
1532 .ssd_gran = 1 },
1533 /* GCODE_SEL 4 Code Descriptor for kernel */
1534 { .ssd_base = 0x0,
1535 .ssd_limit = 0xfffff,
1536 .ssd_type = SDT_MEMERA,
1537 .ssd_dpl = SEL_KPL,
1538 .ssd_p = 1,
1539 .ssd_xx = 0, .ssd_xx1 = 0,
1540 .ssd_def32 = 1,
1541 .ssd_gran = 1 },
1542 /* GDATA_SEL 5 Data Descriptor for kernel */
1543 { .ssd_base = 0x0,
1544 .ssd_limit = 0xfffff,
1545 .ssd_type = SDT_MEMRWA,
1546 .ssd_dpl = SEL_KPL,
1547 .ssd_p = 1,
1548 .ssd_xx = 0, .ssd_xx1 = 0,
1549 .ssd_def32 = 1,
1550 .ssd_gran = 1 },
1551 /* GUCODE_SEL 6 Code Descriptor for user */
1552 { .ssd_base = 0x0,
1553 .ssd_limit = 0xfffff,
1554 .ssd_type = SDT_MEMERA,
1555 .ssd_dpl = SEL_UPL,
1556 .ssd_p = 1,
1557 .ssd_xx = 0, .ssd_xx1 = 0,
1558 .ssd_def32 = 1,
1559 .ssd_gran = 1 },
1560 /* GUDATA_SEL 7 Data Descriptor for user */
1561 { .ssd_base = 0x0,
1562 .ssd_limit = 0xfffff,
1563 .ssd_type = SDT_MEMRWA,
1564 .ssd_dpl = SEL_UPL,
1565 .ssd_p = 1,
1566 .ssd_xx = 0, .ssd_xx1 = 0,
1567 .ssd_def32 = 1,
1568 .ssd_gran = 1 },
1569 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1570 { .ssd_base = 0x400,
1571 .ssd_limit = 0xfffff,
1572 .ssd_type = SDT_MEMRWA,
1573 .ssd_dpl = SEL_KPL,
1574 .ssd_p = 1,
1575 .ssd_xx = 0, .ssd_xx1 = 0,
1576 .ssd_def32 = 1,
1577 .ssd_gran = 1 },
1578 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1579 {
1580 .ssd_base = 0x0,
1581 .ssd_limit = sizeof(struct i386tss)-1,
1582 .ssd_type = SDT_SYS386TSS,
1583 .ssd_dpl = 0,
1584 .ssd_p = 1,
1585 .ssd_xx = 0, .ssd_xx1 = 0,
1586 .ssd_def32 = 0,
1587 .ssd_gran = 0 },
1588 /* GLDT_SEL 10 LDT Descriptor */
1589 { .ssd_base = (int) ldt,
1590 .ssd_limit = sizeof(ldt)-1,
1591 .ssd_type = SDT_SYSLDT,
1592 .ssd_dpl = SEL_UPL,
1593 .ssd_p = 1,
1594 .ssd_xx = 0, .ssd_xx1 = 0,
1595 .ssd_def32 = 0,
1596 .ssd_gran = 0 },
1597 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1598 { .ssd_base = (int) ldt,
1599 .ssd_limit = (512 * sizeof(union descriptor)-1),
1600 .ssd_type = SDT_SYSLDT,
1601 .ssd_dpl = 0,
1602 .ssd_p = 1,
1603 .ssd_xx = 0, .ssd_xx1 = 0,
1604 .ssd_def32 = 0,
1605 .ssd_gran = 0 },
1606 /* GPANIC_SEL 12 Panic Tss Descriptor */
1607 { .ssd_base = (int) &dblfault_tss,
1608 .ssd_limit = sizeof(struct i386tss)-1,
1609 .ssd_type = SDT_SYS386TSS,
1610 .ssd_dpl = 0,
1611 .ssd_p = 1,
1612 .ssd_xx = 0, .ssd_xx1 = 0,
1613 .ssd_def32 = 0,
1614 .ssd_gran = 0 },
1615 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1616 { .ssd_base = 0,
1617 .ssd_limit = 0xfffff,
1618 .ssd_type = SDT_MEMERA,
1619 .ssd_dpl = 0,
1620 .ssd_p = 1,
1621 .ssd_xx = 0, .ssd_xx1 = 0,
1622 .ssd_def32 = 0,
1623 .ssd_gran = 1 },
1624 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1625 { .ssd_base = 0,
1626 .ssd_limit = 0xfffff,
1627 .ssd_type = SDT_MEMERA,
1628 .ssd_dpl = 0,
1629 .ssd_p = 1,
1630 .ssd_xx = 0, .ssd_xx1 = 0,
1631 .ssd_def32 = 0,
1632 .ssd_gran = 1 },
1633 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1634 { .ssd_base = 0,
1635 .ssd_limit = 0xfffff,
1636 .ssd_type = SDT_MEMRWA,
1637 .ssd_dpl = 0,
1638 .ssd_p = 1,
1639 .ssd_xx = 0, .ssd_xx1 = 0,
1640 .ssd_def32 = 1,
1641 .ssd_gran = 1 },
1642 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1643 { .ssd_base = 0,
1644 .ssd_limit = 0xfffff,
1645 .ssd_type = SDT_MEMRWA,
1646 .ssd_dpl = 0,
1647 .ssd_p = 1,
1648 .ssd_xx = 0, .ssd_xx1 = 0,
1649 .ssd_def32 = 0,
1650 .ssd_gran = 1 },
1651 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1652 { .ssd_base = 0,
1653 .ssd_limit = 0xfffff,
1654 .ssd_type = SDT_MEMRWA,
1655 .ssd_dpl = 0,
1656 .ssd_p = 1,
1657 .ssd_xx = 0, .ssd_xx1 = 0,
1658 .ssd_def32 = 0,
1659 .ssd_gran = 1 },
1660 /* GNDIS_SEL 18 NDIS Descriptor */
1661 { .ssd_base = 0x0,
1662 .ssd_limit = 0x0,
1663 .ssd_type = 0,
1664 .ssd_dpl = 0,
1665 .ssd_p = 0,
1666 .ssd_xx = 0, .ssd_xx1 = 0,
1667 .ssd_def32 = 0,
1668 .ssd_gran = 0 },
1669 };
1670
1671 static struct soft_segment_descriptor ldt_segs[] = {
1672 /* Null Descriptor - overwritten by call gate */
1673 { .ssd_base = 0x0,
1674 .ssd_limit = 0x0,
1675 .ssd_type = 0,
1676 .ssd_dpl = 0,
1677 .ssd_p = 0,
1678 .ssd_xx = 0, .ssd_xx1 = 0,
1679 .ssd_def32 = 0,
1680 .ssd_gran = 0 },
1681 /* Null Descriptor - overwritten by call gate */
1682 { .ssd_base = 0x0,
1683 .ssd_limit = 0x0,
1684 .ssd_type = 0,
1685 .ssd_dpl = 0,
1686 .ssd_p = 0,
1687 .ssd_xx = 0, .ssd_xx1 = 0,
1688 .ssd_def32 = 0,
1689 .ssd_gran = 0 },
1690 /* Null Descriptor - overwritten by call gate */
1691 { .ssd_base = 0x0,
1692 .ssd_limit = 0x0,
1693 .ssd_type = 0,
1694 .ssd_dpl = 0,
1695 .ssd_p = 0,
1696 .ssd_xx = 0, .ssd_xx1 = 0,
1697 .ssd_def32 = 0,
1698 .ssd_gran = 0 },
1699 /* Code Descriptor for user */
1700 { .ssd_base = 0x0,
1701 .ssd_limit = 0xfffff,
1702 .ssd_type = SDT_MEMERA,
1703 .ssd_dpl = SEL_UPL,
1704 .ssd_p = 1,
1705 .ssd_xx = 0, .ssd_xx1 = 0,
1706 .ssd_def32 = 1,
1707 .ssd_gran = 1 },
1708 /* Null Descriptor - overwritten by call gate */
1709 { .ssd_base = 0x0,
1710 .ssd_limit = 0x0,
1711 .ssd_type = 0,
1712 .ssd_dpl = 0,
1713 .ssd_p = 0,
1714 .ssd_xx = 0, .ssd_xx1 = 0,
1715 .ssd_def32 = 0,
1716 .ssd_gran = 0 },
1717 /* Data Descriptor for user */
1718 { .ssd_base = 0x0,
1719 .ssd_limit = 0xfffff,
1720 .ssd_type = SDT_MEMRWA,
1721 .ssd_dpl = SEL_UPL,
1722 .ssd_p = 1,
1723 .ssd_xx = 0, .ssd_xx1 = 0,
1724 .ssd_def32 = 1,
1725 .ssd_gran = 1 },
1726 };
1727
1728 void
1729 setidt(idx, func, typ, dpl, selec)
1730 int idx;
1731 inthand_t *func;
1732 int typ;
1733 int dpl;
1734 int selec;
1735 {
1736 struct gate_descriptor *ip;
1737
1738 ip = idt + idx;
1739 ip->gd_looffset = (int)func;
1740 ip->gd_selector = selec;
1741 ip->gd_stkcpy = 0;
1742 ip->gd_xx = 0;
1743 ip->gd_type = typ;
1744 ip->gd_dpl = dpl;
1745 ip->gd_p = 1;
1746 ip->gd_hioffset = ((int)func)>>16 ;
1747 }
1748
1749 extern inthand_t
1750 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1751 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1752 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1753 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1754 IDTVEC(xmm),
1755 #ifdef KDTRACE_HOOKS
1756 IDTVEC(dtrace_ret),
1757 #endif
1758 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1759
1760 #ifdef DDB
1761 /*
1762 * Display the index and function name of any IDT entries that don't use
1763 * the default 'rsvd' entry point.
1764 */
1765 DB_SHOW_COMMAND(idt, db_show_idt)
1766 {
1767 struct gate_descriptor *ip;
1768 int idx;
1769 uintptr_t func;
1770
1771 ip = idt;
1772 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1773 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1774 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1775 db_printf("%3d\t", idx);
1776 db_printsym(func, DB_STGY_PROC);
1777 db_printf("\n");
1778 }
1779 ip++;
1780 }
1781 }
1782
1783 /* Show privileged registers. */
1784 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1785 {
1786 uint64_t idtr, gdtr;
1787
1788 idtr = ridt();
1789 db_printf("idtr\t0x%08x/%04x\n",
1790 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1791 gdtr = rgdt();
1792 db_printf("gdtr\t0x%08x/%04x\n",
1793 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1794 db_printf("ldtr\t0x%04x\n", rldt());
1795 db_printf("tr\t0x%04x\n", rtr());
1796 db_printf("cr0\t0x%08x\n", rcr0());
1797 db_printf("cr2\t0x%08x\n", rcr2());
1798 db_printf("cr3\t0x%08x\n", rcr3());
1799 db_printf("cr4\t0x%08x\n", rcr4());
1800 }
1801 #endif
1802
1803 void
1804 sdtossd(sd, ssd)
1805 struct segment_descriptor *sd;
1806 struct soft_segment_descriptor *ssd;
1807 {
1808 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1809 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1810 ssd->ssd_type = sd->sd_type;
1811 ssd->ssd_dpl = sd->sd_dpl;
1812 ssd->ssd_p = sd->sd_p;
1813 ssd->ssd_def32 = sd->sd_def32;
1814 ssd->ssd_gran = sd->sd_gran;
1815 }
1816
1817 static void
1818 basemem_setup(void)
1819 {
1820 vm_paddr_t pa;
1821 pt_entry_t *pte;
1822 int i;
1823
1824 if (basemem > 640) {
1825 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1826 basemem);
1827 basemem = 640;
1828 }
1829
1830 /*
1831 * XXX if biosbasemem is now < 640, there is a `hole'
1832 * between the end of base memory and the start of
1833 * ISA memory. The hole may be empty or it may
1834 * contain BIOS code or data. Map it read/write so
1835 * that the BIOS can write to it. (Memory from 0 to
1836 * the physical end of the kernel is mapped read-only
1837 * to begin with and then parts of it are remapped.
1838 * The parts that aren't remapped form holes that
1839 * remain read-only and are unused by the kernel.
1840 * The base memory area is below the physical end of
1841 * the kernel and right now forms a read-only hole.
1842 * The part of it from PAGE_SIZE to
1843 * (trunc_page(biosbasemem * 1024) - 1) will be
1844 * remapped and used by the kernel later.)
1845 *
1846 * This code is similar to the code used in
1847 * pmap_mapdev, but since no memory needs to be
1848 * allocated we simply change the mapping.
1849 */
1850 for (pa = trunc_page(basemem * 1024);
1851 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1852 pmap_kenter(KERNBASE + pa, pa);
1853
1854 /*
1855 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1856 * the vm86 page table so that vm86 can scribble on them using
1857 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1858 * page 0, at least as initialized here?
1859 */
1860 pte = (pt_entry_t *)vm86paddr;
1861 for (i = basemem / 4; i < 160; i++)
1862 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1863 }
1864
1865 /*
1866 * Populate the (physmap) array with base/bound pairs describing the
1867 * available physical memory in the system, then test this memory and
1868 * build the phys_avail array describing the actually-available memory.
1869 *
1870 * If we cannot accurately determine the physical memory map, then use
1871 * value from the 0xE801 call, and failing that, the RTC.
1872 *
1873 * Total memory size may be set by the kernel environment variable
1874 * hw.physmem or the compile-time define MAXMEM.
1875 *
1876 * XXX first should be vm_paddr_t.
1877 */
1878 static void
1879 getmemsize(int first)
1880 {
1881 int off, physmap_idx, pa_indx, da_indx;
1882 u_long physmem_tunable, memtest;
1883 vm_paddr_t physmap[PHYSMAP_SIZE];
1884 pt_entry_t *pte;
1885 quad_t dcons_addr, dcons_size;
1886 int i;
1887 int pg_n;
1888 u_int extmem;
1889 u_int under16;
1890 vm_paddr_t pa;
1891
1892 bzero(physmap, sizeof(physmap));
1893
1894 /* XXX - some of EPSON machines can't use PG_N */
1895 pg_n = PG_N;
1896 if (pc98_machine_type & M_EPSON_PC98) {
1897 switch (epson_machine_id) {
1898 #ifdef WB_CACHE
1899 default:
1900 #endif
1901 case EPSON_PC486_HX:
1902 case EPSON_PC486_HG:
1903 case EPSON_PC486_HA:
1904 pg_n = 0;
1905 break;
1906 }
1907 }
1908
1909 under16 = pc98_getmemsize(&basemem, &extmem);
1910 basemem_setup();
1911
1912 physmap[0] = 0;
1913 physmap[1] = basemem * 1024;
1914 physmap_idx = 2;
1915 physmap[physmap_idx] = 0x100000;
1916 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1917
1918 /*
1919 * Now, physmap contains a map of physical memory.
1920 */
1921
1922 #ifdef SMP
1923 /* make hole for AP bootstrap code */
1924 physmap[1] = mp_bootaddress(physmap[1]);
1925 #endif
1926
1927 /*
1928 * Maxmem isn't the "maximum memory", it's one larger than the
1929 * highest page of the physical address space. It should be
1930 * called something like "Maxphyspage". We may adjust this
1931 * based on ``hw.physmem'' and the results of the memory test.
1932 */
1933 Maxmem = atop(physmap[physmap_idx + 1]);
1934
1935 #ifdef MAXMEM
1936 Maxmem = MAXMEM / 4;
1937 #endif
1938
1939 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1940 Maxmem = atop(physmem_tunable);
1941
1942 /*
1943 * By default keep the memtest enabled. Use a general name so that
1944 * one could eventually do more with the code than just disable it.
1945 */
1946 memtest = 1;
1947 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1948
1949 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1950 (boothowto & RB_VERBOSE))
1951 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1952
1953 /*
1954 * If Maxmem has been increased beyond what the system has detected,
1955 * extend the last memory segment to the new limit.
1956 */
1957 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1958 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1959
1960 /*
1961 * We need to divide chunk if Maxmem is larger than 16MB and
1962 * under 16MB area is not full of memory.
1963 * (1) system area (15-16MB region) is cut off
1964 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
1965 */
1966 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1967 /* 15M - 16M region is cut off, so need to divide chunk */
1968 physmap[physmap_idx + 1] = under16 * 1024;
1969 physmap_idx += 2;
1970 physmap[physmap_idx] = 0x1000000;
1971 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1972 }
1973
1974 /* call pmap initialization to make new kernel address space */
1975 pmap_bootstrap(first);
1976
1977 /*
1978 * Size up each available chunk of physical memory.
1979 */
1980 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1981 pa_indx = 0;
1982 da_indx = 1;
1983 phys_avail[pa_indx++] = physmap[0];
1984 phys_avail[pa_indx] = physmap[0];
1985 dump_avail[da_indx] = physmap[0];
1986 pte = CMAP1;
1987
1988 /*
1989 * Get dcons buffer address
1990 */
1991 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1992 getenv_quad("dcons.size", &dcons_size) == 0)
1993 dcons_addr = 0;
1994
1995 /*
1996 * physmap is in bytes, so when converting to page boundaries,
1997 * round up the start address and round down the end address.
1998 */
1999 for (i = 0; i <= physmap_idx; i += 2) {
2000 vm_paddr_t end;
2001
2002 end = ptoa((vm_paddr_t)Maxmem);
2003 if (physmap[i + 1] < end)
2004 end = trunc_page(physmap[i + 1]);
2005 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2006 int tmp, page_bad, full;
2007 int *ptr = (int *)CADDR1;
2008
2009 full = FALSE;
2010 /*
2011 * block out kernel memory as not available.
2012 */
2013 if (pa >= KERNLOAD && pa < first)
2014 goto do_dump_avail;
2015
2016 /*
2017 * block out dcons buffer
2018 */
2019 if (dcons_addr > 0
2020 && pa >= trunc_page(dcons_addr)
2021 && pa < dcons_addr + dcons_size)
2022 goto do_dump_avail;
2023
2024 page_bad = FALSE;
2025 if (memtest == 0)
2026 goto skip_memtest;
2027
2028 /*
2029 * map page into kernel: valid, read/write,non-cacheable
2030 */
2031 *pte = pa | PG_V | PG_RW | pg_n;
2032 invltlb();
2033
2034 tmp = *(int *)ptr;
2035 /*
2036 * Test for alternating 1's and 0's
2037 */
2038 *(volatile int *)ptr = 0xaaaaaaaa;
2039 if (*(volatile int *)ptr != 0xaaaaaaaa)
2040 page_bad = TRUE;
2041 /*
2042 * Test for alternating 0's and 1's
2043 */
2044 *(volatile int *)ptr = 0x55555555;
2045 if (*(volatile int *)ptr != 0x55555555)
2046 page_bad = TRUE;
2047 /*
2048 * Test for all 1's
2049 */
2050 *(volatile int *)ptr = 0xffffffff;
2051 if (*(volatile int *)ptr != 0xffffffff)
2052 page_bad = TRUE;
2053 /*
2054 * Test for all 0's
2055 */
2056 *(volatile int *)ptr = 0x0;
2057 if (*(volatile int *)ptr != 0x0)
2058 page_bad = TRUE;
2059 /*
2060 * Restore original value.
2061 */
2062 *(int *)ptr = tmp;
2063
2064 skip_memtest:
2065 /*
2066 * Adjust array of valid/good pages.
2067 */
2068 if (page_bad == TRUE)
2069 continue;
2070 /*
2071 * If this good page is a continuation of the
2072 * previous set of good pages, then just increase
2073 * the end pointer. Otherwise start a new chunk.
2074 * Note that "end" points one higher than end,
2075 * making the range >= start and < end.
2076 * If we're also doing a speculative memory
2077 * test and we at or past the end, bump up Maxmem
2078 * so that we keep going. The first bad page
2079 * will terminate the loop.
2080 */
2081 if (phys_avail[pa_indx] == pa) {
2082 phys_avail[pa_indx] += PAGE_SIZE;
2083 } else {
2084 pa_indx++;
2085 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2086 printf(
2087 "Too many holes in the physical address space, giving up\n");
2088 pa_indx--;
2089 full = TRUE;
2090 goto do_dump_avail;
2091 }
2092 phys_avail[pa_indx++] = pa; /* start */
2093 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2094 }
2095 physmem++;
2096 do_dump_avail:
2097 if (dump_avail[da_indx] == pa) {
2098 dump_avail[da_indx] += PAGE_SIZE;
2099 } else {
2100 da_indx++;
2101 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2102 da_indx--;
2103 goto do_next;
2104 }
2105 dump_avail[da_indx++] = pa; /* start */
2106 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2107 }
2108 do_next:
2109 if (full)
2110 break;
2111 }
2112 }
2113 *pte = 0;
2114 invltlb();
2115
2116 /*
2117 * XXX
2118 * The last chunk must contain at least one page plus the message
2119 * buffer to avoid complicating other code (message buffer address
2120 * calculation, etc.).
2121 */
2122 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2123 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2124 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2125 phys_avail[pa_indx--] = 0;
2126 phys_avail[pa_indx--] = 0;
2127 }
2128
2129 Maxmem = atop(phys_avail[pa_indx]);
2130
2131 /* Trim off space for the message buffer. */
2132 phys_avail[pa_indx] -= round_page(msgbufsize);
2133
2134 /* Map the message buffer. */
2135 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2136 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2137 off);
2138
2139 PT_UPDATES_FLUSH();
2140 }
2141
2142 void
2143 init386(first)
2144 int first;
2145 {
2146 struct gate_descriptor *gdp;
2147 int gsel_tss, metadata_missing, x, pa;
2148 size_t kstack0_sz;
2149 struct pcpu *pc;
2150
2151 thread0.td_kstack = proc0kstack;
2152 thread0.td_kstack_pages = KSTACK_PAGES;
2153 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2154 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2155
2156 /*
2157 * This may be done better later if it gets more high level
2158 * components in it. If so just link td->td_proc here.
2159 */
2160 proc_linkup0(&proc0, &thread0);
2161
2162 /*
2163 * Initialize DMAC
2164 */
2165 pc98_init_dmac();
2166
2167 metadata_missing = 0;
2168 if (bootinfo.bi_modulep) {
2169 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2170 preload_bootstrap_relocate(KERNBASE);
2171 } else {
2172 metadata_missing = 1;
2173 }
2174 if (envmode == 1)
2175 kern_envp = static_env;
2176 else if (bootinfo.bi_envp)
2177 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2178
2179 /* Init basic tunables, hz etc */
2180 init_param1();
2181
2182 /*
2183 * Make gdt memory segments. All segments cover the full 4GB
2184 * of address space and permissions are enforced at page level.
2185 */
2186 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2187 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2188 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2189 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2190 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2191 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2192
2193 pc = &__pcpu[0];
2194 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2195 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2196 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2197
2198 for (x = 0; x < NGDT; x++)
2199 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2200
2201 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2202 r_gdt.rd_base = (int) gdt;
2203 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2204 lgdt(&r_gdt);
2205
2206 pcpu_init(pc, 0, sizeof(struct pcpu));
2207 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2208 pmap_kenter(pa + KERNBASE, pa);
2209 dpcpu_init((void *)(first + KERNBASE), 0);
2210 first += DPCPU_SIZE;
2211 PCPU_SET(prvspace, pc);
2212 PCPU_SET(curthread, &thread0);
2213 PCPU_SET(curpcb, thread0.td_pcb);
2214
2215 /*
2216 * Initialize mutexes.
2217 *
2218 * icu_lock: in order to allow an interrupt to occur in a critical
2219 * section, to set pcpu->ipending (etc...) properly, we
2220 * must be able to get the icu lock, so it can't be
2221 * under witness.
2222 */
2223 mutex_init();
2224 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2225
2226 /* make ldt memory segments */
2227 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2228 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2229 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2230 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2231
2232 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2233 lldt(_default_ldt);
2234 PCPU_SET(currentldt, _default_ldt);
2235
2236 /* exceptions */
2237 for (x = 0; x < NIDT; x++)
2238 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2239 GSEL(GCODE_SEL, SEL_KPL));
2240 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2241 GSEL(GCODE_SEL, SEL_KPL));
2242 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2243 GSEL(GCODE_SEL, SEL_KPL));
2244 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2245 GSEL(GCODE_SEL, SEL_KPL));
2246 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2247 GSEL(GCODE_SEL, SEL_KPL));
2248 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2249 GSEL(GCODE_SEL, SEL_KPL));
2250 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2251 GSEL(GCODE_SEL, SEL_KPL));
2252 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2253 GSEL(GCODE_SEL, SEL_KPL));
2254 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2255 , GSEL(GCODE_SEL, SEL_KPL));
2256 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2257 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2258 GSEL(GCODE_SEL, SEL_KPL));
2259 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2260 GSEL(GCODE_SEL, SEL_KPL));
2261 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2262 GSEL(GCODE_SEL, SEL_KPL));
2263 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2264 GSEL(GCODE_SEL, SEL_KPL));
2265 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2266 GSEL(GCODE_SEL, SEL_KPL));
2267 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2268 GSEL(GCODE_SEL, SEL_KPL));
2269 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2270 GSEL(GCODE_SEL, SEL_KPL));
2271 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2272 GSEL(GCODE_SEL, SEL_KPL));
2273 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2274 GSEL(GCODE_SEL, SEL_KPL));
2275 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2276 GSEL(GCODE_SEL, SEL_KPL));
2277 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2278 GSEL(GCODE_SEL, SEL_KPL));
2279 #ifdef KDTRACE_HOOKS
2280 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2281 GSEL(GCODE_SEL, SEL_KPL));
2282 #endif
2283
2284 r_idt.rd_limit = sizeof(idt0) - 1;
2285 r_idt.rd_base = (int) idt;
2286 lidt(&r_idt);
2287
2288 /*
2289 * Initialize the i8254 before the console so that console
2290 * initialization can use DELAY().
2291 */
2292 i8254_init();
2293
2294 /*
2295 * Initialize the console before we print anything out.
2296 */
2297 cninit();
2298
2299 if (metadata_missing)
2300 printf("WARNING: loader(8) metadata is missing!\n");
2301
2302 #ifdef DEV_ISA
2303 #ifdef DEV_ATPIC
2304 atpic_startup();
2305 #else
2306 /* Reset and mask the atpics and leave them shut down. */
2307 atpic_reset();
2308
2309 /*
2310 * Point the ICU spurious interrupt vectors at the APIC spurious
2311 * interrupt handler.
2312 */
2313 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2314 GSEL(GCODE_SEL, SEL_KPL));
2315 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2316 GSEL(GCODE_SEL, SEL_KPL));
2317 #endif
2318 #endif
2319
2320 #ifdef DDB
2321 ksym_start = bootinfo.bi_symtab;
2322 ksym_end = bootinfo.bi_esymtab;
2323 #endif
2324
2325 kdb_init();
2326
2327 #ifdef KDB
2328 if (boothowto & RB_KDB)
2329 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2330 #endif
2331
2332 finishidentcpu(); /* Final stage of CPU initialization */
2333 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2334 GSEL(GCODE_SEL, SEL_KPL));
2335 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2336 GSEL(GCODE_SEL, SEL_KPL));
2337 initializecpu(); /* Initialize CPU registers */
2338
2339 /* make an initial tss so cpu can get interrupt stack on syscall! */
2340 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2341 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2342 kstack0_sz - sizeof(struct pcb) - 16);
2343 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2344 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2345 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2346 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2347 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2348 ltr(gsel_tss);
2349
2350 /* pointer to selector slot for %fs/%gs */
2351 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2352
2353 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2354 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2355 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2356 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2357 dblfault_tss.tss_cr3 = (int)IdlePTD;
2358 dblfault_tss.tss_eip = (int)dblfault_handler;
2359 dblfault_tss.tss_eflags = PSL_KERNEL;
2360 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2361 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2362 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2363 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2364 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2365
2366 vm86_initialize();
2367 getmemsize(first);
2368 init_param2(physmem);
2369
2370 /* now running on new page tables, configured,and u/iom is accessible */
2371
2372 msgbufinit(msgbufp, msgbufsize);
2373
2374 /* make a call gate to reenter kernel with */
2375 gdp = &ldt[LSYS5CALLS_SEL].gd;
2376
2377 x = (int) &IDTVEC(lcall_syscall);
2378 gdp->gd_looffset = x;
2379 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2380 gdp->gd_stkcpy = 1;
2381 gdp->gd_type = SDT_SYS386CGT;
2382 gdp->gd_dpl = SEL_UPL;
2383 gdp->gd_p = 1;
2384 gdp->gd_hioffset = x >> 16;
2385
2386 /* XXX does this work? */
2387 /* XXX yes! */
2388 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2389 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2390
2391 /* transfer to user mode */
2392
2393 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2394 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2395
2396 /* setup proc 0's pcb */
2397 thread0.td_pcb->pcb_flags = 0;
2398 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2399 thread0.td_pcb->pcb_ext = 0;
2400 thread0.td_frame = &proc0_tf;
2401
2402 cpu_probe_cmpxchg8b();
2403 }
2404
2405 void
2406 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2407 {
2408
2409 }
2410
2411 void
2412 spinlock_enter(void)
2413 {
2414 struct thread *td;
2415 register_t flags;
2416
2417 td = curthread;
2418 if (td->td_md.md_spinlock_count == 0) {
2419 flags = intr_disable();
2420 td->td_md.md_spinlock_count = 1;
2421 td->td_md.md_saved_flags = flags;
2422 } else
2423 td->td_md.md_spinlock_count++;
2424 critical_enter();
2425 }
2426
2427 void
2428 spinlock_exit(void)
2429 {
2430 struct thread *td;
2431 register_t flags;
2432
2433 td = curthread;
2434 critical_exit();
2435 flags = td->td_md.md_saved_flags;
2436 td->td_md.md_spinlock_count--;
2437 if (td->td_md.md_spinlock_count == 0)
2438 intr_restore(flags);
2439 }
2440
2441 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2442 static void f00f_hack(void *unused);
2443 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2444
2445 static void
2446 f00f_hack(void *unused)
2447 {
2448 struct gate_descriptor *new_idt;
2449 vm_offset_t tmp;
2450
2451 if (!has_f00f_bug)
2452 return;
2453
2454 GIANT_REQUIRED;
2455
2456 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2457
2458 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2459 if (tmp == 0)
2460 panic("kmem_alloc returned 0");
2461
2462 /* Put the problematic entry (#6) at the end of the lower page. */
2463 new_idt = (struct gate_descriptor*)
2464 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2465 bcopy(idt, new_idt, sizeof(idt0));
2466 r_idt.rd_base = (u_int)new_idt;
2467 lidt(&r_idt);
2468 idt = new_idt;
2469 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2470 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2471 panic("vm_map_protect failed");
2472 }
2473 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2474
2475 /*
2476 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2477 * we want to start a backtrace from the function that caused us to enter
2478 * the debugger. We have the context in the trapframe, but base the trace
2479 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2480 * enough for a backtrace.
2481 */
2482 void
2483 makectx(struct trapframe *tf, struct pcb *pcb)
2484 {
2485
2486 pcb->pcb_edi = tf->tf_edi;
2487 pcb->pcb_esi = tf->tf_esi;
2488 pcb->pcb_ebp = tf->tf_ebp;
2489 pcb->pcb_ebx = tf->tf_ebx;
2490 pcb->pcb_eip = tf->tf_eip;
2491 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2492 }
2493
2494 int
2495 ptrace_set_pc(struct thread *td, u_long addr)
2496 {
2497
2498 td->td_frame->tf_eip = addr;
2499 return (0);
2500 }
2501
2502 int
2503 ptrace_single_step(struct thread *td)
2504 {
2505 td->td_frame->tf_eflags |= PSL_T;
2506 return (0);
2507 }
2508
2509 int
2510 ptrace_clear_single_step(struct thread *td)
2511 {
2512 td->td_frame->tf_eflags &= ~PSL_T;
2513 return (0);
2514 }
2515
2516 int
2517 fill_regs(struct thread *td, struct reg *regs)
2518 {
2519 struct pcb *pcb;
2520 struct trapframe *tp;
2521
2522 tp = td->td_frame;
2523 pcb = td->td_pcb;
2524 regs->r_gs = pcb->pcb_gs;
2525 return (fill_frame_regs(tp, regs));
2526 }
2527
2528 int
2529 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2530 {
2531 regs->r_fs = tp->tf_fs;
2532 regs->r_es = tp->tf_es;
2533 regs->r_ds = tp->tf_ds;
2534 regs->r_edi = tp->tf_edi;
2535 regs->r_esi = tp->tf_esi;
2536 regs->r_ebp = tp->tf_ebp;
2537 regs->r_ebx = tp->tf_ebx;
2538 regs->r_edx = tp->tf_edx;
2539 regs->r_ecx = tp->tf_ecx;
2540 regs->r_eax = tp->tf_eax;
2541 regs->r_eip = tp->tf_eip;
2542 regs->r_cs = tp->tf_cs;
2543 regs->r_eflags = tp->tf_eflags;
2544 regs->r_esp = tp->tf_esp;
2545 regs->r_ss = tp->tf_ss;
2546 return (0);
2547 }
2548
2549 int
2550 set_regs(struct thread *td, struct reg *regs)
2551 {
2552 struct pcb *pcb;
2553 struct trapframe *tp;
2554
2555 tp = td->td_frame;
2556 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2557 !CS_SECURE(regs->r_cs))
2558 return (EINVAL);
2559 pcb = td->td_pcb;
2560 tp->tf_fs = regs->r_fs;
2561 tp->tf_es = regs->r_es;
2562 tp->tf_ds = regs->r_ds;
2563 tp->tf_edi = regs->r_edi;
2564 tp->tf_esi = regs->r_esi;
2565 tp->tf_ebp = regs->r_ebp;
2566 tp->tf_ebx = regs->r_ebx;
2567 tp->tf_edx = regs->r_edx;
2568 tp->tf_ecx = regs->r_ecx;
2569 tp->tf_eax = regs->r_eax;
2570 tp->tf_eip = regs->r_eip;
2571 tp->tf_cs = regs->r_cs;
2572 tp->tf_eflags = regs->r_eflags;
2573 tp->tf_esp = regs->r_esp;
2574 tp->tf_ss = regs->r_ss;
2575 pcb->pcb_gs = regs->r_gs;
2576 return (0);
2577 }
2578
2579 #ifdef CPU_ENABLE_SSE
2580 static void
2581 fill_fpregs_xmm(sv_xmm, sv_87)
2582 struct savexmm *sv_xmm;
2583 struct save87 *sv_87;
2584 {
2585 register struct env87 *penv_87 = &sv_87->sv_env;
2586 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2587 int i;
2588
2589 bzero(sv_87, sizeof(*sv_87));
2590
2591 /* FPU control/status */
2592 penv_87->en_cw = penv_xmm->en_cw;
2593 penv_87->en_sw = penv_xmm->en_sw;
2594 penv_87->en_tw = penv_xmm->en_tw;
2595 penv_87->en_fip = penv_xmm->en_fip;
2596 penv_87->en_fcs = penv_xmm->en_fcs;
2597 penv_87->en_opcode = penv_xmm->en_opcode;
2598 penv_87->en_foo = penv_xmm->en_foo;
2599 penv_87->en_fos = penv_xmm->en_fos;
2600
2601 /* FPU registers */
2602 for (i = 0; i < 8; ++i)
2603 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2604 }
2605
2606 static void
2607 set_fpregs_xmm(sv_87, sv_xmm)
2608 struct save87 *sv_87;
2609 struct savexmm *sv_xmm;
2610 {
2611 register struct env87 *penv_87 = &sv_87->sv_env;
2612 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2613 int i;
2614
2615 /* FPU control/status */
2616 penv_xmm->en_cw = penv_87->en_cw;
2617 penv_xmm->en_sw = penv_87->en_sw;
2618 penv_xmm->en_tw = penv_87->en_tw;
2619 penv_xmm->en_fip = penv_87->en_fip;
2620 penv_xmm->en_fcs = penv_87->en_fcs;
2621 penv_xmm->en_opcode = penv_87->en_opcode;
2622 penv_xmm->en_foo = penv_87->en_foo;
2623 penv_xmm->en_fos = penv_87->en_fos;
2624
2625 /* FPU registers */
2626 for (i = 0; i < 8; ++i)
2627 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2628 }
2629 #endif /* CPU_ENABLE_SSE */
2630
2631 int
2632 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2633 {
2634
2635 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2636 P_SHOULDSTOP(td->td_proc),
2637 ("not suspended thread %p", td));
2638 #ifdef DEV_NPX
2639 npxgetregs(td);
2640 #else
2641 bzero(fpregs, sizeof(*fpregs));
2642 #endif
2643 #ifdef CPU_ENABLE_SSE
2644 if (cpu_fxsr)
2645 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
2646 (struct save87 *)fpregs);
2647 else
2648 #endif /* CPU_ENABLE_SSE */
2649 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
2650 sizeof(*fpregs));
2651 return (0);
2652 }
2653
2654 int
2655 set_fpregs(struct thread *td, struct fpreg *fpregs)
2656 {
2657
2658 #ifdef CPU_ENABLE_SSE
2659 if (cpu_fxsr)
2660 set_fpregs_xmm((struct save87 *)fpregs,
2661 &td->td_pcb->pcb_user_save.sv_xmm);
2662 else
2663 #endif /* CPU_ENABLE_SSE */
2664 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
2665 sizeof(*fpregs));
2666 #ifdef DEV_NPX
2667 npxuserinited(td);
2668 #endif
2669 return (0);
2670 }
2671
2672 /*
2673 * Get machine context.
2674 */
2675 int
2676 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2677 {
2678 struct trapframe *tp;
2679 struct segment_descriptor *sdp;
2680
2681 tp = td->td_frame;
2682
2683 PROC_LOCK(curthread->td_proc);
2684 mcp->mc_onstack = sigonstack(tp->tf_esp);
2685 PROC_UNLOCK(curthread->td_proc);
2686 mcp->mc_gs = td->td_pcb->pcb_gs;
2687 mcp->mc_fs = tp->tf_fs;
2688 mcp->mc_es = tp->tf_es;
2689 mcp->mc_ds = tp->tf_ds;
2690 mcp->mc_edi = tp->tf_edi;
2691 mcp->mc_esi = tp->tf_esi;
2692 mcp->mc_ebp = tp->tf_ebp;
2693 mcp->mc_isp = tp->tf_isp;
2694 mcp->mc_eflags = tp->tf_eflags;
2695 if (flags & GET_MC_CLEAR_RET) {
2696 mcp->mc_eax = 0;
2697 mcp->mc_edx = 0;
2698 mcp->mc_eflags &= ~PSL_C;
2699 } else {
2700 mcp->mc_eax = tp->tf_eax;
2701 mcp->mc_edx = tp->tf_edx;
2702 }
2703 mcp->mc_ebx = tp->tf_ebx;
2704 mcp->mc_ecx = tp->tf_ecx;
2705 mcp->mc_eip = tp->tf_eip;
2706 mcp->mc_cs = tp->tf_cs;
2707 mcp->mc_esp = tp->tf_esp;
2708 mcp->mc_ss = tp->tf_ss;
2709 mcp->mc_len = sizeof(*mcp);
2710 get_fpcontext(td, mcp);
2711 sdp = &td->td_pcb->pcb_fsd;
2712 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2713 sdp = &td->td_pcb->pcb_gsd;
2714 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2715 mcp->mc_flags = 0;
2716 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
2717 return (0);
2718 }
2719
2720 /*
2721 * Set machine context.
2722 *
2723 * However, we don't set any but the user modifiable flags, and we won't
2724 * touch the cs selector.
2725 */
2726 int
2727 set_mcontext(struct thread *td, const mcontext_t *mcp)
2728 {
2729 struct trapframe *tp;
2730 int eflags, ret;
2731
2732 tp = td->td_frame;
2733 if (mcp->mc_len != sizeof(*mcp))
2734 return (EINVAL);
2735 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2736 (tp->tf_eflags & ~PSL_USERCHANGE);
2737 if ((ret = set_fpcontext(td, mcp)) == 0) {
2738 tp->tf_fs = mcp->mc_fs;
2739 tp->tf_es = mcp->mc_es;
2740 tp->tf_ds = mcp->mc_ds;
2741 tp->tf_edi = mcp->mc_edi;
2742 tp->tf_esi = mcp->mc_esi;
2743 tp->tf_ebp = mcp->mc_ebp;
2744 tp->tf_ebx = mcp->mc_ebx;
2745 tp->tf_edx = mcp->mc_edx;
2746 tp->tf_ecx = mcp->mc_ecx;
2747 tp->tf_eax = mcp->mc_eax;
2748 tp->tf_eip = mcp->mc_eip;
2749 tp->tf_eflags = eflags;
2750 tp->tf_esp = mcp->mc_esp;
2751 tp->tf_ss = mcp->mc_ss;
2752 td->td_pcb->pcb_gs = mcp->mc_gs;
2753 ret = 0;
2754 }
2755 return (ret);
2756 }
2757
2758 static void
2759 get_fpcontext(struct thread *td, mcontext_t *mcp)
2760 {
2761
2762 #ifndef DEV_NPX
2763 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2764 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2765 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2766 #else
2767 mcp->mc_ownedfp = npxgetregs(td);
2768 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
2769 sizeof(mcp->mc_fpstate));
2770 mcp->mc_fpformat = npxformat();
2771 #endif
2772 }
2773
2774 static int
2775 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2776 {
2777
2778 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2779 return (0);
2780 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2781 mcp->mc_fpformat != _MC_FPFMT_XMM)
2782 return (EINVAL);
2783 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2784 /* We don't care what state is left in the FPU or PCB. */
2785 fpstate_drop(td);
2786 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2787 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2788 #ifdef DEV_NPX
2789 #ifdef CPU_ENABLE_SSE
2790 if (cpu_fxsr)
2791 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
2792 en_mxcsr &= cpu_mxcsr_mask;
2793 #endif
2794 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
2795 #endif
2796 } else
2797 return (EINVAL);
2798 return (0);
2799 }
2800
2801 static void
2802 fpstate_drop(struct thread *td)
2803 {
2804
2805 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2806 critical_enter();
2807 #ifdef DEV_NPX
2808 if (PCPU_GET(fpcurthread) == td)
2809 npxdrop();
2810 #endif
2811 /*
2812 * XXX force a full drop of the npx. The above only drops it if we
2813 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2814 *
2815 * XXX I don't much like npxgetregs()'s semantics of doing a full
2816 * drop. Dropping only to the pcb matches fnsave's behaviour.
2817 * We only need to drop to !PCB_INITDONE in sendsig(). But
2818 * sendsig() is the only caller of npxgetregs()... perhaps we just
2819 * have too many layers.
2820 */
2821 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
2822 PCB_NPXUSERINITDONE);
2823 critical_exit();
2824 }
2825
2826 int
2827 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2828 {
2829 struct pcb *pcb;
2830
2831 if (td == NULL) {
2832 dbregs->dr[0] = rdr0();
2833 dbregs->dr[1] = rdr1();
2834 dbregs->dr[2] = rdr2();
2835 dbregs->dr[3] = rdr3();
2836 dbregs->dr[4] = rdr4();
2837 dbregs->dr[5] = rdr5();
2838 dbregs->dr[6] = rdr6();
2839 dbregs->dr[7] = rdr7();
2840 } else {
2841 pcb = td->td_pcb;
2842 dbregs->dr[0] = pcb->pcb_dr0;
2843 dbregs->dr[1] = pcb->pcb_dr1;
2844 dbregs->dr[2] = pcb->pcb_dr2;
2845 dbregs->dr[3] = pcb->pcb_dr3;
2846 dbregs->dr[4] = 0;
2847 dbregs->dr[5] = 0;
2848 dbregs->dr[6] = pcb->pcb_dr6;
2849 dbregs->dr[7] = pcb->pcb_dr7;
2850 }
2851 return (0);
2852 }
2853
2854 int
2855 set_dbregs(struct thread *td, struct dbreg *dbregs)
2856 {
2857 struct pcb *pcb;
2858 int i;
2859
2860 if (td == NULL) {
2861 load_dr0(dbregs->dr[0]);
2862 load_dr1(dbregs->dr[1]);
2863 load_dr2(dbregs->dr[2]);
2864 load_dr3(dbregs->dr[3]);
2865 load_dr4(dbregs->dr[4]);
2866 load_dr5(dbregs->dr[5]);
2867 load_dr6(dbregs->dr[6]);
2868 load_dr7(dbregs->dr[7]);
2869 } else {
2870 /*
2871 * Don't let an illegal value for dr7 get set. Specifically,
2872 * check for undefined settings. Setting these bit patterns
2873 * result in undefined behaviour and can lead to an unexpected
2874 * TRCTRAP.
2875 */
2876 for (i = 0; i < 4; i++) {
2877 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2878 return (EINVAL);
2879 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
2880 return (EINVAL);
2881 }
2882
2883 pcb = td->td_pcb;
2884
2885 /*
2886 * Don't let a process set a breakpoint that is not within the
2887 * process's address space. If a process could do this, it
2888 * could halt the system by setting a breakpoint in the kernel
2889 * (if ddb was enabled). Thus, we need to check to make sure
2890 * that no breakpoints are being enabled for addresses outside
2891 * process's address space.
2892 *
2893 * XXX - what about when the watched area of the user's
2894 * address space is written into from within the kernel
2895 * ... wouldn't that still cause a breakpoint to be generated
2896 * from within kernel mode?
2897 */
2898
2899 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2900 /* dr0 is enabled */
2901 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2902 return (EINVAL);
2903 }
2904
2905 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2906 /* dr1 is enabled */
2907 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2908 return (EINVAL);
2909 }
2910
2911 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2912 /* dr2 is enabled */
2913 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2914 return (EINVAL);
2915 }
2916
2917 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2918 /* dr3 is enabled */
2919 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2920 return (EINVAL);
2921 }
2922
2923 pcb->pcb_dr0 = dbregs->dr[0];
2924 pcb->pcb_dr1 = dbregs->dr[1];
2925 pcb->pcb_dr2 = dbregs->dr[2];
2926 pcb->pcb_dr3 = dbregs->dr[3];
2927 pcb->pcb_dr6 = dbregs->dr[6];
2928 pcb->pcb_dr7 = dbregs->dr[7];
2929
2930 pcb->pcb_flags |= PCB_DBREGS;
2931 }
2932
2933 return (0);
2934 }
2935
2936 /*
2937 * Return > 0 if a hardware breakpoint has been hit, and the
2938 * breakpoint was in user space. Return 0, otherwise.
2939 */
2940 int
2941 user_dbreg_trap(void)
2942 {
2943 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2944 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2945 int nbp; /* number of breakpoints that triggered */
2946 caddr_t addr[4]; /* breakpoint addresses */
2947 int i;
2948
2949 dr7 = rdr7();
2950 if ((dr7 & 0x000000ff) == 0) {
2951 /*
2952 * all GE and LE bits in the dr7 register are zero,
2953 * thus the trap couldn't have been caused by the
2954 * hardware debug registers
2955 */
2956 return 0;
2957 }
2958
2959 nbp = 0;
2960 dr6 = rdr6();
2961 bp = dr6 & 0x0000000f;
2962
2963 if (!bp) {
2964 /*
2965 * None of the breakpoint bits are set meaning this
2966 * trap was not caused by any of the debug registers
2967 */
2968 return 0;
2969 }
2970
2971 /*
2972 * at least one of the breakpoints were hit, check to see
2973 * which ones and if any of them are user space addresses
2974 */
2975
2976 if (bp & 0x01) {
2977 addr[nbp++] = (caddr_t)rdr0();
2978 }
2979 if (bp & 0x02) {
2980 addr[nbp++] = (caddr_t)rdr1();
2981 }
2982 if (bp & 0x04) {
2983 addr[nbp++] = (caddr_t)rdr2();
2984 }
2985 if (bp & 0x08) {
2986 addr[nbp++] = (caddr_t)rdr3();
2987 }
2988
2989 for (i = 0; i < nbp; i++) {
2990 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2991 /*
2992 * addr[i] is in user space
2993 */
2994 return nbp;
2995 }
2996 }
2997
2998 /*
2999 * None of the breakpoints are in user space.
3000 */
3001 return 0;
3002 }
3003
3004 #ifdef KDB
3005
3006 /*
3007 * Provide inb() and outb() as functions. They are normally only available as
3008 * inline functions, thus cannot be called from the debugger.
3009 */
3010
3011 /* silence compiler warnings */
3012 u_char inb_(u_short);
3013 void outb_(u_short, u_char);
3014
3015 u_char
3016 inb_(u_short port)
3017 {
3018 return inb(port);
3019 }
3020
3021 void
3022 outb_(u_short port, u_char data)
3023 {
3024 outb(port, data);
3025 }
3026
3027 #endif /* KDB */
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