1 /*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 */
39
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
42
43 #include "opt_apic.h"
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
47 #include "opt_cpu.h"
48 #include "opt_ddb.h"
49 #include "opt_inet.h"
50 #include "opt_ipx.h"
51 #include "opt_isa.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_mp_watchdog.h"
55 #include "opt_npx.h"
56 #include "opt_perfmon.h"
57 #include "opt_kdtrace.h"
58
59 #include <sys/param.h>
60 #include <sys/proc.h>
61 #include <sys/systm.h>
62 #include <sys/bio.h>
63 #include <sys/buf.h>
64 #include <sys/bus.h>
65 #include <sys/callout.h>
66 #include <sys/cons.h>
67 #include <sys/cpu.h>
68 #include <sys/eventhandler.h>
69 #include <sys/exec.h>
70 #include <sys/imgact.h>
71 #include <sys/kdb.h>
72 #include <sys/kernel.h>
73 #include <sys/ktr.h>
74 #include <sys/linker.h>
75 #include <sys/lock.h>
76 #include <sys/malloc.h>
77 #include <sys/memrange.h>
78 #include <sys/msgbuf.h>
79 #include <sys/mutex.h>
80 #include <sys/pcpu.h>
81 #include <sys/ptrace.h>
82 #include <sys/reboot.h>
83 #include <sys/sched.h>
84 #include <sys/signalvar.h>
85 #ifdef SMP
86 #include <sys/smp.h>
87 #endif
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
93 #include <sys/vmmeter.h>
94
95 #include <vm/vm.h>
96 #include <vm/vm_extern.h>
97 #include <vm/vm_kern.h>
98 #include <vm/vm_page.h>
99 #include <vm/vm_map.h>
100 #include <vm/vm_object.h>
101 #include <vm/vm_pager.h>
102 #include <vm/vm_param.h>
103
104 #ifdef DDB
105 #ifndef KDB
106 #error KDB must be enabled in order for DDB to work!
107 #endif
108 #include <ddb/ddb.h>
109 #include <ddb/db_sym.h>
110 #endif
111
112 #include <pc98/pc98/pc98_machdep.h>
113
114 #include <net/netisr.h>
115
116 #include <machine/bootinfo.h>
117 #include <machine/clock.h>
118 #include <machine/cpu.h>
119 #include <machine/cputypes.h>
120 #include <machine/intr_machdep.h>
121 #include <x86/mca.h>
122 #include <machine/md_var.h>
123 #include <machine/mp_watchdog.h>
124 #include <machine/pc/bios.h>
125 #include <machine/pcb.h>
126 #include <machine/pcb_ext.h>
127 #include <machine/proc.h>
128 #include <machine/reg.h>
129 #include <machine/sigframe.h>
130 #include <machine/specialreg.h>
131 #include <machine/vm86.h>
132 #ifdef PERFMON
133 #include <machine/perfmon.h>
134 #endif
135 #ifdef SMP
136 #include <machine/smp.h>
137 #endif
138
139 #ifdef DEV_APIC
140 #include <machine/apicvar.h>
141 #endif
142
143 #ifdef DEV_ISA
144 #include <x86/isa/icu.h>
145 #endif
146
147 /* Sanity check for __curthread() */
148 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
149
150 extern void init386(int first);
151 extern void dblfault_handler(void);
152
153 extern void printcpuinfo(void); /* XXX header file */
154 extern void finishidentcpu(void);
155 extern void panicifcpuunsupported(void);
156
157 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
158 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
159
160 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
161 #define CPU_ENABLE_SSE
162 #endif
163
164 static void cpu_startup(void *);
165 static void fpstate_drop(struct thread *td);
166 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
167 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
168 #ifdef CPU_ENABLE_SSE
169 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
170 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
171 #endif /* CPU_ENABLE_SSE */
172 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
173
174 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
175 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
176
177 #ifdef DDB
178 extern vm_offset_t ksym_start, ksym_end;
179 #endif
180
181 int _udatasel, _ucodesel;
182 u_int basemem;
183
184 static int ispc98 = 1;
185 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
186
187 int cold = 1;
188
189 #ifdef COMPAT_43
190 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
191 #endif
192 #ifdef COMPAT_FREEBSD4
193 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
194 #endif
195
196 long Maxmem = 0;
197 long realmem = 0;
198
199 /*
200 * The number of PHYSMAP entries must be one less than the number of
201 * PHYSSEG entries because the PHYSMAP entry that spans the largest
202 * physical address that is accessible by ISA DMA is split into two
203 * PHYSSEG entries.
204 */
205 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
206
207 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
208 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
209
210 /* must be 2 less so 0 0 can signal end of chunks */
211 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
212 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
213
214 struct kva_md_info kmi;
215
216 static struct trapframe proc0_tf;
217 struct pcpu __pcpu[MAXCPU];
218
219 struct mtx icu_lock;
220
221 struct mem_range_softc mem_range_softc;
222
223 static void
224 cpu_startup(dummy)
225 void *dummy;
226 {
227 uintmax_t memsize;
228
229 /*
230 * Good {morning,afternoon,evening,night}.
231 */
232 startrtclock();
233 printcpuinfo();
234 panicifcpuunsupported();
235 #ifdef PERFMON
236 perfmon_init();
237 #endif
238 realmem = Maxmem;
239
240 /*
241 * Display physical memory.
242 */
243 memsize = ptoa((uintmax_t)Maxmem);
244 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
245
246 /*
247 * Display any holes after the first chunk of extended memory.
248 */
249 if (bootverbose) {
250 int indx;
251
252 printf("Physical memory chunk(s):\n");
253 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
254 vm_paddr_t size;
255
256 size = phys_avail[indx + 1] - phys_avail[indx];
257 printf(
258 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
259 (uintmax_t)phys_avail[indx],
260 (uintmax_t)phys_avail[indx + 1] - 1,
261 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
262 }
263 }
264
265 vm_ksubmap_init(&kmi);
266
267 printf("avail memory = %ju (%ju MB)\n",
268 ptoa((uintmax_t)cnt.v_free_count),
269 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
270
271 /*
272 * Set up buffers, so they can be used to read disk labels.
273 */
274 bufinit();
275 vm_pager_bufferinit();
276 cpu_setregs();
277
278 /*
279 * Add BSP as an interrupt target.
280 */
281 intr_add_cpu(0);
282 }
283
284 /*
285 * Send an interrupt to process.
286 *
287 * Stack is set up to allow sigcode stored
288 * at top to call routine, followed by kcall
289 * to sigreturn routine below. After sigreturn
290 * resets the signal mask, the stack, and the
291 * frame pointer, it returns to the user
292 * specified pc, psl.
293 */
294 #ifdef COMPAT_43
295 static void
296 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
297 {
298 struct osigframe sf, *fp;
299 struct proc *p;
300 struct thread *td;
301 struct sigacts *psp;
302 struct trapframe *regs;
303 int sig;
304 int oonstack;
305
306 td = curthread;
307 p = td->td_proc;
308 PROC_LOCK_ASSERT(p, MA_OWNED);
309 sig = ksi->ksi_signo;
310 psp = p->p_sigacts;
311 mtx_assert(&psp->ps_mtx, MA_OWNED);
312 regs = td->td_frame;
313 oonstack = sigonstack(regs->tf_esp);
314
315 /* Allocate space for the signal handler context. */
316 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
317 SIGISMEMBER(psp->ps_sigonstack, sig)) {
318 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
319 td->td_sigstk.ss_size - sizeof(struct osigframe));
320 #if defined(COMPAT_43)
321 td->td_sigstk.ss_flags |= SS_ONSTACK;
322 #endif
323 } else
324 fp = (struct osigframe *)regs->tf_esp - 1;
325
326 /* Translate the signal if appropriate. */
327 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
328 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
329
330 /* Build the argument list for the signal handler. */
331 sf.sf_signum = sig;
332 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
333 bzero(&sf.sf_siginfo, sizeof(sf.sf_siginfo));
334 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
335 /* Signal handler installed with SA_SIGINFO. */
336 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
337 sf.sf_siginfo.si_signo = sig;
338 sf.sf_siginfo.si_code = ksi->ksi_code;
339 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
340 sf.sf_addr = 0;
341 } else {
342 /* Old FreeBSD-style arguments. */
343 sf.sf_arg2 = ksi->ksi_code;
344 sf.sf_addr = (register_t)ksi->ksi_addr;
345 sf.sf_ahu.sf_handler = catcher;
346 }
347 mtx_unlock(&psp->ps_mtx);
348 PROC_UNLOCK(p);
349
350 /* Save most if not all of trap frame. */
351 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
352 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
353 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
354 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
355 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
356 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
357 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
358 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
359 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
360 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
361 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
362 sf.sf_siginfo.si_sc.sc_gs = rgs();
363 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
364
365 /* Build the signal context to be used by osigreturn(). */
366 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
367 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
368 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
369 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
370 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
371 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
372 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
373 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
374
375 /*
376 * If we're a vm86 process, we want to save the segment registers.
377 * We also change eflags to be our emulated eflags, not the actual
378 * eflags.
379 */
380 if (regs->tf_eflags & PSL_VM) {
381 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
382 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
383 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
384
385 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
386 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
387 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
388 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
389
390 if (vm86->vm86_has_vme == 0)
391 sf.sf_siginfo.si_sc.sc_ps =
392 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
393 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
394
395 /* See sendsig() for comments. */
396 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
397 }
398
399 /*
400 * Copy the sigframe out to the user's stack.
401 */
402 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
403 #ifdef DEBUG
404 printf("process %ld has trashed its stack\n", (long)p->p_pid);
405 #endif
406 PROC_LOCK(p);
407 sigexit(td, SIGILL);
408 }
409
410 regs->tf_esp = (int)fp;
411 if (p->p_sysent->sv_sigcode_base != 0) {
412 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
413 szosigcode;
414 } else {
415 /* a.out sysentvec does not use shared page */
416 regs->tf_eip = p->p_sysent->sv_psstrings - szosigcode;
417 }
418 regs->tf_eflags &= ~(PSL_T | PSL_D);
419 regs->tf_cs = _ucodesel;
420 regs->tf_ds = _udatasel;
421 regs->tf_es = _udatasel;
422 regs->tf_fs = _udatasel;
423 load_gs(_udatasel);
424 regs->tf_ss = _udatasel;
425 PROC_LOCK(p);
426 mtx_lock(&psp->ps_mtx);
427 }
428 #endif /* COMPAT_43 */
429
430 #ifdef COMPAT_FREEBSD4
431 static void
432 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
433 {
434 struct sigframe4 sf, *sfp;
435 struct proc *p;
436 struct thread *td;
437 struct sigacts *psp;
438 struct trapframe *regs;
439 int sig;
440 int oonstack;
441
442 td = curthread;
443 p = td->td_proc;
444 PROC_LOCK_ASSERT(p, MA_OWNED);
445 sig = ksi->ksi_signo;
446 psp = p->p_sigacts;
447 mtx_assert(&psp->ps_mtx, MA_OWNED);
448 regs = td->td_frame;
449 oonstack = sigonstack(regs->tf_esp);
450
451 /* Save user context. */
452 bzero(&sf, sizeof(sf));
453 sf.sf_uc.uc_sigmask = *mask;
454 sf.sf_uc.uc_stack = td->td_sigstk;
455 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
456 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
457 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
458 sf.sf_uc.uc_mcontext.mc_gs = rgs();
459 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
460 bzero(sf.sf_uc.uc_mcontext.mc_fpregs,
461 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
462 bzero(sf.sf_uc.uc_mcontext.__spare__,
463 sizeof(sf.sf_uc.uc_mcontext.__spare__));
464 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
465
466 /* Allocate space for the signal handler context. */
467 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
468 SIGISMEMBER(psp->ps_sigonstack, sig)) {
469 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
470 td->td_sigstk.ss_size - sizeof(struct sigframe4));
471 #if defined(COMPAT_43)
472 td->td_sigstk.ss_flags |= SS_ONSTACK;
473 #endif
474 } else
475 sfp = (struct sigframe4 *)regs->tf_esp - 1;
476
477 /* Translate the signal if appropriate. */
478 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
479 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
480
481 /* Build the argument list for the signal handler. */
482 sf.sf_signum = sig;
483 sf.sf_ucontext = (register_t)&sfp->sf_uc;
484 bzero(&sf.sf_si, sizeof(sf.sf_si));
485 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
486 /* Signal handler installed with SA_SIGINFO. */
487 sf.sf_siginfo = (register_t)&sfp->sf_si;
488 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
489
490 /* Fill in POSIX parts */
491 sf.sf_si.si_signo = sig;
492 sf.sf_si.si_code = ksi->ksi_code;
493 sf.sf_si.si_addr = ksi->ksi_addr;
494 } else {
495 /* Old FreeBSD-style arguments. */
496 sf.sf_siginfo = ksi->ksi_code;
497 sf.sf_addr = (register_t)ksi->ksi_addr;
498 sf.sf_ahu.sf_handler = catcher;
499 }
500 mtx_unlock(&psp->ps_mtx);
501 PROC_UNLOCK(p);
502
503 /*
504 * If we're a vm86 process, we want to save the segment registers.
505 * We also change eflags to be our emulated eflags, not the actual
506 * eflags.
507 */
508 if (regs->tf_eflags & PSL_VM) {
509 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
510 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
511
512 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
513 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
514 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
515 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
516
517 if (vm86->vm86_has_vme == 0)
518 sf.sf_uc.uc_mcontext.mc_eflags =
519 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
520 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
521
522 /*
523 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
524 * syscalls made by the signal handler. This just avoids
525 * wasting time for our lazy fixup of such faults. PSL_NT
526 * does nothing in vm86 mode, but vm86 programs can set it
527 * almost legitimately in probes for old cpu types.
528 */
529 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
530 }
531
532 /*
533 * Copy the sigframe out to the user's stack.
534 */
535 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
536 #ifdef DEBUG
537 printf("process %ld has trashed its stack\n", (long)p->p_pid);
538 #endif
539 PROC_LOCK(p);
540 sigexit(td, SIGILL);
541 }
542
543 regs->tf_esp = (int)sfp;
544 regs->tf_eip = p->p_sysent->sv_sigcode_base + szsigcode -
545 szfreebsd4_sigcode;
546 regs->tf_eflags &= ~(PSL_T | PSL_D);
547 regs->tf_cs = _ucodesel;
548 regs->tf_ds = _udatasel;
549 regs->tf_es = _udatasel;
550 regs->tf_fs = _udatasel;
551 regs->tf_ss = _udatasel;
552 PROC_LOCK(p);
553 mtx_lock(&psp->ps_mtx);
554 }
555 #endif /* COMPAT_FREEBSD4 */
556
557 void
558 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
559 {
560 struct sigframe sf, *sfp;
561 struct proc *p;
562 struct thread *td;
563 struct sigacts *psp;
564 char *sp;
565 struct trapframe *regs;
566 struct segment_descriptor *sdp;
567 int sig;
568 int oonstack;
569
570 td = curthread;
571 p = td->td_proc;
572 PROC_LOCK_ASSERT(p, MA_OWNED);
573 sig = ksi->ksi_signo;
574 psp = p->p_sigacts;
575 mtx_assert(&psp->ps_mtx, MA_OWNED);
576 #ifdef COMPAT_FREEBSD4
577 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
578 freebsd4_sendsig(catcher, ksi, mask);
579 return;
580 }
581 #endif
582 #ifdef COMPAT_43
583 if (SIGISMEMBER(psp->ps_osigset, sig)) {
584 osendsig(catcher, ksi, mask);
585 return;
586 }
587 #endif
588 regs = td->td_frame;
589 oonstack = sigonstack(regs->tf_esp);
590
591 /* Save user context. */
592 bzero(&sf, sizeof(sf));
593 sf.sf_uc.uc_sigmask = *mask;
594 sf.sf_uc.uc_stack = td->td_sigstk;
595 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
596 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
597 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
598 sf.sf_uc.uc_mcontext.mc_gs = rgs();
599 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
600 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
601 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
602 fpstate_drop(td);
603 /*
604 * Unconditionally fill the fsbase and gsbase into the mcontext.
605 */
606 sdp = &td->td_pcb->pcb_fsd;
607 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
608 sdp->sd_lobase;
609 sdp = &td->td_pcb->pcb_gsd;
610 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
611 sdp->sd_lobase;
612 sf.sf_uc.uc_mcontext.mc_flags = 0;
613 bzero(sf.sf_uc.uc_mcontext.mc_spare2,
614 sizeof(sf.sf_uc.uc_mcontext.mc_spare2));
615 bzero(sf.sf_uc.__spare__, sizeof(sf.sf_uc.__spare__));
616
617 /* Allocate space for the signal handler context. */
618 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
619 SIGISMEMBER(psp->ps_sigonstack, sig)) {
620 sp = td->td_sigstk.ss_sp +
621 td->td_sigstk.ss_size - sizeof(struct sigframe);
622 #if defined(COMPAT_43)
623 td->td_sigstk.ss_flags |= SS_ONSTACK;
624 #endif
625 } else
626 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
627 /* Align to 16 bytes. */
628 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
629
630 /* Translate the signal if appropriate. */
631 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
632 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
633
634 /* Build the argument list for the signal handler. */
635 sf.sf_signum = sig;
636 sf.sf_ucontext = (register_t)&sfp->sf_uc;
637 bzero(&sf.sf_si, sizeof(sf.sf_si));
638 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
639 /* Signal handler installed with SA_SIGINFO. */
640 sf.sf_siginfo = (register_t)&sfp->sf_si;
641 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
642
643 /* Fill in POSIX parts */
644 sf.sf_si = ksi->ksi_info;
645 sf.sf_si.si_signo = sig; /* maybe a translated signal */
646 } else {
647 /* Old FreeBSD-style arguments. */
648 sf.sf_siginfo = ksi->ksi_code;
649 sf.sf_addr = (register_t)ksi->ksi_addr;
650 sf.sf_ahu.sf_handler = catcher;
651 }
652 mtx_unlock(&psp->ps_mtx);
653 PROC_UNLOCK(p);
654
655 /*
656 * If we're a vm86 process, we want to save the segment registers.
657 * We also change eflags to be our emulated eflags, not the actual
658 * eflags.
659 */
660 if (regs->tf_eflags & PSL_VM) {
661 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
662 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
663
664 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
665 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
666 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
667 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
668
669 if (vm86->vm86_has_vme == 0)
670 sf.sf_uc.uc_mcontext.mc_eflags =
671 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
672 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
673
674 /*
675 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
676 * syscalls made by the signal handler. This just avoids
677 * wasting time for our lazy fixup of such faults. PSL_NT
678 * does nothing in vm86 mode, but vm86 programs can set it
679 * almost legitimately in probes for old cpu types.
680 */
681 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
682 }
683
684 /*
685 * Copy the sigframe out to the user's stack.
686 */
687 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
688 #ifdef DEBUG
689 printf("process %ld has trashed its stack\n", (long)p->p_pid);
690 #endif
691 PROC_LOCK(p);
692 sigexit(td, SIGILL);
693 }
694
695 regs->tf_esp = (int)sfp;
696 regs->tf_eip = p->p_sysent->sv_sigcode_base;
697 regs->tf_eflags &= ~(PSL_T | PSL_D);
698 regs->tf_cs = _ucodesel;
699 regs->tf_ds = _udatasel;
700 regs->tf_es = _udatasel;
701 regs->tf_fs = _udatasel;
702 regs->tf_ss = _udatasel;
703 PROC_LOCK(p);
704 mtx_lock(&psp->ps_mtx);
705 }
706
707 /*
708 * System call to cleanup state after a signal
709 * has been taken. Reset signal mask and
710 * stack state from context left by sendsig (above).
711 * Return to previous pc and psl as specified by
712 * context left by sendsig. Check carefully to
713 * make sure that the user has not modified the
714 * state to gain improper privileges.
715 *
716 * MPSAFE
717 */
718 #ifdef COMPAT_43
719 int
720 osigreturn(td, uap)
721 struct thread *td;
722 struct osigreturn_args /* {
723 struct osigcontext *sigcntxp;
724 } */ *uap;
725 {
726 struct osigcontext sc;
727 struct trapframe *regs;
728 struct osigcontext *scp;
729 int eflags, error;
730 ksiginfo_t ksi;
731
732 regs = td->td_frame;
733 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
734 if (error != 0)
735 return (error);
736 scp = ≻
737 eflags = scp->sc_ps;
738 if (eflags & PSL_VM) {
739 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
740 struct vm86_kernel *vm86;
741
742 /*
743 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
744 * set up the vm86 area, and we can't enter vm86 mode.
745 */
746 if (td->td_pcb->pcb_ext == 0)
747 return (EINVAL);
748 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
749 if (vm86->vm86_inited == 0)
750 return (EINVAL);
751
752 /* Go back to user mode if both flags are set. */
753 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
754 ksiginfo_init_trap(&ksi);
755 ksi.ksi_signo = SIGBUS;
756 ksi.ksi_code = BUS_OBJERR;
757 ksi.ksi_addr = (void *)regs->tf_eip;
758 trapsignal(td, &ksi);
759 }
760
761 if (vm86->vm86_has_vme) {
762 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
763 (eflags & VME_USERCHANGE) | PSL_VM;
764 } else {
765 vm86->vm86_eflags = eflags; /* save VIF, VIP */
766 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
767 (eflags & VM_USERCHANGE) | PSL_VM;
768 }
769 tf->tf_vm86_ds = scp->sc_ds;
770 tf->tf_vm86_es = scp->sc_es;
771 tf->tf_vm86_fs = scp->sc_fs;
772 tf->tf_vm86_gs = scp->sc_gs;
773 tf->tf_ds = _udatasel;
774 tf->tf_es = _udatasel;
775 tf->tf_fs = _udatasel;
776 } else {
777 /*
778 * Don't allow users to change privileged or reserved flags.
779 */
780 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
781 return (EINVAL);
782 }
783
784 /*
785 * Don't allow users to load a valid privileged %cs. Let the
786 * hardware check for invalid selectors, excess privilege in
787 * other selectors, invalid %eip's and invalid %esp's.
788 */
789 if (!CS_SECURE(scp->sc_cs)) {
790 ksiginfo_init_trap(&ksi);
791 ksi.ksi_signo = SIGBUS;
792 ksi.ksi_code = BUS_OBJERR;
793 ksi.ksi_trapno = T_PROTFLT;
794 ksi.ksi_addr = (void *)regs->tf_eip;
795 trapsignal(td, &ksi);
796 return (EINVAL);
797 }
798 regs->tf_ds = scp->sc_ds;
799 regs->tf_es = scp->sc_es;
800 regs->tf_fs = scp->sc_fs;
801 }
802
803 /* Restore remaining registers. */
804 regs->tf_eax = scp->sc_eax;
805 regs->tf_ebx = scp->sc_ebx;
806 regs->tf_ecx = scp->sc_ecx;
807 regs->tf_edx = scp->sc_edx;
808 regs->tf_esi = scp->sc_esi;
809 regs->tf_edi = scp->sc_edi;
810 regs->tf_cs = scp->sc_cs;
811 regs->tf_ss = scp->sc_ss;
812 regs->tf_isp = scp->sc_isp;
813 regs->tf_ebp = scp->sc_fp;
814 regs->tf_esp = scp->sc_sp;
815 regs->tf_eip = scp->sc_pc;
816 regs->tf_eflags = eflags;
817
818 #if defined(COMPAT_43)
819 if (scp->sc_onstack & 1)
820 td->td_sigstk.ss_flags |= SS_ONSTACK;
821 else
822 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
823 #endif
824 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
825 SIGPROCMASK_OLD);
826 return (EJUSTRETURN);
827 }
828 #endif /* COMPAT_43 */
829
830 #ifdef COMPAT_FREEBSD4
831 /*
832 * MPSAFE
833 */
834 int
835 freebsd4_sigreturn(td, uap)
836 struct thread *td;
837 struct freebsd4_sigreturn_args /* {
838 const ucontext4 *sigcntxp;
839 } */ *uap;
840 {
841 struct ucontext4 uc;
842 struct trapframe *regs;
843 struct ucontext4 *ucp;
844 int cs, eflags, error;
845 ksiginfo_t ksi;
846
847 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
848 if (error != 0)
849 return (error);
850 ucp = &uc;
851 regs = td->td_frame;
852 eflags = ucp->uc_mcontext.mc_eflags;
853 if (eflags & PSL_VM) {
854 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
855 struct vm86_kernel *vm86;
856
857 /*
858 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
859 * set up the vm86 area, and we can't enter vm86 mode.
860 */
861 if (td->td_pcb->pcb_ext == 0)
862 return (EINVAL);
863 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
864 if (vm86->vm86_inited == 0)
865 return (EINVAL);
866
867 /* Go back to user mode if both flags are set. */
868 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
869 ksiginfo_init_trap(&ksi);
870 ksi.ksi_signo = SIGBUS;
871 ksi.ksi_code = BUS_OBJERR;
872 ksi.ksi_addr = (void *)regs->tf_eip;
873 trapsignal(td, &ksi);
874 }
875 if (vm86->vm86_has_vme) {
876 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
877 (eflags & VME_USERCHANGE) | PSL_VM;
878 } else {
879 vm86->vm86_eflags = eflags; /* save VIF, VIP */
880 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
881 (eflags & VM_USERCHANGE) | PSL_VM;
882 }
883 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
884 tf->tf_eflags = eflags;
885 tf->tf_vm86_ds = tf->tf_ds;
886 tf->tf_vm86_es = tf->tf_es;
887 tf->tf_vm86_fs = tf->tf_fs;
888 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
889 tf->tf_ds = _udatasel;
890 tf->tf_es = _udatasel;
891 tf->tf_fs = _udatasel;
892 } else {
893 /*
894 * Don't allow users to change privileged or reserved flags.
895 */
896 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
897 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
898 td->td_proc->p_pid, td->td_name, eflags);
899 return (EINVAL);
900 }
901
902 /*
903 * Don't allow users to load a valid privileged %cs. Let the
904 * hardware check for invalid selectors, excess privilege in
905 * other selectors, invalid %eip's and invalid %esp's.
906 */
907 cs = ucp->uc_mcontext.mc_cs;
908 if (!CS_SECURE(cs)) {
909 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
910 td->td_proc->p_pid, td->td_name, cs);
911 ksiginfo_init_trap(&ksi);
912 ksi.ksi_signo = SIGBUS;
913 ksi.ksi_code = BUS_OBJERR;
914 ksi.ksi_trapno = T_PROTFLT;
915 ksi.ksi_addr = (void *)regs->tf_eip;
916 trapsignal(td, &ksi);
917 return (EINVAL);
918 }
919
920 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
921 }
922
923 #if defined(COMPAT_43)
924 if (ucp->uc_mcontext.mc_onstack & 1)
925 td->td_sigstk.ss_flags |= SS_ONSTACK;
926 else
927 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
928 #endif
929 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
930 return (EJUSTRETURN);
931 }
932 #endif /* COMPAT_FREEBSD4 */
933
934 /*
935 * MPSAFE
936 */
937 int
938 sys_sigreturn(td, uap)
939 struct thread *td;
940 struct sigreturn_args /* {
941 const struct __ucontext *sigcntxp;
942 } */ *uap;
943 {
944 ucontext_t uc;
945 struct trapframe *regs;
946 ucontext_t *ucp;
947 int cs, eflags, error, ret;
948 ksiginfo_t ksi;
949
950 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
951 if (error != 0)
952 return (error);
953 ucp = &uc;
954 regs = td->td_frame;
955 eflags = ucp->uc_mcontext.mc_eflags;
956 if (eflags & PSL_VM) {
957 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
958 struct vm86_kernel *vm86;
959
960 /*
961 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
962 * set up the vm86 area, and we can't enter vm86 mode.
963 */
964 if (td->td_pcb->pcb_ext == 0)
965 return (EINVAL);
966 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
967 if (vm86->vm86_inited == 0)
968 return (EINVAL);
969
970 /* Go back to user mode if both flags are set. */
971 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
972 ksiginfo_init_trap(&ksi);
973 ksi.ksi_signo = SIGBUS;
974 ksi.ksi_code = BUS_OBJERR;
975 ksi.ksi_addr = (void *)regs->tf_eip;
976 trapsignal(td, &ksi);
977 }
978
979 if (vm86->vm86_has_vme) {
980 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
981 (eflags & VME_USERCHANGE) | PSL_VM;
982 } else {
983 vm86->vm86_eflags = eflags; /* save VIF, VIP */
984 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
985 (eflags & VM_USERCHANGE) | PSL_VM;
986 }
987 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
988 tf->tf_eflags = eflags;
989 tf->tf_vm86_ds = tf->tf_ds;
990 tf->tf_vm86_es = tf->tf_es;
991 tf->tf_vm86_fs = tf->tf_fs;
992 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
993 tf->tf_ds = _udatasel;
994 tf->tf_es = _udatasel;
995 tf->tf_fs = _udatasel;
996 } else {
997 /*
998 * Don't allow users to change privileged or reserved flags.
999 */
1000 if (!EFL_SECURE(eflags, regs->tf_eflags)) {
1001 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1002 td->td_proc->p_pid, td->td_name, eflags);
1003 return (EINVAL);
1004 }
1005
1006 /*
1007 * Don't allow users to load a valid privileged %cs. Let the
1008 * hardware check for invalid selectors, excess privilege in
1009 * other selectors, invalid %eip's and invalid %esp's.
1010 */
1011 cs = ucp->uc_mcontext.mc_cs;
1012 if (!CS_SECURE(cs)) {
1013 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1014 td->td_proc->p_pid, td->td_name, cs);
1015 ksiginfo_init_trap(&ksi);
1016 ksi.ksi_signo = SIGBUS;
1017 ksi.ksi_code = BUS_OBJERR;
1018 ksi.ksi_trapno = T_PROTFLT;
1019 ksi.ksi_addr = (void *)regs->tf_eip;
1020 trapsignal(td, &ksi);
1021 return (EINVAL);
1022 }
1023
1024 ret = set_fpcontext(td, &ucp->uc_mcontext);
1025 if (ret != 0)
1026 return (ret);
1027 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1028 }
1029
1030 #if defined(COMPAT_43)
1031 if (ucp->uc_mcontext.mc_onstack & 1)
1032 td->td_sigstk.ss_flags |= SS_ONSTACK;
1033 else
1034 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1035 #endif
1036
1037 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1038 return (EJUSTRETURN);
1039 }
1040
1041 /*
1042 * Machine dependent boot() routine
1043 *
1044 * I haven't seen anything to put here yet
1045 * Possibly some stuff might be grafted back here from boot()
1046 */
1047 void
1048 cpu_boot(int howto)
1049 {
1050 }
1051
1052 /*
1053 * Flush the D-cache for non-DMA I/O so that the I-cache can
1054 * be made coherent later.
1055 */
1056 void
1057 cpu_flush_dcache(void *ptr, size_t len)
1058 {
1059 /* Not applicable */
1060 }
1061
1062 /* Get current clock frequency for the given cpu id. */
1063 int
1064 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1065 {
1066 uint64_t tsc1, tsc2;
1067 register_t reg;
1068
1069 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1070 return (EINVAL);
1071 if ((cpu_feature & CPUID_TSC) == 0)
1072 return (EOPNOTSUPP);
1073
1074 #ifdef SMP
1075 if (smp_cpus > 1) {
1076 /* Schedule ourselves on the indicated cpu. */
1077 thread_lock(curthread);
1078 sched_bind(curthread, cpu_id);
1079 thread_unlock(curthread);
1080 }
1081 #endif
1082
1083 /* Calibrate by measuring a short delay. */
1084 reg = intr_disable();
1085 tsc1 = rdtsc();
1086 DELAY(1000);
1087 tsc2 = rdtsc();
1088 intr_restore(reg);
1089 *rate = (tsc2 - tsc1) * 1000;
1090
1091 #ifdef SMP
1092 if (smp_cpus > 1) {
1093 thread_lock(curthread);
1094 sched_unbind(curthread);
1095 thread_unlock(curthread);
1096 }
1097 #endif
1098
1099 return (0);
1100 }
1101
1102
1103 /*
1104 * Shutdown the CPU as much as possible
1105 */
1106 void
1107 cpu_halt(void)
1108 {
1109 for (;;)
1110 __asm__ ("hlt");
1111 }
1112
1113 static int idle_mwait = 1; /* Use MONITOR/MWAIT for short idle. */
1114 TUNABLE_INT("machdep.idle_mwait", &idle_mwait);
1115 SYSCTL_INT(_machdep, OID_AUTO, idle_mwait, CTLFLAG_RW, &idle_mwait,
1116 0, "Use MONITOR/MWAIT for short idle");
1117
1118 #define STATE_RUNNING 0x0
1119 #define STATE_MWAIT 0x1
1120 #define STATE_SLEEPING 0x2
1121
1122 static void
1123 cpu_idle_hlt(int busy)
1124 {
1125 int *state;
1126
1127 state = (int *)PCPU_PTR(monitorbuf);
1128 *state = STATE_SLEEPING;
1129 /*
1130 * We must absolutely guarentee that hlt is the next instruction
1131 * after sti or we introduce a timing window.
1132 */
1133 disable_intr();
1134 if (sched_runnable())
1135 enable_intr();
1136 else
1137 __asm __volatile("sti; hlt");
1138 *state = STATE_RUNNING;
1139 }
1140
1141 /*
1142 * MWAIT cpu power states. Lower 4 bits are sub-states.
1143 */
1144 #define MWAIT_C0 0xf0
1145 #define MWAIT_C1 0x00
1146 #define MWAIT_C2 0x10
1147 #define MWAIT_C3 0x20
1148 #define MWAIT_C4 0x30
1149
1150 static void
1151 cpu_idle_mwait(int busy)
1152 {
1153 int *state;
1154
1155 state = (int *)PCPU_PTR(monitorbuf);
1156 *state = STATE_MWAIT;
1157 if (!sched_runnable()) {
1158 cpu_monitor(state, 0, 0);
1159 if (*state == STATE_MWAIT)
1160 cpu_mwait(0, MWAIT_C1);
1161 }
1162 *state = STATE_RUNNING;
1163 }
1164
1165 static void
1166 cpu_idle_spin(int busy)
1167 {
1168 int *state;
1169 int i;
1170
1171 state = (int *)PCPU_PTR(monitorbuf);
1172 *state = STATE_RUNNING;
1173 for (i = 0; i < 1000; i++) {
1174 if (sched_runnable())
1175 return;
1176 cpu_spinwait();
1177 }
1178 }
1179
1180 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1181
1182 void
1183 cpu_idle(int busy)
1184 {
1185
1186 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
1187 busy, curcpu);
1188 #if defined(MP_WATCHDOG)
1189 ap_watchdog(PCPU_GET(cpuid));
1190 #endif
1191 /* If we are busy - try to use fast methods. */
1192 if (busy) {
1193 if ((cpu_feature2 & CPUID2_MON) && idle_mwait) {
1194 cpu_idle_mwait(busy);
1195 goto out;
1196 }
1197 }
1198
1199 /* If we have time - switch timers into idle mode. */
1200 if (!busy) {
1201 critical_enter();
1202 cpu_idleclock();
1203 }
1204
1205 /* Call main idle method. */
1206 cpu_idle_fn(busy);
1207
1208 /* Switch timers mack into active mode. */
1209 if (!busy) {
1210 cpu_activeclock();
1211 critical_exit();
1212 }
1213 out:
1214 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
1215 busy, curcpu);
1216 }
1217
1218 int
1219 cpu_idle_wakeup(int cpu)
1220 {
1221 struct pcpu *pcpu;
1222 int *state;
1223
1224 pcpu = pcpu_find(cpu);
1225 state = (int *)pcpu->pc_monitorbuf;
1226 /*
1227 * This doesn't need to be atomic since missing the race will
1228 * simply result in unnecessary IPIs.
1229 */
1230 if (*state == STATE_SLEEPING)
1231 return (0);
1232 if (*state == STATE_MWAIT)
1233 *state = STATE_RUNNING;
1234 return (1);
1235 }
1236
1237 /*
1238 * Ordered by speed/power consumption.
1239 */
1240 struct {
1241 void *id_fn;
1242 char *id_name;
1243 } idle_tbl[] = {
1244 { cpu_idle_spin, "spin" },
1245 { cpu_idle_mwait, "mwait" },
1246 { cpu_idle_hlt, "hlt" },
1247 { NULL, NULL }
1248 };
1249
1250 static int
1251 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1252 {
1253 char *avail, *p;
1254 int error;
1255 int i;
1256
1257 avail = malloc(256, M_TEMP, M_WAITOK);
1258 p = avail;
1259 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1260 if (strstr(idle_tbl[i].id_name, "mwait") &&
1261 (cpu_feature2 & CPUID2_MON) == 0)
1262 continue;
1263 p += sprintf(p, "%s%s", p != avail ? ", " : "",
1264 idle_tbl[i].id_name);
1265 }
1266 error = sysctl_handle_string(oidp, avail, 0, req);
1267 free(avail, M_TEMP);
1268 return (error);
1269 }
1270
1271 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1272 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1273
1274 static int
1275 idle_sysctl(SYSCTL_HANDLER_ARGS)
1276 {
1277 char buf[16];
1278 int error;
1279 char *p;
1280 int i;
1281
1282 p = "unknown";
1283 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1284 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1285 p = idle_tbl[i].id_name;
1286 break;
1287 }
1288 }
1289 strncpy(buf, p, sizeof(buf));
1290 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1291 if (error != 0 || req->newptr == NULL)
1292 return (error);
1293 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1294 if (strstr(idle_tbl[i].id_name, "mwait") &&
1295 (cpu_feature2 & CPUID2_MON) == 0)
1296 continue;
1297 if (strcmp(idle_tbl[i].id_name, buf))
1298 continue;
1299 cpu_idle_fn = idle_tbl[i].id_fn;
1300 return (0);
1301 }
1302 return (EINVAL);
1303 }
1304
1305 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1306 idle_sysctl, "A", "currently selected idle function");
1307
1308 uint64_t (*atomic_load_acq_64)(volatile uint64_t *) =
1309 atomic_load_acq_64_i386;
1310 void (*atomic_store_rel_64)(volatile uint64_t *, uint64_t) =
1311 atomic_store_rel_64_i386;
1312
1313 static void
1314 cpu_probe_cmpxchg8b(void)
1315 {
1316
1317 if ((cpu_feature & CPUID_CX8) != 0) {
1318 atomic_load_acq_64 = atomic_load_acq_64_i586;
1319 atomic_store_rel_64 = atomic_store_rel_64_i586;
1320 }
1321 }
1322
1323 /*
1324 * Reset registers to default values on exec.
1325 */
1326 void
1327 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
1328 {
1329 struct trapframe *regs = td->td_frame;
1330 struct pcb *pcb = td->td_pcb;
1331
1332 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1333 pcb->pcb_gs = _udatasel;
1334 load_gs(_udatasel);
1335
1336 mtx_lock_spin(&dt_lock);
1337 if (td->td_proc->p_md.md_ldt)
1338 user_ldt_free(td);
1339 else
1340 mtx_unlock_spin(&dt_lock);
1341
1342 bzero((char *)regs, sizeof(struct trapframe));
1343 regs->tf_eip = imgp->entry_addr;
1344 regs->tf_esp = stack;
1345 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1346 regs->tf_ss = _udatasel;
1347 regs->tf_ds = _udatasel;
1348 regs->tf_es = _udatasel;
1349 regs->tf_fs = _udatasel;
1350 regs->tf_cs = _ucodesel;
1351
1352 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1353 regs->tf_ebx = imgp->ps_strings;
1354
1355 /*
1356 * Reset the hardware debug registers if they were in use.
1357 * They won't have any meaning for the newly exec'd process.
1358 */
1359 if (pcb->pcb_flags & PCB_DBREGS) {
1360 pcb->pcb_dr0 = 0;
1361 pcb->pcb_dr1 = 0;
1362 pcb->pcb_dr2 = 0;
1363 pcb->pcb_dr3 = 0;
1364 pcb->pcb_dr6 = 0;
1365 pcb->pcb_dr7 = 0;
1366 if (pcb == curpcb) {
1367 /*
1368 * Clear the debug registers on the running
1369 * CPU, otherwise they will end up affecting
1370 * the next process we switch to.
1371 */
1372 reset_dbregs();
1373 }
1374 pcb->pcb_flags &= ~PCB_DBREGS;
1375 }
1376
1377 /*
1378 * Initialize the math emulator (if any) for the current process.
1379 * Actually, just clear the bit that says that the emulator has
1380 * been initialized. Initialization is delayed until the process
1381 * traps to the emulator (if it is done at all) mainly because
1382 * emulators don't provide an entry point for initialization.
1383 */
1384 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1385 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1386
1387 /*
1388 * Drop the FP state if we hold it, so that the process gets a
1389 * clean FP state if it uses the FPU again.
1390 */
1391 fpstate_drop(td);
1392
1393 /*
1394 * XXX - Linux emulator
1395 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1396 * on it.
1397 */
1398 td->td_retval[1] = 0;
1399 }
1400
1401 void
1402 cpu_setregs(void)
1403 {
1404 unsigned int cr0;
1405
1406 cr0 = rcr0();
1407
1408 /*
1409 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1410 *
1411 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1412 * instructions. We must set the CR0_MP bit and use the CR0_TS
1413 * bit to control the trap, because setting the CR0_EM bit does
1414 * not cause WAIT instructions to trap. It's important to trap
1415 * WAIT instructions - otherwise the "wait" variants of no-wait
1416 * control instructions would degenerate to the "no-wait" variants
1417 * after FP context switches but work correctly otherwise. It's
1418 * particularly important to trap WAITs when there is no NPX -
1419 * otherwise the "wait" variants would always degenerate.
1420 *
1421 * Try setting CR0_NE to get correct error reporting on 486DX's.
1422 * Setting it should fail or do nothing on lesser processors.
1423 */
1424 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1425 load_cr0(cr0);
1426 load_gs(_udatasel);
1427 }
1428
1429 u_long bootdev; /* not a struct cdev *- encoding is different */
1430 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1431 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1432
1433 /*
1434 * Initialize 386 and configure to run kernel
1435 */
1436
1437 /*
1438 * Initialize segments & interrupt table
1439 */
1440
1441 int _default_ldt;
1442
1443 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1444 union descriptor ldt[NLDT]; /* local descriptor table */
1445 static struct gate_descriptor idt0[NIDT];
1446 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1447 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1448 struct mtx dt_lock; /* lock for GDT and LDT */
1449
1450 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1451 extern int has_f00f_bug;
1452 #endif
1453
1454 static struct i386tss dblfault_tss;
1455 static char dblfault_stack[PAGE_SIZE];
1456
1457 extern vm_offset_t proc0kstack;
1458
1459
1460 /*
1461 * software prototypes -- in more palatable form.
1462 *
1463 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1464 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1465 */
1466 struct soft_segment_descriptor gdt_segs[] = {
1467 /* GNULL_SEL 0 Null Descriptor */
1468 { .ssd_base = 0x0,
1469 .ssd_limit = 0x0,
1470 .ssd_type = 0,
1471 .ssd_dpl = SEL_KPL,
1472 .ssd_p = 0,
1473 .ssd_xx = 0, .ssd_xx1 = 0,
1474 .ssd_def32 = 0,
1475 .ssd_gran = 0 },
1476 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1477 { .ssd_base = 0x0,
1478 .ssd_limit = 0xfffff,
1479 .ssd_type = SDT_MEMRWA,
1480 .ssd_dpl = SEL_KPL,
1481 .ssd_p = 1,
1482 .ssd_xx = 0, .ssd_xx1 = 0,
1483 .ssd_def32 = 1,
1484 .ssd_gran = 1 },
1485 /* GUFS_SEL 2 %fs Descriptor for user */
1486 { .ssd_base = 0x0,
1487 .ssd_limit = 0xfffff,
1488 .ssd_type = SDT_MEMRWA,
1489 .ssd_dpl = SEL_UPL,
1490 .ssd_p = 1,
1491 .ssd_xx = 0, .ssd_xx1 = 0,
1492 .ssd_def32 = 1,
1493 .ssd_gran = 1 },
1494 /* GUGS_SEL 3 %gs Descriptor for user */
1495 { .ssd_base = 0x0,
1496 .ssd_limit = 0xfffff,
1497 .ssd_type = SDT_MEMRWA,
1498 .ssd_dpl = SEL_UPL,
1499 .ssd_p = 1,
1500 .ssd_xx = 0, .ssd_xx1 = 0,
1501 .ssd_def32 = 1,
1502 .ssd_gran = 1 },
1503 /* GCODE_SEL 4 Code Descriptor for kernel */
1504 { .ssd_base = 0x0,
1505 .ssd_limit = 0xfffff,
1506 .ssd_type = SDT_MEMERA,
1507 .ssd_dpl = SEL_KPL,
1508 .ssd_p = 1,
1509 .ssd_xx = 0, .ssd_xx1 = 0,
1510 .ssd_def32 = 1,
1511 .ssd_gran = 1 },
1512 /* GDATA_SEL 5 Data Descriptor for kernel */
1513 { .ssd_base = 0x0,
1514 .ssd_limit = 0xfffff,
1515 .ssd_type = SDT_MEMRWA,
1516 .ssd_dpl = SEL_KPL,
1517 .ssd_p = 1,
1518 .ssd_xx = 0, .ssd_xx1 = 0,
1519 .ssd_def32 = 1,
1520 .ssd_gran = 1 },
1521 /* GUCODE_SEL 6 Code Descriptor for user */
1522 { .ssd_base = 0x0,
1523 .ssd_limit = 0xfffff,
1524 .ssd_type = SDT_MEMERA,
1525 .ssd_dpl = SEL_UPL,
1526 .ssd_p = 1,
1527 .ssd_xx = 0, .ssd_xx1 = 0,
1528 .ssd_def32 = 1,
1529 .ssd_gran = 1 },
1530 /* GUDATA_SEL 7 Data Descriptor for user */
1531 { .ssd_base = 0x0,
1532 .ssd_limit = 0xfffff,
1533 .ssd_type = SDT_MEMRWA,
1534 .ssd_dpl = SEL_UPL,
1535 .ssd_p = 1,
1536 .ssd_xx = 0, .ssd_xx1 = 0,
1537 .ssd_def32 = 1,
1538 .ssd_gran = 1 },
1539 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1540 { .ssd_base = 0x400,
1541 .ssd_limit = 0xfffff,
1542 .ssd_type = SDT_MEMRWA,
1543 .ssd_dpl = SEL_KPL,
1544 .ssd_p = 1,
1545 .ssd_xx = 0, .ssd_xx1 = 0,
1546 .ssd_def32 = 1,
1547 .ssd_gran = 1 },
1548 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1549 {
1550 .ssd_base = 0x0,
1551 .ssd_limit = sizeof(struct i386tss)-1,
1552 .ssd_type = SDT_SYS386TSS,
1553 .ssd_dpl = 0,
1554 .ssd_p = 1,
1555 .ssd_xx = 0, .ssd_xx1 = 0,
1556 .ssd_def32 = 0,
1557 .ssd_gran = 0 },
1558 /* GLDT_SEL 10 LDT Descriptor */
1559 { .ssd_base = (int) ldt,
1560 .ssd_limit = sizeof(ldt)-1,
1561 .ssd_type = SDT_SYSLDT,
1562 .ssd_dpl = SEL_UPL,
1563 .ssd_p = 1,
1564 .ssd_xx = 0, .ssd_xx1 = 0,
1565 .ssd_def32 = 0,
1566 .ssd_gran = 0 },
1567 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1568 { .ssd_base = (int) ldt,
1569 .ssd_limit = (512 * sizeof(union descriptor)-1),
1570 .ssd_type = SDT_SYSLDT,
1571 .ssd_dpl = 0,
1572 .ssd_p = 1,
1573 .ssd_xx = 0, .ssd_xx1 = 0,
1574 .ssd_def32 = 0,
1575 .ssd_gran = 0 },
1576 /* GPANIC_SEL 12 Panic Tss Descriptor */
1577 { .ssd_base = (int) &dblfault_tss,
1578 .ssd_limit = sizeof(struct i386tss)-1,
1579 .ssd_type = SDT_SYS386TSS,
1580 .ssd_dpl = 0,
1581 .ssd_p = 1,
1582 .ssd_xx = 0, .ssd_xx1 = 0,
1583 .ssd_def32 = 0,
1584 .ssd_gran = 0 },
1585 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1586 { .ssd_base = 0,
1587 .ssd_limit = 0xfffff,
1588 .ssd_type = SDT_MEMERA,
1589 .ssd_dpl = 0,
1590 .ssd_p = 1,
1591 .ssd_xx = 0, .ssd_xx1 = 0,
1592 .ssd_def32 = 0,
1593 .ssd_gran = 1 },
1594 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1595 { .ssd_base = 0,
1596 .ssd_limit = 0xfffff,
1597 .ssd_type = SDT_MEMERA,
1598 .ssd_dpl = 0,
1599 .ssd_p = 1,
1600 .ssd_xx = 0, .ssd_xx1 = 0,
1601 .ssd_def32 = 0,
1602 .ssd_gran = 1 },
1603 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1604 { .ssd_base = 0,
1605 .ssd_limit = 0xfffff,
1606 .ssd_type = SDT_MEMRWA,
1607 .ssd_dpl = 0,
1608 .ssd_p = 1,
1609 .ssd_xx = 0, .ssd_xx1 = 0,
1610 .ssd_def32 = 1,
1611 .ssd_gran = 1 },
1612 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1613 { .ssd_base = 0,
1614 .ssd_limit = 0xfffff,
1615 .ssd_type = SDT_MEMRWA,
1616 .ssd_dpl = 0,
1617 .ssd_p = 1,
1618 .ssd_xx = 0, .ssd_xx1 = 0,
1619 .ssd_def32 = 0,
1620 .ssd_gran = 1 },
1621 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1622 { .ssd_base = 0,
1623 .ssd_limit = 0xfffff,
1624 .ssd_type = SDT_MEMRWA,
1625 .ssd_dpl = 0,
1626 .ssd_p = 1,
1627 .ssd_xx = 0, .ssd_xx1 = 0,
1628 .ssd_def32 = 0,
1629 .ssd_gran = 1 },
1630 /* GNDIS_SEL 18 NDIS Descriptor */
1631 { .ssd_base = 0x0,
1632 .ssd_limit = 0x0,
1633 .ssd_type = 0,
1634 .ssd_dpl = 0,
1635 .ssd_p = 0,
1636 .ssd_xx = 0, .ssd_xx1 = 0,
1637 .ssd_def32 = 0,
1638 .ssd_gran = 0 },
1639 };
1640
1641 static struct soft_segment_descriptor ldt_segs[] = {
1642 /* Null Descriptor - overwritten by call gate */
1643 { .ssd_base = 0x0,
1644 .ssd_limit = 0x0,
1645 .ssd_type = 0,
1646 .ssd_dpl = 0,
1647 .ssd_p = 0,
1648 .ssd_xx = 0, .ssd_xx1 = 0,
1649 .ssd_def32 = 0,
1650 .ssd_gran = 0 },
1651 /* Null Descriptor - overwritten by call gate */
1652 { .ssd_base = 0x0,
1653 .ssd_limit = 0x0,
1654 .ssd_type = 0,
1655 .ssd_dpl = 0,
1656 .ssd_p = 0,
1657 .ssd_xx = 0, .ssd_xx1 = 0,
1658 .ssd_def32 = 0,
1659 .ssd_gran = 0 },
1660 /* Null Descriptor - overwritten by call gate */
1661 { .ssd_base = 0x0,
1662 .ssd_limit = 0x0,
1663 .ssd_type = 0,
1664 .ssd_dpl = 0,
1665 .ssd_p = 0,
1666 .ssd_xx = 0, .ssd_xx1 = 0,
1667 .ssd_def32 = 0,
1668 .ssd_gran = 0 },
1669 /* Code Descriptor for user */
1670 { .ssd_base = 0x0,
1671 .ssd_limit = 0xfffff,
1672 .ssd_type = SDT_MEMERA,
1673 .ssd_dpl = SEL_UPL,
1674 .ssd_p = 1,
1675 .ssd_xx = 0, .ssd_xx1 = 0,
1676 .ssd_def32 = 1,
1677 .ssd_gran = 1 },
1678 /* Null Descriptor - overwritten by call gate */
1679 { .ssd_base = 0x0,
1680 .ssd_limit = 0x0,
1681 .ssd_type = 0,
1682 .ssd_dpl = 0,
1683 .ssd_p = 0,
1684 .ssd_xx = 0, .ssd_xx1 = 0,
1685 .ssd_def32 = 0,
1686 .ssd_gran = 0 },
1687 /* Data Descriptor for user */
1688 { .ssd_base = 0x0,
1689 .ssd_limit = 0xfffff,
1690 .ssd_type = SDT_MEMRWA,
1691 .ssd_dpl = SEL_UPL,
1692 .ssd_p = 1,
1693 .ssd_xx = 0, .ssd_xx1 = 0,
1694 .ssd_def32 = 1,
1695 .ssd_gran = 1 },
1696 };
1697
1698 void
1699 setidt(idx, func, typ, dpl, selec)
1700 int idx;
1701 inthand_t *func;
1702 int typ;
1703 int dpl;
1704 int selec;
1705 {
1706 struct gate_descriptor *ip;
1707
1708 ip = idt + idx;
1709 ip->gd_looffset = (int)func;
1710 ip->gd_selector = selec;
1711 ip->gd_stkcpy = 0;
1712 ip->gd_xx = 0;
1713 ip->gd_type = typ;
1714 ip->gd_dpl = dpl;
1715 ip->gd_p = 1;
1716 ip->gd_hioffset = ((int)func)>>16 ;
1717 }
1718
1719 extern inthand_t
1720 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1721 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1722 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1723 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1724 IDTVEC(xmm),
1725 #ifdef KDTRACE_HOOKS
1726 IDTVEC(dtrace_ret),
1727 #endif
1728 IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1729
1730 #ifdef DDB
1731 /*
1732 * Display the index and function name of any IDT entries that don't use
1733 * the default 'rsvd' entry point.
1734 */
1735 DB_SHOW_COMMAND(idt, db_show_idt)
1736 {
1737 struct gate_descriptor *ip;
1738 int idx;
1739 uintptr_t func;
1740
1741 ip = idt;
1742 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1743 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1744 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1745 db_printf("%3d\t", idx);
1746 db_printsym(func, DB_STGY_PROC);
1747 db_printf("\n");
1748 }
1749 ip++;
1750 }
1751 }
1752
1753 /* Show privileged registers. */
1754 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1755 {
1756 uint64_t idtr, gdtr;
1757
1758 idtr = ridt();
1759 db_printf("idtr\t0x%08x/%04x\n",
1760 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1761 gdtr = rgdt();
1762 db_printf("gdtr\t0x%08x/%04x\n",
1763 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1764 db_printf("ldtr\t0x%04x\n", rldt());
1765 db_printf("tr\t0x%04x\n", rtr());
1766 db_printf("cr0\t0x%08x\n", rcr0());
1767 db_printf("cr2\t0x%08x\n", rcr2());
1768 db_printf("cr3\t0x%08x\n", rcr3());
1769 db_printf("cr4\t0x%08x\n", rcr4());
1770 }
1771 #endif
1772
1773 void
1774 sdtossd(sd, ssd)
1775 struct segment_descriptor *sd;
1776 struct soft_segment_descriptor *ssd;
1777 {
1778 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1779 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1780 ssd->ssd_type = sd->sd_type;
1781 ssd->ssd_dpl = sd->sd_dpl;
1782 ssd->ssd_p = sd->sd_p;
1783 ssd->ssd_def32 = sd->sd_def32;
1784 ssd->ssd_gran = sd->sd_gran;
1785 }
1786
1787 static void
1788 basemem_setup(void)
1789 {
1790 vm_paddr_t pa;
1791 pt_entry_t *pte;
1792 int i;
1793
1794 if (basemem > 640) {
1795 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1796 basemem);
1797 basemem = 640;
1798 }
1799
1800 /*
1801 * XXX if biosbasemem is now < 640, there is a `hole'
1802 * between the end of base memory and the start of
1803 * ISA memory. The hole may be empty or it may
1804 * contain BIOS code or data. Map it read/write so
1805 * that the BIOS can write to it. (Memory from 0 to
1806 * the physical end of the kernel is mapped read-only
1807 * to begin with and then parts of it are remapped.
1808 * The parts that aren't remapped form holes that
1809 * remain read-only and are unused by the kernel.
1810 * The base memory area is below the physical end of
1811 * the kernel and right now forms a read-only hole.
1812 * The part of it from PAGE_SIZE to
1813 * (trunc_page(biosbasemem * 1024) - 1) will be
1814 * remapped and used by the kernel later.)
1815 *
1816 * This code is similar to the code used in
1817 * pmap_mapdev, but since no memory needs to be
1818 * allocated we simply change the mapping.
1819 */
1820 for (pa = trunc_page(basemem * 1024);
1821 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1822 pmap_kenter(KERNBASE + pa, pa);
1823
1824 /*
1825 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
1826 * the vm86 page table so that vm86 can scribble on them using
1827 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
1828 * page 0, at least as initialized here?
1829 */
1830 pte = (pt_entry_t *)vm86paddr;
1831 for (i = basemem / 4; i < 160; i++)
1832 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1833 }
1834
1835 /*
1836 * Populate the (physmap) array with base/bound pairs describing the
1837 * available physical memory in the system, then test this memory and
1838 * build the phys_avail array describing the actually-available memory.
1839 *
1840 * If we cannot accurately determine the physical memory map, then use
1841 * value from the 0xE801 call, and failing that, the RTC.
1842 *
1843 * Total memory size may be set by the kernel environment variable
1844 * hw.physmem or the compile-time define MAXMEM.
1845 *
1846 * XXX first should be vm_paddr_t.
1847 */
1848 static void
1849 getmemsize(int first)
1850 {
1851 int off, physmap_idx, pa_indx, da_indx;
1852 u_long physmem_tunable, memtest;
1853 vm_paddr_t physmap[PHYSMAP_SIZE];
1854 pt_entry_t *pte;
1855 quad_t dcons_addr, dcons_size;
1856 int i;
1857 int pg_n;
1858 u_int extmem;
1859 u_int under16;
1860 vm_paddr_t pa;
1861
1862 bzero(physmap, sizeof(physmap));
1863
1864 /* XXX - some of EPSON machines can't use PG_N */
1865 pg_n = PG_N;
1866 if (pc98_machine_type & M_EPSON_PC98) {
1867 switch (epson_machine_id) {
1868 #ifdef WB_CACHE
1869 default:
1870 #endif
1871 case EPSON_PC486_HX:
1872 case EPSON_PC486_HG:
1873 case EPSON_PC486_HA:
1874 pg_n = 0;
1875 break;
1876 }
1877 }
1878
1879 under16 = pc98_getmemsize(&basemem, &extmem);
1880 basemem_setup();
1881
1882 physmap[0] = 0;
1883 physmap[1] = basemem * 1024;
1884 physmap_idx = 2;
1885 physmap[physmap_idx] = 0x100000;
1886 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1887
1888 /*
1889 * Now, physmap contains a map of physical memory.
1890 */
1891
1892 #ifdef SMP
1893 /* make hole for AP bootstrap code */
1894 physmap[1] = mp_bootaddress(physmap[1]);
1895 #endif
1896
1897 /*
1898 * Maxmem isn't the "maximum memory", it's one larger than the
1899 * highest page of the physical address space. It should be
1900 * called something like "Maxphyspage". We may adjust this
1901 * based on ``hw.physmem'' and the results of the memory test.
1902 */
1903 Maxmem = atop(physmap[physmap_idx + 1]);
1904
1905 #ifdef MAXMEM
1906 Maxmem = MAXMEM / 4;
1907 #endif
1908
1909 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1910 Maxmem = atop(physmem_tunable);
1911
1912 /*
1913 * By default keep the memtest enabled. Use a general name so that
1914 * one could eventually do more with the code than just disable it.
1915 */
1916 memtest = 1;
1917 TUNABLE_ULONG_FETCH("hw.memtest.tests", &memtest);
1918
1919 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1920 (boothowto & RB_VERBOSE))
1921 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1922
1923 /*
1924 * If Maxmem has been increased beyond what the system has detected,
1925 * extend the last memory segment to the new limit.
1926 */
1927 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1928 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1929
1930 /*
1931 * We need to divide chunk if Maxmem is larger than 16MB and
1932 * under 16MB area is not full of memory.
1933 * (1) system area (15-16MB region) is cut off
1934 * (2) extended memory is only over 16MB area (ex. Melco "HYPERMEMORY")
1935 */
1936 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1937 /* 15M - 16M region is cut off, so need to divide chunk */
1938 physmap[physmap_idx + 1] = under16 * 1024;
1939 physmap_idx += 2;
1940 physmap[physmap_idx] = 0x1000000;
1941 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1942 }
1943
1944 /* call pmap initialization to make new kernel address space */
1945 pmap_bootstrap(first);
1946
1947 /*
1948 * Size up each available chunk of physical memory.
1949 */
1950 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1951 pa_indx = 0;
1952 da_indx = 1;
1953 phys_avail[pa_indx++] = physmap[0];
1954 phys_avail[pa_indx] = physmap[0];
1955 dump_avail[da_indx] = physmap[0];
1956 pte = CMAP3;
1957
1958 /*
1959 * Get dcons buffer address
1960 */
1961 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1962 getenv_quad("dcons.size", &dcons_size) == 0)
1963 dcons_addr = 0;
1964
1965 /*
1966 * physmap is in bytes, so when converting to page boundaries,
1967 * round up the start address and round down the end address.
1968 */
1969 for (i = 0; i <= physmap_idx; i += 2) {
1970 vm_paddr_t end;
1971
1972 end = ptoa((vm_paddr_t)Maxmem);
1973 if (physmap[i + 1] < end)
1974 end = trunc_page(physmap[i + 1]);
1975 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1976 int tmp, page_bad, full;
1977 int *ptr = (int *)CADDR3;
1978
1979 full = FALSE;
1980 /*
1981 * block out kernel memory as not available.
1982 */
1983 if (pa >= KERNLOAD && pa < first)
1984 goto do_dump_avail;
1985
1986 /*
1987 * block out dcons buffer
1988 */
1989 if (dcons_addr > 0
1990 && pa >= trunc_page(dcons_addr)
1991 && pa < dcons_addr + dcons_size)
1992 goto do_dump_avail;
1993
1994 page_bad = FALSE;
1995 if (memtest == 0)
1996 goto skip_memtest;
1997
1998 /*
1999 * map page into kernel: valid, read/write,non-cacheable
2000 */
2001 *pte = pa | PG_V | PG_RW | pg_n;
2002 invltlb();
2003
2004 tmp = *(int *)ptr;
2005 /*
2006 * Test for alternating 1's and 0's
2007 */
2008 *(volatile int *)ptr = 0xaaaaaaaa;
2009 if (*(volatile int *)ptr != 0xaaaaaaaa)
2010 page_bad = TRUE;
2011 /*
2012 * Test for alternating 0's and 1's
2013 */
2014 *(volatile int *)ptr = 0x55555555;
2015 if (*(volatile int *)ptr != 0x55555555)
2016 page_bad = TRUE;
2017 /*
2018 * Test for all 1's
2019 */
2020 *(volatile int *)ptr = 0xffffffff;
2021 if (*(volatile int *)ptr != 0xffffffff)
2022 page_bad = TRUE;
2023 /*
2024 * Test for all 0's
2025 */
2026 *(volatile int *)ptr = 0x0;
2027 if (*(volatile int *)ptr != 0x0)
2028 page_bad = TRUE;
2029 /*
2030 * Restore original value.
2031 */
2032 *(int *)ptr = tmp;
2033
2034 skip_memtest:
2035 /*
2036 * Adjust array of valid/good pages.
2037 */
2038 if (page_bad == TRUE)
2039 continue;
2040 /*
2041 * If this good page is a continuation of the
2042 * previous set of good pages, then just increase
2043 * the end pointer. Otherwise start a new chunk.
2044 * Note that "end" points one higher than end,
2045 * making the range >= start and < end.
2046 * If we're also doing a speculative memory
2047 * test and we at or past the end, bump up Maxmem
2048 * so that we keep going. The first bad page
2049 * will terminate the loop.
2050 */
2051 if (phys_avail[pa_indx] == pa) {
2052 phys_avail[pa_indx] += PAGE_SIZE;
2053 } else {
2054 pa_indx++;
2055 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2056 printf(
2057 "Too many holes in the physical address space, giving up\n");
2058 pa_indx--;
2059 full = TRUE;
2060 goto do_dump_avail;
2061 }
2062 phys_avail[pa_indx++] = pa; /* start */
2063 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2064 }
2065 physmem++;
2066 do_dump_avail:
2067 if (dump_avail[da_indx] == pa) {
2068 dump_avail[da_indx] += PAGE_SIZE;
2069 } else {
2070 da_indx++;
2071 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2072 da_indx--;
2073 goto do_next;
2074 }
2075 dump_avail[da_indx++] = pa; /* start */
2076 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2077 }
2078 do_next:
2079 if (full)
2080 break;
2081 }
2082 }
2083 *pte = 0;
2084 invltlb();
2085
2086 /*
2087 * XXX
2088 * The last chunk must contain at least one page plus the message
2089 * buffer to avoid complicating other code (message buffer address
2090 * calculation, etc.).
2091 */
2092 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2093 round_page(msgbufsize) >= phys_avail[pa_indx]) {
2094 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2095 phys_avail[pa_indx--] = 0;
2096 phys_avail[pa_indx--] = 0;
2097 }
2098
2099 Maxmem = atop(phys_avail[pa_indx]);
2100
2101 /* Trim off space for the message buffer. */
2102 phys_avail[pa_indx] -= round_page(msgbufsize);
2103
2104 /* Map the message buffer. */
2105 for (off = 0; off < round_page(msgbufsize); off += PAGE_SIZE)
2106 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2107 off);
2108
2109 PT_UPDATES_FLUSH();
2110 }
2111
2112 void
2113 init386(first)
2114 int first;
2115 {
2116 struct gate_descriptor *gdp;
2117 int gsel_tss, metadata_missing, x, pa;
2118 size_t kstack0_sz;
2119 struct pcpu *pc;
2120
2121 thread0.td_kstack = proc0kstack;
2122 thread0.td_kstack_pages = KSTACK_PAGES;
2123 kstack0_sz = thread0.td_kstack_pages * PAGE_SIZE;
2124 thread0.td_pcb = (struct pcb *)(thread0.td_kstack + kstack0_sz) - 1;
2125
2126 /*
2127 * This may be done better later if it gets more high level
2128 * components in it. If so just link td->td_proc here.
2129 */
2130 proc_linkup0(&proc0, &thread0);
2131
2132 /*
2133 * Initialize DMAC
2134 */
2135 pc98_init_dmac();
2136
2137 metadata_missing = 0;
2138 if (bootinfo.bi_modulep) {
2139 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2140 preload_bootstrap_relocate(KERNBASE);
2141 } else {
2142 metadata_missing = 1;
2143 }
2144 if (envmode == 1)
2145 kern_envp = static_env;
2146 else if (bootinfo.bi_envp)
2147 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2148
2149 /* Init basic tunables, hz etc */
2150 init_param1();
2151
2152 /*
2153 * Make gdt memory segments. All segments cover the full 4GB
2154 * of address space and permissions are enforced at page level.
2155 */
2156 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2157 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2158 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2159 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2160 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2161 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2162
2163 pc = &__pcpu[0];
2164 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2165 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2166 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2167
2168 for (x = 0; x < NGDT; x++)
2169 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2170
2171 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2172 r_gdt.rd_base = (int) gdt;
2173 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2174 lgdt(&r_gdt);
2175
2176 pcpu_init(pc, 0, sizeof(struct pcpu));
2177 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2178 pmap_kenter(pa + KERNBASE, pa);
2179 dpcpu_init((void *)(first + KERNBASE), 0);
2180 first += DPCPU_SIZE;
2181 PCPU_SET(prvspace, pc);
2182 PCPU_SET(curthread, &thread0);
2183 PCPU_SET(curpcb, thread0.td_pcb);
2184
2185 /*
2186 * Initialize mutexes.
2187 *
2188 * icu_lock: in order to allow an interrupt to occur in a critical
2189 * section, to set pcpu->ipending (etc...) properly, we
2190 * must be able to get the icu lock, so it can't be
2191 * under witness.
2192 */
2193 mutex_init();
2194 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2195
2196 /* make ldt memory segments */
2197 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2198 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2199 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2200 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2201
2202 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2203 lldt(_default_ldt);
2204 PCPU_SET(currentldt, _default_ldt);
2205
2206 /* exceptions */
2207 for (x = 0; x < NIDT; x++)
2208 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2209 GSEL(GCODE_SEL, SEL_KPL));
2210 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2211 GSEL(GCODE_SEL, SEL_KPL));
2212 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2213 GSEL(GCODE_SEL, SEL_KPL));
2214 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2215 GSEL(GCODE_SEL, SEL_KPL));
2216 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2217 GSEL(GCODE_SEL, SEL_KPL));
2218 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2219 GSEL(GCODE_SEL, SEL_KPL));
2220 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2221 GSEL(GCODE_SEL, SEL_KPL));
2222 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2223 GSEL(GCODE_SEL, SEL_KPL));
2224 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2225 , GSEL(GCODE_SEL, SEL_KPL));
2226 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2227 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2228 GSEL(GCODE_SEL, SEL_KPL));
2229 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2230 GSEL(GCODE_SEL, SEL_KPL));
2231 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2232 GSEL(GCODE_SEL, SEL_KPL));
2233 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2234 GSEL(GCODE_SEL, SEL_KPL));
2235 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2236 GSEL(GCODE_SEL, SEL_KPL));
2237 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2238 GSEL(GCODE_SEL, SEL_KPL));
2239 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2240 GSEL(GCODE_SEL, SEL_KPL));
2241 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2242 GSEL(GCODE_SEL, SEL_KPL));
2243 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2244 GSEL(GCODE_SEL, SEL_KPL));
2245 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2246 GSEL(GCODE_SEL, SEL_KPL));
2247 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2248 GSEL(GCODE_SEL, SEL_KPL));
2249 #ifdef KDTRACE_HOOKS
2250 setidt(IDT_DTRACE_RET, &IDTVEC(dtrace_ret), SDT_SYS386TGT, SEL_UPL,
2251 GSEL(GCODE_SEL, SEL_KPL));
2252 #endif
2253
2254 r_idt.rd_limit = sizeof(idt0) - 1;
2255 r_idt.rd_base = (int) idt;
2256 lidt(&r_idt);
2257
2258 /*
2259 * Initialize the i8254 before the console so that console
2260 * initialization can use DELAY().
2261 */
2262 i8254_init();
2263
2264 /*
2265 * Initialize the console before we print anything out.
2266 */
2267 cninit();
2268
2269 if (metadata_missing)
2270 printf("WARNING: loader(8) metadata is missing!\n");
2271
2272 #ifdef DEV_ISA
2273 #ifdef DEV_ATPIC
2274 atpic_startup();
2275 #else
2276 /* Reset and mask the atpics and leave them shut down. */
2277 atpic_reset();
2278
2279 /*
2280 * Point the ICU spurious interrupt vectors at the APIC spurious
2281 * interrupt handler.
2282 */
2283 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2284 GSEL(GCODE_SEL, SEL_KPL));
2285 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYS386IGT, SEL_KPL,
2286 GSEL(GCODE_SEL, SEL_KPL));
2287 #endif
2288 #endif
2289
2290 #ifdef DDB
2291 ksym_start = bootinfo.bi_symtab;
2292 ksym_end = bootinfo.bi_esymtab;
2293 #endif
2294
2295 kdb_init();
2296
2297 #ifdef KDB
2298 if (boothowto & RB_KDB)
2299 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2300 #endif
2301
2302 finishidentcpu(); /* Final stage of CPU initialization */
2303 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2304 GSEL(GCODE_SEL, SEL_KPL));
2305 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2306 GSEL(GCODE_SEL, SEL_KPL));
2307 initializecpu(); /* Initialize CPU registers */
2308
2309 /* make an initial tss so cpu can get interrupt stack on syscall! */
2310 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2311 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2312 kstack0_sz - sizeof(struct pcb) - 16);
2313 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2314 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2315 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2316 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2317 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2318 ltr(gsel_tss);
2319
2320 /* pointer to selector slot for %fs/%gs */
2321 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2322
2323 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2324 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2325 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2326 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2327 dblfault_tss.tss_cr3 = (int)IdlePTD;
2328 dblfault_tss.tss_eip = (int)dblfault_handler;
2329 dblfault_tss.tss_eflags = PSL_KERNEL;
2330 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2331 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2332 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2333 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2334 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2335
2336 vm86_initialize();
2337 getmemsize(first);
2338 init_param2(physmem);
2339
2340 /* now running on new page tables, configured,and u/iom is accessible */
2341
2342 msgbufinit(msgbufp, msgbufsize);
2343
2344 /* make a call gate to reenter kernel with */
2345 gdp = &ldt[LSYS5CALLS_SEL].gd;
2346
2347 x = (int) &IDTVEC(lcall_syscall);
2348 gdp->gd_looffset = x;
2349 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2350 gdp->gd_stkcpy = 1;
2351 gdp->gd_type = SDT_SYS386CGT;
2352 gdp->gd_dpl = SEL_UPL;
2353 gdp->gd_p = 1;
2354 gdp->gd_hioffset = x >> 16;
2355
2356 /* XXX does this work? */
2357 /* XXX yes! */
2358 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2359 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2360
2361 /* transfer to user mode */
2362
2363 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2364 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2365
2366 /* setup proc 0's pcb */
2367 thread0.td_pcb->pcb_flags = 0;
2368 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2369 thread0.td_pcb->pcb_ext = 0;
2370 thread0.td_frame = &proc0_tf;
2371
2372 cpu_probe_cmpxchg8b();
2373 }
2374
2375 void
2376 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2377 {
2378
2379 }
2380
2381 void
2382 spinlock_enter(void)
2383 {
2384 struct thread *td;
2385 register_t flags;
2386
2387 td = curthread;
2388 if (td->td_md.md_spinlock_count == 0) {
2389 flags = intr_disable();
2390 td->td_md.md_spinlock_count = 1;
2391 td->td_md.md_saved_flags = flags;
2392 } else
2393 td->td_md.md_spinlock_count++;
2394 critical_enter();
2395 }
2396
2397 void
2398 spinlock_exit(void)
2399 {
2400 struct thread *td;
2401 register_t flags;
2402
2403 td = curthread;
2404 critical_exit();
2405 flags = td->td_md.md_saved_flags;
2406 td->td_md.md_spinlock_count--;
2407 if (td->td_md.md_spinlock_count == 0)
2408 intr_restore(flags);
2409 }
2410
2411 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2412 static void f00f_hack(void *unused);
2413 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2414
2415 static void
2416 f00f_hack(void *unused)
2417 {
2418 struct gate_descriptor *new_idt;
2419 vm_offset_t tmp;
2420
2421 if (!has_f00f_bug)
2422 return;
2423
2424 GIANT_REQUIRED;
2425
2426 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2427
2428 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2429 if (tmp == 0)
2430 panic("kmem_alloc returned 0");
2431
2432 /* Put the problematic entry (#6) at the end of the lower page. */
2433 new_idt = (struct gate_descriptor*)
2434 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
2435 bcopy(idt, new_idt, sizeof(idt0));
2436 r_idt.rd_base = (u_int)new_idt;
2437 lidt(&r_idt);
2438 idt = new_idt;
2439 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2440 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2441 panic("vm_map_protect failed");
2442 }
2443 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2444
2445 /*
2446 * Construct a PCB from a trapframe. This is called from kdb_trap() where
2447 * we want to start a backtrace from the function that caused us to enter
2448 * the debugger. We have the context in the trapframe, but base the trace
2449 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
2450 * enough for a backtrace.
2451 */
2452 void
2453 makectx(struct trapframe *tf, struct pcb *pcb)
2454 {
2455
2456 pcb->pcb_edi = tf->tf_edi;
2457 pcb->pcb_esi = tf->tf_esi;
2458 pcb->pcb_ebp = tf->tf_ebp;
2459 pcb->pcb_ebx = tf->tf_ebx;
2460 pcb->pcb_eip = tf->tf_eip;
2461 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
2462 }
2463
2464 int
2465 ptrace_set_pc(struct thread *td, u_long addr)
2466 {
2467
2468 td->td_frame->tf_eip = addr;
2469 return (0);
2470 }
2471
2472 int
2473 ptrace_single_step(struct thread *td)
2474 {
2475 td->td_frame->tf_eflags |= PSL_T;
2476 return (0);
2477 }
2478
2479 int
2480 ptrace_clear_single_step(struct thread *td)
2481 {
2482 td->td_frame->tf_eflags &= ~PSL_T;
2483 return (0);
2484 }
2485
2486 int
2487 fill_regs(struct thread *td, struct reg *regs)
2488 {
2489 struct pcb *pcb;
2490 struct trapframe *tp;
2491
2492 tp = td->td_frame;
2493 pcb = td->td_pcb;
2494 regs->r_gs = pcb->pcb_gs;
2495 return (fill_frame_regs(tp, regs));
2496 }
2497
2498 int
2499 fill_frame_regs(struct trapframe *tp, struct reg *regs)
2500 {
2501 regs->r_fs = tp->tf_fs;
2502 regs->r_es = tp->tf_es;
2503 regs->r_ds = tp->tf_ds;
2504 regs->r_edi = tp->tf_edi;
2505 regs->r_esi = tp->tf_esi;
2506 regs->r_ebp = tp->tf_ebp;
2507 regs->r_ebx = tp->tf_ebx;
2508 regs->r_edx = tp->tf_edx;
2509 regs->r_ecx = tp->tf_ecx;
2510 regs->r_eax = tp->tf_eax;
2511 regs->r_eip = tp->tf_eip;
2512 regs->r_cs = tp->tf_cs;
2513 regs->r_eflags = tp->tf_eflags;
2514 regs->r_esp = tp->tf_esp;
2515 regs->r_ss = tp->tf_ss;
2516 return (0);
2517 }
2518
2519 int
2520 set_regs(struct thread *td, struct reg *regs)
2521 {
2522 struct pcb *pcb;
2523 struct trapframe *tp;
2524
2525 tp = td->td_frame;
2526 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2527 !CS_SECURE(regs->r_cs))
2528 return (EINVAL);
2529 pcb = td->td_pcb;
2530 tp->tf_fs = regs->r_fs;
2531 tp->tf_es = regs->r_es;
2532 tp->tf_ds = regs->r_ds;
2533 tp->tf_edi = regs->r_edi;
2534 tp->tf_esi = regs->r_esi;
2535 tp->tf_ebp = regs->r_ebp;
2536 tp->tf_ebx = regs->r_ebx;
2537 tp->tf_edx = regs->r_edx;
2538 tp->tf_ecx = regs->r_ecx;
2539 tp->tf_eax = regs->r_eax;
2540 tp->tf_eip = regs->r_eip;
2541 tp->tf_cs = regs->r_cs;
2542 tp->tf_eflags = regs->r_eflags;
2543 tp->tf_esp = regs->r_esp;
2544 tp->tf_ss = regs->r_ss;
2545 pcb->pcb_gs = regs->r_gs;
2546 return (0);
2547 }
2548
2549 #ifdef CPU_ENABLE_SSE
2550 static void
2551 fill_fpregs_xmm(sv_xmm, sv_87)
2552 struct savexmm *sv_xmm;
2553 struct save87 *sv_87;
2554 {
2555 register struct env87 *penv_87 = &sv_87->sv_env;
2556 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2557 int i;
2558
2559 bzero(sv_87, sizeof(*sv_87));
2560
2561 /* FPU control/status */
2562 penv_87->en_cw = penv_xmm->en_cw;
2563 penv_87->en_sw = penv_xmm->en_sw;
2564 penv_87->en_tw = penv_xmm->en_tw;
2565 penv_87->en_fip = penv_xmm->en_fip;
2566 penv_87->en_fcs = penv_xmm->en_fcs;
2567 penv_87->en_opcode = penv_xmm->en_opcode;
2568 penv_87->en_foo = penv_xmm->en_foo;
2569 penv_87->en_fos = penv_xmm->en_fos;
2570
2571 /* FPU registers */
2572 for (i = 0; i < 8; ++i)
2573 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2574 }
2575
2576 static void
2577 set_fpregs_xmm(sv_87, sv_xmm)
2578 struct save87 *sv_87;
2579 struct savexmm *sv_xmm;
2580 {
2581 register struct env87 *penv_87 = &sv_87->sv_env;
2582 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2583 int i;
2584
2585 /* FPU control/status */
2586 penv_xmm->en_cw = penv_87->en_cw;
2587 penv_xmm->en_sw = penv_87->en_sw;
2588 penv_xmm->en_tw = penv_87->en_tw;
2589 penv_xmm->en_fip = penv_87->en_fip;
2590 penv_xmm->en_fcs = penv_87->en_fcs;
2591 penv_xmm->en_opcode = penv_87->en_opcode;
2592 penv_xmm->en_foo = penv_87->en_foo;
2593 penv_xmm->en_fos = penv_87->en_fos;
2594
2595 /* FPU registers */
2596 for (i = 0; i < 8; ++i)
2597 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2598 }
2599 #endif /* CPU_ENABLE_SSE */
2600
2601 int
2602 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2603 {
2604
2605 KASSERT(td == curthread || TD_IS_SUSPENDED(td) ||
2606 P_SHOULDSTOP(td->td_proc),
2607 ("not suspended thread %p", td));
2608 #ifdef DEV_NPX
2609 npxgetregs(td);
2610 #else
2611 bzero(fpregs, sizeof(*fpregs));
2612 #endif
2613 #ifdef CPU_ENABLE_SSE
2614 if (cpu_fxsr)
2615 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
2616 (struct save87 *)fpregs);
2617 else
2618 #endif /* CPU_ENABLE_SSE */
2619 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
2620 sizeof(*fpregs));
2621 return (0);
2622 }
2623
2624 int
2625 set_fpregs(struct thread *td, struct fpreg *fpregs)
2626 {
2627
2628 #ifdef CPU_ENABLE_SSE
2629 if (cpu_fxsr)
2630 set_fpregs_xmm((struct save87 *)fpregs,
2631 &td->td_pcb->pcb_user_save.sv_xmm);
2632 else
2633 #endif /* CPU_ENABLE_SSE */
2634 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
2635 sizeof(*fpregs));
2636 #ifdef DEV_NPX
2637 npxuserinited(td);
2638 #endif
2639 return (0);
2640 }
2641
2642 /*
2643 * Get machine context.
2644 */
2645 int
2646 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
2647 {
2648 struct trapframe *tp;
2649 struct segment_descriptor *sdp;
2650
2651 tp = td->td_frame;
2652
2653 PROC_LOCK(curthread->td_proc);
2654 mcp->mc_onstack = sigonstack(tp->tf_esp);
2655 PROC_UNLOCK(curthread->td_proc);
2656 mcp->mc_gs = td->td_pcb->pcb_gs;
2657 mcp->mc_fs = tp->tf_fs;
2658 mcp->mc_es = tp->tf_es;
2659 mcp->mc_ds = tp->tf_ds;
2660 mcp->mc_edi = tp->tf_edi;
2661 mcp->mc_esi = tp->tf_esi;
2662 mcp->mc_ebp = tp->tf_ebp;
2663 mcp->mc_isp = tp->tf_isp;
2664 mcp->mc_eflags = tp->tf_eflags;
2665 if (flags & GET_MC_CLEAR_RET) {
2666 mcp->mc_eax = 0;
2667 mcp->mc_edx = 0;
2668 mcp->mc_eflags &= ~PSL_C;
2669 } else {
2670 mcp->mc_eax = tp->tf_eax;
2671 mcp->mc_edx = tp->tf_edx;
2672 }
2673 mcp->mc_ebx = tp->tf_ebx;
2674 mcp->mc_ecx = tp->tf_ecx;
2675 mcp->mc_eip = tp->tf_eip;
2676 mcp->mc_cs = tp->tf_cs;
2677 mcp->mc_esp = tp->tf_esp;
2678 mcp->mc_ss = tp->tf_ss;
2679 mcp->mc_len = sizeof(*mcp);
2680 get_fpcontext(td, mcp);
2681 sdp = &td->td_pcb->pcb_fsd;
2682 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2683 sdp = &td->td_pcb->pcb_gsd;
2684 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
2685 mcp->mc_flags = 0;
2686 bzero(mcp->mc_spare2, sizeof(mcp->mc_spare2));
2687 return (0);
2688 }
2689
2690 /*
2691 * Set machine context.
2692 *
2693 * However, we don't set any but the user modifiable flags, and we won't
2694 * touch the cs selector.
2695 */
2696 int
2697 set_mcontext(struct thread *td, const mcontext_t *mcp)
2698 {
2699 struct trapframe *tp;
2700 int eflags, ret;
2701
2702 tp = td->td_frame;
2703 if (mcp->mc_len != sizeof(*mcp))
2704 return (EINVAL);
2705 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2706 (tp->tf_eflags & ~PSL_USERCHANGE);
2707 if ((ret = set_fpcontext(td, mcp)) == 0) {
2708 tp->tf_fs = mcp->mc_fs;
2709 tp->tf_es = mcp->mc_es;
2710 tp->tf_ds = mcp->mc_ds;
2711 tp->tf_edi = mcp->mc_edi;
2712 tp->tf_esi = mcp->mc_esi;
2713 tp->tf_ebp = mcp->mc_ebp;
2714 tp->tf_ebx = mcp->mc_ebx;
2715 tp->tf_edx = mcp->mc_edx;
2716 tp->tf_ecx = mcp->mc_ecx;
2717 tp->tf_eax = mcp->mc_eax;
2718 tp->tf_eip = mcp->mc_eip;
2719 tp->tf_eflags = eflags;
2720 tp->tf_esp = mcp->mc_esp;
2721 tp->tf_ss = mcp->mc_ss;
2722 td->td_pcb->pcb_gs = mcp->mc_gs;
2723 ret = 0;
2724 }
2725 return (ret);
2726 }
2727
2728 static void
2729 get_fpcontext(struct thread *td, mcontext_t *mcp)
2730 {
2731
2732 #ifndef DEV_NPX
2733 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2734 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2735 bzero(mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2736 #else
2737 mcp->mc_ownedfp = npxgetregs(td);
2738 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
2739 sizeof(mcp->mc_fpstate));
2740 mcp->mc_fpformat = npxformat();
2741 #endif
2742 }
2743
2744 static int
2745 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2746 {
2747
2748 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2749 return (0);
2750 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2751 mcp->mc_fpformat != _MC_FPFMT_XMM)
2752 return (EINVAL);
2753 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2754 /* We don't care what state is left in the FPU or PCB. */
2755 fpstate_drop(td);
2756 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2757 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2758 #ifdef DEV_NPX
2759 #ifdef CPU_ENABLE_SSE
2760 if (cpu_fxsr)
2761 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
2762 en_mxcsr &= cpu_mxcsr_mask;
2763 #endif
2764 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
2765 #endif
2766 } else
2767 return (EINVAL);
2768 return (0);
2769 }
2770
2771 static void
2772 fpstate_drop(struct thread *td)
2773 {
2774
2775 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
2776 critical_enter();
2777 #ifdef DEV_NPX
2778 if (PCPU_GET(fpcurthread) == td)
2779 npxdrop();
2780 #endif
2781 /*
2782 * XXX force a full drop of the npx. The above only drops it if we
2783 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2784 *
2785 * XXX I don't much like npxgetregs()'s semantics of doing a full
2786 * drop. Dropping only to the pcb matches fnsave's behaviour.
2787 * We only need to drop to !PCB_INITDONE in sendsig(). But
2788 * sendsig() is the only caller of npxgetregs()... perhaps we just
2789 * have too many layers.
2790 */
2791 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
2792 PCB_NPXUSERINITDONE);
2793 critical_exit();
2794 }
2795
2796 int
2797 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2798 {
2799 struct pcb *pcb;
2800
2801 if (td == NULL) {
2802 dbregs->dr[0] = rdr0();
2803 dbregs->dr[1] = rdr1();
2804 dbregs->dr[2] = rdr2();
2805 dbregs->dr[3] = rdr3();
2806 dbregs->dr[4] = rdr4();
2807 dbregs->dr[5] = rdr5();
2808 dbregs->dr[6] = rdr6();
2809 dbregs->dr[7] = rdr7();
2810 } else {
2811 pcb = td->td_pcb;
2812 dbregs->dr[0] = pcb->pcb_dr0;
2813 dbregs->dr[1] = pcb->pcb_dr1;
2814 dbregs->dr[2] = pcb->pcb_dr2;
2815 dbregs->dr[3] = pcb->pcb_dr3;
2816 dbregs->dr[4] = 0;
2817 dbregs->dr[5] = 0;
2818 dbregs->dr[6] = pcb->pcb_dr6;
2819 dbregs->dr[7] = pcb->pcb_dr7;
2820 }
2821 return (0);
2822 }
2823
2824 int
2825 set_dbregs(struct thread *td, struct dbreg *dbregs)
2826 {
2827 struct pcb *pcb;
2828 int i;
2829
2830 if (td == NULL) {
2831 load_dr0(dbregs->dr[0]);
2832 load_dr1(dbregs->dr[1]);
2833 load_dr2(dbregs->dr[2]);
2834 load_dr3(dbregs->dr[3]);
2835 load_dr4(dbregs->dr[4]);
2836 load_dr5(dbregs->dr[5]);
2837 load_dr6(dbregs->dr[6]);
2838 load_dr7(dbregs->dr[7]);
2839 } else {
2840 /*
2841 * Don't let an illegal value for dr7 get set. Specifically,
2842 * check for undefined settings. Setting these bit patterns
2843 * result in undefined behaviour and can lead to an unexpected
2844 * TRCTRAP.
2845 */
2846 for (i = 0; i < 4; i++) {
2847 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
2848 return (EINVAL);
2849 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
2850 return (EINVAL);
2851 }
2852
2853 pcb = td->td_pcb;
2854
2855 /*
2856 * Don't let a process set a breakpoint that is not within the
2857 * process's address space. If a process could do this, it
2858 * could halt the system by setting a breakpoint in the kernel
2859 * (if ddb was enabled). Thus, we need to check to make sure
2860 * that no breakpoints are being enabled for addresses outside
2861 * process's address space.
2862 *
2863 * XXX - what about when the watched area of the user's
2864 * address space is written into from within the kernel
2865 * ... wouldn't that still cause a breakpoint to be generated
2866 * from within kernel mode?
2867 */
2868
2869 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
2870 /* dr0 is enabled */
2871 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2872 return (EINVAL);
2873 }
2874
2875 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
2876 /* dr1 is enabled */
2877 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2878 return (EINVAL);
2879 }
2880
2881 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
2882 /* dr2 is enabled */
2883 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2884 return (EINVAL);
2885 }
2886
2887 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
2888 /* dr3 is enabled */
2889 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2890 return (EINVAL);
2891 }
2892
2893 pcb->pcb_dr0 = dbregs->dr[0];
2894 pcb->pcb_dr1 = dbregs->dr[1];
2895 pcb->pcb_dr2 = dbregs->dr[2];
2896 pcb->pcb_dr3 = dbregs->dr[3];
2897 pcb->pcb_dr6 = dbregs->dr[6];
2898 pcb->pcb_dr7 = dbregs->dr[7];
2899
2900 pcb->pcb_flags |= PCB_DBREGS;
2901 }
2902
2903 return (0);
2904 }
2905
2906 /*
2907 * Return > 0 if a hardware breakpoint has been hit, and the
2908 * breakpoint was in user space. Return 0, otherwise.
2909 */
2910 int
2911 user_dbreg_trap(void)
2912 {
2913 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2914 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2915 int nbp; /* number of breakpoints that triggered */
2916 caddr_t addr[4]; /* breakpoint addresses */
2917 int i;
2918
2919 dr7 = rdr7();
2920 if ((dr7 & 0x000000ff) == 0) {
2921 /*
2922 * all GE and LE bits in the dr7 register are zero,
2923 * thus the trap couldn't have been caused by the
2924 * hardware debug registers
2925 */
2926 return 0;
2927 }
2928
2929 nbp = 0;
2930 dr6 = rdr6();
2931 bp = dr6 & 0x0000000f;
2932
2933 if (!bp) {
2934 /*
2935 * None of the breakpoint bits are set meaning this
2936 * trap was not caused by any of the debug registers
2937 */
2938 return 0;
2939 }
2940
2941 /*
2942 * at least one of the breakpoints were hit, check to see
2943 * which ones and if any of them are user space addresses
2944 */
2945
2946 if (bp & 0x01) {
2947 addr[nbp++] = (caddr_t)rdr0();
2948 }
2949 if (bp & 0x02) {
2950 addr[nbp++] = (caddr_t)rdr1();
2951 }
2952 if (bp & 0x04) {
2953 addr[nbp++] = (caddr_t)rdr2();
2954 }
2955 if (bp & 0x08) {
2956 addr[nbp++] = (caddr_t)rdr3();
2957 }
2958
2959 for (i = 0; i < nbp; i++) {
2960 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
2961 /*
2962 * addr[i] is in user space
2963 */
2964 return nbp;
2965 }
2966 }
2967
2968 /*
2969 * None of the breakpoints are in user space.
2970 */
2971 return 0;
2972 }
2973
2974 #ifdef KDB
2975
2976 /*
2977 * Provide inb() and outb() as functions. They are normally only available as
2978 * inline functions, thus cannot be called from the debugger.
2979 */
2980
2981 /* silence compiler warnings */
2982 u_char inb_(u_short);
2983 void outb_(u_short, u_char);
2984
2985 u_char
2986 inb_(u_short port)
2987 {
2988 return inb(port);
2989 }
2990
2991 void
2992 outb_(u_short port, u_char data)
2993 {
2994 outb(port, data);
2995 }
2996
2997 #endif /* KDB */
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