The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/pccard/pcic.c

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    1 /*
    2  *  Intel PCIC or compatible Controller driver
    3  *-------------------------------------------------------------------------
    4  *
    5  * Copyright (c) 2001 M. Warner Losh.  All rights reserved.
    6  * Copyright (c) 1995 Andrew McRae.  All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. The name of the author may not be used to endorse or promote products
   17  *    derived from this software without specific prior written permission.
   18  *
   19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   29  *
   30  * $FreeBSD: releng/5.1/sys/pccard/pcic.c 107298 2002-11-27 06:04:49Z imp $
   31  */
   32 
   33 #include <sys/param.h>
   34 #include <sys/bus.h>
   35 #include <sys/kernel.h>
   36 #include <sys/module.h>
   37 #include <sys/sysctl.h>
   38 #include <sys/systm.h>
   39 
   40 #include <machine/clock.h>
   41 #include <pccard/i82365.h>
   42 #include <pccard/pcic_pci.h>
   43 #include <pccard/cardinfo.h>
   44 #include <pccard/slot.h>
   45 #include <pccard/pcicvar.h>
   46 
   47 /* Get pnp IDs */
   48 #include <isa/isavar.h>
   49 #include <dev/pcic/i82365reg.h>
   50 
   51 #include <dev/pccard/pccardvar.h>
   52 #include "card_if.h"
   53 
   54 /*
   55  *      Prototypes for interrupt handler.
   56  */
   57 static int              pcic_ioctl(struct slot *, int, caddr_t);
   58 static int              pcic_power(struct slot *);
   59 static void             pcic_mapirq(struct slot *, int);
   60 static timeout_t        pcic_reset;
   61 static void             pcic_resume(struct slot *);
   62 static void             pcic_disable(struct slot *);
   63 static int              pcic_memory(struct slot *, int);
   64 static int              pcic_io(struct slot *, int);
   65 
   66 devclass_t      pcic_devclass;
   67 
   68 static struct slot_ctrl pcic_cinfo = {
   69         pcic_mapirq,
   70         pcic_memory,
   71         pcic_io,
   72         pcic_reset,
   73         pcic_disable,
   74         pcic_power,
   75         pcic_ioctl,
   76         pcic_resume,
   77         PCIC_MEM_WIN,
   78         PCIC_IO_WIN
   79 };
   80 
   81 /* sysctl vars */
   82 SYSCTL_NODE(_hw, OID_AUTO, pcic, CTLFLAG_RD, 0, "PCIC parameters");
   83 
   84 int pcic_override_irq = 0;
   85 TUNABLE_INT("machdep.pccard.pcic_irq", &pcic_override_irq);
   86 TUNABLE_INT("hw.pcic.irq", &pcic_override_irq);
   87 SYSCTL_INT(_hw_pcic, OID_AUTO, irq, CTLFLAG_RD,
   88     &pcic_override_irq, 0,
   89     "Override the IRQ configured by the config system for all pcic devices");
   90 
   91 int pcic_boot_deactivated = 0;
   92 TUNABLE_INT("hw.pcic.boot_deactivated", &pcic_boot_deactivated);
   93 SYSCTL_INT(_hw_pcic, OID_AUTO, boot_deactivated, CTLFLAG_RD,
   94     &pcic_boot_deactivated, 0,
   95     "Override the automatic powering up of pccards at boot.  This works\n\
   96 around what turns out to be an old bug in the code that has since been\n\
   97 corrected.  It is now deprecated and will be removed completely before\n\
   98 FreeBSD 4.8.");
   99 
  100 /*
  101  * CL-PD6722's VSENSE method
  102  *     0: NO VSENSE (assume a 5.0V card)
  103  *     1: 6710's method (default)
  104  *     2: 6729's method
  105  */
  106 int pcic_pd6722_vsense = 1;
  107 TUNABLE_INT("hw.pcic.pd6722_vsense", &pcic_pd6722_vsense);
  108 SYSCTL_INT(_hw_pcic, OID_AUTO, pd6722_vsense, CTLFLAG_RD,
  109     &pcic_pd6722_vsense, 1,
  110     "Select CL-PD6722's VSENSE method.  VSENSE is used to determine the\n\
  111 volatage of inserted cards.  The CL-PD6722 has two methods to determine the\n\
  112 voltage of the card.  0 means assume a 5.0V card and do not check.  1 means\n\
  113 use the same method that the CL-PD6710 uses (default).  2 means use the\n\
  114 same method as the CL-PD6729.  2 is documented in the datasheet as being\n\
  115 the correct way, but 1 seems to give better results on more laptops.");
  116 
  117 /*
  118  * Read a register from the PCIC.
  119  */
  120 unsigned char
  121 pcic_getb_io(struct pcic_slot *sp, int reg)
  122 {
  123         bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg);
  124         return (bus_space_read_1(sp->bst, sp->bsh, PCIC_DATA));
  125 }
  126 
  127 /*
  128  * Write a register on the PCIC
  129  */
  130 void
  131 pcic_putb_io(struct pcic_slot *sp, int reg, unsigned char val)
  132 {
  133         /*
  134          * Many datasheets recommend using outw rather than outb to save 
  135          * a microsecond.  Maybe we should do this, but we'd likely only
  136          * save 20-30us on card activation.
  137          */
  138         bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg);
  139         bus_space_write_1(sp->bst, sp->bsh, PCIC_DATA, val);
  140 }
  141 
  142 /*
  143  * Clear bit(s) of a register.
  144  */
  145 __inline void
  146 pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask)
  147 {
  148         sp->putb(sp, reg, sp->getb(sp, reg) & ~mask);
  149 }
  150 
  151 /*
  152  * Set bit(s) of a register
  153  */
  154 __inline void
  155 pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask)
  156 {
  157         sp->putb(sp, reg, sp->getb(sp, reg) | mask);
  158 }
  159 
  160 /*
  161  * Write a 16 bit value to 2 adjacent PCIC registers
  162  */
  163 static __inline void
  164 pcic_putw(struct pcic_slot *sp, int reg, unsigned short word)
  165 {
  166         sp->putb(sp, reg, word & 0xFF);
  167         sp->putb(sp, reg + 1, (word >> 8) & 0xff);
  168 }
  169 
  170 /*
  171  * pc98 cbus cards introduce a slight wrinkle here.  They route the irq7 pin
  172  * from the pcic chip to INT 2 on the cbus.  INT 2 is normally mapped to
  173  * irq 6 on the pc98 architecture, so if we get a request for irq 6
  174  * lie to the hardware and say it is 7.  All the other usual mappings for
  175  * cbus INT into irq space are the same as the rest of the system.
  176  */
  177 static __inline int
  178 host_irq_to_pcic(int irq)
  179 {
  180 #ifdef PC98
  181         if (irq == 6)
  182                 irq = 7;
  183 #endif
  184         return (irq);
  185 }
  186 
  187 /*
  188  * Free up resources allocated so far.
  189  */
  190 void
  191 pcic_dealloc(device_t dev)
  192 {
  193         struct pcic_softc *sc;
  194 
  195         sc = (struct pcic_softc *) device_get_softc(dev);
  196         if (sc->slot_poll)
  197                 untimeout(sc->slot_poll, sc, sc->timeout_ch);
  198         if (sc->iores)
  199                 bus_release_resource(dev, SYS_RES_IOPORT, sc->iorid,
  200                     sc->iores);
  201         if (sc->memres)
  202                 bus_release_resource(dev, SYS_RES_MEMORY, sc->memrid,
  203                     sc->memres);
  204         if (sc->ih)
  205                 bus_teardown_intr(dev, sc->irqres, sc->ih);
  206         if (sc->irqres)
  207                 bus_release_resource(dev, SYS_RES_IRQ, sc->irqrid, sc->irqres);
  208 }
  209 
  210 /*
  211  *      entry point from main code to map/unmap memory context.
  212  */
  213 static int
  214 pcic_memory(struct slot *slt, int win)
  215 {
  216         struct pcic_slot *sp = slt->cdata;
  217         struct mem_desc *mp = &slt->mem[win];
  218         int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE;
  219 
  220         if (win < 0 || win >= slt->ctrl->maxmem) {
  221                 printf("Illegal PCIC MEMORY window request %d\n", win);
  222                 return (ENXIO);
  223         }
  224         if (mp->flags & MDF_ACTIVE) {
  225                 unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12;
  226                 if ((sys_addr >> 12) != 0 && 
  227                     (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) == 0) {
  228                         printf("This pcic does not support mapping > 24M\n");
  229                         return (ENXIO);
  230                 }
  231                 /*
  232                  * Write the addresses, card offsets and length.
  233                  * The values are all stored as the upper 12 bits of the
  234                  * 24 bit address i.e everything is allocated as 4 Kb chunks.
  235                  * Memory mapped cardbus bridges extend this slightly to allow
  236                  * one to set the upper 8 bits of the 32bit address as well.
  237                  * If the chip supports it, then go ahead and write those
  238                  * upper 8 bits.
  239                  */
  240                 pcic_putw(sp, reg, sys_addr & 0xFFF);
  241                 pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF);
  242                 pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF);
  243                 if (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY)
  244                     sp->putb(sp, PCIC_MEMORY_HIGH0 + win, sys_addr >> 12);
  245                 /*
  246                  *      Each 16 bit register has some flags in the upper bits.
  247                  */
  248                 if (mp->flags & MDF_16BITS)
  249                         pcic_setb(sp, reg+1, PCIC_DATA16);
  250                 if (mp->flags & MDF_ZEROWS)
  251                         pcic_setb(sp, reg+1, PCIC_ZEROWS);
  252                 if (mp->flags & MDF_WS0)
  253                         pcic_setb(sp, reg+3, PCIC_MW0);
  254                 if (mp->flags & MDF_WS1)
  255                         pcic_setb(sp, reg+3, PCIC_MW1);
  256                 if (mp->flags & MDF_ATTR)
  257                         pcic_setb(sp, reg+5, PCIC_REG);
  258                 if (mp->flags & MDF_WP)
  259                         pcic_setb(sp, reg+5, PCIC_WP);
  260                 /*
  261                  * Enable the memory window. By experiment, we need a delay.
  262                  */
  263                 pcic_setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16);
  264                 DELAY(50);
  265         } else {
  266                 pcic_clrb(sp, PCIC_ADDRWINE, 1<<win);
  267                 pcic_putw(sp, reg, 0);
  268                 pcic_putw(sp, reg+2, 0);
  269                 pcic_putw(sp, reg+4, 0);
  270         }
  271         return (0);
  272 }
  273 
  274 /*
  275  *      pcic_io - map or unmap I/O context
  276  */
  277 static int
  278 pcic_io(struct slot *slt, int win)
  279 {
  280         int     mask, reg;
  281         struct pcic_slot *sp = slt->cdata;
  282         struct io_desc *ip = &slt->io[win];
  283         if (bootverbose) {
  284                 printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags,
  285                     ip->start, ip->start + ip->size - 1);
  286         }
  287 
  288         switch (win) {
  289         case 0:
  290                 mask = PCIC_IO0_EN;
  291                 reg = PCIC_IO0;
  292                 break;
  293         case 1:
  294                 mask = PCIC_IO1_EN;
  295                 reg = PCIC_IO1;
  296                 break;
  297         default:
  298                 printf("Illegal PCIC I/O window request %d\n", win);
  299                 return (ENXIO);
  300         }
  301         if (ip->flags & IODF_ACTIVE) {
  302                 unsigned char x, ioctlv;
  303 
  304                 pcic_putw(sp, reg, ip->start);
  305                 pcic_putw(sp, reg+2, ip->start + ip->size - 1);
  306                 x = 0;
  307                 if (ip->flags & IODF_ZEROWS)
  308                         x |= PCIC_IO_0WS;
  309                 if (ip->flags & IODF_WS)
  310                         x |= PCIC_IO_WS;
  311                 if (ip->flags & IODF_CS16)
  312                         x |= PCIC_IO_CS16;
  313                 if (ip->flags & IODF_16BIT)
  314                         x |= PCIC_IO_16BIT;
  315                 /*
  316                  * Extract the current flags and merge with new flags.
  317                  * Flags for window 0 in lower nybble, and in upper nybble
  318                  * for window 1.
  319                  */
  320                 ioctlv = sp->getb(sp, PCIC_IOCTL);
  321                 DELAY(100);
  322                 switch (win) {
  323                 case 0:
  324                         sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0));
  325                         break;
  326                 case 1:
  327                         sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf));
  328                         break;
  329                 }
  330                 DELAY(100);
  331                 pcic_setb(sp, PCIC_ADDRWINE, mask);
  332                 DELAY(100);
  333         } else {
  334                 pcic_clrb(sp, PCIC_ADDRWINE, mask);
  335                 DELAY(100);
  336                 pcic_putw(sp, reg, 0);
  337                 pcic_putw(sp, reg + 2, 0);
  338         }
  339         return (0);
  340 }
  341 
  342 static void
  343 pcic_do_mgt_irq(struct pcic_slot *sp, int irq)
  344 {
  345         u_int32_t       reg;
  346 
  347         if (sp->sc->csc_route == pcic_iw_pci) {
  348                 /* Do the PCI side of things: Enable the Card Change int */
  349                 reg = CB_SM_CD;
  350                 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_MASK, reg);
  351                 /*
  352                  * TI Chips need us to set the following.  We tell the
  353                  * controller to route things via PCI interrupts.  Also
  354                  * we clear the interrupt number in the STAT_INT register
  355                  * as well.  The TI-12xx and newer chips require one or the
  356                  * other of these to happen, depending on what is set in the
  357                  * diagnostic register.  I do both on the theory that other
  358                  * chips might need one or the other and that no harm will
  359                  * come from it.  If there is harm, then I'll make it a bit
  360                  * in the tables.
  361                  */
  362                 pcic_setb(sp, PCIC_INT_GEN, PCIC_INTR_ENA);
  363                 pcic_clrb(sp, PCIC_STAT_INT, PCIC_CSCSELECT);
  364         } else {
  365                 /* Management IRQ changes */
  366                 /*
  367                  * The PCIC_INTR_ENA bit means either "tie the function
  368                  * and csc interrupts together" or "Route csc interrupts
  369                  * via PCI" or "Reserved".  In any case, we want to clear
  370                  * it since we're using ISA interrupts.
  371                  */
  372                 pcic_clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA);
  373                 irq = host_irq_to_pcic(irq);
  374                 sp->putb(sp, PCIC_STAT_INT, (irq << PCIC_SI_IRQ_SHIFT) | 
  375                     PCIC_CDEN);
  376         }
  377 }
  378 
  379 int
  380 pcic_attach(device_t dev)
  381 {
  382         int             i;
  383         device_t        kid;
  384         struct pcic_softc *sc;
  385         struct slot     *slt;
  386         struct pcic_slot *sp;
  387         
  388         sc = (struct pcic_softc *) device_get_softc(dev);
  389         callout_handle_init(&sc->timeout_ch);
  390         sp = &sc->slots[0];
  391         for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
  392                 if (!sp->slt)
  393                         continue;
  394                 sp->slt = 0;
  395                 kid = device_add_child(dev, NULL, -1);
  396                 if (kid == NULL) {
  397                         device_printf(dev, "Can't add pccard bus slot %d", i);
  398                         return (ENXIO);
  399                 }
  400                 device_probe_and_attach(kid);
  401                 slt = pccard_init_slot(kid, &pcic_cinfo);
  402                 if (slt == 0) {
  403                         device_printf(dev, "Can't get pccard info slot %d", i);
  404                         return (ENXIO);
  405                 }
  406                 sc->slotmask |= (1 << i);
  407                 slt->cdata = sp;
  408                 sp->slt = slt;
  409                 sp->sc = sc;
  410         }
  411 
  412         sp = &sc->slots[0];
  413         for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) {
  414                 if (sp->slt == NULL)
  415                         continue;
  416 
  417                 pcic_do_mgt_irq(sp, sc->irq);
  418                 sp->slt->irq = sc->irq;
  419 
  420                 /* Check for changes */
  421                 sp->slt->laststate = sp->slt->state = empty;
  422                 if (pcic_boot_deactivated) {
  423                         sp->putb(sp, PCIC_POWER, 0);
  424                         if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) == PCIC_CD) {
  425                                 sp->slt->state = inactive;
  426                                 pccard_event(sp->slt, card_deactivated);
  427                         }
  428                 } else {
  429                         pcic_do_stat_delta(sp);
  430                 }
  431         }
  432 
  433         return (bus_generic_attach(dev));
  434 }
  435 
  436 
  437 static int
  438 pcic_sresource(struct slot *slt, caddr_t data)
  439 {
  440         struct pccard_resource *pr;
  441         struct resource *r;
  442         int flags;
  443         int rid = 0;
  444         device_t bridgedev = slt->dev;
  445         struct pcic_slot *sp = slt->cdata;
  446 
  447         pr = (struct pccard_resource *)data;
  448         pr->resource_addr = ~0ul;
  449 
  450         /*
  451          * If we're using PCI interrupt routing, then force the IRQ to
  452          * use and to heck with what the user requested.  If they want
  453          * to be able to request IRQs, they must use ISA interrupt
  454          * routing.  If we don't give them an irq, and it is the
  455          * pccardd 0,0 case, then just return (giving the "bad resource"
  456          * return in pr->resource_addr).
  457          */
  458         if (pr->type == SYS_RES_IRQ) {
  459                 if (sp->sc->func_route >= pcic_iw_pci) {
  460                         pr->resource_addr = sp->sc->irq;
  461                         return (0);
  462                 }
  463                 if (pr->min == 0 && pr->max == 0)
  464                         return (0);
  465         }
  466 
  467         /*
  468          * Make sure we grok this type.
  469          */
  470         switch(pr->type) {
  471         default:
  472                 return (EINVAL);
  473         case SYS_RES_MEMORY:
  474         case SYS_RES_IRQ:
  475         case SYS_RES_IOPORT:
  476                 break;
  477         }
  478 
  479         /*
  480          * Allocate the resource, and align it to the most natural
  481          * size.  If we get it, then tell userland what we actually got
  482          * in the range they requested.
  483          */
  484         flags = rman_make_alignment_flags(pr->size);
  485         r = bus_alloc_resource(bridgedev, pr->type, &rid, pr->min, pr->max,
  486            pr->size, flags);
  487         if (r != NULL) {
  488                 pr->resource_addr = (u_long)rman_get_start(r);
  489                 bus_release_resource(bridgedev, pr->type, rid, r);
  490         }
  491         return (0);
  492 }
  493 
  494 /*
  495  *      ioctl calls - Controller specific ioctls
  496  */
  497 static int
  498 pcic_ioctl(struct slot *slt, int cmd, caddr_t data)
  499 {
  500         struct pcic_slot *sp = slt->cdata;
  501         struct pcic_reg *preg = (struct pcic_reg *) data;
  502 
  503         switch(cmd) {
  504         default:
  505                 return (ENOTTY);
  506         case PIOCGREG:                  /* Get pcic register */
  507                 preg->value = sp->getb(sp, preg->reg);
  508                 break;                  /* Set pcic register */
  509         case PIOCSREG:
  510                 sp->putb(sp, preg->reg, preg->value);
  511                 break;
  512         case PIOCSRESOURCE:             /* Can I use this resource? */
  513                 pcic_sresource(slt, data);
  514                 break;
  515         }
  516         return (0);
  517 }
  518 
  519 /*
  520  *      pcic_cardbus_power
  521  *
  522  *      Power the card up, as specified, using the cardbus power
  523  *      registers to control power.  Microsoft recommends that cardbus
  524  *      vendors support powering the card via cardbus registers because
  525  *      there is no standard for 3.3V cards.  Since at least a few of the
  526  *      cardbus bridges have minor issues with power via the ExCA registers,
  527  *      go ahead and do it all via cardbus registers.
  528  *
  529  *      An expamination of the code will show the relative ease that we do
  530  *      Vpp in comparison to the ExCA case (which may be partially broken).
  531  */
  532 static int
  533 pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt)
  534 {
  535         uint32_t power;
  536         uint32_t state;
  537 
  538         /*
  539          * If we're doing an auto-detect, and we're in a badvcc state, then
  540          * we need to force the socket to rescan the card.  We don't do this
  541          * all the time because the socket can take up to 200ms to do the deed,
  542          * and that's too long to busy wait.  Since this is a relatively rare
  543          * event (some BIOSes, and earlier versions of OLDCARD caused it), we
  544          * test for it special.
  545          */
  546         state =  bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE);
  547         if (slt->pwr.vcc == -1 && (state & CB_SS_BADVCC)) {
  548                 /*
  549                  * Force the bridge to scan the card for the proper voltages
  550                  * that it supports.
  551                  */
  552                 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_FORCE,
  553                     CB_SF_INTCVS);
  554                 state =  bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE);
  555                 /* This while loop can take 100-150ms */
  556                 while ((state & CB_SS_CARD_MASK) == 0) {
  557                         DELAY(10 * 1000);
  558                         state =  bus_space_read_4(sp->bst, sp->bsh,
  559                             CB_SOCKET_STATE);
  560                 }
  561         }
  562  
  563  
  564         /*
  565          * Preserve the clock stop bit of the socket power register.  Not
  566          * sure that we want to do that, but maybe we should set it based
  567          * on the power state.
  568          */
  569         power = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_POWER);
  570         power = 0;
  571 
  572         /*
  573          * vcc == -1 means automatically detect the voltage of the card.
  574          * Do so and apply the right amount of power.
  575          */
  576         if (slt->pwr.vcc == -1) {
  577                 if (state & CB_SS_5VCARD)
  578                         slt->pwr.vcc = 50;
  579                 else if (state & CB_SS_3VCARD)
  580                         slt->pwr.vcc = 33;
  581                 else if (state & CB_SS_XVCARD)
  582                         slt->pwr.vcc = 22;
  583                 else if (state & CB_SS_YVCARD)
  584                         slt->pwr.vcc = 11;
  585                 if (bootverbose && slt->pwr.vcc != -1)
  586                         device_printf(sp->sc->dev,
  587                             "Autodetected %d.%dV card\n",
  588                             slt->pwr.vcc / 10, slt->pwr.vcc % 10);
  589         }
  590 
  591         switch(slt->pwr.vcc) {
  592         default:
  593                 return (EINVAL);
  594         case 0:
  595                 power |= CB_SP_VCC_0V;
  596                 break;
  597         case 11:
  598                 power |= CB_SP_VCC_YV;
  599                 break;
  600         case 22:
  601                 power |= CB_SP_VCC_XV;
  602                 break;
  603         case 33:
  604                 power |= CB_SP_VCC_3V;
  605                 break;
  606         case 50:
  607                 power |= CB_SP_VCC_5V;
  608                 break;
  609         }
  610 
  611         /*
  612          * vpp == -1 means use vcc voltage.
  613          */
  614         if (slt->pwr.vpp == -1)
  615                 slt->pwr.vpp = slt->pwr.vcc;
  616         switch(slt->pwr.vpp) {
  617         default:
  618                 return (EINVAL);
  619         case 0:
  620                 power |= CB_SP_VPP_0V;
  621                 break;
  622         case 11:
  623                 power |= CB_SP_VPP_YV;
  624                 break;
  625         case 22:
  626                 power |= CB_SP_VPP_XV;
  627                 break;
  628         case 33:
  629                 power |= CB_SP_VPP_3V;
  630                 break;
  631         case 50:
  632                 power |= CB_SP_VPP_5V;
  633                 break;
  634         case 120:
  635                 power |= CB_SP_VPP_12V;
  636                 break;
  637         }
  638         bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_POWER, power);
  639 
  640         /*
  641          * OK.  We need to bring the card out of reset.  Let the power
  642          * stabilize for 300ms (why 300?) and then enable the outputs
  643          * and then wait 100ms (why 100?) for it to stabilize.  These numbers
  644          * were stolen from the dim, dark past of OLDCARD and I have no clue
  645          * how they were derived.  I also use the bit setting routines here
  646          * as a measure of conservatism.
  647          */
  648         if (power) {
  649                 pcic_setb(sp, PCIC_POWER, PCIC_DISRST);
  650                 DELAY(300*1000);
  651                 pcic_setb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA);
  652                 DELAY(100*1000);
  653         } else {
  654                 pcic_clrb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA);
  655         }
  656  
  657         return (0);
  658 }
  659 
  660 /*
  661  *      pcic_power - Enable the power of the slot according to
  662  *      the parameters in the power structure(s).
  663  */
  664 static int
  665 pcic_power(struct slot *slt)
  666 {
  667         unsigned char c, c2;
  668         unsigned char reg = PCIC_DISRST | PCIC_PCPWRE;
  669         struct pcic_slot *sp = slt->cdata;
  670         struct pcic_slot *sp2;
  671         struct pcic_softc *sc = sp->sc;
  672         int dodefault = 0;
  673         char controller;
  674         
  675         /*
  676          * Cardbus power registers are completely different.
  677          */
  678         if (sc->flags & PCIC_CARDBUS_POWER)
  679                 return (pcic_cardbus_power(sp, slt));
  680 
  681         if (bootverbose)
  682                 device_printf(sc->dev, "Power: Vcc=%d Vpp=%d\n", slt->pwr.vcc,
  683                     slt->pwr.vpp);
  684         /*
  685          * If we're automatically detecting what voltage to use, then we need
  686          * to ask the bridge what type (voltage-wise) the card is.
  687          */
  688         if (slt->pwr.vcc == -1) {
  689                 if (sc->flags & PCIC_DF_POWER) {
  690                         /* 
  691                          * Look at the VS[12]# bits on the card.  If VS1 is
  692                          * clear then the card needs 3.3V instead of 5.0V.
  693                          */
  694                         c = sp->getb(sp, PCIC_CDGC);
  695                         if ((c & PCIC_VS1STAT) == 0)
  696                                 slt->pwr.vcc = 33;
  697                         else
  698                                 slt->pwr.vcc = 50;
  699                 }
  700                 if (sc->flags & PCIC_PD_POWER) {
  701                         /*
  702                          * The 6710 does it one way, and the '22 and '29 do it
  703                          * another.  The '22 can also do it the same way as a
  704                          * '10 does it, despite what the datasheets say.  Some
  705                          * laptops with '22 don't seem to have the signals
  706                          * wired right for the '29 method to work.  The
  707                          * laptops that don't work hang solid when the pccard
  708                          * memory is accessed.
  709                          *
  710                          * To allow for both types of laptops,
  711                          * hw.pcic.pd6722_vsense will select which one to use.
  712                          * 0 - none, 1 - the '10 way and 2 - the '29 way.
  713                          */
  714                         controller = sp->controller;
  715                         if (controller == PCIC_PD6722) {
  716                                 switch (pcic_pd6722_vsense) {
  717                                 case 1:
  718                                         controller = PCIC_PD6710;
  719                                         break;
  720                                 case 2:
  721                                         controller = PCIC_PD6729;
  722                                         break;
  723                                 }
  724                         }
  725 
  726                         switch (controller) {
  727                         case PCIC_PD6710:
  728                                 c = sp->getb(sp, PCIC_MISC1);
  729                                 if ((c & PCIC_MISC1_5V_DETECT) == 0)
  730                                         slt->pwr.vcc = 33;
  731                                 else
  732                                         slt->pwr.vcc = 50;
  733                                 break;
  734                         case PCIC_PD6722:       /* see above for why we do */
  735                                 break;          /* none here */
  736                         case PCIC_PD6729:
  737                                 /*
  738                                  * VS[12] signals are in slot1's
  739                                  * extended reg 0xa for both slots.
  740                                  */
  741                                 sp2 = &sc->slots[1];
  742                                 sp2->putb(sp2, PCIC_EXT_IND, PCIC_EXT_DATA);
  743                                 c = sp2->getb(sp2, PCIC_EXTENDED);
  744                                 if (sp == sp2)          /* slot 1 */
  745                                         c >>= 2;
  746                                 if ((c & PCIC_VS1A) == 0)
  747                                         slt->pwr.vcc = 33;
  748                                 else
  749                                         slt->pwr.vcc = 50;
  750                                 break;
  751                         default:
  752                                 /* I have no idea how to do this for others */
  753                                 break;
  754                         }
  755 
  756                         /*
  757                          * Regardless of the above, setting the Auto Power
  758                          * Switch Enable appears to help.
  759                          */
  760                         reg |= PCIC_APSENA;
  761                 }
  762                 if (sc->flags & PCIC_RICOH_POWER) {
  763                         /*
  764                          * The ISA bridge have the 5V/3.3V in register
  765                          * 1, bit 7.  However, 3.3V cards can only be
  766                          * detected if GPI_EN is disabled.
  767                          */
  768                         c = sp->getb(sp, PCIC_STATUS);
  769                         c2 = sp->getb(sp, PCIC_CDGC);
  770                         if ((c & PCIC_RICOH_5VCARD) && (c2 & PCIC_GPI_EN) == 0)
  771                                 slt->pwr.vcc = 33;
  772                         else
  773                                 slt->pwr.vcc = 50;
  774                 }
  775                 /* Other power schemes here */
  776 
  777                 if (bootverbose && slt->pwr.vcc != -1)
  778                         device_printf(sc->dev, "Autodetected %d.%dV card\n",
  779                             slt->pwr.vcc / 10, slt->pwr.vcc %10);
  780         }
  781         if (slt->pwr.vcc == -1) {
  782                 if (bootverbose)
  783                         device_printf(sc->dev,
  784                             "Couldn't autodetect voltage, assuming 5.0V\n");
  785                 dodefault = 1;
  786                 slt->pwr.vcc = 50;
  787         }
  788 
  789         /*
  790          * XXX Note: The Vpp controls varies quit a bit between bridge chips
  791          * and the following might not be right in all cases.  The Linux
  792          * code and wildboar code bases are more complex.  However, most
  793          * applications want vpp == vcc and the following code does appear
  794          * to do that for all bridge sets.
  795          */
  796         if (slt->pwr.vpp == -1)
  797                 slt->pwr.vpp = slt->pwr.vcc;
  798         switch(slt->pwr.vpp) {
  799         default:
  800                 return (EINVAL);
  801         case 0:
  802                 break;
  803         case 50:
  804         case 33:
  805                 reg |= PCIC_VPP_5V;
  806                 break;
  807         case 120:
  808                 reg |= PCIC_VPP_12V;
  809                 break;
  810         }
  811 
  812         if (slt->pwr.vcc)
  813                 reg |= PCIC_VCC_ON;             /* Turn on Vcc */
  814         switch(slt->pwr.vcc) {
  815         default:
  816                 return (EINVAL);
  817         case 0:
  818                 break;
  819         case 33:
  820                 /*
  821                  * The wildboar code has comments that state that
  822                  * the IBM KING controller doesn't support 3.3V
  823                  * on the "IBM Smart PC card drive".  The code
  824                  * intemates that's the only place they have seen
  825                  * it used and that there's a boatload of issues
  826                  * with it.  I'm not even sure this is right because
  827                  * the only docs I've been able to find say this is for
  828                  * 5V power.  Of course, this "doc" is just code comments
  829                  * so who knows for sure.
  830                  */
  831                 if (sc->flags & PCIC_KING_POWER) {
  832                         reg |= PCIC_VCC_5V_KING;
  833                         break;
  834                 }
  835                 if (sc->flags & PCIC_VG_POWER) {
  836                         pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS);
  837                         break;
  838                 }
  839                 if (sc->flags & PCIC_PD_POWER) {
  840                         pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
  841                         break;
  842                 }
  843                 if (sc->flags & PCIC_RICOH_POWER) {
  844                         pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
  845                         break;
  846                 }
  847                 if (sc->flags & PCIC_DF_POWER)
  848                         reg |= PCIC_VCC_3V;
  849                 break;
  850         case 50:
  851                 if (sc->flags & PCIC_KING_POWER)
  852                         reg |= PCIC_VCC_5V_KING;
  853                 /*
  854                  * For all of the variant power schemes for 3.3V go
  855                  * ahead and turn off the 3.3V enable bit.  For all
  856                  * bridges, the setting the Vcc on bit does the rest.
  857                  * Note that we don't have to turn off the 3.3V bit
  858                  * for the '365 step D since with the reg assigments
  859                  * to this point it doesn't get turned on.
  860                  */
  861                 if (sc->flags & PCIC_VG_POWER)
  862                         pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS);
  863                 if (sc->flags & PCIC_PD_POWER)
  864                         pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33);
  865                 if (sc->flags & PCIC_RICOH_POWER)
  866                         pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33);
  867                 break;
  868         }
  869         sp->putb(sp, PCIC_POWER, reg);
  870         if (bootverbose)
  871                 device_printf(sc->dev, "Power applied\n");
  872         DELAY(300*1000);
  873         if (slt->pwr.vcc) {
  874                 reg |= PCIC_OUTENA;
  875                 sp->putb(sp, PCIC_POWER, reg);
  876                 if (bootverbose)
  877                         device_printf(sc->dev, "Output enabled\n");
  878                 DELAY(100*1000);
  879                 if (bootverbose)
  880                         device_printf(sc->dev, "Settling complete\n");
  881         }
  882 
  883         /*
  884          * Some chipsets will attempt to preclude us from supplying
  885          * 5.0V to cards that only handle 3.3V.  We seem to need to
  886          * try 3.3V to paper over some power handling issues in other
  887          * parts of the system.  Maybe the proper detection of 3.3V cards
  888          * now obviates the need for this hack, so put a printf in to
  889          * warn the world about it.
  890          */
  891         if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && dodefault) {
  892                 slt->pwr.vcc = 33;
  893                 slt->pwr.vpp = 0;
  894                 device_printf(sc->dev,
  895                     "Failed at 5.0V.  Trying 3.3V.  Please report message to mobile@freebsd.org\n");
  896                 return (pcic_power(slt));
  897         }
  898         if (bootverbose)
  899                 printf("Power complete.\n");
  900         return (0);
  901 }
  902 
  903 /*
  904  * tell the PCIC which irq we want to use.  only the following are legal:
  905  * 3, 4, 5, 7, 9, 10, 11, 12, 14, 15.  We require the callers of this
  906  * routine to do the check for legality.
  907  */
  908 static void
  909 pcic_mapirq(struct slot *slt, int irq)
  910 {
  911         struct pcic_slot *sp = slt->cdata;
  912 
  913         sp->sc->chip->map_irq(sp, irq);
  914 }
  915 
  916 /*
  917  *      pcic_reset - Reset the card and enable initial power.  This may
  918  *      need to be interrupt driven in the future.  We should likely turn
  919  *      the reset on, DELAY for a period of time < 250ms, turn it off and
  920  *      tsleep for a while and check it when we're woken up.  I think that
  921  *      we're running afoul of the card status interrupt glitching, causing
  922  *      an interrupt storm because the card doesn't seem to be able to
  923  *      clear this pin while in reset.
  924  */
  925 static void
  926 pcic_reset(void *chan)
  927 {
  928         struct slot *slt = chan;
  929         struct pcic_slot *sp = slt->cdata;
  930 
  931         if (bootverbose)
  932                 device_printf(sp->sc->dev, "reset %d ", slt->insert_seq);
  933         switch (slt->insert_seq) {
  934         case 0: /* Something funny happended on the way to the pub... */
  935                 if (bootverbose)
  936                         printf("\n");
  937                 return;
  938         case 1: /* Assert reset */
  939                 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET);
  940                 if (bootverbose)
  941                         printf("int is %x stat is %x\n",
  942                             sp->getb(sp, PCIC_INT_GEN),
  943                             sp->getb(sp, PCIC_STATUS));
  944                 slt->insert_seq = 2;
  945                 timeout(pcic_reset, (void *)slt, hz/4);
  946                 return;
  947         case 2: /* Deassert it again */
  948                 pcic_setb(sp, PCIC_INT_GEN, PCIC_CARDRESET | PCIC_IOCARD);
  949                 if (bootverbose)
  950                         printf("int is %x stat is %x\n",
  951                             sp->getb(sp, PCIC_INT_GEN),
  952                             sp->getb(sp, PCIC_STATUS));
  953                 slt->insert_seq = 3;
  954                 timeout(pcic_reset, (void *)slt, hz/4);
  955                 return;
  956         case 3: /* Wait if card needs more time */
  957                 if (bootverbose)
  958                         printf("int is %x stat is %x\n",
  959                             sp->getb(sp, PCIC_INT_GEN),
  960                             sp->getb(sp, PCIC_STATUS));
  961                 if ((sp->getb(sp, PCIC_STATUS) & PCIC_READY) == 0) {
  962                         timeout(pcic_reset, (void *)slt, hz/10);
  963                         return;
  964                 }
  965         }
  966         slt->insert_seq = 0;
  967         if (sp->controller == PCIC_PD6722 || sp->controller == PCIC_PD6710) {
  968                 sp->putb(sp, PCIC_TIME_SETUP0, 0x1);
  969                 sp->putb(sp, PCIC_TIME_CMD0, 0x6);
  970                 sp->putb(sp, PCIC_TIME_RECOV0, 0x0);
  971                 sp->putb(sp, PCIC_TIME_SETUP1, 1);
  972                 sp->putb(sp, PCIC_TIME_CMD1, 0xf);
  973                 sp->putb(sp, PCIC_TIME_RECOV1, 0);
  974         }
  975         selwakeup(&slt->selp);
  976 }
  977 
  978 /*
  979  *      pcic_disable - Disable the slot.  I wonder if these operations can
  980  *      cause an interrupt we need to acknowledge? XXX
  981  */
  982 static void
  983 pcic_disable(struct slot *slt)
  984 {
  985         struct pcic_slot *sp = slt->cdata;
  986 
  987         pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDTYPE | PCIC_CARDRESET);
  988         pcic_mapirq(slt, 0);
  989         slt->pwr.vcc = slt->pwr.vpp = 0;
  990         pcic_power(slt);
  991 }
  992 
  993 /*
  994  *      pcic_resume - Suspend/resume support for PCIC
  995  */
  996 static void
  997 pcic_resume(struct slot *slt)
  998 {
  999         struct pcic_slot *sp = slt->cdata;
 1000 
 1001         pcic_do_mgt_irq(sp, slt->irq);
 1002         if (sp->controller == PCIC_PD6722) {
 1003                 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER);
 1004                 pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN);
 1005         }
 1006         if (sp->slt->state != inactive)
 1007                 pcic_do_stat_delta(sp);
 1008 }
 1009 
 1010 int
 1011 pcic_activate_resource(device_t dev, device_t child, int type, int rid,
 1012     struct resource *r)
 1013 {
 1014         struct pccard_devinfo *devi = device_get_ivars(child);
 1015         int err;
 1016 
 1017         if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
 1018                 return (bus_generic_activate_resource(dev, child, type,
 1019                     rid, r));
 1020 
 1021         switch (type) {
 1022         case SYS_RES_IOPORT: {
 1023                 struct io_desc *ip;
 1024                 ip = &devi->slt->io[rid];
 1025                 if (ip->flags == 0) {
 1026                         if (rid == 0)
 1027                                 ip->flags = IODF_WS | IODF_16BIT | IODF_CS16;
 1028                         else
 1029                                 ip->flags = devi->slt->io[0].flags;
 1030                 }
 1031                 ip->flags |= IODF_ACTIVE;
 1032                 ip->start = rman_get_start(r);
 1033                 ip->size = rman_get_end(r) - rman_get_start(r) + 1;
 1034                 err = pcic_io(devi->slt, rid);
 1035                 if (err)
 1036                         return (err);
 1037                 break;
 1038         }
 1039         case SYS_RES_IRQ:
 1040                 /*
 1041                  * We actually defer the activation of the IRQ resource
 1042                  * until the interrupt is registered to avoid stray
 1043                  * interrupt messages.
 1044                  */
 1045                 break;
 1046         case SYS_RES_MEMORY: {
 1047                 struct mem_desc *mp;
 1048                 if (rid >= NUM_MEM_WINDOWS)
 1049                         return (EINVAL);
 1050                 mp = &devi->slt->mem[rid];
 1051                 mp->flags |= MDF_ACTIVE;
 1052                 mp->start = (caddr_t) rman_get_start(r);
 1053                 mp->size = rman_get_end(r) - rman_get_start(r) + 1;
 1054                 err = pcic_memory(devi->slt, rid);
 1055                 if (err)
 1056                         return (err);
 1057                 break;
 1058         }
 1059         default:
 1060                 break;
 1061         }
 1062         err = bus_generic_activate_resource(dev, child, type, rid, r);
 1063         return (err);
 1064 }
 1065 
 1066 int
 1067 pcic_deactivate_resource(device_t dev, device_t child, int type, int rid,
 1068     struct resource *r)
 1069 {
 1070         struct pccard_devinfo *devi = device_get_ivars(child);
 1071         int err;
 1072 
 1073         if (dev != device_get_parent(device_get_parent(child)) || devi == NULL)
 1074                 return (bus_generic_deactivate_resource(dev, child, type,
 1075                     rid, r));
 1076 
 1077         switch (type) {
 1078         case SYS_RES_IOPORT: {
 1079                 struct io_desc *ip = &devi->slt->io[rid];
 1080                 ip->flags &= ~IODF_ACTIVE;
 1081                 err = pcic_io(devi->slt, rid);
 1082                 if (err)
 1083                         return (err);
 1084                 break;
 1085         }
 1086         case SYS_RES_IRQ:
 1087                 break;
 1088         case SYS_RES_MEMORY: {
 1089                 struct mem_desc *mp = &devi->slt->mem[rid];
 1090                 mp->flags &= ~(MDF_ACTIVE | MDF_ATTR);
 1091                 err = pcic_memory(devi->slt, rid);
 1092                 if (err)
 1093                         return (err);
 1094                 break;
 1095         }
 1096         default:
 1097                 break;
 1098         }
 1099         err = bus_generic_deactivate_resource(dev, child, type, rid, r);
 1100         return (err);
 1101 }
 1102 
 1103 int
 1104 pcic_setup_intr(device_t dev, device_t child, struct resource *irq,
 1105     int flags, driver_intr_t *intr, void *arg, void **cookiep)
 1106 {
 1107         struct pccard_devinfo *devi = device_get_ivars(child);
 1108         int err;
 1109 
 1110         if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) {
 1111                 device_printf(dev, "Hardware does not support irq %ld.\n",
 1112                     rman_get_start(irq));
 1113                 return (EINVAL);
 1114         }
 1115 
 1116         err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg,
 1117             cookiep);
 1118         if (err == 0)
 1119                 pcic_mapirq(devi->slt, rman_get_start(irq));
 1120         else
 1121                 device_printf(dev, "Error %d irq %ld\n", err,
 1122                     rman_get_start(irq));
 1123         return (err);
 1124 }
 1125 
 1126 int
 1127 pcic_teardown_intr(device_t dev, device_t child, struct resource *irq,
 1128     void *cookie)
 1129 {
 1130         struct pccard_devinfo *devi = device_get_ivars(child);
 1131 
 1132         pcic_mapirq(devi->slt, 0);
 1133         return (bus_generic_teardown_intr(dev, child, irq, cookie));
 1134 }
 1135 
 1136 int
 1137 pcic_set_res_flags(device_t bus, device_t child, int restype, int rid,
 1138     u_long value)
 1139 {
 1140         struct pccard_devinfo *devi = device_get_ivars(child);
 1141         int err = 0;
 1142 
 1143         switch (restype) {
 1144         case SYS_RES_MEMORY: {
 1145                 struct mem_desc *mp = &devi->slt->mem[rid];
 1146                 switch (value) {
 1147                 case PCCARD_A_MEM_COM:
 1148                         mp->flags &= ~MDF_ATTR;
 1149                         break;
 1150                 case PCCARD_A_MEM_ATTR:
 1151                         mp->flags |= MDF_ATTR;
 1152                         break;
 1153                 case PCCARD_A_MEM_8BIT:
 1154                         mp->flags &= ~MDF_16BITS;
 1155                         break;
 1156                 case PCCARD_A_MEM_16BIT:
 1157                         mp->flags |= MDF_16BITS;
 1158                         break;
 1159                 }
 1160                 err = pcic_memory(devi->slt, rid);
 1161                 break;
 1162         }
 1163         default:
 1164                 err = EOPNOTSUPP;
 1165         }
 1166         return (err);
 1167 }
 1168 
 1169 int
 1170 pcic_get_res_flags(device_t bus, device_t child, int restype, int rid,
 1171     u_long *value)
 1172 {
 1173         struct pccard_devinfo *devi = device_get_ivars(child);
 1174         int err = 0;
 1175 
 1176         if (value == 0)
 1177                 return (ENOMEM);
 1178 
 1179         switch (restype) {
 1180         case SYS_RES_IOPORT: {
 1181                 struct io_desc *ip = &devi->slt->io[rid];
 1182                 *value = ip->flags;
 1183                 break;
 1184         }
 1185         case SYS_RES_MEMORY: {
 1186                 struct mem_desc *mp = &devi->slt->mem[rid];
 1187                 *value = mp->flags;
 1188                 break;
 1189         }
 1190         default:
 1191                 err = EOPNOTSUPP;
 1192         }
 1193         return (err);
 1194 }
 1195 
 1196 int
 1197 pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset
 1198 #if __FreeBSD_version >= 500000
 1199     ,u_int32_t *deltap
 1200 #endif
 1201     )
 1202 {
 1203         struct pccard_devinfo *devi = device_get_ivars(child);
 1204         struct mem_desc *mp = &devi->slt->mem[rid];
 1205 
 1206         mp->card = offset;
 1207 #if __FreeBSD_version >= 500000
 1208         if (deltap)
 1209                 *deltap = 0;                    /* XXX BAD XXX */
 1210 #endif
 1211         return (pcic_memory(devi->slt, rid));
 1212 }
 1213 
 1214 int
 1215 pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset)
 1216 {
 1217         struct pccard_devinfo *devi = device_get_ivars(child);
 1218         struct mem_desc *mp = &devi->slt->mem[rid];
 1219 
 1220         if (offset == 0)
 1221                 return (ENOMEM);
 1222 
 1223         *offset = mp->card;
 1224 
 1225         return (0);
 1226 }
 1227 
 1228 struct resource *
 1229 pcic_alloc_resource(device_t dev, device_t child, int type, int *rid,
 1230     u_long start, u_long end, u_long count, u_int flags)
 1231 {
 1232         struct pcic_softc *sc = device_get_softc(dev);
 1233 
 1234         /*
 1235          * If we're routing via pci, we can share.
 1236          */
 1237         if (sc->func_route == pcic_iw_pci && type == SYS_RES_IRQ) {
 1238                 if (bootverbose)
 1239                         device_printf(child, "Forcing IRQ to %d\n", sc->irq);
 1240                 start = end = sc->irq;
 1241                 flags |= RF_SHAREABLE;
 1242         }
 1243 
 1244         return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
 1245             count, flags));
 1246 }
 1247 
 1248 void
 1249 pcic_do_stat_delta(struct pcic_slot *sp)
 1250 {
 1251         if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD)
 1252                 pccard_event(sp->slt, card_removed);
 1253         else
 1254                 pccard_event(sp->slt, card_inserted);
 1255 }
 1256 /*
 1257  * Wrapper function for pcicintr so that signatures match.
 1258  */
 1259 void
 1260 pcic_isa_intr(void *arg)
 1261 {
 1262         pcic_isa_intr1(arg);
 1263 }
 1264 
 1265 /*
 1266  *      PCIC timer.  If the controller doesn't have a free IRQ to use
 1267  *      or if interrupt steering doesn't work, poll the controller for
 1268  *      insertion/removal events.
 1269  */
 1270 void
 1271 pcic_timeout(void *chan)
 1272 {
 1273         struct pcic_softc *sc = (struct pcic_softc *) chan;
 1274 
 1275         if (pcic_isa_intr1(chan) != 0) {
 1276                 device_printf(sc->dev, 
 1277                     "Static bug detected, ignoring hardware.");
 1278                 sc->slot_poll = 0;
 1279                 return;
 1280         }
 1281         sc->timeout_ch = timeout(sc->slot_poll, chan, hz/2);
 1282 }
 1283 
 1284 /*
 1285  *      PCIC Interrupt handler.
 1286  *      Check each slot in turn, and read the card status change
 1287  *      register. If this is non-zero, then a change has occurred
 1288  *      on this card, so send an event to the main code.
 1289  */
 1290 int
 1291 pcic_isa_intr1(void *arg)
 1292 {
 1293         int     slot, s;
 1294         u_int8_t chg;
 1295         struct pcic_softc *sc = (struct pcic_softc *) arg;
 1296         struct pcic_slot *sp = &sc->slots[0];
 1297 
 1298         s = splhigh();
 1299         for (slot = 0; slot < PCIC_CARD_SLOTS; slot++, sp++) {
 1300                 if (sp->slt == NULL)
 1301                         continue;
 1302                 if ((chg = sp->getb(sp, PCIC_STAT_CHG)) != 0) {
 1303                         /*
 1304                          * if chg is 0xff, then we know that we've hit
 1305                          * the famous "static bug" for some desktop
 1306                          * pcmcia cards.  This is caused by static
 1307                          * discharge frying the poor card's mind and
 1308                          * it starts return 0xff forever.  We return
 1309                          * an error and stop polling the card.  When
 1310                          * we're interrupt based, we never see this.
 1311                          * The card just goes away silently.
 1312                          */
 1313                         if (chg == 0xff) {
 1314                                 splx(s);
 1315                                 return (EIO);
 1316                         }
 1317                         if (chg & PCIC_CDTCH)
 1318                                 pcic_do_stat_delta(sp);
 1319                 }
 1320         }
 1321         splx(s);
 1322         return (0);
 1323 }
 1324 
 1325 int
 1326 pcic_isa_mapirq(struct pcic_slot *sp, int irq)
 1327 {
 1328         irq = host_irq_to_pcic(irq);
 1329         if (irq == 0)
 1330                 pcic_clrb(sp, PCIC_INT_GEN, 0xF);
 1331         else
 1332                 sp->putb(sp, PCIC_INT_GEN,
 1333                     (sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq);
 1334         return (0);
 1335 }

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