Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/pccard/pcic.c
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1 /* 2 * Intel PCIC or compatible Controller driver 3 *------------------------------------------------------------------------- 4 * 5 * Copyright (c) 2001 M. Warner Losh. All rights reserved. 6 * Copyright (c) 1995 Andrew McRae. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * $FreeBSD: releng/5.2/sys/pccard/pcic.c 122352 2003-11-09 09:17:26Z tanimura $ 31 */ 32 33 #define OBSOLETE_IN_6 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/sysctl.h> 40 #include <sys/systm.h> 41 42 #include <machine/clock.h> 43 #include <pccard/i82365.h> 44 #include <pccard/pcic_pci.h> 45 #include <pccard/cardinfo.h> 46 #include <pccard/slot.h> 47 #include <pccard/pcicvar.h> 48 49 /* Get pnp IDs */ 50 #include <isa/isavar.h> 51 #include <dev/pcic/i82365reg.h> 52 53 #include <dev/pccard/pccardvar.h> 54 #include "card_if.h" 55 56 /* 57 * Prototypes for interrupt handler. 58 */ 59 static int pcic_ioctl(struct slot *, int, caddr_t); 60 static int pcic_power(struct slot *); 61 static void pcic_mapirq(struct slot *, int); 62 static timeout_t pcic_reset; 63 static void pcic_resume(struct slot *); 64 static void pcic_disable(struct slot *); 65 static int pcic_memory(struct slot *, int); 66 static int pcic_io(struct slot *, int); 67 68 devclass_t pcic_devclass; 69 70 static struct slot_ctrl pcic_cinfo = { 71 pcic_mapirq, 72 pcic_memory, 73 pcic_io, 74 pcic_reset, 75 pcic_disable, 76 pcic_power, 77 pcic_ioctl, 78 pcic_resume, 79 PCIC_MEM_WIN, 80 PCIC_IO_WIN 81 }; 82 83 /* sysctl vars */ 84 SYSCTL_NODE(_hw, OID_AUTO, pcic, CTLFLAG_RD, 0, "PCIC parameters"); 85 86 int pcic_override_irq = 0; 87 TUNABLE_INT("machdep.pccard.pcic_irq", &pcic_override_irq); 88 TUNABLE_INT("hw.pcic.irq", &pcic_override_irq); 89 SYSCTL_INT(_hw_pcic, OID_AUTO, irq, CTLFLAG_RDTUN, 90 &pcic_override_irq, 0, 91 "Override the IRQ configured by the config system for all pcic devices"); 92 93 int pcic_boot_deactivated = 0; 94 TUNABLE_INT("hw.pcic.boot_deactivated", &pcic_boot_deactivated); 95 SYSCTL_INT(_hw_pcic, OID_AUTO, boot_deactivated, CTLFLAG_RDTUN, 96 &pcic_boot_deactivated, 0, 97 "Override the automatic powering up of pccards at boot. This works\n\ 98 around what turns out to be an old bug in the code that has since been\n\ 99 corrected. It is now deprecated and will be removed completely before\n\ 100 FreeBSD 4.8."); 101 102 /* 103 * CL-PD6722's VSENSE method 104 * 0: NO VSENSE (assume a 5.0V card) 105 * 1: 6710's method (default) 106 * 2: 6729's method 107 */ 108 int pcic_pd6722_vsense = 1; 109 TUNABLE_INT("hw.pcic.pd6722_vsense", &pcic_pd6722_vsense); 110 SYSCTL_INT(_hw_pcic, OID_AUTO, pd6722_vsense, CTLFLAG_RDTUN, 111 &pcic_pd6722_vsense, 1, 112 "Select CL-PD6722's VSENSE method. VSENSE is used to determine the\n\ 113 volatage of inserted cards. The CL-PD6722 has two methods to determine the\n\ 114 voltage of the card. 0 means assume a 5.0V card and do not check. 1 means\n\ 115 use the same method that the CL-PD6710 uses (default). 2 means use the\n\ 116 same method as the CL-PD6729. 2 is documented in the datasheet as being\n\ 117 the correct way, but 1 seems to give better results on more laptops."); 118 119 /* 120 * Read a register from the PCIC. 121 */ 122 unsigned char 123 pcic_getb_io(struct pcic_slot *sp, int reg) 124 { 125 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg); 126 return (bus_space_read_1(sp->bst, sp->bsh, PCIC_DATA)); 127 } 128 129 /* 130 * Write a register on the PCIC 131 */ 132 void 133 pcic_putb_io(struct pcic_slot *sp, int reg, unsigned char val) 134 { 135 /* 136 * Many datasheets recommend using outw rather than outb to save 137 * a microsecond. Maybe we should do this, but we'd likely only 138 * save 20-30us on card activation. 139 */ 140 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg); 141 bus_space_write_1(sp->bst, sp->bsh, PCIC_DATA, val); 142 } 143 144 /* 145 * Clear bit(s) of a register. 146 */ 147 __inline void 148 pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask) 149 { 150 sp->putb(sp, reg, sp->getb(sp, reg) & ~mask); 151 } 152 153 /* 154 * Set bit(s) of a register 155 */ 156 __inline void 157 pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask) 158 { 159 sp->putb(sp, reg, sp->getb(sp, reg) | mask); 160 } 161 162 /* 163 * Write a 16 bit value to 2 adjacent PCIC registers 164 */ 165 static __inline void 166 pcic_putw(struct pcic_slot *sp, int reg, unsigned short word) 167 { 168 sp->putb(sp, reg, word & 0xFF); 169 sp->putb(sp, reg + 1, (word >> 8) & 0xff); 170 } 171 172 /* 173 * pc98 cbus cards introduce a slight wrinkle here. They route the irq7 pin 174 * from the pcic chip to INT 2 on the cbus. INT 2 is normally mapped to 175 * irq 6 on the pc98 architecture, so if we get a request for irq 6 176 * lie to the hardware and say it is 7. All the other usual mappings for 177 * cbus INT into irq space are the same as the rest of the system. 178 */ 179 static __inline int 180 host_irq_to_pcic(int irq) 181 { 182 #ifdef PC98 183 if (irq == 6) 184 irq = 7; 185 #endif 186 return (irq); 187 } 188 189 /* 190 * Free up resources allocated so far. 191 */ 192 void 193 pcic_dealloc(device_t dev) 194 { 195 struct pcic_softc *sc; 196 197 sc = (struct pcic_softc *) device_get_softc(dev); 198 if (sc->slot_poll) 199 untimeout(sc->slot_poll, sc, sc->timeout_ch); 200 if (sc->iores) 201 bus_release_resource(dev, SYS_RES_IOPORT, sc->iorid, 202 sc->iores); 203 if (sc->memres) 204 bus_release_resource(dev, SYS_RES_MEMORY, sc->memrid, 205 sc->memres); 206 if (sc->ih) 207 bus_teardown_intr(dev, sc->irqres, sc->ih); 208 if (sc->irqres) 209 bus_release_resource(dev, SYS_RES_IRQ, sc->irqrid, sc->irqres); 210 } 211 212 /* 213 * entry point from main code to map/unmap memory context. 214 */ 215 static int 216 pcic_memory(struct slot *slt, int win) 217 { 218 struct pcic_slot *sp = slt->cdata; 219 struct mem_desc *mp = &slt->mem[win]; 220 int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE; 221 222 if (win < 0 || win >= slt->ctrl->maxmem) { 223 printf("Illegal PCIC MEMORY window request %d\n", win); 224 return (ENXIO); 225 } 226 if (mp->flags & MDF_ACTIVE) { 227 unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12; 228 if ((sys_addr >> 12) != 0 && 229 (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) == 0) { 230 printf("This pcic does not support mapping > 24M\n"); 231 return (ENXIO); 232 } 233 /* 234 * Write the addresses, card offsets and length. 235 * The values are all stored as the upper 12 bits of the 236 * 24 bit address i.e everything is allocated as 4 Kb chunks. 237 * Memory mapped cardbus bridges extend this slightly to allow 238 * one to set the upper 8 bits of the 32bit address as well. 239 * If the chip supports it, then go ahead and write those 240 * upper 8 bits. 241 */ 242 pcic_putw(sp, reg, sys_addr & 0xFFF); 243 pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF); 244 pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF); 245 if (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) 246 sp->putb(sp, PCIC_MEMORY_HIGH0 + win, sys_addr >> 12); 247 /* 248 * Each 16 bit register has some flags in the upper bits. 249 */ 250 if (mp->flags & MDF_16BITS) 251 pcic_setb(sp, reg+1, PCIC_DATA16); 252 if (mp->flags & MDF_ZEROWS) 253 pcic_setb(sp, reg+1, PCIC_ZEROWS); 254 if (mp->flags & MDF_WS0) 255 pcic_setb(sp, reg+3, PCIC_MW0); 256 if (mp->flags & MDF_WS1) 257 pcic_setb(sp, reg+3, PCIC_MW1); 258 if (mp->flags & MDF_ATTR) 259 pcic_setb(sp, reg+5, PCIC_REG); 260 if (mp->flags & MDF_WP) 261 pcic_setb(sp, reg+5, PCIC_WP); 262 /* 263 * Enable the memory window. By experiment, we need a delay. 264 */ 265 pcic_setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16); 266 DELAY(50); 267 } else { 268 pcic_clrb(sp, PCIC_ADDRWINE, 1<<win); 269 pcic_putw(sp, reg, 0); 270 pcic_putw(sp, reg+2, 0); 271 pcic_putw(sp, reg+4, 0); 272 } 273 if (bootverbose) 274 printf("pcic: mem addr %p: reg %d: %x %x %x %x %x %x %x\n", 275 mp->start, reg, sp->getb(sp, reg), sp->getb(sp, reg+1), 276 sp->getb(sp, reg+2), sp->getb(sp, reg+3), 277 sp->getb(sp, reg+3), sp->getb(sp, reg+5), 278 sp->getb(sp, PCIC_ADDRWINE)); 279 return (0); 280 } 281 282 /* 283 * pcic_io - map or unmap I/O context 284 */ 285 static int 286 pcic_io(struct slot *slt, int win) 287 { 288 int mask, reg; 289 struct pcic_slot *sp = slt->cdata; 290 struct io_desc *ip = &slt->io[win]; 291 if (bootverbose) { 292 printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags, 293 ip->start, ip->start + ip->size - 1); 294 } 295 296 switch (win) { 297 case 0: 298 mask = PCIC_IO0_EN; 299 reg = PCIC_IO0; 300 break; 301 case 1: 302 mask = PCIC_IO1_EN; 303 reg = PCIC_IO1; 304 break; 305 default: 306 printf("Illegal PCIC I/O window request %d\n", win); 307 return (ENXIO); 308 } 309 if (ip->flags & IODF_ACTIVE) { 310 unsigned char x, ioctlv; 311 312 pcic_putw(sp, reg, ip->start); 313 pcic_putw(sp, reg+2, ip->start + ip->size - 1); 314 x = 0; 315 if (ip->flags & IODF_ZEROWS) 316 x |= PCIC_IO_0WS; 317 if (ip->flags & IODF_WS) 318 x |= PCIC_IO_WS; 319 if (ip->flags & IODF_CS16) 320 x |= PCIC_IO_CS16; 321 if (ip->flags & IODF_16BIT) 322 x |= PCIC_IO_16BIT; 323 /* 324 * Extract the current flags and merge with new flags. 325 * Flags for window 0 in lower nybble, and in upper nybble 326 * for window 1. 327 */ 328 ioctlv = sp->getb(sp, PCIC_IOCTL); 329 DELAY(100); 330 switch (win) { 331 case 0: 332 sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0)); 333 break; 334 case 1: 335 sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf)); 336 break; 337 } 338 DELAY(100); 339 pcic_setb(sp, PCIC_ADDRWINE, mask); 340 DELAY(100); 341 } else { 342 pcic_clrb(sp, PCIC_ADDRWINE, mask); 343 DELAY(100); 344 pcic_putw(sp, reg, 0); 345 pcic_putw(sp, reg + 2, 0); 346 } 347 return (0); 348 } 349 350 static void 351 pcic_do_mgt_irq(struct pcic_slot *sp, int irq) 352 { 353 u_int32_t reg; 354 355 if (sp->sc->csc_route == pcic_iw_pci) { 356 /* Do the PCI side of things: Enable the Card Change int */ 357 reg = CB_SM_CD; 358 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_MASK, reg); 359 /* 360 * TI Chips need us to set the following. We tell the 361 * controller to route things via PCI interrupts. Also 362 * we clear the interrupt number in the STAT_INT register 363 * as well. The TI-12xx and newer chips require one or the 364 * other of these to happen, depending on what is set in the 365 * diagnostic register. I do both on the theory that other 366 * chips might need one or the other and that no harm will 367 * come from it. If there is harm, then I'll make it a bit 368 * in the tables. 369 */ 370 pcic_setb(sp, PCIC_INT_GEN, PCIC_INTR_ENA); 371 pcic_clrb(sp, PCIC_STAT_INT, PCIC_CSCSELECT); 372 } else { 373 /* Management IRQ changes */ 374 /* 375 * The PCIC_INTR_ENA bit means either "tie the function 376 * and csc interrupts together" or "Route csc interrupts 377 * via PCI" or "Reserved". In any case, we want to clear 378 * it since we're using ISA interrupts. 379 */ 380 pcic_clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA); 381 irq = host_irq_to_pcic(irq); 382 sp->putb(sp, PCIC_STAT_INT, (irq << PCIC_SI_IRQ_SHIFT) | 383 PCIC_CDEN); 384 } 385 } 386 387 int 388 pcic_attach(device_t dev) 389 { 390 int i; 391 device_t kid; 392 struct pcic_softc *sc; 393 struct slot *slt; 394 struct pcic_slot *sp; 395 396 sc = (struct pcic_softc *) device_get_softc(dev); 397 callout_handle_init(&sc->timeout_ch); 398 sp = &sc->slots[0]; 399 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) { 400 if (!sp->slt) 401 continue; 402 sp->slt = 0; 403 kid = device_add_child(dev, NULL, -1); 404 if (kid == NULL) { 405 device_printf(dev, "Can't add pccard bus slot %d", i); 406 return (ENXIO); 407 } 408 device_probe_and_attach(kid); 409 slt = pccard_init_slot(kid, &pcic_cinfo); 410 if (slt == 0) { 411 device_printf(dev, "Can't get pccard info slot %d", i); 412 return (ENXIO); 413 } 414 sc->slotmask |= (1 << i); 415 slt->cdata = sp; 416 sp->slt = slt; 417 sp->sc = sc; 418 } 419 420 sp = &sc->slots[0]; 421 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) { 422 if (sp->slt == NULL) 423 continue; 424 425 pcic_do_mgt_irq(sp, sc->irq); 426 sp->slt->irq = sc->irq; 427 428 /* Check for changes */ 429 sp->slt->laststate = sp->slt->state = empty; 430 if (pcic_boot_deactivated) { 431 sp->putb(sp, PCIC_POWER, 0); 432 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) == PCIC_CD) { 433 sp->slt->state = inactive; 434 pccard_event(sp->slt, card_deactivated); 435 } 436 } else { 437 pcic_do_stat_delta(sp); 438 } 439 } 440 441 return (bus_generic_attach(dev)); 442 } 443 444 445 static int 446 pcic_sresource(struct slot *slt, caddr_t data) 447 { 448 struct pccard_resource *pr; 449 struct resource *r; 450 int flags; 451 int rid = 0; 452 device_t bridgedev = slt->dev; 453 struct pcic_slot *sp = slt->cdata; 454 455 pr = (struct pccard_resource *)data; 456 pr->resource_addr = ~0ul; 457 458 /* 459 * If we're using PCI interrupt routing, then force the IRQ to 460 * use and to heck with what the user requested. If they want 461 * to be able to request IRQs, they must use ISA interrupt 462 * routing. If we don't give them an irq, and it is the 463 * pccardd 0,0 case, then just return (giving the "bad resource" 464 * return in pr->resource_addr). 465 */ 466 if (pr->type == SYS_RES_IRQ) { 467 if (sp->sc->func_route >= pcic_iw_pci) { 468 pr->resource_addr = sp->sc->irq; 469 return (0); 470 } 471 if (pr->min == 0 && pr->max == 0) 472 return (0); 473 } 474 475 /* 476 * Make sure we grok this type. 477 */ 478 switch(pr->type) { 479 default: 480 return (EINVAL); 481 case SYS_RES_MEMORY: 482 case SYS_RES_IRQ: 483 case SYS_RES_IOPORT: 484 break; 485 } 486 487 /* 488 * Allocate the resource, and align it to the most natural 489 * size. If we get it, then tell userland what we actually got 490 * in the range they requested. 491 */ 492 flags = rman_make_alignment_flags(pr->size); 493 r = bus_alloc_resource(bridgedev, pr->type, &rid, pr->min, pr->max, 494 pr->size, flags); 495 if (r != NULL) { 496 pr->resource_addr = (u_long)rman_get_start(r); 497 bus_release_resource(bridgedev, pr->type, rid, r); 498 } 499 return (0); 500 } 501 502 /* 503 * ioctl calls - Controller specific ioctls 504 */ 505 static int 506 pcic_ioctl(struct slot *slt, int cmd, caddr_t data) 507 { 508 struct pcic_slot *sp = slt->cdata; 509 struct pcic_reg *preg = (struct pcic_reg *) data; 510 511 switch(cmd) { 512 default: 513 return (ENOTTY); 514 case PIOCGREG: /* Get pcic register */ 515 preg->value = sp->getb(sp, preg->reg); 516 break; /* Set pcic register */ 517 case PIOCSREG: 518 sp->putb(sp, preg->reg, preg->value); 519 break; 520 case PIOCSRESOURCE: /* Can I use this resource? */ 521 pcic_sresource(slt, data); 522 break; 523 } 524 return (0); 525 } 526 527 /* 528 * pcic_cardbus_power 529 * 530 * Power the card up, as specified, using the cardbus power 531 * registers to control power. Microsoft recommends that cardbus 532 * vendors support powering the card via cardbus registers because 533 * there is no standard for 3.3V cards. Since at least a few of the 534 * cardbus bridges have minor issues with power via the ExCA registers, 535 * go ahead and do it all via cardbus registers. 536 * 537 * An expamination of the code will show the relative ease that we do 538 * Vpp in comparison to the ExCA case (which may be partially broken). 539 */ 540 static int 541 pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt) 542 { 543 uint32_t power; 544 uint32_t state; 545 546 /* 547 * If we're doing an auto-detect, and we're in a badvcc state, then 548 * we need to force the socket to rescan the card. We don't do this 549 * all the time because the socket can take up to 200ms to do the deed, 550 * and that's too long to busy wait. Since this is a relatively rare 551 * event (some BIOSes, and earlier versions of OLDCARD caused it), we 552 * test for it special. 553 */ 554 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE); 555 if (slt->pwr.vcc == -1 && (state & CB_SS_BADVCC)) { 556 /* 557 * Force the bridge to scan the card for the proper voltages 558 * that it supports. 559 */ 560 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_FORCE, 561 CB_SF_INTCVS); 562 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE); 563 /* This while loop can take 100-150ms */ 564 while ((state & CB_SS_CARD_MASK) == 0) { 565 DELAY(10 * 1000); 566 state = bus_space_read_4(sp->bst, sp->bsh, 567 CB_SOCKET_STATE); 568 } 569 } 570 571 572 /* 573 * Preserve the clock stop bit of the socket power register. Not 574 * sure that we want to do that, but maybe we should set it based 575 * on the power state. 576 */ 577 power = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_POWER); 578 power = 0; 579 580 /* 581 * vcc == -1 means automatically detect the voltage of the card. 582 * Do so and apply the right amount of power. 583 */ 584 if (slt->pwr.vcc == -1) { 585 if (state & CB_SS_5VCARD) 586 slt->pwr.vcc = 50; 587 else if (state & CB_SS_3VCARD) 588 slt->pwr.vcc = 33; 589 else if (state & CB_SS_XVCARD) 590 slt->pwr.vcc = 22; 591 else if (state & CB_SS_YVCARD) 592 slt->pwr.vcc = 11; 593 if (bootverbose && slt->pwr.vcc != -1) 594 device_printf(sp->sc->dev, 595 "Autodetected %d.%dV card\n", 596 slt->pwr.vcc / 10, slt->pwr.vcc % 10); 597 } 598 599 switch(slt->pwr.vcc) { 600 default: 601 return (EINVAL); 602 case 0: 603 power |= CB_SP_VCC_0V; 604 break; 605 case 11: 606 power |= CB_SP_VCC_YV; 607 break; 608 case 22: 609 power |= CB_SP_VCC_XV; 610 break; 611 case 33: 612 power |= CB_SP_VCC_3V; 613 break; 614 case 50: 615 power |= CB_SP_VCC_5V; 616 break; 617 } 618 619 /* 620 * vpp == -1 means use vcc voltage. 621 */ 622 if (slt->pwr.vpp == -1) 623 slt->pwr.vpp = slt->pwr.vcc; 624 switch(slt->pwr.vpp) { 625 default: 626 return (EINVAL); 627 case 0: 628 power |= CB_SP_VPP_0V; 629 break; 630 case 11: 631 power |= CB_SP_VPP_YV; 632 break; 633 case 22: 634 power |= CB_SP_VPP_XV; 635 break; 636 case 33: 637 power |= CB_SP_VPP_3V; 638 break; 639 case 50: 640 power |= CB_SP_VPP_5V; 641 break; 642 case 120: 643 power |= CB_SP_VPP_12V; 644 break; 645 } 646 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_POWER, power); 647 648 /* 649 * OK. We need to bring the card out of reset. Let the power 650 * stabilize for 300ms (why 300?) and then enable the outputs 651 * and then wait 100ms (why 100?) for it to stabilize. These numbers 652 * were stolen from the dim, dark past of OLDCARD and I have no clue 653 * how they were derived. I also use the bit setting routines here 654 * as a measure of conservatism. 655 */ 656 if (power) { 657 pcic_setb(sp, PCIC_POWER, PCIC_DISRST); 658 DELAY(300*1000); 659 pcic_setb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA); 660 DELAY(100*1000); 661 } else { 662 pcic_clrb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA); 663 } 664 665 return (0); 666 } 667 668 /* 669 * pcic_power - Enable the power of the slot according to 670 * the parameters in the power structure(s). 671 */ 672 static int 673 pcic_power(struct slot *slt) 674 { 675 unsigned char c, c2; 676 unsigned char reg = PCIC_DISRST | PCIC_PCPWRE; 677 struct pcic_slot *sp = slt->cdata; 678 struct pcic_slot *sp2; 679 struct pcic_softc *sc = sp->sc; 680 int dodefault = 0; 681 char controller; 682 683 /* 684 * Cardbus power registers are completely different. 685 */ 686 if (sc->flags & PCIC_CARDBUS_POWER) 687 return (pcic_cardbus_power(sp, slt)); 688 689 if (bootverbose) 690 device_printf(sc->dev, "Power: Vcc=%d Vpp=%d\n", slt->pwr.vcc, 691 slt->pwr.vpp); 692 /* 693 * If we're automatically detecting what voltage to use, then we need 694 * to ask the bridge what type (voltage-wise) the card is. 695 */ 696 if (slt->pwr.vcc == -1) { 697 if (sc->flags & PCIC_DF_POWER) { 698 /* 699 * Look at the VS[12]# bits on the card. If VS1 is 700 * clear then the card needs 3.3V instead of 5.0V. 701 */ 702 c = sp->getb(sp, PCIC_CDGC); 703 if ((c & PCIC_VS1STAT) == 0) 704 slt->pwr.vcc = 33; 705 else 706 slt->pwr.vcc = 50; 707 } 708 if (sc->flags & PCIC_PD_POWER) { 709 /* 710 * The 6710 does it one way, and the '22 and '29 do it 711 * another. The '22 can also do it the same way as a 712 * '10 does it, despite what the datasheets say. Some 713 * laptops with '22 don't seem to have the signals 714 * wired right for the '29 method to work. The 715 * laptops that don't work hang solid when the pccard 716 * memory is accessed. 717 * 718 * To allow for both types of laptops, 719 * hw.pcic.pd6722_vsense will select which one to use. 720 * 0 - none, 1 - the '10 way and 2 - the '29 way. 721 */ 722 controller = sp->controller; 723 if (controller == PCIC_PD6722) { 724 switch (pcic_pd6722_vsense) { 725 case 1: 726 controller = PCIC_PD6710; 727 break; 728 case 2: 729 controller = PCIC_PD6729; 730 break; 731 } 732 } 733 734 switch (controller) { 735 case PCIC_PD6710: 736 c = sp->getb(sp, PCIC_MISC1); 737 if ((c & PCIC_MISC1_5V_DETECT) == 0) 738 slt->pwr.vcc = 33; 739 else 740 slt->pwr.vcc = 50; 741 break; 742 case PCIC_PD6722: /* see above for why we do */ 743 break; /* none here */ 744 case PCIC_PD6729: 745 /* 746 * VS[12] signals are in slot1's 747 * extended reg 0xa for both slots. 748 */ 749 sp2 = &sc->slots[1]; 750 sp2->putb(sp2, PCIC_EXT_IND, PCIC_EXT_DATA); 751 c = sp2->getb(sp2, PCIC_EXTENDED); 752 if (sp == sp2) /* slot 1 */ 753 c >>= 2; 754 if ((c & PCIC_VS1A) == 0) 755 slt->pwr.vcc = 33; 756 else 757 slt->pwr.vcc = 50; 758 break; 759 default: 760 /* I have no idea how to do this for others */ 761 break; 762 } 763 764 /* 765 * Regardless of the above, setting the Auto Power 766 * Switch Enable appears to help. 767 */ 768 reg |= PCIC_APSENA; 769 } 770 if (sc->flags & PCIC_RICOH_POWER) { 771 /* 772 * The ISA bridge have the 5V/3.3V in register 773 * 1, bit 7. However, 3.3V cards can only be 774 * detected if GPI_EN is disabled. 775 */ 776 c = sp->getb(sp, PCIC_STATUS); 777 c2 = sp->getb(sp, PCIC_CDGC); 778 if ((c & PCIC_RICOH_5VCARD) && (c2 & PCIC_GPI_EN) == 0) 779 slt->pwr.vcc = 33; 780 else 781 slt->pwr.vcc = 50; 782 } 783 /* Other power schemes here */ 784 785 if (bootverbose && slt->pwr.vcc != -1) 786 device_printf(sc->dev, "Autodetected %d.%dV card\n", 787 slt->pwr.vcc / 10, slt->pwr.vcc %10); 788 } 789 if (slt->pwr.vcc == -1) { 790 if (bootverbose) 791 device_printf(sc->dev, 792 "Couldn't autodetect voltage, assuming 5.0V\n"); 793 dodefault = 1; 794 slt->pwr.vcc = 50; 795 } 796 797 /* 798 * XXX Note: The Vpp controls varies quit a bit between bridge chips 799 * and the following might not be right in all cases. The Linux 800 * code and wildboar code bases are more complex. However, most 801 * applications want vpp == vcc and the following code does appear 802 * to do that for all bridge sets. 803 */ 804 if (slt->pwr.vpp == -1) 805 slt->pwr.vpp = slt->pwr.vcc; 806 switch(slt->pwr.vpp) { 807 default: 808 return (EINVAL); 809 case 0: 810 break; 811 case 50: 812 case 33: 813 reg |= PCIC_VPP_5V; 814 break; 815 case 120: 816 reg |= PCIC_VPP_12V; 817 break; 818 } 819 820 if (slt->pwr.vcc) 821 reg |= PCIC_VCC_ON; /* Turn on Vcc */ 822 switch(slt->pwr.vcc) { 823 default: 824 return (EINVAL); 825 case 0: 826 break; 827 case 33: 828 /* 829 * The wildboar code has comments that state that 830 * the IBM KING controller doesn't support 3.3V 831 * on the "IBM Smart PC card drive". The code 832 * intemates that's the only place they have seen 833 * it used and that there's a boatload of issues 834 * with it. I'm not even sure this is right because 835 * the only docs I've been able to find say this is for 836 * 5V power. Of course, this "doc" is just code comments 837 * so who knows for sure. 838 */ 839 if (sc->flags & PCIC_KING_POWER) { 840 reg |= PCIC_VCC_5V_KING; 841 break; 842 } 843 if (sc->flags & PCIC_VG_POWER) { 844 pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS); 845 break; 846 } 847 if (sc->flags & PCIC_PD_POWER) { 848 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33); 849 break; 850 } 851 if (sc->flags & PCIC_RICOH_POWER) { 852 pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33); 853 break; 854 } 855 if (sc->flags & PCIC_DF_POWER) 856 reg |= PCIC_VCC_3V; 857 break; 858 case 50: 859 if (sc->flags & PCIC_KING_POWER) 860 reg |= PCIC_VCC_5V_KING; 861 /* 862 * For all of the variant power schemes for 3.3V go 863 * ahead and turn off the 3.3V enable bit. For all 864 * bridges, the setting the Vcc on bit does the rest. 865 * Note that we don't have to turn off the 3.3V bit 866 * for the '365 step D since with the reg assigments 867 * to this point it doesn't get turned on. 868 */ 869 if (sc->flags & PCIC_VG_POWER) 870 pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS); 871 if (sc->flags & PCIC_PD_POWER) 872 pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33); 873 if (sc->flags & PCIC_RICOH_POWER) 874 pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33); 875 break; 876 } 877 sp->putb(sp, PCIC_POWER, reg); 878 if (bootverbose) 879 device_printf(sc->dev, "Power applied\n"); 880 DELAY(300*1000); 881 if (slt->pwr.vcc) { 882 reg |= PCIC_OUTENA; 883 sp->putb(sp, PCIC_POWER, reg); 884 if (bootverbose) 885 device_printf(sc->dev, "Output enabled\n"); 886 DELAY(100*1000); 887 if (bootverbose) 888 device_printf(sc->dev, "Settling complete\n"); 889 } 890 891 /* 892 * Some chipsets will attempt to preclude us from supplying 893 * 5.0V to cards that only handle 3.3V. We seem to need to 894 * try 3.3V to paper over some power handling issues in other 895 * parts of the system. Maybe the proper detection of 3.3V cards 896 * now obviates the need for this hack, so put a printf in to 897 * warn the world about it. 898 */ 899 if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && dodefault) { 900 slt->pwr.vcc = 33; 901 slt->pwr.vpp = 0; 902 device_printf(sc->dev, 903 "Failed at 5.0V. Trying 3.3V. Please report message to mobile@freebsd.org\n"); 904 return (pcic_power(slt)); 905 } 906 if (bootverbose) 907 printf("Power complete.\n"); 908 return (0); 909 } 910 911 /* 912 * tell the PCIC which irq we want to use. only the following are legal: 913 * 3, 4, 5, 7, 9, 10, 11, 12, 14, 15. We require the callers of this 914 * routine to do the check for legality. 915 */ 916 static void 917 pcic_mapirq(struct slot *slt, int irq) 918 { 919 struct pcic_slot *sp = slt->cdata; 920 921 sp->sc->chip->map_irq(sp, irq); 922 } 923 924 /* 925 * pcic_reset - Reset the card and enable initial power. This may 926 * need to be interrupt driven in the future. We should likely turn 927 * the reset on, DELAY for a period of time < 250ms, turn it off and 928 * tsleep for a while and check it when we're woken up. I think that 929 * we're running afoul of the card status interrupt glitching, causing 930 * an interrupt storm because the card doesn't seem to be able to 931 * clear this pin while in reset. 932 */ 933 static void 934 pcic_reset(void *chan) 935 { 936 struct slot *slt = chan; 937 struct pcic_slot *sp = slt->cdata; 938 939 if (bootverbose) 940 device_printf(sp->sc->dev, "reset %d ", slt->insert_seq); 941 switch (slt->insert_seq) { 942 case 0: /* Something funny happended on the way to the pub... */ 943 if (bootverbose) 944 printf("\n"); 945 return; 946 case 1: /* Assert reset */ 947 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET); 948 if (bootverbose) 949 printf("int is %x stat is %x\n", 950 sp->getb(sp, PCIC_INT_GEN), 951 sp->getb(sp, PCIC_STATUS)); 952 slt->insert_seq = 2; 953 timeout(pcic_reset, (void *)slt, hz/4); 954 return; 955 case 2: /* Deassert it again */ 956 pcic_setb(sp, PCIC_INT_GEN, PCIC_CARDRESET | PCIC_IOCARD); 957 if (bootverbose) 958 printf("int is %x stat is %x\n", 959 sp->getb(sp, PCIC_INT_GEN), 960 sp->getb(sp, PCIC_STATUS)); 961 slt->insert_seq = 3; 962 timeout(pcic_reset, (void *)slt, hz/4); 963 return; 964 case 3: /* Wait if card needs more time */ 965 if (bootverbose) 966 printf("int is %x stat is %x\n", 967 sp->getb(sp, PCIC_INT_GEN), 968 sp->getb(sp, PCIC_STATUS)); 969 if ((sp->getb(sp, PCIC_STATUS) & PCIC_READY) == 0) { 970 timeout(pcic_reset, (void *)slt, hz/10); 971 return; 972 } 973 } 974 slt->insert_seq = 0; 975 if (sp->controller == PCIC_PD6722 || sp->controller == PCIC_PD6710) { 976 sp->putb(sp, PCIC_TIME_SETUP0, 0x1); 977 sp->putb(sp, PCIC_TIME_CMD0, 0x6); 978 sp->putb(sp, PCIC_TIME_RECOV0, 0x0); 979 sp->putb(sp, PCIC_TIME_SETUP1, 1); 980 sp->putb(sp, PCIC_TIME_CMD1, 0xf); 981 sp->putb(sp, PCIC_TIME_RECOV1, 0); 982 } 983 selwakeuppri(&slt->selp, PZERO); 984 } 985 986 /* 987 * pcic_disable - Disable the slot. I wonder if these operations can 988 * cause an interrupt we need to acknowledge? XXX 989 */ 990 static void 991 pcic_disable(struct slot *slt) 992 { 993 struct pcic_slot *sp = slt->cdata; 994 995 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDTYPE | PCIC_CARDRESET); 996 pcic_mapirq(slt, 0); 997 slt->pwr.vcc = slt->pwr.vpp = 0; 998 pcic_power(slt); 999 } 1000 1001 /* 1002 * pcic_resume - Suspend/resume support for PCIC 1003 */ 1004 static void 1005 pcic_resume(struct slot *slt) 1006 { 1007 struct pcic_slot *sp = slt->cdata; 1008 1009 pcic_do_mgt_irq(sp, slt->irq); 1010 if (sp->controller == PCIC_PD6722) { 1011 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER); 1012 pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN); 1013 } 1014 if (sp->slt->state != inactive) 1015 pcic_do_stat_delta(sp); 1016 } 1017 1018 int 1019 pcic_activate_resource(device_t dev, device_t child, int type, int rid, 1020 struct resource *r) 1021 { 1022 struct pccard_devinfo *devi = device_get_ivars(child); 1023 int err; 1024 1025 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL) 1026 return (bus_generic_activate_resource(dev, child, type, 1027 rid, r)); 1028 1029 switch (type) { 1030 case SYS_RES_IOPORT: { 1031 struct io_desc *ip; 1032 ip = &devi->slt->io[rid]; 1033 if (ip->flags == 0) { 1034 if (rid == 0) 1035 ip->flags = IODF_WS | IODF_16BIT | IODF_CS16; 1036 else 1037 ip->flags = devi->slt->io[0].flags; 1038 } 1039 ip->flags |= IODF_ACTIVE; 1040 ip->start = rman_get_start(r); 1041 ip->size = rman_get_end(r) - rman_get_start(r) + 1; 1042 err = pcic_io(devi->slt, rid); 1043 if (err) 1044 return (err); 1045 break; 1046 } 1047 case SYS_RES_IRQ: 1048 /* 1049 * We actually defer the activation of the IRQ resource 1050 * until the interrupt is registered to avoid stray 1051 * interrupt messages. 1052 */ 1053 break; 1054 case SYS_RES_MEMORY: { 1055 struct mem_desc *mp; 1056 if (rid >= NUM_MEM_WINDOWS) 1057 return (EINVAL); 1058 mp = &devi->slt->mem[rid]; 1059 mp->flags |= MDF_ACTIVE; 1060 mp->start = (caddr_t) rman_get_start(r); 1061 mp->size = rman_get_end(r) - rman_get_start(r) + 1; 1062 err = pcic_memory(devi->slt, rid); 1063 if (err) 1064 return (err); 1065 break; 1066 } 1067 default: 1068 break; 1069 } 1070 err = bus_generic_activate_resource(dev, child, type, rid, r); 1071 return (err); 1072 } 1073 1074 int 1075 pcic_deactivate_resource(device_t dev, device_t child, int type, int rid, 1076 struct resource *r) 1077 { 1078 struct pccard_devinfo *devi = device_get_ivars(child); 1079 int err; 1080 1081 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL) 1082 return (bus_generic_deactivate_resource(dev, child, type, 1083 rid, r)); 1084 1085 switch (type) { 1086 case SYS_RES_IOPORT: { 1087 struct io_desc *ip = &devi->slt->io[rid]; 1088 ip->flags &= ~IODF_ACTIVE; 1089 err = pcic_io(devi->slt, rid); 1090 if (err) 1091 return (err); 1092 break; 1093 } 1094 case SYS_RES_IRQ: 1095 break; 1096 case SYS_RES_MEMORY: { 1097 struct mem_desc *mp = &devi->slt->mem[rid]; 1098 mp->flags &= ~(MDF_ACTIVE | MDF_ATTR); 1099 err = pcic_memory(devi->slt, rid); 1100 if (err) 1101 return (err); 1102 break; 1103 } 1104 default: 1105 break; 1106 } 1107 err = bus_generic_deactivate_resource(dev, child, type, rid, r); 1108 return (err); 1109 } 1110 1111 int 1112 pcic_setup_intr(device_t dev, device_t child, struct resource *irq, 1113 int flags, driver_intr_t *intr, void *arg, void **cookiep) 1114 { 1115 struct pccard_devinfo *devi = device_get_ivars(child); 1116 int err; 1117 1118 if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) { 1119 device_printf(dev, "Hardware does not support irq %ld.\n", 1120 rman_get_start(irq)); 1121 return (EINVAL); 1122 } 1123 1124 err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg, 1125 cookiep); 1126 if (err == 0) 1127 pcic_mapirq(devi->slt, rman_get_start(irq)); 1128 else 1129 device_printf(dev, "Error %d irq %ld\n", err, 1130 rman_get_start(irq)); 1131 return (err); 1132 } 1133 1134 int 1135 pcic_teardown_intr(device_t dev, device_t child, struct resource *irq, 1136 void *cookie) 1137 { 1138 struct pccard_devinfo *devi = device_get_ivars(child); 1139 1140 pcic_mapirq(devi->slt, 0); 1141 return (bus_generic_teardown_intr(dev, child, irq, cookie)); 1142 } 1143 1144 int 1145 pcic_set_res_flags(device_t bus, device_t child, int restype, int rid, 1146 u_long value) 1147 { 1148 struct pccard_devinfo *devi = device_get_ivars(child); 1149 int err = 0; 1150 1151 switch (restype) { 1152 case SYS_RES_MEMORY: { 1153 struct mem_desc *mp = &devi->slt->mem[rid]; 1154 switch (value) { 1155 case PCCARD_A_MEM_COM: 1156 mp->flags &= ~MDF_ATTR; 1157 break; 1158 case PCCARD_A_MEM_ATTR: 1159 mp->flags |= MDF_ATTR; 1160 break; 1161 case PCCARD_A_MEM_8BIT: 1162 mp->flags &= ~MDF_16BITS; 1163 break; 1164 case PCCARD_A_MEM_16BIT: 1165 mp->flags |= MDF_16BITS; 1166 break; 1167 } 1168 err = pcic_memory(devi->slt, rid); 1169 break; 1170 } 1171 default: 1172 err = EOPNOTSUPP; 1173 } 1174 return (err); 1175 } 1176 1177 int 1178 pcic_get_res_flags(device_t bus, device_t child, int restype, int rid, 1179 u_long *value) 1180 { 1181 struct pccard_devinfo *devi = device_get_ivars(child); 1182 int err = 0; 1183 1184 if (value == 0) 1185 return (ENOMEM); 1186 1187 switch (restype) { 1188 case SYS_RES_IOPORT: { 1189 struct io_desc *ip = &devi->slt->io[rid]; 1190 *value = ip->flags; 1191 break; 1192 } 1193 case SYS_RES_MEMORY: { 1194 struct mem_desc *mp = &devi->slt->mem[rid]; 1195 *value = mp->flags; 1196 break; 1197 } 1198 default: 1199 err = EOPNOTSUPP; 1200 } 1201 return (err); 1202 } 1203 1204 int 1205 pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset 1206 #if __FreeBSD_version >= 500000 1207 ,u_int32_t *deltap 1208 #endif 1209 ) 1210 { 1211 struct pccard_devinfo *devi = device_get_ivars(child); 1212 struct mem_desc *mp = &devi->slt->mem[rid]; 1213 1214 mp->card = offset; 1215 #if __FreeBSD_version >= 500000 1216 if (deltap) 1217 *deltap = 0; /* XXX BAD XXX */ 1218 #endif 1219 return (pcic_memory(devi->slt, rid)); 1220 } 1221 1222 int 1223 pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset) 1224 { 1225 struct pccard_devinfo *devi = device_get_ivars(child); 1226 struct mem_desc *mp = &devi->slt->mem[rid]; 1227 1228 if (offset == 0) 1229 return (ENOMEM); 1230 1231 *offset = mp->card; 1232 1233 return (0); 1234 } 1235 1236 struct resource * 1237 pcic_alloc_resource(device_t dev, device_t child, int type, int *rid, 1238 u_long start, u_long end, u_long count, u_int flags) 1239 { 1240 struct pcic_softc *sc = device_get_softc(dev); 1241 1242 /* 1243 * If we're routing via pci, we can share. 1244 */ 1245 if (sc->func_route == pcic_iw_pci && type == SYS_RES_IRQ) { 1246 if (bootverbose) 1247 device_printf(child, "Forcing IRQ to %d\n", sc->irq); 1248 start = end = sc->irq; 1249 flags |= RF_SHAREABLE; 1250 } 1251 1252 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 1253 count, flags)); 1254 } 1255 1256 void 1257 pcic_do_stat_delta(struct pcic_slot *sp) 1258 { 1259 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD) 1260 pccard_event(sp->slt, card_removed); 1261 else 1262 pccard_event(sp->slt, card_inserted); 1263 } 1264 /* 1265 * Wrapper function for pcicintr so that signatures match. 1266 */ 1267 void 1268 pcic_isa_intr(void *arg) 1269 { 1270 pcic_isa_intr1(arg); 1271 } 1272 1273 /* 1274 * PCIC timer. If the controller doesn't have a free IRQ to use 1275 * or if interrupt steering doesn't work, poll the controller for 1276 * insertion/removal events. 1277 */ 1278 void 1279 pcic_timeout(void *chan) 1280 { 1281 struct pcic_softc *sc = (struct pcic_softc *) chan; 1282 1283 if (pcic_isa_intr1(chan) != 0) { 1284 device_printf(sc->dev, 1285 "Static bug detected, ignoring hardware."); 1286 sc->slot_poll = 0; 1287 return; 1288 } 1289 sc->timeout_ch = timeout(sc->slot_poll, chan, hz/2); 1290 } 1291 1292 /* 1293 * PCIC Interrupt handler. 1294 * Check each slot in turn, and read the card status change 1295 * register. If this is non-zero, then a change has occurred 1296 * on this card, so send an event to the main code. 1297 */ 1298 int 1299 pcic_isa_intr1(void *arg) 1300 { 1301 int slot, s; 1302 u_int8_t chg; 1303 struct pcic_softc *sc = (struct pcic_softc *) arg; 1304 struct pcic_slot *sp = &sc->slots[0]; 1305 1306 s = splhigh(); 1307 for (slot = 0; slot < PCIC_CARD_SLOTS; slot++, sp++) { 1308 if (sp->slt == NULL) 1309 continue; 1310 if ((chg = sp->getb(sp, PCIC_STAT_CHG)) != 0) { 1311 /* 1312 * if chg is 0xff, then we know that we've hit 1313 * the famous "static bug" for some desktop 1314 * pcmcia cards. This is caused by static 1315 * discharge frying the poor card's mind and 1316 * it starts return 0xff forever. We return 1317 * an error and stop polling the card. When 1318 * we're interrupt based, we never see this. 1319 * The card just goes away silently. 1320 */ 1321 if (chg == 0xff) { 1322 splx(s); 1323 return (EIO); 1324 } 1325 if (chg & PCIC_CDTCH) 1326 pcic_do_stat_delta(sp); 1327 } 1328 } 1329 splx(s); 1330 return (0); 1331 } 1332 1333 int 1334 pcic_isa_mapirq(struct pcic_slot *sp, int irq) 1335 { 1336 irq = host_irq_to_pcic(irq); 1337 if (irq == 0) 1338 pcic_clrb(sp, PCIC_INT_GEN, 0xF); 1339 else 1340 sp->putb(sp, PCIC_INT_GEN, 1341 (sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq); 1342 return (0); 1343 }
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