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sys/pccard/pcic.c
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1 /* 2 * Intel PCIC or compatible Controller driver 3 *------------------------------------------------------------------------- 4 * 5 * Copyright (c) 2001 M. Warner Losh. All rights reserved. 6 * Copyright (c) 1995 Andrew McRae. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * $FreeBSD: releng/5.3/sys/pccard/pcic.c 133632 2004-08-13 06:57:31Z imp $ 31 */ 32 33 #define OBSOLETE_IN_6 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/module.h> 39 #include <sys/sysctl.h> 40 #include <sys/systm.h> 41 42 #include <machine/clock.h> 43 #include <pccard/i82365.h> 44 #include <pccard/pcic_pci.h> 45 #include <pccard/cardinfo.h> 46 #include <pccard/slot.h> 47 #include <pccard/pcicvar.h> 48 49 /* Get pnp IDs */ 50 #include <isa/isavar.h> 51 52 #include <dev/pccard/pccardvar.h> 53 #include "card_if.h" 54 55 /* 56 * Prototypes for interrupt handler. 57 */ 58 static int pcic_ioctl(struct slot *, int, caddr_t); 59 static int pcic_power(struct slot *); 60 static void pcic_mapirq(struct slot *, int); 61 static timeout_t pcic_reset; 62 static void pcic_resume(struct slot *); 63 static void pcic_disable(struct slot *); 64 static int pcic_memory(struct slot *, int); 65 static int pcic_io(struct slot *, int); 66 67 devclass_t pcic_devclass; 68 69 static struct slot_ctrl pcic_cinfo = { 70 pcic_mapirq, 71 pcic_memory, 72 pcic_io, 73 pcic_reset, 74 pcic_disable, 75 pcic_power, 76 pcic_ioctl, 77 pcic_resume, 78 PCIC_MEM_WIN, 79 PCIC_IO_WIN 80 }; 81 82 /* sysctl vars */ 83 SYSCTL_NODE(_hw, OID_AUTO, pcic, CTLFLAG_RD, 0, "PCIC parameters"); 84 85 int pcic_override_irq = 0; 86 TUNABLE_INT("machdep.pccard.pcic_irq", &pcic_override_irq); 87 TUNABLE_INT("hw.pcic.irq", &pcic_override_irq); 88 SYSCTL_INT(_hw_pcic, OID_AUTO, irq, CTLFLAG_RDTUN, 89 &pcic_override_irq, 0, 90 "Override the IRQ configured by the config system for all pcic devices"); 91 92 int pcic_boot_deactivated = 0; 93 TUNABLE_INT("hw.pcic.boot_deactivated", &pcic_boot_deactivated); 94 SYSCTL_INT(_hw_pcic, OID_AUTO, boot_deactivated, CTLFLAG_RDTUN, 95 &pcic_boot_deactivated, 0, 96 "Override the automatic powering up of pccards at boot. This works\n\ 97 around what turns out to be an old bug in the code that has since been\n\ 98 corrected. It is now deprecated and will be removed completely before\n\ 99 FreeBSD 4.8."); 100 101 /* 102 * CL-PD6722's VSENSE method 103 * 0: NO VSENSE (assume a 5.0V card) 104 * 1: 6710's method (default) 105 * 2: 6729's method 106 */ 107 int pcic_pd6722_vsense = 1; 108 TUNABLE_INT("hw.pcic.pd6722_vsense", &pcic_pd6722_vsense); 109 SYSCTL_INT(_hw_pcic, OID_AUTO, pd6722_vsense, CTLFLAG_RDTUN, 110 &pcic_pd6722_vsense, 1, 111 "Select CL-PD6722's VSENSE method. VSENSE is used to determine the\n\ 112 volatage of inserted cards. The CL-PD6722 has two methods to determine the\n\ 113 voltage of the card. 0 means assume a 5.0V card and do not check. 1 means\n\ 114 use the same method that the CL-PD6710 uses (default). 2 means use the\n\ 115 same method as the CL-PD6729. 2 is documented in the datasheet as being\n\ 116 the correct way, but 1 seems to give better results on more laptops."); 117 118 /* 119 * Read a register from the PCIC. 120 */ 121 unsigned char 122 pcic_getb_io(struct pcic_slot *sp, int reg) 123 { 124 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg); 125 return (bus_space_read_1(sp->bst, sp->bsh, PCIC_DATA)); 126 } 127 128 /* 129 * Write a register on the PCIC 130 */ 131 void 132 pcic_putb_io(struct pcic_slot *sp, int reg, unsigned char val) 133 { 134 /* 135 * Many datasheets recommend using outw rather than outb to save 136 * a microsecond. Maybe we should do this, but we'd likely only 137 * save 20-30us on card activation. 138 */ 139 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg); 140 bus_space_write_1(sp->bst, sp->bsh, PCIC_DATA, val); 141 } 142 143 /* 144 * Clear bit(s) of a register. 145 */ 146 __inline void 147 pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask) 148 { 149 sp->putb(sp, reg, sp->getb(sp, reg) & ~mask); 150 } 151 152 /* 153 * Set bit(s) of a register 154 */ 155 __inline void 156 pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask) 157 { 158 sp->putb(sp, reg, sp->getb(sp, reg) | mask); 159 } 160 161 /* 162 * Write a 16 bit value to 2 adjacent PCIC registers 163 */ 164 static __inline void 165 pcic_putw(struct pcic_slot *sp, int reg, unsigned short word) 166 { 167 sp->putb(sp, reg, word & 0xFF); 168 sp->putb(sp, reg + 1, (word >> 8) & 0xff); 169 } 170 171 /* 172 * pc98 cbus cards introduce a slight wrinkle here. They route the irq7 pin 173 * from the pcic chip to INT 2 on the cbus. INT 2 is normally mapped to 174 * irq 6 on the pc98 architecture, so if we get a request for irq 6 175 * lie to the hardware and say it is 7. All the other usual mappings for 176 * cbus INT into irq space are the same as the rest of the system. 177 */ 178 static __inline int 179 host_irq_to_pcic(int irq) 180 { 181 #ifdef PC98 182 if (irq == 6) 183 irq = 7; 184 #endif 185 return (irq); 186 } 187 188 /* 189 * Free up resources allocated so far. 190 */ 191 void 192 pcic_dealloc(device_t dev) 193 { 194 struct pcic_softc *sc; 195 196 sc = (struct pcic_softc *) device_get_softc(dev); 197 if (sc->slot_poll) 198 untimeout(sc->slot_poll, sc, sc->timeout_ch); 199 if (sc->iores) 200 bus_release_resource(dev, SYS_RES_IOPORT, sc->iorid, 201 sc->iores); 202 if (sc->memres) 203 bus_release_resource(dev, SYS_RES_MEMORY, sc->memrid, 204 sc->memres); 205 if (sc->ih) 206 bus_teardown_intr(dev, sc->irqres, sc->ih); 207 if (sc->irqres) 208 bus_release_resource(dev, SYS_RES_IRQ, sc->irqrid, sc->irqres); 209 } 210 211 /* 212 * entry point from main code to map/unmap memory context. 213 */ 214 static int 215 pcic_memory(struct slot *slt, int win) 216 { 217 struct pcic_slot *sp = slt->cdata; 218 struct mem_desc *mp = &slt->mem[win]; 219 int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE; 220 221 if (win < 0 || win >= slt->ctrl->maxmem) { 222 printf("Illegal PCIC MEMORY window request %d\n", win); 223 return (ENXIO); 224 } 225 if (mp->flags & MDF_ACTIVE) { 226 unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12; 227 if ((sys_addr >> 12) != 0 && 228 (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) == 0) { 229 printf("This pcic does not support mapping > 24M\n"); 230 return (ENXIO); 231 } 232 /* 233 * Write the addresses, card offsets and length. 234 * The values are all stored as the upper 12 bits of the 235 * 24 bit address i.e everything is allocated as 4 Kb chunks. 236 * Memory mapped cardbus bridges extend this slightly to allow 237 * one to set the upper 8 bits of the 32bit address as well. 238 * If the chip supports it, then go ahead and write those 239 * upper 8 bits. 240 */ 241 pcic_putw(sp, reg, sys_addr & 0xFFF); 242 pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF); 243 pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF); 244 if (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) 245 sp->putb(sp, PCIC_MEMORY_HIGH0 + win, sys_addr >> 12); 246 /* 247 * Each 16 bit register has some flags in the upper bits. 248 */ 249 if (mp->flags & MDF_16BITS) 250 pcic_setb(sp, reg+1, PCIC_DATA16); 251 if (mp->flags & MDF_ZEROWS) 252 pcic_setb(sp, reg+1, PCIC_ZEROWS); 253 if (mp->flags & MDF_WS0) 254 pcic_setb(sp, reg+3, PCIC_MW0); 255 if (mp->flags & MDF_WS1) 256 pcic_setb(sp, reg+3, PCIC_MW1); 257 if (mp->flags & MDF_ATTR) 258 pcic_setb(sp, reg+5, PCIC_REG); 259 if (mp->flags & MDF_WP) 260 pcic_setb(sp, reg+5, PCIC_WP); 261 /* 262 * Enable the memory window. By experiment, we need a delay. 263 */ 264 pcic_setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16); 265 DELAY(50); 266 } else { 267 pcic_clrb(sp, PCIC_ADDRWINE, 1<<win); 268 pcic_putw(sp, reg, 0); 269 pcic_putw(sp, reg+2, 0); 270 pcic_putw(sp, reg+4, 0); 271 } 272 if (bootverbose) 273 printf("pcic: mem addr %p: reg %d: %x %x %x %x %x %x %x\n", 274 mp->start, reg, sp->getb(sp, reg), sp->getb(sp, reg+1), 275 sp->getb(sp, reg+2), sp->getb(sp, reg+3), 276 sp->getb(sp, reg+3), sp->getb(sp, reg+5), 277 sp->getb(sp, PCIC_ADDRWINE)); 278 return (0); 279 } 280 281 /* 282 * pcic_io - map or unmap I/O context 283 */ 284 static int 285 pcic_io(struct slot *slt, int win) 286 { 287 int mask, reg; 288 struct pcic_slot *sp = slt->cdata; 289 struct io_desc *ip = &slt->io[win]; 290 if (bootverbose) { 291 printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags, 292 ip->start, ip->start + ip->size - 1); 293 } 294 295 switch (win) { 296 case 0: 297 mask = PCIC_IO0_EN; 298 reg = PCIC_IO0; 299 break; 300 case 1: 301 mask = PCIC_IO1_EN; 302 reg = PCIC_IO1; 303 break; 304 default: 305 printf("Illegal PCIC I/O window request %d\n", win); 306 return (ENXIO); 307 } 308 if (ip->flags & IODF_ACTIVE) { 309 unsigned char x, ioctlv; 310 311 pcic_putw(sp, reg, ip->start); 312 pcic_putw(sp, reg+2, ip->start + ip->size - 1); 313 x = 0; 314 if (ip->flags & IODF_ZEROWS) 315 x |= PCIC_IO_0WS; 316 if (ip->flags & IODF_WS) 317 x |= PCIC_IO_WS; 318 if (ip->flags & IODF_CS16) 319 x |= PCIC_IO_CS16; 320 if (ip->flags & IODF_16BIT) 321 x |= PCIC_IO_16BIT; 322 /* 323 * Extract the current flags and merge with new flags. 324 * Flags for window 0 in lower nybble, and in upper nybble 325 * for window 1. 326 */ 327 ioctlv = sp->getb(sp, PCIC_IOCTL); 328 DELAY(100); 329 switch (win) { 330 case 0: 331 sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0)); 332 break; 333 case 1: 334 sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf)); 335 break; 336 } 337 DELAY(100); 338 pcic_setb(sp, PCIC_ADDRWINE, mask); 339 DELAY(100); 340 } else { 341 pcic_clrb(sp, PCIC_ADDRWINE, mask); 342 DELAY(100); 343 pcic_putw(sp, reg, 0); 344 pcic_putw(sp, reg + 2, 0); 345 } 346 return (0); 347 } 348 349 static void 350 pcic_do_mgt_irq(struct pcic_slot *sp, int irq) 351 { 352 u_int32_t reg; 353 354 if (sp->sc->csc_route == pcic_iw_pci) { 355 /* Do the PCI side of things: Enable the Card Change int */ 356 reg = CB_SM_CD; 357 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_MASK, reg); 358 /* 359 * TI Chips need us to set the following. We tell the 360 * controller to route things via PCI interrupts. Also 361 * we clear the interrupt number in the STAT_INT register 362 * as well. The TI-12xx and newer chips require one or the 363 * other of these to happen, depending on what is set in the 364 * diagnostic register. I do both on the theory that other 365 * chips might need one or the other and that no harm will 366 * come from it. If there is harm, then I'll make it a bit 367 * in the tables. 368 */ 369 pcic_setb(sp, PCIC_INT_GEN, PCIC_INTR_ENA); 370 pcic_clrb(sp, PCIC_STAT_INT, PCIC_CSCSELECT); 371 } else { 372 /* Management IRQ changes */ 373 /* 374 * The PCIC_INTR_ENA bit means either "tie the function 375 * and csc interrupts together" or "Route csc interrupts 376 * via PCI" or "Reserved". In any case, we want to clear 377 * it since we're using ISA interrupts. 378 */ 379 pcic_clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA); 380 irq = host_irq_to_pcic(irq); 381 sp->putb(sp, PCIC_STAT_INT, (irq << PCIC_SI_IRQ_SHIFT) | 382 PCIC_CDEN); 383 } 384 } 385 386 int 387 pcic_attach(device_t dev) 388 { 389 int i; 390 device_t kid; 391 struct pcic_softc *sc; 392 struct slot *slt; 393 struct pcic_slot *sp; 394 395 sc = (struct pcic_softc *) device_get_softc(dev); 396 callout_handle_init(&sc->timeout_ch); 397 sp = &sc->slots[0]; 398 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) { 399 if (!sp->slt) 400 continue; 401 sp->slt = 0; 402 kid = device_add_child(dev, NULL, -1); 403 if (kid == NULL) { 404 device_printf(dev, "Can't add pccard bus slot %d", i); 405 return (ENXIO); 406 } 407 device_probe_and_attach(kid); 408 slt = pccard_init_slot(kid, &pcic_cinfo); 409 if (slt == 0) { 410 device_printf(dev, "Can't get pccard info slot %d", i); 411 return (ENXIO); 412 } 413 sc->slotmask |= (1 << i); 414 slt->cdata = sp; 415 sp->slt = slt; 416 sp->sc = sc; 417 } 418 419 sp = &sc->slots[0]; 420 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) { 421 if (sp->slt == NULL) 422 continue; 423 424 pcic_do_mgt_irq(sp, sc->irq); 425 sp->slt->irq = sc->irq; 426 427 /* Check for changes */ 428 sp->slt->laststate = sp->slt->state = empty; 429 if (pcic_boot_deactivated) { 430 sp->putb(sp, PCIC_POWER, 0); 431 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) == PCIC_CD) { 432 sp->slt->state = inactive; 433 pccard_event(sp->slt, card_deactivated); 434 } 435 } else { 436 pcic_do_stat_delta(sp); 437 } 438 } 439 440 return (bus_generic_attach(dev)); 441 } 442 443 444 static int 445 pcic_sresource(struct slot *slt, caddr_t data) 446 { 447 struct pccard_resource *pr; 448 struct resource *r; 449 int flags; 450 int rid = 0; 451 device_t bridgedev = slt->dev; 452 struct pcic_slot *sp = slt->cdata; 453 454 pr = (struct pccard_resource *)data; 455 pr->resource_addr = ~0ul; 456 457 /* 458 * If we're using PCI interrupt routing, then force the IRQ to 459 * use and to heck with what the user requested. If they want 460 * to be able to request IRQs, they must use ISA interrupt 461 * routing. If we don't give them an irq, and it is the 462 * pccardd 0,0 case, then just return (giving the "bad resource" 463 * return in pr->resource_addr). 464 */ 465 if (pr->type == SYS_RES_IRQ) { 466 if (sp->sc->func_route >= pcic_iw_pci) { 467 pr->resource_addr = sp->sc->irq; 468 return (0); 469 } 470 if (pr->min == 0 && pr->max == 0) 471 return (0); 472 } 473 474 /* 475 * Make sure we grok this type. 476 */ 477 switch(pr->type) { 478 default: 479 return (EINVAL); 480 case SYS_RES_MEMORY: 481 case SYS_RES_IRQ: 482 case SYS_RES_IOPORT: 483 break; 484 } 485 486 /* 487 * Allocate the resource, and align it to the most natural 488 * size. If we get it, then tell userland what we actually got 489 * in the range they requested. 490 */ 491 flags = rman_make_alignment_flags(pr->size); 492 r = bus_alloc_resource(bridgedev, pr->type, &rid, pr->min, pr->max, 493 pr->size, flags); 494 if (r != NULL) { 495 pr->resource_addr = (u_long)rman_get_start(r); 496 bus_release_resource(bridgedev, pr->type, rid, r); 497 } 498 return (0); 499 } 500 501 /* 502 * ioctl calls - Controller specific ioctls 503 */ 504 static int 505 pcic_ioctl(struct slot *slt, int cmd, caddr_t data) 506 { 507 struct pcic_slot *sp = slt->cdata; 508 struct pcic_reg *preg = (struct pcic_reg *) data; 509 510 switch(cmd) { 511 default: 512 return (ENOTTY); 513 case PIOCGREG: /* Get pcic register */ 514 preg->value = sp->getb(sp, preg->reg); 515 break; /* Set pcic register */ 516 case PIOCSREG: 517 sp->putb(sp, preg->reg, preg->value); 518 break; 519 case PIOCSRESOURCE: /* Can I use this resource? */ 520 pcic_sresource(slt, data); 521 break; 522 } 523 return (0); 524 } 525 526 /* 527 * pcic_cardbus_power 528 * 529 * Power the card up, as specified, using the cardbus power 530 * registers to control power. Microsoft recommends that cardbus 531 * vendors support powering the card via cardbus registers because 532 * there is no standard for 3.3V cards. Since at least a few of the 533 * cardbus bridges have minor issues with power via the ExCA registers, 534 * go ahead and do it all via cardbus registers. 535 * 536 * An expamination of the code will show the relative ease that we do 537 * Vpp in comparison to the ExCA case (which may be partially broken). 538 */ 539 static int 540 pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt) 541 { 542 uint32_t power; 543 uint32_t state; 544 545 /* 546 * If we're doing an auto-detect, and we're in a badvcc state, then 547 * we need to force the socket to rescan the card. We don't do this 548 * all the time because the socket can take up to 200ms to do the deed, 549 * and that's too long to busy wait. Since this is a relatively rare 550 * event (some BIOSes, and earlier versions of OLDCARD caused it), we 551 * test for it special. 552 */ 553 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE); 554 if (slt->pwr.vcc == -1 && (state & CB_SS_BADVCC)) { 555 /* 556 * Force the bridge to scan the card for the proper voltages 557 * that it supports. 558 */ 559 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_FORCE, 560 CB_SF_INTCVS); 561 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE); 562 /* This while loop can take 100-150ms */ 563 while ((state & CB_SS_CARD_MASK) == 0) { 564 DELAY(10 * 1000); 565 state = bus_space_read_4(sp->bst, sp->bsh, 566 CB_SOCKET_STATE); 567 } 568 } 569 570 571 /* 572 * Preserve the clock stop bit of the socket power register. Not 573 * sure that we want to do that, but maybe we should set it based 574 * on the power state. 575 */ 576 power = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_POWER); 577 power = 0; 578 579 /* 580 * vcc == -1 means automatically detect the voltage of the card. 581 * Do so and apply the right amount of power. 582 */ 583 if (slt->pwr.vcc == -1) { 584 if (state & CB_SS_5VCARD) 585 slt->pwr.vcc = 50; 586 else if (state & CB_SS_3VCARD) 587 slt->pwr.vcc = 33; 588 else if (state & CB_SS_XVCARD) 589 slt->pwr.vcc = 22; 590 else if (state & CB_SS_YVCARD) 591 slt->pwr.vcc = 11; 592 if (bootverbose && slt->pwr.vcc != -1) 593 device_printf(sp->sc->dev, 594 "Autodetected %d.%dV card\n", 595 slt->pwr.vcc / 10, slt->pwr.vcc % 10); 596 } 597 598 switch(slt->pwr.vcc) { 599 default: 600 return (EINVAL); 601 case 0: 602 power |= CB_SP_VCC_0V; 603 break; 604 case 11: 605 power |= CB_SP_VCC_YV; 606 break; 607 case 22: 608 power |= CB_SP_VCC_XV; 609 break; 610 case 33: 611 power |= CB_SP_VCC_3V; 612 break; 613 case 50: 614 power |= CB_SP_VCC_5V; 615 break; 616 } 617 618 /* 619 * vpp == -1 means use vcc voltage. 620 */ 621 if (slt->pwr.vpp == -1) 622 slt->pwr.vpp = slt->pwr.vcc; 623 switch(slt->pwr.vpp) { 624 default: 625 return (EINVAL); 626 case 0: 627 power |= CB_SP_VPP_0V; 628 break; 629 case 11: 630 power |= CB_SP_VPP_YV; 631 break; 632 case 22: 633 power |= CB_SP_VPP_XV; 634 break; 635 case 33: 636 power |= CB_SP_VPP_3V; 637 break; 638 case 50: 639 power |= CB_SP_VPP_5V; 640 break; 641 case 120: 642 power |= CB_SP_VPP_12V; 643 break; 644 } 645 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_POWER, power); 646 647 /* 648 * OK. We need to bring the card out of reset. Let the power 649 * stabilize for 300ms (why 300?) and then enable the outputs 650 * and then wait 100ms (why 100?) for it to stabilize. These numbers 651 * were stolen from the dim, dark past of OLDCARD and I have no clue 652 * how they were derived. I also use the bit setting routines here 653 * as a measure of conservatism. 654 */ 655 if (power) { 656 pcic_setb(sp, PCIC_POWER, PCIC_DISRST); 657 DELAY(300*1000); 658 pcic_setb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA); 659 DELAY(100*1000); 660 } else { 661 pcic_clrb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA); 662 } 663 664 return (0); 665 } 666 667 /* 668 * pcic_power - Enable the power of the slot according to 669 * the parameters in the power structure(s). 670 */ 671 static int 672 pcic_power(struct slot *slt) 673 { 674 unsigned char c, c2; 675 unsigned char reg = PCIC_DISRST | PCIC_PCPWRE; 676 struct pcic_slot *sp = slt->cdata; 677 struct pcic_slot *sp2; 678 struct pcic_softc *sc = sp->sc; 679 int dodefault = 0; 680 char controller; 681 682 /* 683 * Cardbus power registers are completely different. 684 */ 685 if (sc->flags & PCIC_CARDBUS_POWER) 686 return (pcic_cardbus_power(sp, slt)); 687 688 if (bootverbose) 689 device_printf(sc->dev, "Power: Vcc=%d Vpp=%d\n", slt->pwr.vcc, 690 slt->pwr.vpp); 691 /* 692 * If we're automatically detecting what voltage to use, then we need 693 * to ask the bridge what type (voltage-wise) the card is. 694 */ 695 if (slt->pwr.vcc == -1) { 696 if (sc->flags & PCIC_DF_POWER) { 697 /* 698 * Look at the VS[12]# bits on the card. If VS1 is 699 * clear then the card needs 3.3V instead of 5.0V. 700 */ 701 c = sp->getb(sp, PCIC_CDGC); 702 if ((c & PCIC_VS1STAT) == 0) 703 slt->pwr.vcc = 33; 704 else 705 slt->pwr.vcc = 50; 706 } 707 if (sc->flags & PCIC_PD_POWER) { 708 /* 709 * The 6710 does it one way, and the '22 and '29 do it 710 * another. The '22 can also do it the same way as a 711 * '10 does it, despite what the datasheets say. Some 712 * laptops with '22 don't seem to have the signals 713 * wired right for the '29 method to work. The 714 * laptops that don't work hang solid when the pccard 715 * memory is accessed. 716 * 717 * To allow for both types of laptops, 718 * hw.pcic.pd6722_vsense will select which one to use. 719 * 0 - none, 1 - the '10 way and 2 - the '29 way. 720 */ 721 controller = sp->controller; 722 if (controller == PCIC_PD6722) { 723 switch (pcic_pd6722_vsense) { 724 case 1: 725 controller = PCIC_PD6710; 726 break; 727 case 2: 728 controller = PCIC_PD6729; 729 break; 730 } 731 } 732 733 switch (controller) { 734 case PCIC_PD6710: 735 c = sp->getb(sp, PCIC_MISC1); 736 if ((c & PCIC_MISC1_5V_DETECT) == 0) 737 slt->pwr.vcc = 33; 738 else 739 slt->pwr.vcc = 50; 740 break; 741 case PCIC_PD6722: /* see above for why we do */ 742 break; /* none here */ 743 case PCIC_PD6729: 744 /* 745 * VS[12] signals are in slot1's 746 * extended reg 0xa for both slots. 747 */ 748 sp2 = &sc->slots[1]; 749 sp2->putb(sp2, PCIC_EXT_IND, PCIC_EXT_DATA); 750 c = sp2->getb(sp2, PCIC_EXTENDED); 751 if (sp == sp2) /* slot 1 */ 752 c >>= 2; 753 if ((c & PCIC_VS1A) == 0) 754 slt->pwr.vcc = 33; 755 else 756 slt->pwr.vcc = 50; 757 break; 758 default: 759 /* I have no idea how to do this for others */ 760 break; 761 } 762 763 /* 764 * Regardless of the above, setting the Auto Power 765 * Switch Enable appears to help. 766 */ 767 reg |= PCIC_APSENA; 768 } 769 if (sc->flags & PCIC_RICOH_POWER) { 770 /* 771 * The ISA bridge have the 5V/3.3V in register 772 * 1, bit 7. However, 3.3V cards can only be 773 * detected if GPI_EN is disabled. 774 */ 775 c = sp->getb(sp, PCIC_STATUS); 776 c2 = sp->getb(sp, PCIC_CDGC); 777 if ((c & PCIC_RICOH_5VCARD) && (c2 & PCIC_GPI_EN) == 0) 778 slt->pwr.vcc = 33; 779 else 780 slt->pwr.vcc = 50; 781 } 782 /* Other power schemes here */ 783 784 if (bootverbose && slt->pwr.vcc != -1) 785 device_printf(sc->dev, "Autodetected %d.%dV card\n", 786 slt->pwr.vcc / 10, slt->pwr.vcc %10); 787 } 788 if (slt->pwr.vcc == -1) { 789 if (bootverbose) 790 device_printf(sc->dev, 791 "Couldn't autodetect voltage, assuming 5.0V\n"); 792 dodefault = 1; 793 slt->pwr.vcc = 50; 794 } 795 796 /* 797 * XXX Note: The Vpp controls varies quit a bit between bridge chips 798 * and the following might not be right in all cases. The Linux 799 * code and wildboar code bases are more complex. However, most 800 * applications want vpp == vcc and the following code does appear 801 * to do that for all bridge sets. 802 */ 803 if (slt->pwr.vpp == -1) 804 slt->pwr.vpp = slt->pwr.vcc; 805 switch(slt->pwr.vpp) { 806 default: 807 return (EINVAL); 808 case 0: 809 break; 810 case 50: 811 case 33: 812 reg |= PCIC_VPP_5V; 813 break; 814 case 120: 815 reg |= PCIC_VPP_12V; 816 break; 817 } 818 819 if (slt->pwr.vcc) 820 reg |= PCIC_VCC_ON; /* Turn on Vcc */ 821 switch(slt->pwr.vcc) { 822 default: 823 return (EINVAL); 824 case 0: 825 break; 826 case 33: 827 /* 828 * The wildboar code has comments that state that 829 * the IBM KING controller doesn't support 3.3V 830 * on the "IBM Smart PC card drive". The code 831 * intemates that's the only place they have seen 832 * it used and that there's a boatload of issues 833 * with it. I'm not even sure this is right because 834 * the only docs I've been able to find say this is for 835 * 5V power. Of course, this "doc" is just code comments 836 * so who knows for sure. 837 */ 838 if (sc->flags & PCIC_KING_POWER) { 839 reg |= PCIC_VCC_5V_KING; 840 break; 841 } 842 if (sc->flags & PCIC_VG_POWER) { 843 pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS); 844 break; 845 } 846 if (sc->flags & PCIC_PD_POWER) { 847 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33); 848 break; 849 } 850 if (sc->flags & PCIC_RICOH_POWER) { 851 pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33); 852 break; 853 } 854 if (sc->flags & PCIC_DF_POWER) 855 reg |= PCIC_VCC_3V; 856 break; 857 case 50: 858 if (sc->flags & PCIC_KING_POWER) 859 reg |= PCIC_VCC_5V_KING; 860 /* 861 * For all of the variant power schemes for 3.3V go 862 * ahead and turn off the 3.3V enable bit. For all 863 * bridges, the setting the Vcc on bit does the rest. 864 * Note that we don't have to turn off the 3.3V bit 865 * for the '365 step D since with the reg assigments 866 * to this point it doesn't get turned on. 867 */ 868 if (sc->flags & PCIC_VG_POWER) 869 pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS); 870 if (sc->flags & PCIC_PD_POWER) 871 pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33); 872 if (sc->flags & PCIC_RICOH_POWER) 873 pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33); 874 break; 875 } 876 sp->putb(sp, PCIC_POWER, reg); 877 if (bootverbose) 878 device_printf(sc->dev, "Power applied\n"); 879 DELAY(300*1000); 880 if (slt->pwr.vcc) { 881 reg |= PCIC_OUTENA; 882 sp->putb(sp, PCIC_POWER, reg); 883 if (bootverbose) 884 device_printf(sc->dev, "Output enabled\n"); 885 DELAY(100*1000); 886 if (bootverbose) 887 device_printf(sc->dev, "Settling complete\n"); 888 } 889 890 /* 891 * Some chipsets will attempt to preclude us from supplying 892 * 5.0V to cards that only handle 3.3V. We seem to need to 893 * try 3.3V to paper over some power handling issues in other 894 * parts of the system. Maybe the proper detection of 3.3V cards 895 * now obviates the need for this hack, so put a printf in to 896 * warn the world about it. 897 */ 898 if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && dodefault) { 899 slt->pwr.vcc = 33; 900 slt->pwr.vpp = 0; 901 device_printf(sc->dev, 902 "Failed at 5.0V. Trying 3.3V. Please report message to mobile@freebsd.org\n"); 903 return (pcic_power(slt)); 904 } 905 if (bootverbose) 906 printf("Power complete.\n"); 907 return (0); 908 } 909 910 /* 911 * tell the PCIC which irq we want to use. only the following are legal: 912 * 3, 4, 5, 7, 9, 10, 11, 12, 14, 15. We require the callers of this 913 * routine to do the check for legality. 914 */ 915 static void 916 pcic_mapirq(struct slot *slt, int irq) 917 { 918 struct pcic_slot *sp = slt->cdata; 919 920 sp->sc->chip->map_irq(sp, irq); 921 } 922 923 /* 924 * pcic_reset - Reset the card and enable initial power. This may 925 * need to be interrupt driven in the future. We should likely turn 926 * the reset on, DELAY for a period of time < 250ms, turn it off and 927 * tsleep for a while and check it when we're woken up. I think that 928 * we're running afoul of the card status interrupt glitching, causing 929 * an interrupt storm because the card doesn't seem to be able to 930 * clear this pin while in reset. 931 */ 932 static void 933 pcic_reset(void *chan) 934 { 935 struct slot *slt = chan; 936 struct pcic_slot *sp = slt->cdata; 937 938 if (bootverbose) 939 device_printf(sp->sc->dev, "reset %d ", slt->insert_seq); 940 switch (slt->insert_seq) { 941 case 0: /* Something funny happended on the way to the pub... */ 942 if (bootverbose) 943 printf("\n"); 944 return; 945 case 1: /* Assert reset */ 946 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET); 947 if (bootverbose) 948 printf("int is %x stat is %x\n", 949 sp->getb(sp, PCIC_INT_GEN), 950 sp->getb(sp, PCIC_STATUS)); 951 slt->insert_seq = 2; 952 timeout(pcic_reset, (void *)slt, hz/4); 953 return; 954 case 2: /* Deassert it again */ 955 pcic_setb(sp, PCIC_INT_GEN, PCIC_CARDRESET | PCIC_IOCARD); 956 if (bootverbose) 957 printf("int is %x stat is %x\n", 958 sp->getb(sp, PCIC_INT_GEN), 959 sp->getb(sp, PCIC_STATUS)); 960 slt->insert_seq = 3; 961 timeout(pcic_reset, (void *)slt, hz/4); 962 return; 963 case 3: /* Wait if card needs more time */ 964 if (bootverbose) 965 printf("int is %x stat is %x\n", 966 sp->getb(sp, PCIC_INT_GEN), 967 sp->getb(sp, PCIC_STATUS)); 968 if ((sp->getb(sp, PCIC_STATUS) & PCIC_READY) == 0) { 969 timeout(pcic_reset, (void *)slt, hz/10); 970 return; 971 } 972 } 973 slt->insert_seq = 0; 974 if (sp->controller == PCIC_PD6722 || sp->controller == PCIC_PD6710) { 975 sp->putb(sp, PCIC_TIME_SETUP0, 0x1); 976 sp->putb(sp, PCIC_TIME_CMD0, 0x6); 977 sp->putb(sp, PCIC_TIME_RECOV0, 0x0); 978 sp->putb(sp, PCIC_TIME_SETUP1, 1); 979 sp->putb(sp, PCIC_TIME_CMD1, 0xf); 980 sp->putb(sp, PCIC_TIME_RECOV1, 0); 981 } 982 selwakeuppri(&slt->selp, PZERO); 983 } 984 985 /* 986 * pcic_disable - Disable the slot. I wonder if these operations can 987 * cause an interrupt we need to acknowledge? XXX 988 */ 989 static void 990 pcic_disable(struct slot *slt) 991 { 992 struct pcic_slot *sp = slt->cdata; 993 994 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDTYPE | PCIC_CARDRESET); 995 pcic_mapirq(slt, 0); 996 slt->pwr.vcc = slt->pwr.vpp = 0; 997 pcic_power(slt); 998 } 999 1000 /* 1001 * pcic_resume - Suspend/resume support for PCIC 1002 */ 1003 static void 1004 pcic_resume(struct slot *slt) 1005 { 1006 struct pcic_slot *sp = slt->cdata; 1007 1008 pcic_do_mgt_irq(sp, slt->irq); 1009 if (sp->controller == PCIC_PD6722) { 1010 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER); 1011 pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN); 1012 } 1013 if (sp->slt->state != inactive) 1014 pcic_do_stat_delta(sp); 1015 } 1016 1017 int 1018 pcic_activate_resource(device_t dev, device_t child, int type, int rid, 1019 struct resource *r) 1020 { 1021 struct pccard_devinfo *devi = device_get_ivars(child); 1022 int err; 1023 1024 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL) 1025 return (bus_generic_activate_resource(dev, child, type, 1026 rid, r)); 1027 1028 switch (type) { 1029 case SYS_RES_IOPORT: { 1030 struct io_desc *ip; 1031 ip = &devi->slt->io[rid]; 1032 if (ip->flags == 0) { 1033 if (rid == 0) 1034 ip->flags = IODF_WS | IODF_16BIT | IODF_CS16; 1035 else 1036 ip->flags = devi->slt->io[0].flags; 1037 } 1038 ip->flags |= IODF_ACTIVE; 1039 ip->start = rman_get_start(r); 1040 ip->size = rman_get_end(r) - rman_get_start(r) + 1; 1041 err = pcic_io(devi->slt, rid); 1042 if (err) 1043 return (err); 1044 break; 1045 } 1046 case SYS_RES_IRQ: 1047 /* 1048 * We actually defer the activation of the IRQ resource 1049 * until the interrupt is registered to avoid stray 1050 * interrupt messages. 1051 */ 1052 break; 1053 case SYS_RES_MEMORY: { 1054 struct mem_desc *mp; 1055 if (rid >= NUM_MEM_WINDOWS) 1056 return (EINVAL); 1057 mp = &devi->slt->mem[rid]; 1058 mp->flags |= MDF_ACTIVE; 1059 mp->start = (caddr_t) rman_get_start(r); 1060 mp->size = rman_get_end(r) - rman_get_start(r) + 1; 1061 err = pcic_memory(devi->slt, rid); 1062 if (err) 1063 return (err); 1064 break; 1065 } 1066 default: 1067 break; 1068 } 1069 err = bus_generic_activate_resource(dev, child, type, rid, r); 1070 return (err); 1071 } 1072 1073 int 1074 pcic_deactivate_resource(device_t dev, device_t child, int type, int rid, 1075 struct resource *r) 1076 { 1077 struct pccard_devinfo *devi = device_get_ivars(child); 1078 int err; 1079 1080 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL) 1081 return (bus_generic_deactivate_resource(dev, child, type, 1082 rid, r)); 1083 1084 switch (type) { 1085 case SYS_RES_IOPORT: { 1086 struct io_desc *ip = &devi->slt->io[rid]; 1087 ip->flags &= ~IODF_ACTIVE; 1088 err = pcic_io(devi->slt, rid); 1089 if (err) 1090 return (err); 1091 break; 1092 } 1093 case SYS_RES_IRQ: 1094 break; 1095 case SYS_RES_MEMORY: { 1096 struct mem_desc *mp = &devi->slt->mem[rid]; 1097 mp->flags &= ~(MDF_ACTIVE | MDF_ATTR); 1098 err = pcic_memory(devi->slt, rid); 1099 if (err) 1100 return (err); 1101 break; 1102 } 1103 default: 1104 break; 1105 } 1106 err = bus_generic_deactivate_resource(dev, child, type, rid, r); 1107 return (err); 1108 } 1109 1110 int 1111 pcic_setup_intr(device_t dev, device_t child, struct resource *irq, 1112 int flags, driver_intr_t *intr, void *arg, void **cookiep) 1113 { 1114 struct pccard_devinfo *devi = device_get_ivars(child); 1115 int err; 1116 1117 if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) { 1118 device_printf(dev, "Hardware does not support irq %ld.\n", 1119 rman_get_start(irq)); 1120 return (EINVAL); 1121 } 1122 1123 err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg, 1124 cookiep); 1125 if (err == 0) 1126 pcic_mapirq(devi->slt, rman_get_start(irq)); 1127 else 1128 device_printf(dev, "Error %d irq %ld\n", err, 1129 rman_get_start(irq)); 1130 return (err); 1131 } 1132 1133 int 1134 pcic_teardown_intr(device_t dev, device_t child, struct resource *irq, 1135 void *cookie) 1136 { 1137 struct pccard_devinfo *devi = device_get_ivars(child); 1138 1139 pcic_mapirq(devi->slt, 0); 1140 return (bus_generic_teardown_intr(dev, child, irq, cookie)); 1141 } 1142 1143 int 1144 pcic_set_res_flags(device_t bus, device_t child, int restype, int rid, 1145 u_long value) 1146 { 1147 struct pccard_devinfo *devi = device_get_ivars(child); 1148 int err = 0; 1149 1150 switch (restype) { 1151 case SYS_RES_MEMORY: { 1152 struct mem_desc *mp = &devi->slt->mem[rid]; 1153 switch (value) { 1154 case PCCARD_A_MEM_COM: 1155 mp->flags &= ~MDF_ATTR; 1156 break; 1157 case PCCARD_A_MEM_ATTR: 1158 mp->flags |= MDF_ATTR; 1159 break; 1160 case PCCARD_A_MEM_8BIT: 1161 mp->flags &= ~MDF_16BITS; 1162 break; 1163 case PCCARD_A_MEM_16BIT: 1164 mp->flags |= MDF_16BITS; 1165 break; 1166 } 1167 err = pcic_memory(devi->slt, rid); 1168 break; 1169 } 1170 default: 1171 err = EOPNOTSUPP; 1172 } 1173 return (err); 1174 } 1175 1176 int 1177 pcic_get_res_flags(device_t bus, device_t child, int restype, int rid, 1178 u_long *value) 1179 { 1180 struct pccard_devinfo *devi = device_get_ivars(child); 1181 int err = 0; 1182 1183 if (value == 0) 1184 return (ENOMEM); 1185 1186 switch (restype) { 1187 case SYS_RES_IOPORT: { 1188 struct io_desc *ip = &devi->slt->io[rid]; 1189 *value = ip->flags; 1190 break; 1191 } 1192 case SYS_RES_MEMORY: { 1193 struct mem_desc *mp = &devi->slt->mem[rid]; 1194 *value = mp->flags; 1195 break; 1196 } 1197 default: 1198 err = EOPNOTSUPP; 1199 } 1200 return (err); 1201 } 1202 1203 int 1204 pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset 1205 #if __FreeBSD_version >= 500000 1206 ,u_int32_t *deltap 1207 #endif 1208 ) 1209 { 1210 struct pccard_devinfo *devi = device_get_ivars(child); 1211 struct mem_desc *mp = &devi->slt->mem[rid]; 1212 1213 mp->card = offset; 1214 #if __FreeBSD_version >= 500000 1215 if (deltap) 1216 *deltap = 0; /* XXX BAD XXX */ 1217 #endif 1218 return (pcic_memory(devi->slt, rid)); 1219 } 1220 1221 int 1222 pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset) 1223 { 1224 struct pccard_devinfo *devi = device_get_ivars(child); 1225 struct mem_desc *mp = &devi->slt->mem[rid]; 1226 1227 if (offset == 0) 1228 return (ENOMEM); 1229 1230 *offset = mp->card; 1231 1232 return (0); 1233 } 1234 1235 struct resource * 1236 pcic_alloc_resource(device_t dev, device_t child, int type, int *rid, 1237 u_long start, u_long end, u_long count, u_int flags) 1238 { 1239 struct pcic_softc *sc = device_get_softc(dev); 1240 1241 /* 1242 * If we're routing via pci, we can share. 1243 */ 1244 if (sc->func_route == pcic_iw_pci && type == SYS_RES_IRQ) { 1245 if (bootverbose) 1246 device_printf(child, "Forcing IRQ to %d\n", sc->irq); 1247 start = end = sc->irq; 1248 flags |= RF_SHAREABLE; 1249 } 1250 1251 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 1252 count, flags)); 1253 } 1254 1255 void 1256 pcic_do_stat_delta(struct pcic_slot *sp) 1257 { 1258 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD) 1259 pccard_event(sp->slt, card_removed); 1260 else 1261 pccard_event(sp->slt, card_inserted); 1262 } 1263 /* 1264 * Wrapper function for pcicintr so that signatures match. 1265 */ 1266 void 1267 pcic_isa_intr(void *arg) 1268 { 1269 pcic_isa_intr1(arg); 1270 } 1271 1272 /* 1273 * PCIC timer. If the controller doesn't have a free IRQ to use 1274 * or if interrupt steering doesn't work, poll the controller for 1275 * insertion/removal events. 1276 */ 1277 void 1278 pcic_timeout(void *chan) 1279 { 1280 struct pcic_softc *sc = (struct pcic_softc *) chan; 1281 1282 if (pcic_isa_intr1(chan) != 0) { 1283 device_printf(sc->dev, 1284 "Static bug detected, ignoring hardware."); 1285 sc->slot_poll = 0; 1286 return; 1287 } 1288 sc->timeout_ch = timeout(sc->slot_poll, chan, hz/2); 1289 } 1290 1291 /* 1292 * PCIC Interrupt handler. 1293 * Check each slot in turn, and read the card status change 1294 * register. If this is non-zero, then a change has occurred 1295 * on this card, so send an event to the main code. 1296 */ 1297 int 1298 pcic_isa_intr1(void *arg) 1299 { 1300 int slot, s; 1301 u_int8_t chg; 1302 struct pcic_softc *sc = (struct pcic_softc *) arg; 1303 struct pcic_slot *sp = &sc->slots[0]; 1304 1305 s = splhigh(); 1306 for (slot = 0; slot < PCIC_CARD_SLOTS; slot++, sp++) { 1307 if (sp->slt == NULL) 1308 continue; 1309 if ((chg = sp->getb(sp, PCIC_STAT_CHG)) != 0) { 1310 /* 1311 * if chg is 0xff, then we know that we've hit 1312 * the famous "static bug" for some desktop 1313 * pcmcia cards. This is caused by static 1314 * discharge frying the poor card's mind and 1315 * it starts return 0xff forever. We return 1316 * an error and stop polling the card. When 1317 * we're interrupt based, we never see this. 1318 * The card just goes away silently. 1319 */ 1320 if (chg == 0xff) { 1321 splx(s); 1322 return (EIO); 1323 } 1324 if (chg & PCIC_CDTCH) 1325 pcic_do_stat_delta(sp); 1326 } 1327 } 1328 splx(s); 1329 return (0); 1330 } 1331 1332 int 1333 pcic_isa_mapirq(struct pcic_slot *sp, int irq) 1334 { 1335 irq = host_irq_to_pcic(irq); 1336 if (irq == 0) 1337 pcic_clrb(sp, PCIC_INT_GEN, 0xF); 1338 else 1339 sp->putb(sp, PCIC_INT_GEN, 1340 (sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq); 1341 return (0); 1342 }
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