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sys/pccard/pcic.c
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1 /* 2 * Intel PCIC or compatible Controller driver 3 *------------------------------------------------------------------------- 4 */ 5 6 /*- 7 * Copyright (c) 2001 M. Warner Losh. All rights reserved. 8 * Copyright (c) 1995 Andrew McRae. All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * $FreeBSD: releng/5.4/sys/pccard/pcic.c 141090 2005-01-31 23:27:04Z imp $ 33 */ 34 35 #define OBSOLETE_IN_6 36 37 #include <sys/param.h> 38 #include <sys/bus.h> 39 #include <sys/kernel.h> 40 #include <sys/module.h> 41 #include <sys/sysctl.h> 42 #include <sys/systm.h> 43 44 #include <machine/clock.h> 45 #include <pccard/i82365.h> 46 #include <pccard/pcic_pci.h> 47 #include <pccard/cardinfo.h> 48 #include <pccard/slot.h> 49 #include <pccard/pcicvar.h> 50 51 /* Get pnp IDs */ 52 #include <isa/isavar.h> 53 54 #include <dev/pccard/pccardvar.h> 55 #include "card_if.h" 56 57 /* 58 * Prototypes for interrupt handler. 59 */ 60 static int pcic_ioctl(struct slot *, int, caddr_t); 61 static int pcic_power(struct slot *); 62 static void pcic_mapirq(struct slot *, int); 63 static timeout_t pcic_reset; 64 static void pcic_resume(struct slot *); 65 static void pcic_disable(struct slot *); 66 static int pcic_memory(struct slot *, int); 67 static int pcic_io(struct slot *, int); 68 69 devclass_t pcic_devclass; 70 71 static struct slot_ctrl pcic_cinfo = { 72 pcic_mapirq, 73 pcic_memory, 74 pcic_io, 75 pcic_reset, 76 pcic_disable, 77 pcic_power, 78 pcic_ioctl, 79 pcic_resume, 80 PCIC_MEM_WIN, 81 PCIC_IO_WIN 82 }; 83 84 /* sysctl vars */ 85 SYSCTL_NODE(_hw, OID_AUTO, pcic, CTLFLAG_RD, 0, "PCIC parameters"); 86 87 int pcic_override_irq = 0; 88 TUNABLE_INT("machdep.pccard.pcic_irq", &pcic_override_irq); 89 TUNABLE_INT("hw.pcic.irq", &pcic_override_irq); 90 SYSCTL_INT(_hw_pcic, OID_AUTO, irq, CTLFLAG_RDTUN, 91 &pcic_override_irq, 0, 92 "Override the IRQ configured by the config system for all pcic devices"); 93 94 int pcic_boot_deactivated = 0; 95 TUNABLE_INT("hw.pcic.boot_deactivated", &pcic_boot_deactivated); 96 SYSCTL_INT(_hw_pcic, OID_AUTO, boot_deactivated, CTLFLAG_RDTUN, 97 &pcic_boot_deactivated, 0, 98 "Override the automatic powering up of pccards at boot. This works\n\ 99 around what turns out to be an old bug in the code that has since been\n\ 100 corrected. It is now deprecated and will be removed completely before\n\ 101 FreeBSD 4.8."); 102 103 /* 104 * CL-PD6722's VSENSE method 105 * 0: NO VSENSE (assume a 5.0V card) 106 * 1: 6710's method (default) 107 * 2: 6729's method 108 */ 109 int pcic_pd6722_vsense = 1; 110 TUNABLE_INT("hw.pcic.pd6722_vsense", &pcic_pd6722_vsense); 111 SYSCTL_INT(_hw_pcic, OID_AUTO, pd6722_vsense, CTLFLAG_RDTUN, 112 &pcic_pd6722_vsense, 1, 113 "Select CL-PD6722's VSENSE method. VSENSE is used to determine the\n\ 114 volatage of inserted cards. The CL-PD6722 has two methods to determine the\n\ 115 voltage of the card. 0 means assume a 5.0V card and do not check. 1 means\n\ 116 use the same method that the CL-PD6710 uses (default). 2 means use the\n\ 117 same method as the CL-PD6729. 2 is documented in the datasheet as being\n\ 118 the correct way, but 1 seems to give better results on more laptops."); 119 120 /* 121 * Read a register from the PCIC. 122 */ 123 unsigned char 124 pcic_getb_io(struct pcic_slot *sp, int reg) 125 { 126 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg); 127 return (bus_space_read_1(sp->bst, sp->bsh, PCIC_DATA)); 128 } 129 130 /* 131 * Write a register on the PCIC 132 */ 133 void 134 pcic_putb_io(struct pcic_slot *sp, int reg, unsigned char val) 135 { 136 /* 137 * Many datasheets recommend using outw rather than outb to save 138 * a microsecond. Maybe we should do this, but we'd likely only 139 * save 20-30us on card activation. 140 */ 141 bus_space_write_1(sp->bst, sp->bsh, PCIC_INDEX, sp->offset + reg); 142 bus_space_write_1(sp->bst, sp->bsh, PCIC_DATA, val); 143 } 144 145 /* 146 * Clear bit(s) of a register. 147 */ 148 __inline void 149 pcic_clrb(struct pcic_slot *sp, int reg, unsigned char mask) 150 { 151 sp->putb(sp, reg, sp->getb(sp, reg) & ~mask); 152 } 153 154 /* 155 * Set bit(s) of a register 156 */ 157 __inline void 158 pcic_setb(struct pcic_slot *sp, int reg, unsigned char mask) 159 { 160 sp->putb(sp, reg, sp->getb(sp, reg) | mask); 161 } 162 163 /* 164 * Write a 16 bit value to 2 adjacent PCIC registers 165 */ 166 static __inline void 167 pcic_putw(struct pcic_slot *sp, int reg, unsigned short word) 168 { 169 sp->putb(sp, reg, word & 0xFF); 170 sp->putb(sp, reg + 1, (word >> 8) & 0xff); 171 } 172 173 /* 174 * pc98 cbus cards introduce a slight wrinkle here. They route the irq7 pin 175 * from the pcic chip to INT 2 on the cbus. INT 2 is normally mapped to 176 * irq 6 on the pc98 architecture, so if we get a request for irq 6 177 * lie to the hardware and say it is 7. All the other usual mappings for 178 * cbus INT into irq space are the same as the rest of the system. 179 */ 180 static __inline int 181 host_irq_to_pcic(int irq) 182 { 183 #ifdef PC98 184 if (irq == 6) 185 irq = 7; 186 #endif 187 return (irq); 188 } 189 190 /* 191 * Free up resources allocated so far. 192 */ 193 void 194 pcic_dealloc(device_t dev) 195 { 196 struct pcic_softc *sc; 197 198 sc = (struct pcic_softc *) device_get_softc(dev); 199 if (sc->slot_poll) 200 untimeout(sc->slot_poll, sc, sc->timeout_ch); 201 if (sc->iores) 202 bus_release_resource(dev, SYS_RES_IOPORT, sc->iorid, 203 sc->iores); 204 if (sc->memres) 205 bus_release_resource(dev, SYS_RES_MEMORY, sc->memrid, 206 sc->memres); 207 if (sc->ih) 208 bus_teardown_intr(dev, sc->irqres, sc->ih); 209 if (sc->irqres) 210 bus_release_resource(dev, SYS_RES_IRQ, sc->irqrid, sc->irqres); 211 } 212 213 /* 214 * entry point from main code to map/unmap memory context. 215 */ 216 static int 217 pcic_memory(struct slot *slt, int win) 218 { 219 struct pcic_slot *sp = slt->cdata; 220 struct mem_desc *mp = &slt->mem[win]; 221 int reg = win * PCIC_MEMSIZE + PCIC_MEMBASE; 222 223 if (win < 0 || win >= slt->ctrl->maxmem) { 224 printf("Illegal PCIC MEMORY window request %d\n", win); 225 return (ENXIO); 226 } 227 if (mp->flags & MDF_ACTIVE) { 228 unsigned long sys_addr = (uintptr_t)(void *)mp->start >> 12; 229 if ((sys_addr >> 12) != 0 && 230 (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) == 0) { 231 printf("This pcic does not support mapping > 24M\n"); 232 return (ENXIO); 233 } 234 /* 235 * Write the addresses, card offsets and length. 236 * The values are all stored as the upper 12 bits of the 237 * 24 bit address i.e everything is allocated as 4 Kb chunks. 238 * Memory mapped cardbus bridges extend this slightly to allow 239 * one to set the upper 8 bits of the 32bit address as well. 240 * If the chip supports it, then go ahead and write those 241 * upper 8 bits. 242 */ 243 pcic_putw(sp, reg, sys_addr & 0xFFF); 244 pcic_putw(sp, reg+2, (sys_addr + (mp->size >> 12) - 1) & 0xFFF); 245 pcic_putw(sp, reg+4, ((mp->card >> 12) - sys_addr) & 0x3FFF); 246 if (sp->sc->flags & PCIC_YENTA_HIGH_MEMORY) 247 sp->putb(sp, PCIC_MEMORY_HIGH0 + win, sys_addr >> 12); 248 /* 249 * Each 16 bit register has some flags in the upper bits. 250 */ 251 if (mp->flags & MDF_16BITS) 252 pcic_setb(sp, reg+1, PCIC_DATA16); 253 if (mp->flags & MDF_ZEROWS) 254 pcic_setb(sp, reg+1, PCIC_ZEROWS); 255 if (mp->flags & MDF_WS0) 256 pcic_setb(sp, reg+3, PCIC_MW0); 257 if (mp->flags & MDF_WS1) 258 pcic_setb(sp, reg+3, PCIC_MW1); 259 if (mp->flags & MDF_ATTR) 260 pcic_setb(sp, reg+5, PCIC_REG); 261 if (mp->flags & MDF_WP) 262 pcic_setb(sp, reg+5, PCIC_WP); 263 /* 264 * Enable the memory window. By experiment, we need a delay. 265 */ 266 pcic_setb(sp, PCIC_ADDRWINE, (1<<win) | PCIC_MEMCS16); 267 DELAY(50); 268 } else { 269 pcic_clrb(sp, PCIC_ADDRWINE, 1<<win); 270 pcic_putw(sp, reg, 0); 271 pcic_putw(sp, reg+2, 0); 272 pcic_putw(sp, reg+4, 0); 273 } 274 if (bootverbose) 275 printf("pcic: mem addr %p: reg %d: %x %x %x %x %x %x %x\n", 276 mp->start, reg, sp->getb(sp, reg), sp->getb(sp, reg+1), 277 sp->getb(sp, reg+2), sp->getb(sp, reg+3), 278 sp->getb(sp, reg+3), sp->getb(sp, reg+5), 279 sp->getb(sp, PCIC_ADDRWINE)); 280 return (0); 281 } 282 283 /* 284 * pcic_io - map or unmap I/O context 285 */ 286 static int 287 pcic_io(struct slot *slt, int win) 288 { 289 int mask, reg; 290 struct pcic_slot *sp = slt->cdata; 291 struct io_desc *ip = &slt->io[win]; 292 if (bootverbose) { 293 printf("pcic: I/O win %d flags %x %x-%x\n", win, ip->flags, 294 ip->start, ip->start + ip->size - 1); 295 } 296 297 switch (win) { 298 case 0: 299 mask = PCIC_IO0_EN; 300 reg = PCIC_IO0; 301 break; 302 case 1: 303 mask = PCIC_IO1_EN; 304 reg = PCIC_IO1; 305 break; 306 default: 307 printf("Illegal PCIC I/O window request %d\n", win); 308 return (ENXIO); 309 } 310 if (ip->flags & IODF_ACTIVE) { 311 unsigned char x, ioctlv; 312 313 pcic_putw(sp, reg, ip->start); 314 pcic_putw(sp, reg+2, ip->start + ip->size - 1); 315 x = 0; 316 if (ip->flags & IODF_ZEROWS) 317 x |= PCIC_IO_0WS; 318 if (ip->flags & IODF_WS) 319 x |= PCIC_IO_WS; 320 if (ip->flags & IODF_CS16) 321 x |= PCIC_IO_CS16; 322 if (ip->flags & IODF_16BIT) 323 x |= PCIC_IO_16BIT; 324 /* 325 * Extract the current flags and merge with new flags. 326 * Flags for window 0 in lower nybble, and in upper nybble 327 * for window 1. 328 */ 329 ioctlv = sp->getb(sp, PCIC_IOCTL); 330 DELAY(100); 331 switch (win) { 332 case 0: 333 sp->putb(sp, PCIC_IOCTL, x | (ioctlv & 0xf0)); 334 break; 335 case 1: 336 sp->putb(sp, PCIC_IOCTL, (x << 4) | (ioctlv & 0xf)); 337 break; 338 } 339 DELAY(100); 340 pcic_setb(sp, PCIC_ADDRWINE, mask); 341 DELAY(100); 342 } else { 343 pcic_clrb(sp, PCIC_ADDRWINE, mask); 344 DELAY(100); 345 pcic_putw(sp, reg, 0); 346 pcic_putw(sp, reg + 2, 0); 347 } 348 return (0); 349 } 350 351 static void 352 pcic_do_mgt_irq(struct pcic_slot *sp, int irq) 353 { 354 u_int32_t reg; 355 356 if (sp->sc->csc_route == pcic_iw_pci) { 357 /* Do the PCI side of things: Enable the Card Change int */ 358 reg = CB_SM_CD; 359 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_MASK, reg); 360 /* 361 * TI Chips need us to set the following. We tell the 362 * controller to route things via PCI interrupts. Also 363 * we clear the interrupt number in the STAT_INT register 364 * as well. The TI-12xx and newer chips require one or the 365 * other of these to happen, depending on what is set in the 366 * diagnostic register. I do both on the theory that other 367 * chips might need one or the other and that no harm will 368 * come from it. If there is harm, then I'll make it a bit 369 * in the tables. 370 */ 371 pcic_setb(sp, PCIC_INT_GEN, PCIC_INTR_ENA); 372 pcic_clrb(sp, PCIC_STAT_INT, PCIC_CSCSELECT); 373 } else { 374 /* Management IRQ changes */ 375 /* 376 * The PCIC_INTR_ENA bit means either "tie the function 377 * and csc interrupts together" or "Route csc interrupts 378 * via PCI" or "Reserved". In any case, we want to clear 379 * it since we're using ISA interrupts. 380 */ 381 pcic_clrb(sp, PCIC_INT_GEN, PCIC_INTR_ENA); 382 irq = host_irq_to_pcic(irq); 383 sp->putb(sp, PCIC_STAT_INT, (irq << PCIC_SI_IRQ_SHIFT) | 384 PCIC_CDEN); 385 } 386 } 387 388 int 389 pcic_attach(device_t dev) 390 { 391 int i; 392 device_t kid; 393 struct pcic_softc *sc; 394 struct slot *slt; 395 struct pcic_slot *sp; 396 397 sc = (struct pcic_softc *) device_get_softc(dev); 398 callout_handle_init(&sc->timeout_ch); 399 sp = &sc->slots[0]; 400 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) { 401 if (!sp->slt) 402 continue; 403 sp->slt = 0; 404 kid = device_add_child(dev, NULL, -1); 405 if (kid == NULL) { 406 device_printf(dev, "Can't add pccard bus slot %d", i); 407 return (ENXIO); 408 } 409 device_probe_and_attach(kid); 410 slt = pccard_init_slot(kid, &pcic_cinfo); 411 if (slt == 0) { 412 device_printf(dev, "Can't get pccard info slot %d", i); 413 return (ENXIO); 414 } 415 sc->slotmask |= (1 << i); 416 slt->cdata = sp; 417 sp->slt = slt; 418 sp->sc = sc; 419 } 420 421 sp = &sc->slots[0]; 422 for (i = 0; i < PCIC_CARD_SLOTS; i++, sp++) { 423 if (sp->slt == NULL) 424 continue; 425 426 pcic_do_mgt_irq(sp, sc->irq); 427 sp->slt->irq = sc->irq; 428 429 /* Check for changes */ 430 sp->slt->laststate = sp->slt->state = empty; 431 if (pcic_boot_deactivated) { 432 sp->putb(sp, PCIC_POWER, 0); 433 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) == PCIC_CD) { 434 sp->slt->state = inactive; 435 pccard_event(sp->slt, card_deactivated); 436 } 437 } else { 438 pcic_do_stat_delta(sp); 439 } 440 } 441 442 return (bus_generic_attach(dev)); 443 } 444 445 446 static int 447 pcic_sresource(struct slot *slt, caddr_t data) 448 { 449 struct pccard_resource *pr; 450 struct resource *r; 451 int flags; 452 int rid = 0; 453 device_t bridgedev = slt->dev; 454 struct pcic_slot *sp = slt->cdata; 455 456 pr = (struct pccard_resource *)data; 457 pr->resource_addr = ~0ul; 458 459 /* 460 * If we're using PCI interrupt routing, then force the IRQ to 461 * use and to heck with what the user requested. If they want 462 * to be able to request IRQs, they must use ISA interrupt 463 * routing. If we don't give them an irq, and it is the 464 * pccardd 0,0 case, then just return (giving the "bad resource" 465 * return in pr->resource_addr). 466 */ 467 if (pr->type == SYS_RES_IRQ) { 468 if (sp->sc->func_route >= pcic_iw_pci) { 469 pr->resource_addr = sp->sc->irq; 470 return (0); 471 } 472 if (pr->min == 0 && pr->max == 0) 473 return (0); 474 } 475 476 /* 477 * Make sure we grok this type. 478 */ 479 switch(pr->type) { 480 default: 481 return (EINVAL); 482 case SYS_RES_MEMORY: 483 case SYS_RES_IRQ: 484 case SYS_RES_IOPORT: 485 break; 486 } 487 488 /* 489 * Allocate the resource, and align it to the most natural 490 * size. If we get it, then tell userland what we actually got 491 * in the range they requested. 492 */ 493 flags = rman_make_alignment_flags(pr->size); 494 r = bus_alloc_resource(bridgedev, pr->type, &rid, pr->min, pr->max, 495 pr->size, flags); 496 if (r != NULL) { 497 pr->resource_addr = (u_long)rman_get_start(r); 498 bus_release_resource(bridgedev, pr->type, rid, r); 499 } 500 return (0); 501 } 502 503 /* 504 * ioctl calls - Controller specific ioctls 505 */ 506 static int 507 pcic_ioctl(struct slot *slt, int cmd, caddr_t data) 508 { 509 struct pcic_slot *sp = slt->cdata; 510 struct pcic_reg *preg = (struct pcic_reg *) data; 511 512 switch(cmd) { 513 default: 514 return (ENOTTY); 515 case PIOCGREG: /* Get pcic register */ 516 preg->value = sp->getb(sp, preg->reg); 517 break; /* Set pcic register */ 518 case PIOCSREG: 519 sp->putb(sp, preg->reg, preg->value); 520 break; 521 case PIOCSRESOURCE: /* Can I use this resource? */ 522 pcic_sresource(slt, data); 523 break; 524 } 525 return (0); 526 } 527 528 /* 529 * pcic_cardbus_power 530 * 531 * Power the card up, as specified, using the cardbus power 532 * registers to control power. Microsoft recommends that cardbus 533 * vendors support powering the card via cardbus registers because 534 * there is no standard for 3.3V cards. Since at least a few of the 535 * cardbus bridges have minor issues with power via the ExCA registers, 536 * go ahead and do it all via cardbus registers. 537 * 538 * An expamination of the code will show the relative ease that we do 539 * Vpp in comparison to the ExCA case (which may be partially broken). 540 */ 541 static int 542 pcic_cardbus_power(struct pcic_slot *sp, struct slot *slt) 543 { 544 uint32_t power; 545 uint32_t state; 546 547 /* 548 * If we're doing an auto-detect, and we're in a badvcc state, then 549 * we need to force the socket to rescan the card. We don't do this 550 * all the time because the socket can take up to 200ms to do the deed, 551 * and that's too long to busy wait. Since this is a relatively rare 552 * event (some BIOSes, and earlier versions of OLDCARD caused it), we 553 * test for it special. 554 */ 555 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE); 556 if (slt->pwr.vcc == -1 && (state & CB_SS_BADVCC)) { 557 /* 558 * Force the bridge to scan the card for the proper voltages 559 * that it supports. 560 */ 561 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_FORCE, 562 CB_SF_INTCVS); 563 state = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_STATE); 564 /* This while loop can take 100-150ms */ 565 while ((state & CB_SS_CARD_MASK) == 0) { 566 DELAY(10 * 1000); 567 state = bus_space_read_4(sp->bst, sp->bsh, 568 CB_SOCKET_STATE); 569 } 570 } 571 572 573 /* 574 * Preserve the clock stop bit of the socket power register. Not 575 * sure that we want to do that, but maybe we should set it based 576 * on the power state. 577 */ 578 power = bus_space_read_4(sp->bst, sp->bsh, CB_SOCKET_POWER); 579 power = 0; 580 581 /* 582 * vcc == -1 means automatically detect the voltage of the card. 583 * Do so and apply the right amount of power. 584 */ 585 if (slt->pwr.vcc == -1) { 586 if (state & CB_SS_5VCARD) 587 slt->pwr.vcc = 50; 588 else if (state & CB_SS_3VCARD) 589 slt->pwr.vcc = 33; 590 else if (state & CB_SS_XVCARD) 591 slt->pwr.vcc = 22; 592 else if (state & CB_SS_YVCARD) 593 slt->pwr.vcc = 11; 594 if (bootverbose && slt->pwr.vcc != -1) 595 device_printf(sp->sc->dev, 596 "Autodetected %d.%dV card\n", 597 slt->pwr.vcc / 10, slt->pwr.vcc % 10); 598 } 599 600 switch(slt->pwr.vcc) { 601 default: 602 return (EINVAL); 603 case 0: 604 power |= CB_SP_VCC_0V; 605 break; 606 case 11: 607 power |= CB_SP_VCC_YV; 608 break; 609 case 22: 610 power |= CB_SP_VCC_XV; 611 break; 612 case 33: 613 power |= CB_SP_VCC_3V; 614 break; 615 case 50: 616 power |= CB_SP_VCC_5V; 617 break; 618 } 619 620 /* 621 * vpp == -1 means use vcc voltage. 622 */ 623 if (slt->pwr.vpp == -1) 624 slt->pwr.vpp = slt->pwr.vcc; 625 switch(slt->pwr.vpp) { 626 default: 627 return (EINVAL); 628 case 0: 629 power |= CB_SP_VPP_0V; 630 break; 631 case 11: 632 power |= CB_SP_VPP_YV; 633 break; 634 case 22: 635 power |= CB_SP_VPP_XV; 636 break; 637 case 33: 638 power |= CB_SP_VPP_3V; 639 break; 640 case 50: 641 power |= CB_SP_VPP_5V; 642 break; 643 case 120: 644 power |= CB_SP_VPP_12V; 645 break; 646 } 647 bus_space_write_4(sp->bst, sp->bsh, CB_SOCKET_POWER, power); 648 649 /* 650 * OK. We need to bring the card out of reset. Let the power 651 * stabilize for 300ms (why 300?) and then enable the outputs 652 * and then wait 100ms (why 100?) for it to stabilize. These numbers 653 * were stolen from the dim, dark past of OLDCARD and I have no clue 654 * how they were derived. I also use the bit setting routines here 655 * as a measure of conservatism. 656 */ 657 if (power) { 658 pcic_setb(sp, PCIC_POWER, PCIC_DISRST); 659 DELAY(300*1000); 660 pcic_setb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA); 661 DELAY(100*1000); 662 } else { 663 pcic_clrb(sp, PCIC_POWER, PCIC_DISRST | PCIC_OUTENA); 664 } 665 666 return (0); 667 } 668 669 /* 670 * pcic_power - Enable the power of the slot according to 671 * the parameters in the power structure(s). 672 */ 673 static int 674 pcic_power(struct slot *slt) 675 { 676 unsigned char c, c2; 677 unsigned char reg = PCIC_DISRST | PCIC_PCPWRE; 678 struct pcic_slot *sp = slt->cdata; 679 struct pcic_slot *sp2; 680 struct pcic_softc *sc = sp->sc; 681 int dodefault = 0; 682 char controller; 683 684 /* 685 * Cardbus power registers are completely different. 686 */ 687 if (sc->flags & PCIC_CARDBUS_POWER) 688 return (pcic_cardbus_power(sp, slt)); 689 690 if (bootverbose) 691 device_printf(sc->dev, "Power: Vcc=%d Vpp=%d\n", slt->pwr.vcc, 692 slt->pwr.vpp); 693 /* 694 * If we're automatically detecting what voltage to use, then we need 695 * to ask the bridge what type (voltage-wise) the card is. 696 */ 697 if (slt->pwr.vcc == -1) { 698 if (sc->flags & PCIC_DF_POWER) { 699 /* 700 * Look at the VS[12]# bits on the card. If VS1 is 701 * clear then the card needs 3.3V instead of 5.0V. 702 */ 703 c = sp->getb(sp, PCIC_CDGC); 704 if ((c & PCIC_VS1STAT) == 0) 705 slt->pwr.vcc = 33; 706 else 707 slt->pwr.vcc = 50; 708 } 709 if (sc->flags & PCIC_PD_POWER) { 710 /* 711 * The 6710 does it one way, and the '22 and '29 do it 712 * another. The '22 can also do it the same way as a 713 * '10 does it, despite what the datasheets say. Some 714 * laptops with '22 don't seem to have the signals 715 * wired right for the '29 method to work. The 716 * laptops that don't work hang solid when the pccard 717 * memory is accessed. 718 * 719 * To allow for both types of laptops, 720 * hw.pcic.pd6722_vsense will select which one to use. 721 * 0 - none, 1 - the '10 way and 2 - the '29 way. 722 */ 723 controller = sp->controller; 724 if (controller == PCIC_PD6722) { 725 switch (pcic_pd6722_vsense) { 726 case 1: 727 controller = PCIC_PD6710; 728 break; 729 case 2: 730 controller = PCIC_PD6729; 731 break; 732 } 733 } 734 735 switch (controller) { 736 case PCIC_PD6710: 737 c = sp->getb(sp, PCIC_MISC1); 738 if ((c & PCIC_MISC1_5V_DETECT) == 0) 739 slt->pwr.vcc = 33; 740 else 741 slt->pwr.vcc = 50; 742 break; 743 case PCIC_PD6722: /* see above for why we do */ 744 break; /* none here */ 745 case PCIC_PD6729: 746 /* 747 * VS[12] signals are in slot1's 748 * extended reg 0xa for both slots. 749 */ 750 sp2 = &sc->slots[1]; 751 sp2->putb(sp2, PCIC_EXT_IND, PCIC_EXT_DATA); 752 c = sp2->getb(sp2, PCIC_EXTENDED); 753 if (sp == sp2) /* slot 1 */ 754 c >>= 2; 755 if ((c & PCIC_VS1A) == 0) 756 slt->pwr.vcc = 33; 757 else 758 slt->pwr.vcc = 50; 759 break; 760 default: 761 /* I have no idea how to do this for others */ 762 break; 763 } 764 765 /* 766 * Regardless of the above, setting the Auto Power 767 * Switch Enable appears to help. 768 */ 769 reg |= PCIC_APSENA; 770 } 771 if (sc->flags & PCIC_RICOH_POWER) { 772 /* 773 * The ISA bridge have the 5V/3.3V in register 774 * 1, bit 7. However, 3.3V cards can only be 775 * detected if GPI_EN is disabled. 776 */ 777 c = sp->getb(sp, PCIC_STATUS); 778 c2 = sp->getb(sp, PCIC_CDGC); 779 if ((c & PCIC_RICOH_5VCARD) && (c2 & PCIC_GPI_EN) == 0) 780 slt->pwr.vcc = 33; 781 else 782 slt->pwr.vcc = 50; 783 } 784 /* Other power schemes here */ 785 786 if (bootverbose && slt->pwr.vcc != -1) 787 device_printf(sc->dev, "Autodetected %d.%dV card\n", 788 slt->pwr.vcc / 10, slt->pwr.vcc %10); 789 } 790 if (slt->pwr.vcc == -1) { 791 if (bootverbose) 792 device_printf(sc->dev, 793 "Couldn't autodetect voltage, assuming 5.0V\n"); 794 dodefault = 1; 795 slt->pwr.vcc = 50; 796 } 797 798 /* 799 * XXX Note: The Vpp controls varies quit a bit between bridge chips 800 * and the following might not be right in all cases. The Linux 801 * code and wildboar code bases are more complex. However, most 802 * applications want vpp == vcc and the following code does appear 803 * to do that for all bridge sets. 804 */ 805 if (slt->pwr.vpp == -1) 806 slt->pwr.vpp = slt->pwr.vcc; 807 switch(slt->pwr.vpp) { 808 default: 809 return (EINVAL); 810 case 0: 811 break; 812 case 50: 813 case 33: 814 reg |= PCIC_VPP_5V; 815 break; 816 case 120: 817 reg |= PCIC_VPP_12V; 818 break; 819 } 820 821 if (slt->pwr.vcc) 822 reg |= PCIC_VCC_ON; /* Turn on Vcc */ 823 switch(slt->pwr.vcc) { 824 default: 825 return (EINVAL); 826 case 0: 827 break; 828 case 33: 829 /* 830 * The wildboar code has comments that state that 831 * the IBM KING controller doesn't support 3.3V 832 * on the "IBM Smart PC card drive". The code 833 * intemates that's the only place they have seen 834 * it used and that there's a boatload of issues 835 * with it. I'm not even sure this is right because 836 * the only docs I've been able to find say this is for 837 * 5V power. Of course, this "doc" is just code comments 838 * so who knows for sure. 839 */ 840 if (sc->flags & PCIC_KING_POWER) { 841 reg |= PCIC_VCC_5V_KING; 842 break; 843 } 844 if (sc->flags & PCIC_VG_POWER) { 845 pcic_setb(sp, PCIC_CVSR, PCIC_CVSR_VS); 846 break; 847 } 848 if (sc->flags & PCIC_PD_POWER) { 849 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33); 850 break; 851 } 852 if (sc->flags & PCIC_RICOH_POWER) { 853 pcic_setb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33); 854 break; 855 } 856 if (sc->flags & PCIC_DF_POWER) 857 reg |= PCIC_VCC_3V; 858 break; 859 case 50: 860 if (sc->flags & PCIC_KING_POWER) 861 reg |= PCIC_VCC_5V_KING; 862 /* 863 * For all of the variant power schemes for 3.3V go 864 * ahead and turn off the 3.3V enable bit. For all 865 * bridges, the setting the Vcc on bit does the rest. 866 * Note that we don't have to turn off the 3.3V bit 867 * for the '365 step D since with the reg assigments 868 * to this point it doesn't get turned on. 869 */ 870 if (sc->flags & PCIC_VG_POWER) 871 pcic_clrb(sp, PCIC_CVSR, PCIC_CVSR_VS); 872 if (sc->flags & PCIC_PD_POWER) 873 pcic_clrb(sp, PCIC_MISC1, PCIC_MISC1_VCC_33); 874 if (sc->flags & PCIC_RICOH_POWER) 875 pcic_clrb(sp, PCIC_RICOH_MCR2, PCIC_MCR2_VCC_33); 876 break; 877 } 878 sp->putb(sp, PCIC_POWER, reg); 879 if (bootverbose) 880 device_printf(sc->dev, "Power applied\n"); 881 DELAY(300*1000); 882 if (slt->pwr.vcc) { 883 reg |= PCIC_OUTENA; 884 sp->putb(sp, PCIC_POWER, reg); 885 if (bootverbose) 886 device_printf(sc->dev, "Output enabled\n"); 887 DELAY(100*1000); 888 if (bootverbose) 889 device_printf(sc->dev, "Settling complete\n"); 890 } 891 892 /* 893 * Some chipsets will attempt to preclude us from supplying 894 * 5.0V to cards that only handle 3.3V. We seem to need to 895 * try 3.3V to paper over some power handling issues in other 896 * parts of the system. Maybe the proper detection of 3.3V cards 897 * now obviates the need for this hack, so put a printf in to 898 * warn the world about it. 899 */ 900 if (!(sp->getb(sp, PCIC_STATUS) & PCIC_POW) && dodefault) { 901 slt->pwr.vcc = 33; 902 slt->pwr.vpp = 0; 903 device_printf(sc->dev, 904 "Failed at 5.0V. Trying 3.3V. Please report message to mobile@freebsd.org\n"); 905 return (pcic_power(slt)); 906 } 907 if (bootverbose) 908 printf("Power complete.\n"); 909 return (0); 910 } 911 912 /* 913 * tell the PCIC which irq we want to use. only the following are legal: 914 * 3, 4, 5, 7, 9, 10, 11, 12, 14, 15. We require the callers of this 915 * routine to do the check for legality. 916 */ 917 static void 918 pcic_mapirq(struct slot *slt, int irq) 919 { 920 struct pcic_slot *sp = slt->cdata; 921 922 sp->sc->chip->map_irq(sp, irq); 923 } 924 925 /* 926 * pcic_reset - Reset the card and enable initial power. This may 927 * need to be interrupt driven in the future. We should likely turn 928 * the reset on, DELAY for a period of time < 250ms, turn it off and 929 * tsleep for a while and check it when we're woken up. I think that 930 * we're running afoul of the card status interrupt glitching, causing 931 * an interrupt storm because the card doesn't seem to be able to 932 * clear this pin while in reset. 933 */ 934 static void 935 pcic_reset(void *chan) 936 { 937 struct slot *slt = chan; 938 struct pcic_slot *sp = slt->cdata; 939 940 if (bootverbose) 941 device_printf(sp->sc->dev, "reset %d ", slt->insert_seq); 942 switch (slt->insert_seq) { 943 case 0: /* Something funny happended on the way to the pub... */ 944 if (bootverbose) 945 printf("\n"); 946 return; 947 case 1: /* Assert reset */ 948 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDRESET); 949 if (bootverbose) 950 printf("int is %x stat is %x\n", 951 sp->getb(sp, PCIC_INT_GEN), 952 sp->getb(sp, PCIC_STATUS)); 953 slt->insert_seq = 2; 954 timeout(pcic_reset, (void *)slt, hz/4); 955 return; 956 case 2: /* Deassert it again */ 957 pcic_setb(sp, PCIC_INT_GEN, PCIC_CARDRESET | PCIC_IOCARD); 958 if (bootverbose) 959 printf("int is %x stat is %x\n", 960 sp->getb(sp, PCIC_INT_GEN), 961 sp->getb(sp, PCIC_STATUS)); 962 slt->insert_seq = 3; 963 timeout(pcic_reset, (void *)slt, hz/4); 964 return; 965 case 3: /* Wait if card needs more time */ 966 if (bootverbose) 967 printf("int is %x stat is %x\n", 968 sp->getb(sp, PCIC_INT_GEN), 969 sp->getb(sp, PCIC_STATUS)); 970 if ((sp->getb(sp, PCIC_STATUS) & PCIC_READY) == 0) { 971 timeout(pcic_reset, (void *)slt, hz/10); 972 return; 973 } 974 } 975 slt->insert_seq = 0; 976 if (sp->controller == PCIC_PD6722 || sp->controller == PCIC_PD6710) { 977 sp->putb(sp, PCIC_TIME_SETUP0, 0x1); 978 sp->putb(sp, PCIC_TIME_CMD0, 0x6); 979 sp->putb(sp, PCIC_TIME_RECOV0, 0x0); 980 sp->putb(sp, PCIC_TIME_SETUP1, 1); 981 sp->putb(sp, PCIC_TIME_CMD1, 0xf); 982 sp->putb(sp, PCIC_TIME_RECOV1, 0); 983 } 984 selwakeuppri(&slt->selp, PZERO); 985 } 986 987 /* 988 * pcic_disable - Disable the slot. I wonder if these operations can 989 * cause an interrupt we need to acknowledge? XXX 990 */ 991 static void 992 pcic_disable(struct slot *slt) 993 { 994 struct pcic_slot *sp = slt->cdata; 995 996 pcic_clrb(sp, PCIC_INT_GEN, PCIC_CARDTYPE | PCIC_CARDRESET); 997 pcic_mapirq(slt, 0); 998 slt->pwr.vcc = slt->pwr.vpp = 0; 999 pcic_power(slt); 1000 } 1001 1002 /* 1003 * pcic_resume - Suspend/resume support for PCIC 1004 */ 1005 static void 1006 pcic_resume(struct slot *slt) 1007 { 1008 struct pcic_slot *sp = slt->cdata; 1009 1010 pcic_do_mgt_irq(sp, slt->irq); 1011 if (sp->controller == PCIC_PD6722) { 1012 pcic_setb(sp, PCIC_MISC1, PCIC_MISC1_SPEAKER); 1013 pcic_setb(sp, PCIC_MISC2, PCIC_LPDM_EN); 1014 } 1015 if (sp->slt->state != inactive) 1016 pcic_do_stat_delta(sp); 1017 } 1018 1019 int 1020 pcic_activate_resource(device_t dev, device_t child, int type, int rid, 1021 struct resource *r) 1022 { 1023 struct pccard_devinfo *devi = device_get_ivars(child); 1024 int err; 1025 1026 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL) 1027 return (bus_generic_activate_resource(dev, child, type, 1028 rid, r)); 1029 1030 switch (type) { 1031 case SYS_RES_IOPORT: { 1032 struct io_desc *ip; 1033 ip = &devi->slt->io[rid]; 1034 if (ip->flags == 0) { 1035 if (rid == 0) 1036 ip->flags = IODF_WS | IODF_16BIT | IODF_CS16; 1037 else 1038 ip->flags = devi->slt->io[0].flags; 1039 } 1040 ip->flags |= IODF_ACTIVE; 1041 ip->start = rman_get_start(r); 1042 ip->size = rman_get_end(r) - rman_get_start(r) + 1; 1043 err = pcic_io(devi->slt, rid); 1044 if (err) 1045 return (err); 1046 break; 1047 } 1048 case SYS_RES_IRQ: 1049 /* 1050 * We actually defer the activation of the IRQ resource 1051 * until the interrupt is registered to avoid stray 1052 * interrupt messages. 1053 */ 1054 break; 1055 case SYS_RES_MEMORY: { 1056 struct mem_desc *mp; 1057 if (rid >= NUM_MEM_WINDOWS) 1058 return (EINVAL); 1059 mp = &devi->slt->mem[rid]; 1060 mp->flags |= MDF_ACTIVE; 1061 mp->start = (caddr_t) rman_get_start(r); 1062 mp->size = rman_get_end(r) - rman_get_start(r) + 1; 1063 err = pcic_memory(devi->slt, rid); 1064 if (err) 1065 return (err); 1066 break; 1067 } 1068 default: 1069 break; 1070 } 1071 err = bus_generic_activate_resource(dev, child, type, rid, r); 1072 return (err); 1073 } 1074 1075 int 1076 pcic_deactivate_resource(device_t dev, device_t child, int type, int rid, 1077 struct resource *r) 1078 { 1079 struct pccard_devinfo *devi = device_get_ivars(child); 1080 int err; 1081 1082 if (dev != device_get_parent(device_get_parent(child)) || devi == NULL) 1083 return (bus_generic_deactivate_resource(dev, child, type, 1084 rid, r)); 1085 1086 switch (type) { 1087 case SYS_RES_IOPORT: { 1088 struct io_desc *ip = &devi->slt->io[rid]; 1089 ip->flags &= ~IODF_ACTIVE; 1090 err = pcic_io(devi->slt, rid); 1091 if (err) 1092 return (err); 1093 break; 1094 } 1095 case SYS_RES_IRQ: 1096 break; 1097 case SYS_RES_MEMORY: { 1098 struct mem_desc *mp = &devi->slt->mem[rid]; 1099 mp->flags &= ~(MDF_ACTIVE | MDF_ATTR); 1100 err = pcic_memory(devi->slt, rid); 1101 if (err) 1102 return (err); 1103 break; 1104 } 1105 default: 1106 break; 1107 } 1108 err = bus_generic_deactivate_resource(dev, child, type, rid, r); 1109 return (err); 1110 } 1111 1112 int 1113 pcic_setup_intr(device_t dev, device_t child, struct resource *irq, 1114 int flags, driver_intr_t *intr, void *arg, void **cookiep) 1115 { 1116 struct pccard_devinfo *devi = device_get_ivars(child); 1117 int err; 1118 1119 if (((1 << rman_get_start(irq)) & PCIC_INT_MASK_ALLOWED) == 0) { 1120 device_printf(dev, "Hardware does not support irq %ld.\n", 1121 rman_get_start(irq)); 1122 return (EINVAL); 1123 } 1124 1125 err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg, 1126 cookiep); 1127 if (err == 0) 1128 pcic_mapirq(devi->slt, rman_get_start(irq)); 1129 else 1130 device_printf(dev, "Error %d irq %ld\n", err, 1131 rman_get_start(irq)); 1132 return (err); 1133 } 1134 1135 int 1136 pcic_teardown_intr(device_t dev, device_t child, struct resource *irq, 1137 void *cookie) 1138 { 1139 struct pccard_devinfo *devi = device_get_ivars(child); 1140 1141 pcic_mapirq(devi->slt, 0); 1142 return (bus_generic_teardown_intr(dev, child, irq, cookie)); 1143 } 1144 1145 int 1146 pcic_set_res_flags(device_t bus, device_t child, int restype, int rid, 1147 u_long value) 1148 { 1149 struct pccard_devinfo *devi = device_get_ivars(child); 1150 int err = 0; 1151 1152 switch (restype) { 1153 case SYS_RES_MEMORY: { 1154 struct mem_desc *mp = &devi->slt->mem[rid]; 1155 switch (value) { 1156 case PCCARD_A_MEM_COM: 1157 mp->flags &= ~MDF_ATTR; 1158 break; 1159 case PCCARD_A_MEM_ATTR: 1160 mp->flags |= MDF_ATTR; 1161 break; 1162 case PCCARD_A_MEM_8BIT: 1163 mp->flags &= ~MDF_16BITS; 1164 break; 1165 case PCCARD_A_MEM_16BIT: 1166 mp->flags |= MDF_16BITS; 1167 break; 1168 } 1169 err = pcic_memory(devi->slt, rid); 1170 break; 1171 } 1172 default: 1173 err = EOPNOTSUPP; 1174 } 1175 return (err); 1176 } 1177 1178 int 1179 pcic_get_res_flags(device_t bus, device_t child, int restype, int rid, 1180 u_long *value) 1181 { 1182 struct pccard_devinfo *devi = device_get_ivars(child); 1183 int err = 0; 1184 1185 if (value == 0) 1186 return (ENOMEM); 1187 1188 switch (restype) { 1189 case SYS_RES_IOPORT: { 1190 struct io_desc *ip = &devi->slt->io[rid]; 1191 *value = ip->flags; 1192 break; 1193 } 1194 case SYS_RES_MEMORY: { 1195 struct mem_desc *mp = &devi->slt->mem[rid]; 1196 *value = mp->flags; 1197 break; 1198 } 1199 default: 1200 err = EOPNOTSUPP; 1201 } 1202 return (err); 1203 } 1204 1205 int 1206 pcic_set_memory_offset(device_t bus, device_t child, int rid, u_int32_t offset 1207 #if __FreeBSD_version >= 500000 1208 ,u_int32_t *deltap 1209 #endif 1210 ) 1211 { 1212 struct pccard_devinfo *devi = device_get_ivars(child); 1213 struct mem_desc *mp = &devi->slt->mem[rid]; 1214 1215 mp->card = offset; 1216 #if __FreeBSD_version >= 500000 1217 if (deltap) 1218 *deltap = 0; /* XXX BAD XXX */ 1219 #endif 1220 return (pcic_memory(devi->slt, rid)); 1221 } 1222 1223 int 1224 pcic_get_memory_offset(device_t bus, device_t child, int rid, u_int32_t *offset) 1225 { 1226 struct pccard_devinfo *devi = device_get_ivars(child); 1227 struct mem_desc *mp = &devi->slt->mem[rid]; 1228 1229 if (offset == 0) 1230 return (ENOMEM); 1231 1232 *offset = mp->card; 1233 1234 return (0); 1235 } 1236 1237 struct resource * 1238 pcic_alloc_resource(device_t dev, device_t child, int type, int *rid, 1239 u_long start, u_long end, u_long count, u_int flags) 1240 { 1241 struct pcic_softc *sc = device_get_softc(dev); 1242 1243 /* 1244 * If we're routing via pci, we can share. 1245 */ 1246 if (sc->func_route == pcic_iw_pci && type == SYS_RES_IRQ) { 1247 if (bootverbose) 1248 device_printf(child, "Forcing IRQ to %d\n", sc->irq); 1249 start = end = sc->irq; 1250 flags |= RF_SHAREABLE; 1251 } 1252 1253 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 1254 count, flags)); 1255 } 1256 1257 void 1258 pcic_do_stat_delta(struct pcic_slot *sp) 1259 { 1260 if ((sp->getb(sp, PCIC_STATUS) & PCIC_CD) != PCIC_CD) 1261 pccard_event(sp->slt, card_removed); 1262 else 1263 pccard_event(sp->slt, card_inserted); 1264 } 1265 /* 1266 * Wrapper function for pcicintr so that signatures match. 1267 */ 1268 void 1269 pcic_isa_intr(void *arg) 1270 { 1271 pcic_isa_intr1(arg); 1272 } 1273 1274 /* 1275 * PCIC timer. If the controller doesn't have a free IRQ to use 1276 * or if interrupt steering doesn't work, poll the controller for 1277 * insertion/removal events. 1278 */ 1279 void 1280 pcic_timeout(void *chan) 1281 { 1282 struct pcic_softc *sc = (struct pcic_softc *) chan; 1283 1284 if (pcic_isa_intr1(chan) != 0) { 1285 device_printf(sc->dev, 1286 "Static bug detected, ignoring hardware."); 1287 sc->slot_poll = 0; 1288 return; 1289 } 1290 sc->timeout_ch = timeout(sc->slot_poll, chan, hz/2); 1291 } 1292 1293 /* 1294 * PCIC Interrupt handler. 1295 * Check each slot in turn, and read the card status change 1296 * register. If this is non-zero, then a change has occurred 1297 * on this card, so send an event to the main code. 1298 */ 1299 int 1300 pcic_isa_intr1(void *arg) 1301 { 1302 int slot, s; 1303 u_int8_t chg; 1304 struct pcic_softc *sc = (struct pcic_softc *) arg; 1305 struct pcic_slot *sp = &sc->slots[0]; 1306 1307 s = splhigh(); 1308 for (slot = 0; slot < PCIC_CARD_SLOTS; slot++, sp++) { 1309 if (sp->slt == NULL) 1310 continue; 1311 if ((chg = sp->getb(sp, PCIC_STAT_CHG)) != 0) { 1312 /* 1313 * if chg is 0xff, then we know that we've hit 1314 * the famous "static bug" for some desktop 1315 * pcmcia cards. This is caused by static 1316 * discharge frying the poor card's mind and 1317 * it starts return 0xff forever. We return 1318 * an error and stop polling the card. When 1319 * we're interrupt based, we never see this. 1320 * The card just goes away silently. 1321 */ 1322 if (chg == 0xff) { 1323 splx(s); 1324 return (EIO); 1325 } 1326 if (chg & PCIC_CDTCH) 1327 pcic_do_stat_delta(sp); 1328 } 1329 } 1330 splx(s); 1331 return (0); 1332 } 1333 1334 int 1335 pcic_isa_mapirq(struct pcic_slot *sp, int irq) 1336 { 1337 irq = host_irq_to_pcic(irq); 1338 if (irq == 0) 1339 pcic_clrb(sp, PCIC_INT_GEN, 0xF); 1340 else 1341 sp->putb(sp, PCIC_INT_GEN, 1342 (sp->getb(sp, PCIC_INT_GEN) & 0xF0) | irq); 1343 return (0); 1344 }
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